JP2004311539A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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Publication number
JP2004311539A
JP2004311539A JP2003099846A JP2003099846A JP2004311539A JP 2004311539 A JP2004311539 A JP 2004311539A JP 2003099846 A JP2003099846 A JP 2003099846A JP 2003099846 A JP2003099846 A JP 2003099846A JP 2004311539 A JP2004311539 A JP 2004311539A
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JP
Japan
Prior art keywords
fixing
connection conductor
clips
semiconductor device
plate
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Granted
Application number
JP2003099846A
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Japanese (ja)
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JP3739091B2 (en
Inventor
Masataka Nanba
正孝 難波
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Toshiba Corp
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Toshiba Corp
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Priority to JP2003099846A priority Critical patent/JP3739091B2/en
Publication of JP2004311539A publication Critical patent/JP2004311539A/en
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Publication of JP3739091B2 publication Critical patent/JP3739091B2/en
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To realize a method of manufacturing a semiconductor device which is capable of improving both the reliability of the semiconductor device and the yield of an assembly process. <P>SOLUTION: The one ends of a first clip 30 and a second clip 31 are placed on low-melting solders 23c and 23d of a second lead terminal 14 and a third terminal 15, respectively, and the other ends of the clips 30 and 31 are placed on the low-melting solders 23a and 23b of a source electrode 21 and a gate electrode 22, respectively. Then, without moving a frame 10, both the ends of the clips 30 and 31 are irradiated with a laser beam at the mounting spot to melt the low-melting solders 23a, 23b, 23c, and 23d, whereby the clips 30 and 31, the lead terminals 14 and 15, and the electrodes 21 and 22 are fixed together by alloying them. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置、特に半導体チップの電極とリード端子とを板状接続導体で接続した構造のパワーＭＯＳＦＥＴ、ＩＧＢＴ等の電力用の半導体装置の製造方法に関する。
【０００２】
【従来の技術】
近年、パワーＭＯＳＦＥＴまたはＩＧＢＴ等の電力用半導体装置の製造においては、製造コストの低減および接続導体の断線防止のために、高価な金線またはアルミニウム線によるワイヤボンディングの代わりに、Ｃｕ等からなる板状接続導体（以下、これをクリップと呼称する）を用いて半導体チップの電極とリード端子とを接続している。
【０００３】
この種の半導体装置の製造方法としては、図５に示すものが知られている（例えば、特許文献１参照。）。
【０００４】
この特許文献１に開示された半導体装置の製造方法は、図５に示すように、まず、先端部にベッド１０２が設けられた第１のリード端子１０１とこのベッド１０２に一方端部がそれぞれ近接配置された第２および第３のリード端子１０３、１０４とを有するリードフレーム１００を用意し、このリードフレーム１００の第１のリード端子１０１のベッド１０２上に、電極１１１、１１２を有する三端子型のダイオードからなる半導体チップ１１０を高融点半田にて固着する。
【０００５】
次に、半導体チップ１１０の電極１１１、１１２上、第２および第３のリード端子１０３、１０４の一方端部上にそれぞれ低融点半田を形成する。
【０００６】
次いで、第１のクリップ１２０を、その一方端部が低融点半田を形成した第２のリード端子１０３の一方端部上に、その他方端部が低融点半田を形成した電極１１１上に位置するように載置する。これと同様に、第２のクリップ１２１を、その一方端部が第３のリード端子１０４の一方端部上に、その他方端部が電極１１２上に載置する。
【０００７】
次に、これを加熱炉、加熱装置等の固着装置まで搬送し、その固着装置において、第１のクリップ１２０の一方端部を第２のリード端子１０３に、その他方端部を電極１１１にそれぞれ半田を介して固着・接続する。また、これと同様に、第２のクリップ１２１の一方端部を第３のリード端子１０４の一方端部に、その他方端部を電極１１２にそれぞれ半田を介して固着・接続している。
【０００８】
【特許文献１】
特開平８−１４８６２３号公報（３頁−４頁、図２）
【０００９】
【発明が解決しようとする課題】
上述した半導体装置の製造方法おいては、クリップを載置する工程と、クリップを電極およびリード端子に固着する工程とが異なるため、載置する工程と固着する工程の間に搬送する工程が介在する。従って、搬送時の振動または他の製造装置との接触等により、いわゆるクリップの位置ズレが発生し、半導体装置の信頼性の低下や組立て工程の歩留の低下が生じ、特に、複雑な構造や、平面でなく段差を有するクリップの場合には、特にその傾向が顕著であるという問題を有している。
【００１０】
本発明は、上記問題に鑑みてなされたもので、その目的とするところは、半導体装置の信頼性および組立て工程の歩留の向上を図ることが可能な半導体装置の製造方法を提供することにある。
【００１１】
【課題を解決するための手段】
上記目的を達成するために、半導体装置の一態様の製造方法は、複数のリード端子のうちの１つのリード端子に半導体チップを固着する工程と、前記リード端子のうちの他のリード端子に板状接続導体の一方端部を導電性固着部材を介して載置し、且つその他方端部を前記半導体チップの電極上に前記導電性固着部材を介して載置する工程と、この載置工程において、前記板状接続導体を前記リード端子および前記電極にそれぞれ固着する工程とを具備することを特徴とする。
【００１２】
【発明の実施の形態】
以下本発明の実施形態について図面を参照しながら説明する。
【００１３】
（第１の実施の形態）
まず、本発明の第１の実施の形態に係わる半導体装置の製造方法について、図１乃至３を参照して説明する。本実施の形態は、パワーＭＯＳＦＥＴを製造する場合の例である。
【００１４】
図１はパワーＭＯＳＦＥＴの製造工程を示す工程平面図、図２は図１（ｃ）のＡ−Ａ線に沿う拡大断面図、図３は図１（ｄ）のＢ−Ｂ線に沿う拡大断面図である。
【００１５】
図１（ａ）に示すように、まず、リードフレーム１０および半導体チップとしてパワーＭＯＳＦＥＴチップ２０を用意する。
【００１６】
このリードフレーム１０は、その長手方向に沿う左右両縁部にサイドフレーム１１ａ、１１ｂを有し、この両サイドフレーム１１ａ、１１ｂのうちの一方のサイドフレーム１１ａには、第１のリード端子１２が内向きに突出するように一体的に形成されている。この第１のリード端子１２の先端部には、半導体チップを搭載するためのベッド１３が形成されている。また、他方のサイドフレーム１１ｂには、第２および第３のリード端子１４、１５が内向きに突出するように形成され、その先端部が第１のリード端子１２のベッド１３と近接して向合うように配置されている。
【００１７】
一方、パワーＭＯＳＦＥＴチップ２０は、その上面にソース電極２１およびゲート電極２２を、下面にドレイン電極をそれぞれ有する。
【００１８】
そして、このリードフレーム１０の第１のリード端子１２のベッド１３上に高融点半田を形成した後に、パワーＭＯＳＦＥＴチップ２０を搭載し、固着する。
【００１９】
なお、このパワーＭＯＳＦＥＴチップ２０とベッド１３との固着は、高融点半田の代わりにＢａＮｉ／ＡｕＧｅまたはＴｉ／ＡｕからなるメタルをパワーＭＯＳＦＥＴ２０下面に形成し、ベッド１３に固着させてもよい。
【００２０】
次に、図１（ｂ）に示すように、パワーＭＯＳＦＥＴチップ２０のソース電極２１、ゲート電極２２上、第２および第３のリード端子１４、１５の一方端部上にそれぞれ導電性固着部材、例えば融点２１０℃以下の低融点半田２３ａ、２３ｂ、２３ｃ、２３ｄを形成する。この低融点半田としては、ＳｎＰｂ系、ＳｎＢｉ系、ＳｎＡｇＣｕＩｎ系、およびＳｎＺｎ系等の共晶半田のいずれでもよい。また、低融点半田の代わりに、半田バンプ、Ａｕバンプ、或いは金属、または導電性接着材を用いてもよい。
【００２１】
次いで、図１（ｃ）に示すように、細長い方形状の板状接続導体、例えば銅（Ｃｕ）製の第１のクリップ３０を、その一方端部が第２のリード端子１４の低融点半田２３ｃ上に、その他方端部がパワーＭＯＳＦＥＴチップ２０のソース電極２１の低融点半田２３ａ上に位置するように載置する。これと同様に、Ｃｕ製の第２のクリップ３１を、その一方端部が第３のリード端子１５の低融点半田２３ｄ上に、その他方端部がパワーＭＯＳＦＥＴチップ２０のゲート電極２２の低融点半田２３ｂ上に位置するように載置する。このクリップ３０，３１は、Ｃｕに限らず、Ａｌ（アルミニウム）、またはＣｕ合金箔で形成してもよい。
【００２２】
ここで、上記クリップ３０、３１の供給方法としては、例えば、予め所定形状に曲げ加工された複数のクリップ３０，３１を異なるパーツフィーダにそれぞれ投入し、各パーツフィーダからクリップを一旦１列状に排出し、さらに、この排出されたクリップを個々に吸着コレット等により吸着保持した状態で、所定位置に移送するといったものが適用できる。また、クリップ３０，３１の載置時には、画像処理装置で、クリップ３０，３１の載置状態を認識し、１回の移送毎に第１および第２のクリップ３０、３１の位置を設定し直すことも可能である。
【００２３】
続いて、低融点半田２３ａ、２３ｃ上に位置する第１のクリップ３０の両端部および低融点半田２３ｂ、２３ｄ上に位置する第２のクリップ３１の両端部に、それぞれレーザ光を照射することにより、第１のクリップ３０の端部と第２のリード端子および１４ソース電極２１間、第２のクリップ３１の端部と第３のリード端子１５およびゲート電極２２間の低融点半田２３ａ、２３ｂ、２３ｃ、２３ｄをそれぞれ溶融させ、クリップ３０、３１の一方端部と第２および第３のリード端子１４，１５、その他方端部とソースおよびゲート電極２１、２２との双方を合金化させることにより、それぞれ固着・接続する。
【００２４】
本実施の形態では、第１および第２のクリップ３０、３１を載置した後は、移動させることなく、その載置工程において、第１および第２のクリップ３０、３１を、第１および第２のリード端子１４、１５とソースおよびゲート電極２１、２２とに固着・接続しているので、クリップの位置ズレは発生する恐れがない。
【００２５】
なお、レーザ光の照射方法としては、図２に示すように、半導体レーザ（ＬＤ）を有するレーザ発生装置４０、レーザ発生装置４０から発生したレーザ光４１を誘導する多数本からなる光ファイバー４２、レーザ光４１を任意の場所に照射するためにレーザ光４１の進路を変更（４１ａ或いは４１ｂ）させる反射ミラー４３からなるレーザ加熱装置を用いて、レーザ光４１ａ、４１ｂを照射する。また、レーザ光源としては、ＬＤの代わりにＹＡＧレーザ、エキシマレーザ、または炭酸ガスレーザ等を用いて間欠的にレーザ光を照射してもよい。
【００２６】
更に、この第１および第２のクリップ３０、３１を第１および第２のリード端子１４、１５とソースおよびゲート電極２１、２２とに固着・接続したリードフレーム１０を移送して、周知のモールド成形金型により、モールド樹脂５０でパワーＭＯＳＦＥＴチップ２０およびその周辺に覆う。
【００２７】
次いで、周知の打ち抜き金型により、第１乃至第３のリード端子１２、１４、１５の所定位置を切断する。以上のような方法により、図１（ｄ）および図３に示すパワーＭＯＳＦＥＴ１が製造される。
【００２８】
本実施の形態のパワーＭＯＳＦＥＴの製造方法では、第１および第２のクリップ３０、３１を、ソース電極２１の低融点半田２３ａと第２のリード端子１４の低融点半田２３ｃ上、およびゲート電極２２の低融点半田２３ｂと第３のリード端子１５の低融点半田２３ｄ上にそれぞれ載置した後、フレーム１０を移動させることなく載置した場所で、レーザ光を照射させて第１および第２のクリップ３０、３１を固着・接続させているので、クリップの位置ズレが発生する恐れがない。
【００２９】
従って、半導体装置の信頼性および組立て工程の歩留の向上が図れる。
【００３０】
（第２の実施の形態）
次に、本発明の第２の実施の形態に係わるパワーＭＯＳＦＥＴの製造方法について、図４を参照して説明する。図４はパワーＭＯＳＦＥＴの製造工程を示す拡大工程断面図である。
【００３１】
本実施の形態では、第１の実施の形態におけるクリップの固着・接続方法をランプ加熱に変更した点で異なり、それ以外の構成については同一であり、以下異なる点のみ説明する。
【００３２】
ランプ加熱方法としては、図４に示すように、楕円面鏡を有するキセノンランプ６０の角度を任意に変更させて、楕円面鏡により集光されたランプ光６１、６２を第１および第２のクリップ３０，３１の両端部にそれぞれ照射する。即ち、低融点半田２３ａ、２３ｃ上に位置する第１のクリップ３０、および低融点半田２３ｂ、２３ｄ上に位置する第２のクリップ３１にランプ光６１、６２をそれぞれ照射することにより、第１のクリップ３０と第２のリード端子１４およびソース電極２１間、第２のクリップ３１と第３のリード端子１５およびゲート電極２２間の低融点半田２３ａ、２３ｂ、２３ｃ、２３ｄをそれぞれ溶融させ、第１および第２のクリップ３０，３１の一方端部と第２および第３のリード端子１４、１５、その他方端部とソースおよびゲート電極２１、２２との双方を合金化させることにより、それぞれ固着・接続する。なお、キセノンランプに代えて、ハロゲンランプを用いてもよい。
【００３３】
本実施の形態のパワーＭＯＳＦＥＴの製造方法では、第１および第２のクリップ３０、３１を、ソース電極２１の低融点半田２３ａと第２のリード端子１４の低融点半田２３ｃ上、およびゲート電極２２の低融点半田２３ｂと第３のリード端子１５の低融点半田２３ｄ上にそれぞれ載置した後、フレーム１０を移動させることなく載置した場所で、ランプ光を照射させて第１および第２のクリップ３０、３１を固着・接続させているので、クリップの位置ズレが発生する恐れがない。
【００３４】
従って、半導体装置の信頼性および組立て工程の歩留の向上が図れる。
【００３５】
本発明は、上記実施の形態に限定されるものではなく、発明の趣旨を逸脱しない範囲で、種々、変更して実施してもよい。
【００３６】
例えば、第１および第２の実施の形態においては、第１および第２のクリップ３０、３１と第２および第３のリード端子１４、１５およびソースおよびゲート電極２１、２２との固着・接続を、その第１および第２のクリップ３０，３１を載置した後、移動させることなく、その載置工程において実施しているが、第１および第２のクリップ３０，３１をソースおよびゲート電極２１、２２上、第１および第２のリード端子１４，１５上にそれぞれ載置した後に、上述の実施の形態よりも出力を抑制したレーザ光、またはランプ光を照射し、第１および第２のクリップ３０，３１が移動時に位置ズレしないように、第１および第２のクリップ３０、３１の両端部のうちの少なくとも一方を仮固定してもよい。或いは、第１および第２のクリップ３０、３１の両端部のうちの一方の端部のみ、固着・接続しただけでもよい。
【００３７】
この場合は、第１および第２のクリップ３０，３１の少なくとも一方を仮固定、または一方の端部のみを固着したフレーム１０を移送し、加熱炉による加熱固着、加熱圧着、或いは超音波併用加熱圧着等の固着装置を用いて第１および第２のクリップ３０、３１の仮固定部分を、最終的に、それぞれ固着・接続させる。或いは、仮固定、または固着・接続していない他方の端部のみを最終的に固着・接続する。
【００３８】
また、上記実施の形態では、パワーＭＯＳＦＥＴからなる半導体チップを搭載した半導体装置の製造方法について説明したが、ＩＧＢＴからなる半導体チップを搭載した半導体装置、数種類の高耐圧デバイスを搭載したパワー半導体モジュール等の製造方法にも適用できる。
【００３９】
また、第１および第２の実施形態では、板状のクリップを用いたが、リード端子および電極との接触性を向上させるために、クリップに突起を設けたり、クリップ表面をけがいたり、スリットを設けるたり、或いは多数の穴を設けたりしてもよい。
【００４０】
【発明の効果】
本発明によれば、半導体装置の信頼性および組立て工程の歩留の向上が図れる。
【図面の簡単な説明】
【図１】本発明の第１の実施の形態に係わる半導体装置の製造工程を工程順に示す平面図。
【図２】図１（ｃ）のＡ−Ａ線に沿う拡大断面図。
【図３】図１（ｄ）のＢ−Ｂ線に沿う拡大断面図。
【図４】本発明の第２の実施の形態に係わる半導体装置の製造工程を示す拡大断面図。
【図５】従来の半導体装置の製造方法を説明するため平面図。
【符号の説明】
１ パワーＭＯＳＦＥＴ（半導体装置）
１０、１００ リードフレーム
１１ａ、１１ｂ サイドフレーム
１２、１０１ 第１のリード端子
１３，１０２ ベッド
１４、１０３ 第２のリード端子
１５、１０４ 第３のリード端子
２０ パワーＭＯＳＦＥＴチップ（半導体チップ）
２１ ソース電極
２２ ゲート電極
２３ａ、２３ｂ、２３ｃ、２３ｄ 低融点半田（導電性固着部材）
３０、１２０ 第１のクリップ
３１、１２１ 第２のクリップ
５０ モールド樹脂
４１、４１ａ、４１ｂ レーザ光
４０ レーザ発生装置
４２ 光ファイバー
４３ 反射ミラー
６０ キセノンランプ
６１、６２ ランプ光
１１０ 半導体チップ
１１１、１１２ 電極[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device, particularly a power semiconductor device such as a power MOSFET or an IGBT having a structure in which an electrode of a semiconductor chip and a lead terminal are connected by a plate-shaped connection conductor.
[0002]
[Prior art]
2. Description of the Related Art In recent years, in the manufacture of power semiconductor devices such as power MOSFETs or IGBTs, in order to reduce manufacturing costs and prevent disconnection of connection conductors, a plate made of Cu or the like is used instead of expensive gold or aluminum wire bonding. The electrodes of the semiconductor chip and the lead terminals are connected using a connection conductor (hereinafter, referred to as a clip).
[0003]
As a method for manufacturing this type of semiconductor device, a method shown in FIG. 5 is known (for example, see Patent Document 1).
[0004]
In the method of manufacturing a semiconductor device disclosed in Patent Document 1, as shown in FIG. 5, first, a first lead terminal 101 having a bed 102 provided at a tip end thereof and one end thereof being close to the bed 102 respectively. A lead frame 100 having second and third lead terminals 103 and 104 arranged is prepared, and a three-terminal type having electrodes 111 and 112 on a bed 102 of the first lead terminal 101 of the lead frame 100 is prepared. The semiconductor chip 110 composed of the diode is fixed by high melting point solder.
[0005]
Next, low melting point solder is formed on the electrodes 111 and 112 of the semiconductor chip 110 and on one end of the second and third lead terminals 103 and 104, respectively.
[0006]
Next, one end of the first clip 120 is located on one end of the second lead terminal 103 on which the low melting point solder is formed, and the other end is located on the electrode 111 on which the low melting point solder is formed. As shown. Similarly, one end of the second clip 121 is placed on one end of the third lead terminal 104, and the other end is placed on the electrode 112.
[0007]
Next, this is transported to a fixing device such as a heating furnace or a heating device, where one end of the first clip 120 is connected to the second lead terminal 103 and the other end is connected to the electrode 111. Fix and connect via solder. Similarly, one end of the second clip 121 is fixedly connected to one end of the third lead terminal 104 and the other end is connected to the electrode 112 via solder.
[0008]
[Patent Document 1]
JP-A-8-148623 (pages 3-4, FIG. 2)
[0009]
[Problems to be solved by the invention]
In the above-described method for manufacturing a semiconductor device, the step of mounting the clip is different from the step of fixing the clip to the electrode and the lead terminal. I do. Therefore, a so-called clip misalignment occurs due to vibration at the time of transport or contact with another manufacturing apparatus, etc., thereby lowering the reliability of the semiconductor device and lowering the yield of the assembling process. In the case of a clip having a step instead of a plane, there is a problem that the tendency is particularly remarkable.
[0010]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving the reliability of the semiconductor device and the yield of an assembling process. is there.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, a method of manufacturing a semiconductor device according to one embodiment includes a step of fixing a semiconductor chip to one of a plurality of lead terminals and a step of attaching a semiconductor chip to another of the lead terminals. Placing one end of the connection conductor via a conductive fixing member, and placing the other end on the electrode of the semiconductor chip via the conductive fixing member; and And fixing the plate-shaped connection conductor to the lead terminal and the electrode, respectively.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0013]
(First Embodiment)
First, a method for manufacturing a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. This embodiment is an example in the case of manufacturing a power MOSFET.
[0014]
1 is a process plan view showing a manufacturing process of the power MOSFET, FIG. 2 is an enlarged sectional view taken along line AA in FIG. 1C, and FIG. 3 is an enlarged sectional view taken along line BB in FIG. FIG.
[0015]
As shown in FIG. 1A, first, a power MOSFET chip 20 is prepared as a lead frame 10 and a semiconductor chip.
[0016]
The lead frame 10 has side frames 11a and 11b at both left and right edges along the longitudinal direction, and a first lead terminal 12 is provided on one of the side frames 11a and 11b. They are integrally formed so as to protrude inward. At the tip of the first lead terminal 12, a bed 13 for mounting a semiconductor chip is formed. The second and third lead terminals 14 and 15 are formed on the other side frame 11 b so as to protrude inward, and the tip ends thereof are positioned close to the bed 13 of the first lead terminal 12. It is arranged to fit.
[0017]
On the other hand, the power MOSFET chip 20 has a source electrode 21 and a gate electrode 22 on its upper surface and a drain electrode on its lower surface.
[0018]
Then, after a high melting point solder is formed on the bed 13 of the first lead terminal 12 of the lead frame 10, the power MOSFET chip 20 is mounted and fixed.
[0019]
Note that the power MOSFET chip 20 and the bed 13 may be fixed to the bed 13 by forming a metal made of BaNi / AuGe or Ti / Au on the lower surface of the power MOSFET 20 instead of the high melting point solder.
[0020]
Next, as shown in FIG. 1B, a conductive fixing member is provided on the source electrode 21 and the gate electrode 22 of the power MOSFET chip 20 and on one end of the second and third lead terminals 14 and 15, respectively. For example, low melting point solders 23a, 23b, 23c and 23d having a melting point of 210 ° C. or less are formed. The low melting point solder may be any of eutectic solders such as SnPb, SnBi, SnAgCuIn, and SnZn. Further, instead of the low melting point solder, a solder bump, an Au bump, a metal, or a conductive adhesive may be used.
[0021]
Then, as shown in FIG. 1C, an elongated rectangular plate-like connection conductor, for example, a first clip 30 made of copper (Cu) is soldered to one end of the low-melting solder of the second lead terminal 14. The other end is placed on the low-melting-point solder 23a of the source electrode 21 of the power MOSFET chip 20 on 23c. Similarly, one end of the second clip 31 made of Cu is placed on the low melting point solder 23d of the third lead terminal 15 and the other end is placed on the low melting point of the gate electrode 22 of the power MOSFET chip 20. It is placed so as to be located on the solder 23b. The clips 30 and 31 are not limited to Cu and may be formed of Al (aluminum) or Cu alloy foil.
[0022]
Here, as a method of supplying the clips 30 and 31, for example, a plurality of clips 30 and 31 previously bent into a predetermined shape are put into different parts feeders, and the clips from each part feeder are once arranged in a line. The clip may be discharged, and the discharged clip may be individually transferred to a predetermined position while being suction-held by a suction collet or the like. When the clips 30 and 31 are mounted, the image processing apparatus recognizes the mounting state of the clips 30 and 31 and resets the positions of the first and second clips 30 and 31 for each transfer. It is also possible.
[0023]
Subsequently, both ends of the first clip 30 located on the low melting point solders 23a and 23c and both ends of the second clip 31 located on the low melting point solders 23b and 23d are irradiated with laser light, respectively. Low melting point solders 23a and 23b between the end of the first clip 30 and the second lead terminal and the source electrode 21 and between the end of the second clip 31 and the third lead terminal 15 and the gate electrode 22, 23c and 23d are melted, respectively, and one end of the clips 30 and 31 and the second and third lead terminals 14 and 15, and the other end and both the source and gate electrodes 21 and 22 are alloyed. , Respectively.
[0024]
In the present embodiment, after the first and second clips 30, 31 are placed, the first and second clips 30, 31 are moved in the placing step without being moved. Since the second lead terminals 14 and 15 and the source and gate electrodes 21 and 22 are fixedly connected to each other, there is no danger that the position of the clip will shift.
[0025]
As a method for irradiating the laser beam, as shown in FIG. 2, a laser generator 40 having a semiconductor laser (LD), an optical fiber 42 composed of a number of fibers for guiding a laser beam 41 generated from the laser generator 40, a laser The laser beams 41a and 41b are irradiated using a laser heating device including a reflection mirror 43 that changes the path (41a or 41b) of the laser beam 41 to irradiate the light 41 to an arbitrary place. As a laser light source, a YAG laser, an excimer laser, a carbon dioxide laser, or the like may be used instead of the LD to intermittently emit laser light.
[0026]
Further, the lead frame 10 in which the first and second clips 30 and 31 are fixed and connected to the first and second lead terminals 14 and 15 and the source and gate electrodes 21 and 22 is transferred to a well-known mold. The power MOSFET chip 20 and its surroundings are covered with a molding resin by a molding resin 50.
[0027]
Next, predetermined positions of the first to third lead terminals 12, 14, 15 are cut by a known punching die. The power MOSFET 1 shown in FIGS. 1D and 3 is manufactured by the above method.
[0028]
In the method for manufacturing a power MOSFET according to the present embodiment, the first and second clips 30 and 31 are attached to the low melting point solder 23 a of the source electrode 21 and the low melting point solder 23 c of the second lead terminal 14, and the gate electrode 22. After being placed on the low melting point solder 23b of the third lead terminal 15 and the low melting point solder 23d of the third lead terminal 15, respectively, the laser light is irradiated at the place where the frame 10 is placed without moving the first and second frames. Since the clips 30 and 31 are fixedly connected to each other, there is no possibility that the positional shift of the clips occurs.
[0029]
Therefore, the reliability of the semiconductor device and the yield of the assembling process can be improved.
[0030]
(Second embodiment)
Next, a method for manufacturing a power MOSFET according to the second embodiment of the present invention will be described with reference to FIG. FIG. 4 is an enlarged process cross-sectional view showing the process of manufacturing the power MOSFET.
[0031]
The present embodiment is different from the first embodiment in that the method of fixing and connecting the clips in the first embodiment is changed to lamp heating, and other configurations are the same. Only the different points will be described below.
[0032]
As a lamp heating method, as shown in FIG. 4, the angle of the xenon lamp 60 having an ellipsoidal mirror is arbitrarily changed, and the lamp lights 61 and 62 condensed by the ellipsoidal mirror are converted into first and second lamps. Irradiate both ends of the clips 30, 31 respectively. That is, the first clip 30 located on the low melting point solders 23a and 23c and the second clip 31 located on the low melting point solders 23b and 23d are irradiated with the lamp lights 61 and 62, respectively, so that the first The low-melting solders 23a, 23b, 23c, and 23d between the clip 30 and the second lead terminal 14 and the source electrode 21 and between the second clip 31 and the third lead terminal 15 and the gate electrode 22 are melted to form the first And one end of the second clips 30 and 31 and the second and third lead terminals 14 and 15, and the other end and both the source and gate electrodes 21 and 22 are alloyed to fix and secure Connecting. Note that a halogen lamp may be used instead of the xenon lamp.
[0033]
In the method for manufacturing a power MOSFET according to the present embodiment, the first and second clips 30 and 31 are attached to the low melting point solder 23 a of the source electrode 21 and the low melting point solder 23 c of the second lead terminal 14, and the gate electrode 22. After being placed on the low melting point solder 23b of the third lead terminal 15 and the low melting point solder 23d of the third lead terminal 15, respectively, the frame 10 is placed without being moved, and the lamp light is irradiated to the first and second places. Since the clips 30 and 31 are fixedly connected to each other, there is no possibility that the positional shift of the clips occurs.
[0034]
Therefore, the reliability of the semiconductor device and the yield of the assembling process can be improved.
[0035]
The present invention is not limited to the above embodiment, and may be implemented with various modifications without departing from the spirit of the invention.
[0036]
For example, in the first and second embodiments, the fixing and connection between the first and second clips 30 and 31 and the second and third lead terminals 14 and 15 and the source and gate electrodes 21 and 22 are performed. After the first and second clips 30 and 31 are mounted, they are carried out in the mounting step without being moved, but the first and second clips 30 and 31 are connected to the source and gate electrodes 21. , 22 and the first and second lead terminals 14 and 15, respectively, and then irradiate the first and second laser beams or the lamp light with the output suppressed more than in the above-described embodiment. At least one of both ends of the first and second clips 30, 31 may be temporarily fixed so that the clips 30, 31 do not shift during movement. Alternatively, only one end of both ends of the first and second clips 30 and 31 may be fixed and connected.
[0037]
In this case, the frame 10 to which at least one of the first and second clips 30 and 31 is temporarily fixed, or to which only one end is fixed, is transferred, and is fixed by heating with a heating furnace, thermocompression bonding, or heating combined with ultrasonic waves. The temporary fixing portions of the first and second clips 30 and 31 are finally fixed and connected using a fixing device such as crimping. Alternatively, only the other end that is not temporarily fixed or fixed and connected is finally fixed and connected.
[0038]
Also, in the above-described embodiment, a method of manufacturing a semiconductor device having a semiconductor chip made of a power MOSFET is described. However, a semiconductor device having a semiconductor chip made of an IGBT, a power semiconductor module having several kinds of high voltage devices, and the like are described. Can also be applied to the manufacturing method.
[0039]
In the first and second embodiments, the plate-shaped clip is used. However, in order to improve the contact with the lead terminal and the electrode, a projection is provided on the clip, the clip surface is scribed, or a slit is formed. It may be provided or a number of holes may be provided.
[0040]
【The invention's effect】
According to the present invention, the reliability of the semiconductor device and the yield of the assembling process can be improved.
[Brief description of the drawings]
FIG. 1 is a plan view showing a step of manufacturing a semiconductor device according to a first embodiment of the present invention in the order of steps;
FIG. 2 is an enlarged sectional view taken along line AA of FIG. 1 (c).
FIG. 3 is an enlarged sectional view taken along line BB of FIG. 1 (d).
FIG. 4 is an enlarged cross-sectional view showing a manufacturing process of a semiconductor device according to a second embodiment of the present invention.
FIG. 5 is a plan view for explaining a conventional method for manufacturing a semiconductor device.
[Explanation of symbols]
1 Power MOSFET (semiconductor device)
10, 100 Lead frame 11a, 11b Side frame 12, 101 First lead terminal 13, 102 Bed 14, 103 Second lead terminal 15, 104 Third lead terminal 20 Power MOSFET chip (semiconductor chip)
21 Source electrode 22 Gate electrode 23a, 23b, 23c, 23d Low melting point solder (conductive fixing member)
30, 120 First clip 31, 121 Second clip 50 Mold resin 41, 41a, 41b Laser light 40 Laser generator 42 Optical fiber 43 Reflection mirror 60 Xenon lamp 61, 62 Lamp light 110 Semiconductor chip 111, 112 Electrode

Claims (8)

複数のリード端子のうちの１つのリード端子に半導体チップを固着する工程と、
前記リード端子のうちの他のリード端子に板状接続導体の一方端部を導電性固着部材を介して載置し、且つその他方端部を前記半導体チップの電極上に前記導電性固着部材を介して載置する工程と、
この載置工程において、前記板状接続導体を前記リード端子および前記電極にそれぞれ固着する工程と、
を具備することを特徴とする半導体装置の製造方法。Fixing a semiconductor chip to one of the plurality of lead terminals;
One end of the plate-shaped connection conductor is placed on another of the lead terminals via a conductive fixing member, and the other end of the plate-shaped connection conductor is placed on the electrode of the semiconductor chip. Mounting via
In this mounting step, a step of fixing the plate-shaped connection conductor to each of the lead terminal and the electrode,
A method for manufacturing a semiconductor device, comprising: 前記固着工程は、レーザ光を前記板状接続導体の端部に照射することにより行うことを特徴とする請求項１記載の半導体装置の製造方法。2. The method according to claim 1, wherein the fixing step is performed by irradiating a laser beam to an end of the plate-shaped connection conductor. 前記固着工程は、ランプ光を前記板状接続導体の端部に照射することにより行うことを特徴とする請求項１記載の半導体装置の製造方法。2. The method according to claim 1, wherein the fixing step is performed by irradiating an end of the plate-shaped connection conductor with lamp light. 複数のリード端子のうちの１つのリード端子に半導体チップを固着する工程と、
前記リード端子のうちの他のリード端子に板状接続導体の一方端部を導電性固着部材を介して載置し、且つその他方端部を前記半導体チップの電極上に前記導電性固着部材を介して載置する工程と、
この載置工程において、前記板状接続導体の両端部うちの少なくとも一方を仮固定する工程と、
前記仮固定後、固着装置に搬送して、前記板状接続導体と前記リード端子および前記板状接続導体と前記電極をそれぞれ固着する工程と、
を具備することを特徴とする半導体装置の製造方法。Fixing a semiconductor chip to one of the plurality of lead terminals;
One end of the plate-shaped connection conductor is placed on another of the lead terminals via a conductive fixing member, and the other end of the plate-shaped connection conductor is placed on the electrode of the semiconductor chip. Mounting via
In this mounting step, a step of temporarily fixing at least one of both ends of the plate-shaped connection conductor,
After the temporary fixing, transported to a fixing device, a step of fixing the plate-shaped connection conductor and the lead terminal and the plate-shaped connection conductor and the electrode, respectively,
A method for manufacturing a semiconductor device, comprising: 前記固着工程は、レーザ光を前記板状接続導体の端部に照射することにより行うことを特徴とする請求項４記載の半導体装置の製造方法。The method according to claim 4, wherein the fixing step is performed by irradiating a laser beam to an end of the plate-shaped connection conductor. 前記固着工程は、ランプ光を前記板状接続導体の端部に照射することにより行うことを特徴とする請求項４記載の半導体装置の製造方法。The method according to claim 4, wherein the fixing step is performed by irradiating a lamp light to an end of the plate-shaped connection conductor. 前記導電性固着部材は、半田、半田バンプ、Ａｕバンプ、或いは金属から選ばれた１つであることを特徴とする請求項１乃至６のいずれか１項記載の半導体装置の製造方法。7. The method according to claim 1, wherein the conductive fixing member is one selected from a solder, a solder bump, an Au bump, and a metal. 前記リード端子は、リードフレームにより構成されてなることを特徴とする請求項１乃至６のいずれか１項記載の半導体装置の製造方法。7. The method of manufacturing a semiconductor device according to claim 1, wherein said lead terminal is formed of a lead frame.
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