JP2004289087A - Method of manufacturing laminated ceramic electronic component - Google Patents

Method of manufacturing laminated ceramic electronic component Download PDF

Info

Publication number
JP2004289087A
JP2004289087A JP2003082527A JP2003082527A JP2004289087A JP 2004289087 A JP2004289087 A JP 2004289087A JP 2003082527 A JP2003082527 A JP 2003082527A JP 2003082527 A JP2003082527 A JP 2003082527A JP 2004289087 A JP2004289087 A JP 2004289087A
Authority
JP
Japan
Prior art keywords
ceramic
temperature
heat
raw material
multilayer ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003082527A
Other languages
Japanese (ja)
Inventor
Jun Ikeda
潤 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2003082527A priority Critical patent/JP2004289087A/en
Publication of JP2004289087A publication Critical patent/JP2004289087A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture a laminated ceramic electronic capacitor which is superior in electrical characteristics and reliability even though the firing temperature is low. <P>SOLUTION: A ceramic raw powder composed of BaTiO<SB>3</SB>etc. and at least a part of additive components added to the same are mixed and heat-treated at a temperature higher than a firing temperature of the laminated ceramic capacitor to obtain the heat-treated raw powder. Since each powder constituting the heat-treated raw powder has a core-shell structure by this treatment, even if a ceramic green sheet formed of ceramic slurry composed of this powder is fired at a low temperature, the core-shell structure can be constituted in a ceramic layer of the laminated ceramic capacitor. Preparing the ceramic layer having the core-shell structure, the laminated ceramic electronic capacitor which is superior in the electrical characteristics and reliability can be formed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
この発明は、積層セラミック電子部品の製造方法、特に、積層セラミック電子部品に用いるセラミックスラリーの作製方法に関するものである。
【0002】
【従来の技術】
積層セラミック電子部品である積層セラミックコンデンサは、近年、多くの電子部品に用いられている。このような積層セラミックコンデンサにおいては、電子部品の小型化、高性能化にともない、小型化および大容量化が求められている。また、電子部品の使用用途が拡大することにより、広い温度で安定した特性を得ることができる電子部品が求められており、これにともない、積層セラミックコンデンサについても、広い温度範囲で静電容量の変化が少ない、優れた温度安定性が求められている。
【0003】
このような温度特性は、JIS規格およびEIA規格に規定されており、例えば、JIS規格のB特性や、EIA規格のX7R特性などがある。
【0004】
ここで、JIS規格のB特性とは、−25℃から+85℃の温度範囲で、+20℃における静電容量を基準とした時の容量変化率が±10%以内であることを示し、EIA規格のX7R特性とは、−55℃から+125℃の温度範囲で、+25℃における静電容量を基準とした時の容量変化量が±15%以内であることを示したものである。
【0005】
ところで、一般に積層セラミックコンデンサは、セラミック層と内部電極とを交互に積層してなるセラミック焼結体の内部電極が露出する端面に外部電極を備えた構造となっている。そして、このセラミック層はBaTiO(チタン酸バリウム)を主成分としたものが一般的である。
【0006】
このようなセラミック層にBaTiOを用いた積層セラミックコンデンサにおいては、BaTiOに希土類元素等を添加して所定温度以上で焼結し、セラミック層の微細構造としてコアシェル構造を形成することで、前述の静電容量において、優れた温度安定性が得られることが知られている。ここで、コアシェル構造とは、BaTiOのみからなるコア部と添加成分が拡散したシェル部とからなり、コア部とシェル部との間に明確な境界があるものである。このようなコアシェル構造を用いることで誘電率の異なるコア部とシェル部との重ね合わせによりセラミック層の誘電率の温度特性が平坦化される。また、コア部が存在することによりセラミック層の構造安定性すなわち信頼性が良好になる。
【0007】
このような積層セラミックコンデンサは一般に次に示す方法で製造される。
まず、BaTiOを主成分とするセラミック原料、添加成分、バインダ、および溶剤を混合してセラミックスラリーを作製する。次に、このセラミックスラリーを用いて所定の厚みのセラミックグリーンシートを形成し、このセラミックグリーンシートの表面に、Ni等の金属粉末、バインダ、および溶剤を混合して成る内部電極ペーストで内部電極パターンを形成する。このように内部電極パターンが形成されたセラミックグリーンシートを所定枚数積層して、加熱プレスを行い、それぞれが積層セラミックコンデンサとなる大きさの素体に切り分ける。
【0008】
次に、切り分けられた複数の素体を、1100℃よりも高い温度で焼成することでセラミック焼結体を形成する。この際、セラミックグリーンシートが焼結して、コアシェル構造を有するセラミック層が形成される。このように形成されたセラミック焼結体の内部電極が露出する面にCu等の金属粉末、ガラス粉末、バインダ、および溶剤を混合して成る外部電極ペーストを塗工して乾燥、焼結することで外部電極を形成し、積層セラミックコンデンサが得られる。
【0009】
また、他の積層セラミックコンデンサの製造方法として、静電容量の温度特性をさらに安定化させ、DCバイアス特性に優れる積層セラミックコンデンサを製造するため、コアシェル構造のコア部からシェル部にかけて所定の濃度勾配で添加成分を存在させるようにしたものもあり、誘電体セラミック原料粉末の主成分と添加成分の一部とを、予め混合して焼成温度よりも低い約1000℃で熱処理した後に、これらを用いてセラミックスラリーを作製している(特許文献1参照。)。
【0010】
【特許文献1】
特開平10−310469号公報
【0011】
【発明が解決しようとする課題】
積層セラミックコンデンサは、前述のように、近年、小型化、大容量化の傾向が顕著であるため、セラミック焼結体におけるセラミック層の厚みは2μm以下となり、さらに積層枚数は500層以上となっているものもある。
【0012】
ところで、前述の従来の積層セラミックコンデンサでは、焼成温度が1100℃よりも高くなければ、主成分の粒子に添加成分が十分に拡散しないため、セラミック層にコアシェル構造を確実に形成することができない。
【0013】
しかしながら、積層セラミックコンデンサを構成するセラミック層と内部電極とでは焼結による収縮率が異なるため、前記焼成時にこの収縮率の違いにより構造欠陥が発生する可能性がある。さらに、内部電極が収縮することで焼成時に電極の不連続部が発生して容量が低下してしまう可能性もある。特に、薄膜多層の積層セラミックコンデンサでは、内部電極の厚みも薄くなるので、焼成時における電極の不連続部が発生する可能性が大きくなる。このため、素体の焼成温度を従来よりも低くしなければならないが、コアシェル構造を備えるセラミック層を形成するには、前述のように、少なくとも従来の焼成温度以上の温度で焼成しなければならない。
【0014】
このため、特許文献1の方法では、低い焼成温度で素体を焼成するため、予めセラミック原料粉末であるBaTiOと添加成分の一部とを混合し、焼成温度よりも低い温度で熱処理して、或る程度反応させた原料を用いている。しかし、特許文献1の方法では、熱処理温度を低くすることで、意識的にコア部に添加成分が存在するようにしているため、このような構造で形成された積層セラミックコンデンサは、熱処理をせずにコアシェル構造を形成した積層セラミックコンデンサと比べて、静電容量の温度特性は安定しているが信頼性で劣ってしまう。
【0015】
この発明の目的は、1100℃以下の低温焼成を行っても優れた信頼性を有し、静電容量の温度特性が所定の規格に対して十分満足する、温度特性が安定した積層セラミックコンデンサの製造方法を提供することにある。
【0016】
【課題を解決するための手段】
この発明は、誘電体セラミック原料の主成分と少なくとも1種類の添加成分とを混合してセラミックスラリーを作製する工程と、該セラミックスラリーを用いて形成されたセラミックグリーンシート表面に内部電極パターンを形成して所定枚数積層し、プレスすることでグリーンシート積層体を形成する工程と、該グリーンシート積層体を所定形状の素体に切り分け、所定温度で焼成することでセラミック焼結体を形成する工程とを含む積層セラミック電子部品の製造方法であって、セラミックスラリーを作製する工程を、Ba,CaおよびSrのうちの少なくとも1種類の元素とTiおよびZrのうちの少なくとも1種類の元素とからなる誘電体セラミック原料の主成分と添加成分の少なくとも一部とを混合する工程と、主成分と添加成分との混合物を、セラミック焼結体を形成する工程における焼成温度(例えば1000℃〜1100℃)よりも高い温度(約1200℃)で熱処理する工程と、熱処理した混合物に添加成分の残部を混合する工程とが含まれるように構成することを特徴としている。
【0017】
この構成では、前述の誘電体セラミック原料、例えばBaTiOが、添加成分とともに素体焼成温度よりも高い約1200℃で熱処理されることにより、境界の明確なコアシェル構造を有する誘電体セラミック原料が形成される。これを粉砕したセラミック粉末でセラミックスラリーが形成されることで、予めコアシェル構造を有するセラミックグリーンシートが形成される。このセラミックグリーンシートを用いて素体を形成することで、1000℃〜1100℃という低温焼成を行っても、コアシェル構造を有するセラミック層を備えたセラミック焼結体が形成される。
【0018】
【発明の実施の形態】
本発明の実施形態に係る積層セラミック電子部品の製造方法について、図を参照して説明する。なお、本実施形態では、積層セラミック電子部品として積層セラミックコンデンサを例に説明する。
【0019】
図1は本実施形態に係る積層セラミックコンデンサの構造を示す断面図である。
【0020】
図1に示すように、本実施形態に係る積層セラミックコンデンサは、互いに対向する端面に露出する複数の内部電極3a,3bをセラミック層2を介して所定枚数積層したセラミック焼結体1と、該セラミック焼結体1の内部電極3a,3bが露出する端面にそれぞれ設けられた外部電極4a,4bとからなる。また、外部電極4a,4bの表面には、下地メッキ5および半田メッキ6が形成されている。
【0021】
このような積層セラミックコンデンサは次に示す方法で製造される。
まず、BaTiO等のセラミック原料粉末と、セラミックの特性改善等を目的とした少なくとも1種類の添加成分とを用意し、これらをそれぞれ所定量に秤量しておく。そして、セラミック原料粉末と、少なくとも1種類の添加成分の一部または全部とを湿式混合して、混合原料を得る。
【0022】
なお、ここで、セラミック原料粉末はBaTiOに限らず、例えば、Ba,Ca,およびSrの少なくとも1種類の元素と、TiおよびZrの少なくとも1種類の元素とからなる三酸化化合物であってもよい。
【0023】
このような混合原料を、セラミック原料と添加成分とが反応してコアシェル構造が形成される温度以上で熱処理した後、粉砕して熱処理済み原料粉末を得る。そして、熱処理済み原料粉末に残りの添加成分を混合して、最終的な原料粉末を得る。
【0024】
次に、原料粉末に有機バインダおよび溶剤を加えて混練することによりセラミックスラリーを作製し、該セラミックスラリーをドクターブレード法等を用いて、支持フィルム表面に均一な厚みで塗工し、乾燥してセラミックグリーンシートを形成する。
【0025】
次に、このセラミックグリーンシートの表面にNi粉末、バインダ、および溶剤を加えて成る導電性ペーストをスクリーン印刷法、蒸着法、またはメッキ法等を用いて所定のパターンに形成し、乾燥することで、内部電極パターンを形成したセラミックグリーンシートを得る。
【0026】
このように内部電極パターンが形成されたセラミックグリーンシートを、隣り合う内部電極パターン同士が所定面積で重なり合うようにして所定枚数積層し、その上下層にさらに所定枚数、内部電極パターンが形成されていないセラミックグリーンシートを積層して、加熱プレスすることでグリーンシート積層体を形成する。
【0027】
次に、この加熱プレスされたグリーンシート積層体を、それぞれが積層セラミックコンデンサとなる大きさの素体に切り分け、匣等に積載して焼成炉に投入する。焼成炉内は所定の雰囲気に設定されており、まず所定の酸素濃度を有するN雰囲気中で約350℃まで昇温して素体を加熱し、素体に含まれるバインダを燃焼させた後、例えば、10−9〜10−12 MPa程度のH−N−HOガスからなる還元性雰囲気中で1000℃〜1100℃の所定温度で焼成を行うことで素体を焼結し、セラミック焼結体を得る。
【0028】
このセラミック焼結体の内部電極が露出した対向する両端面に、Cu等の金属粉末と、B−LiO−SiO−BaO系のガラスフリットとを含有する導電性ペーストを浸漬法等を用いて塗布し、N雰囲気中で所定温度で焼結させて、外部電極を形成する。なお、外部電極は、Ag、Pd、Ag−Pd、Cu合金等の金属粉末のみで形成してもよく、これら金属粉末とB−LiO−SiO−BaO系、B−SiO−BaO系、LiO−SiO−BaO系、B−SiO−ZnO系等のガラスフリットとを配合したもので形成してもよい。
【0029】
そして、外部電極の表面には、必要に応じ、Ni、Cu、Ni−Cu合金等からなる下地メッキを施し、さらに、このメッキの表面にSnまたはSn−Pbからなる半田メッキを施してもよい。
【0030】
なお、前述の製造方法では、素体の焼結と外部電極の焼結とを別工程で行ったが、素体の焼結を行わない状態で外部電極用の導電性ペーストを塗布し、素体と外部電極とを同時に焼結してもよい。
【0031】
次に、前述の工程で製造された積層セラミックコンデンサについて電気特性を測定した結果および信頼性試験結果を表1に示す。
【0032】
【表1】

Figure 2004289087
【0033】
ここで、電気特性としては、自動ブリッジ式測定器を用いて、実効電圧1Vで1kHzの交流電圧印加時の静電容量(C)と誘電損失(tanδ)とを測定し、得られた測定値から誘電率(ε)を算出した。
【0034】
また、温度変化に対する静電容量の変化率については、+20℃での静電容量を基準として、−25℃〜+85℃の範囲での変化率(ΔC/C20)と、+25℃での静電容量を基準として、−55℃〜+125℃の範囲での変化量(ΔC/C25)とを算出した。
【0035】
なお、この静電容量の変化量についての、良否判定には、前述のJIS規格で規定されたB特性およびEIA規格で規定されたX7R特性を用いた。
【0036】
また、信頼性試験は、高温負荷試験を行い、温度が+150℃の雰囲気中で10kV/mmの直流電圧を印加しながら、絶縁抵抗値の経時変化を測定した。なお、この試験では、各試料の絶縁抵抗値が10Ω以下になった時点で故障したと判断し、この時間の平均をその条件における平均寿命時間とした。
【0037】
この測定および試験に用いた積層セラミックコンデンサは次に示す方法で作製した。
【0038】
まず、セラミック原料粉末として表2に示すモル比からなる組成の三酸化化合物を四種類用意し、これに混合する添加成分として、純度99%以上のBaO、CaO、MnO、MgO、Dy、Y、Gdを用意し、表4に示すモル比で配合した。
【0039】
また、焼結助剤となる酸化ガラス粉末として、表3に示すモル比の組成割合になるように、SiO、B、LiO、BaOの各成分を秤量し、混合して粉砕したものを四種類用意した。なお、これらのガラス酸化粉末は、白金るつぼ中において約1500℃まで加熱した後、急冷し、粉砕することにより、平均粒径0.5μm以下となるようにした。
【0040】
【表2】
Figure 2004289087
【0041】
【表3】
Figure 2004289087
【0042】
【表4】
Figure 2004289087
【0043】
ここで、表4における「A」、「B」、「C」、「D」は表2に示した同記号(配合の種類を表す記号)に対応しており、「a」、「b」、「c」、「d」は表3に示した同記号(配合の種類を表す記号)に対応している。
【0044】
次に、セラミック原料粉末と添加成分の一部または全部(表4の添加成分α)を表4に示すモル比の組成割合となるように混合し、この混合粉末を表4に示す熱処理温度(1150℃〜1220℃の所定温度)で2時間熱処理して、粉砕することで熱処理済み原料粉末を作製した。ここで、比較例および従来例に対応する試料として、熱処理しないもの、および1000℃(特許文献1に対応)で熱処理したものについても作製した。
【0045】
このように作製した熱処理済み原料粉末と、前記焼結助剤と、添加成分の残部(表4の添加成分β)とを混合して、さらにポリビニルブチラール系バインダおよびエタノール等の有機溶剤を加えて、ボールミルにより湿式混合してセラミックスラリーを作製した。
【0046】
このセラミックスラリーを用いて前述の方法で厚さ2μmで矩形板状のセラミックグリーンシートを形成し、前述の方法で内部電極パターンを形成し、積層してグリーンシート積層体を得た。
【0047】
そして、このグリーンシート積層体を各素体に切り分け、表1に示す各焼成温度で2時間焼成してセラミック焼結体を形成し、該セラミック焼結体に前述の方法で外部電極を形成し、試料となる積層セラミックコンデンサを得た。
【0048】
このようにして得られた積層セラミックコンデンサの外形寸法は、幅が3.2mm、長さが4.5mm、厚さが1.0mmであり、内部電極間に介在するセラミック層の厚みは1.0μmであった。また、この積層セラミックコンデンサの有効積層数は10とし、対向する電極の面積は、8.8mmとした。
【0049】
表1に示すように、本発明に係る、予め焼成温度よりも高い温度で熱処理を行ったセラミック原料(熱処理済み原料粉末)を用いた試料(試料番号7〜12)は、JIS規格におけるB特性およびEIA規格におけるX7R特性を共に満足し、平均寿命時間も100時間を超えるので、電気特性および信頼性特性に優れる。
【0050】
一方、予め熱処理を行っていないセラミック原料を用いた試料(試料番号1、試料番号3〜6)は、高温負荷試験による平均寿命時間が2時間〜10時間と短いため信頼性に劣る。さらには、試料番号1の試料では、静電容量の変化率においても、前記規格を満足せず、電気特性にも劣る。
【0051】
さらに、予め行う熱処理温度が焼成温度よりも低い、試料番号2の場合は、平均寿命時間が30時間と、熱処理を行わなかった場合よりは改善されるが、焼成温度よりも高い温度で熱処理を行った場合と比較して、平均寿命時間が非常に短くなるため信頼性に劣る。さらには、EIA規格のX7R特性を満足せず、電気特性にも劣る。
【0052】
次に、前述の熱処理を行わない試料として試料番号1の積層セラミックコンデンサと、高温熱処理を行う試料として試料番号7の積層セラミックコンデンサとを機械研磨した後、イオンミリングにより薄膜加工し、TEM観察を行うとともに、EDXにより結晶粒内における希土類元素(添加成分)の濃度を測定した。
【0053】
図2(a)は試料番号1(従来例)の積層セラミックコンデンサのセラミック層のTEM写真であり、図2(b)はその概念図である。また、図3(a)は試料番号7(本発明)の積層セラミックコンデンサのセラミック層のTEM写真であり、図3(b)はその概念図である。
【0054】
図2、図3に示すように、本発明の製造方法で作製した積層セラミックコンデンサのセラミック層は明確な境界を有するコアシェル構造が観測され(図3)、従来の製造方法で作製した積層セラミックコンデンサのセラミック層はコア部とシェル部とが明確でない。
【0055】
また、本発明の積層セラミックコンデンサのセラミック層は、シェル部のみに添加成分が検出され、コア部には検出されなかったが、従来の積層セラミックコンデンサのセラミック層では、添加成分は粒界部で検出され、結晶粒子内では検出されなかった。
【0056】
以上のように、素体の焼成温度よりも高い温度で、予めセラミック原料と添加成分の少なくとも一部を混合して熱処理することにより、電気特性および信頼性に優れる積層セラミックコンデンサを製造することができる。
【0057】
なお、本実施形態では、積層セラミックコンデンサを例に説明したが、セラミック層のコアシェル構造が素子の電気特性および信頼性に影響する積層セラミック電子部品全般について、本発明は適用することができる。
【0058】
【発明の効果】
この発明によれば、素体の焼成温度よりも高い温度で、セラミック原料と添加成分の少なくとも一部とを混合して熱処理することで、比較的低い温度で素体の焼成を行う積層セラミック電子部品であっても、セラミック層に明確な境界を有するコアシェル構造を構成することができる。これにより、電気特性および信頼性に優れた積層セラミック電子部品を製造することができる。
【図面の簡単な説明】
【図1】本発明の実施形態に係る積層セラミックコンデンサの構造を示す断面図
【図2】従来の製造方法を用いた積層セラミックコンデンサのセラミック層のTEM写真(試料番号1)
【図3】本発明の製造方法を用いた積層セラミックコンデンサのセラミック層のTEM写真(試料番号7)
【符号の説明】
1−セラミック焼結体
2−セラミック層
3a,3b−内部電極
4a,4b−外部電極
5−下地メッキ
6−半田メッキ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer ceramic electronic component, and more particularly to a method for manufacturing a ceramic slurry used for a multilayer ceramic electronic component.
[0002]
[Prior art]
2. Description of the Related Art In recent years, multilayer ceramic capacitors, which are multilayer ceramic electronic components, have been used for many electronic components. In such multilayer ceramic capacitors, there is a demand for downsizing and large capacity with the downsizing and high performance of electronic components. In addition, as the use of electronic components has expanded, electronic components capable of obtaining stable characteristics over a wide temperature range have been demanded.Accordingly, multilayer ceramic capacitors have a large capacitance over a wide temperature range. Excellent temperature stability with little change is required.
[0003]
Such temperature characteristics are defined in JIS and EIA standards, and include, for example, JIS B characteristics and EIA X7R characteristics.
[0004]
Here, the B characteristic of the JIS standard indicates that the rate of change in capacitance based on the capacitance at + 20 ° C. is within ± 10% within a temperature range of −25 ° C. to + 85 ° C. The X7R characteristic indicates that within a temperature range of −55 ° C. to + 125 ° C., the capacitance change amount with respect to the capacitance at + 25 ° C. is within ± 15%.
[0005]
Incidentally, a multilayer ceramic capacitor generally has a structure in which an external electrode is provided on an end face where an internal electrode of a ceramic sintered body formed by alternately laminating ceramic layers and internal electrodes is exposed. The ceramic layer is generally composed mainly of BaTiO 3 (barium titanate).
[0006]
In such a multilayer ceramic capacitor using BaTiO 3 for the ceramic layer, a rare earth element or the like is added to BaTiO 3 and sintered at a predetermined temperature or higher to form a core-shell structure as a fine structure of the ceramic layer. It is known that an excellent temperature stability can be obtained at the above capacitance. Here, the core-shell structure includes a core portion composed of only BaTiO 3 and a shell portion in which an additive component is diffused, and has a clear boundary between the core portion and the shell portion. By using such a core-shell structure, the temperature characteristic of the dielectric constant of the ceramic layer is flattened by the superposition of the core portion and the shell portion having different dielectric constants. In addition, the presence of the core improves the structural stability, that is, the reliability of the ceramic layer.
[0007]
Such a multilayer ceramic capacitor is generally manufactured by the following method.
First, a ceramic raw material containing BaTiO 3 as a main component, an additive component, a binder, and a solvent are mixed to prepare a ceramic slurry. Next, a ceramic green sheet having a predetermined thickness is formed using the ceramic slurry, and an internal electrode pattern is formed on the surface of the ceramic green sheet with an internal electrode paste obtained by mixing a metal powder such as Ni, a binder, and a solvent. To form A predetermined number of the ceramic green sheets on which the internal electrode patterns are formed are stacked and heated and pressed, and each is cut into a body having a size to be a multilayer ceramic capacitor.
[0008]
Next, the plurality of cut element bodies are fired at a temperature higher than 1100 ° C. to form a ceramic sintered body. At this time, the ceramic green sheets are sintered to form a ceramic layer having a core-shell structure. An external electrode paste formed by mixing a metal powder such as Cu, a glass powder, a binder, and a solvent is applied to a surface of the ceramic sintered body thus formed where the internal electrodes are exposed, and dried and sintered. To form external electrodes, thereby obtaining a multilayer ceramic capacitor.
[0009]
Further, as another method of manufacturing a multilayer ceramic capacitor, in order to further stabilize the temperature characteristic of capacitance and to manufacture a multilayer ceramic capacitor having excellent DC bias characteristics, a predetermined concentration gradient is applied from the core to the shell of the core-shell structure. In some cases, the additional components are allowed to be present, and the main component of the dielectric ceramic raw material powder and a part of the additional components are mixed in advance and heat-treated at about 1000 ° C., which is lower than the firing temperature. To produce a ceramic slurry (see Patent Document 1).
[0010]
[Patent Document 1]
JP-A-10-310469
[Problems to be solved by the invention]
As described above, in the multilayer ceramic capacitor, since the tendency of miniaturization and large capacity is remarkable in recent years, the thickness of the ceramic layer in the ceramic sintered body is 2 μm or less, and the number of laminated layers is 500 or more. Some are.
[0012]
By the way, in the above-mentioned conventional multilayer ceramic capacitor, unless the firing temperature is higher than 1100 ° C., the additive component does not sufficiently diffuse into the main component particles, so that the core-shell structure cannot be reliably formed in the ceramic layer.
[0013]
However, since the shrinkage ratio due to sintering is different between the ceramic layer and the internal electrode constituting the multilayer ceramic capacitor, there is a possibility that a structural defect may occur due to the difference in shrinkage ratio during the firing. Further, the contraction of the internal electrodes may cause discontinuous portions of the electrodes during firing, resulting in a reduction in capacity. In particular, in the case of a multilayer ceramic capacitor having a thin film multilayer, the thickness of the internal electrodes is also reduced, so that the possibility of occurrence of discontinuous portions of the electrodes during firing increases. For this reason, the firing temperature of the element body must be lower than before, but in order to form a ceramic layer having a core-shell structure, as described above, firing must be performed at least at a temperature higher than the conventional firing temperature. .
[0014]
For this reason, in the method of Patent Document 1, in order to sinter the body at a low sintering temperature, BaTiO 3 which is a ceramic raw material powder and a part of the additive components are mixed in advance and heat-treated at a temperature lower than the sintering temperature. A raw material reacted to a certain extent is used. However, in the method of Patent Document 1, since the additive component is intentionally present in the core by lowering the heat treatment temperature, the multilayer ceramic capacitor formed with such a structure is subjected to heat treatment. However, as compared with a multilayer ceramic capacitor having a core-shell structure, the temperature characteristics of the capacitance are stable, but the reliability is inferior.
[0015]
SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer ceramic capacitor having excellent reliability even when fired at a low temperature of 1100 ° C. or less, and sufficiently satisfying temperature characteristics of capacitance with respect to a predetermined standard, and having stable temperature characteristics. It is to provide a manufacturing method.
[0016]
[Means for Solving the Problems]
The present invention provides a process of mixing a main component of a dielectric ceramic raw material and at least one additive component to form a ceramic slurry, and forming an internal electrode pattern on a surface of a ceramic green sheet formed using the ceramic slurry. Forming a green sheet laminate by pressing and stacking a predetermined number of sheets, and forming a ceramic sintered body by cutting the green sheet laminate into a body having a predetermined shape and firing at a predetermined temperature. Wherein the step of producing the ceramic slurry comprises at least one element of Ba, Ca and Sr and at least one element of Ti and Zr. Mixing the main component of the dielectric ceramic raw material and at least a part of the additive component; Heat-treating the mixture at a temperature (about 1200 ° C.) higher than the firing temperature (for example, 1000 ° C. to 1100 ° C.) in the step of forming the ceramic sintered body; and mixing the remainder of the additional components into the heat-treated mixture. Is included.
[0017]
In this configuration, the above-described dielectric ceramic raw material, for example, BaTiO 3 is heat-treated at about 1200 ° C., which is higher than the body firing temperature, together with the added components, thereby forming a dielectric ceramic raw material having a well-defined core-shell structure. Is done. By forming a ceramic slurry using the crushed ceramic powder, a ceramic green sheet having a core-shell structure is formed in advance. By forming a body using this ceramic green sheet, a ceramic sintered body having a ceramic layer having a core-shell structure is formed even when firing is performed at a low temperature of 1000C to 1100C.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
A method for manufacturing a multilayer ceramic electronic component according to an embodiment of the present invention will be described with reference to the drawings. In the present embodiment, a multilayer ceramic capacitor will be described as an example of a multilayer ceramic electronic component.
[0019]
FIG. 1 is a sectional view showing the structure of the multilayer ceramic capacitor according to the present embodiment.
[0020]
As shown in FIG. 1, a multilayer ceramic capacitor according to the present embodiment includes a ceramic sintered body 1 in which a predetermined number of internal electrodes 3 a and 3 b exposed on end faces facing each other are laminated via a ceramic layer 2. External electrodes 4a and 4b are provided on the end faces of the ceramic sintered body 1 where the internal electrodes 3a and 3b are exposed. A base plating 5 and a solder plating 6 are formed on the surfaces of the external electrodes 4a and 4b.
[0021]
Such a multilayer ceramic capacitor is manufactured by the following method.
First, a ceramic raw material powder such as BaTiO 3 and at least one additional component for the purpose of improving the characteristics of the ceramic are prepared, and these are weighed to predetermined amounts. Then, the ceramic raw material powder and some or all of at least one type of additive component are wet-mixed to obtain a mixed raw material.
[0022]
Here, the ceramic raw material powder is not limited to BaTiO 3 , and may be, for example, a trioxide compound composed of at least one element of Ba, Ca, and Sr and at least one element of Ti and Zr. Good.
[0023]
Such a mixed raw material is heat-treated at a temperature not lower than the temperature at which the ceramic raw material and the additional component react to form a core-shell structure, and then pulverized to obtain a heat-treated raw material powder. Then, the remaining additive components are mixed with the heat-treated raw material powder to obtain a final raw material powder.
[0024]
Next, a ceramic slurry is prepared by adding and kneading an organic binder and a solvent to the raw material powder, and applying the ceramic slurry to a support film surface with a uniform thickness using a doctor blade method or the like, followed by drying. Form a ceramic green sheet.
[0025]
Next, a conductive paste formed by adding a Ni powder, a binder, and a solvent to the surface of the ceramic green sheet in a predetermined pattern using a screen printing method, a vapor deposition method, a plating method, or the like is formed and dried. Then, a ceramic green sheet on which an internal electrode pattern is formed is obtained.
[0026]
A predetermined number of ceramic green sheets on which the internal electrode patterns are formed are stacked such that adjacent internal electrode patterns overlap with a predetermined area, and a predetermined number of the internal electrode patterns are not formed on the upper and lower layers. The ceramic green sheets are laminated and hot-pressed to form a green sheet laminate.
[0027]
Next, the hot-pressed green sheet laminate is cut into element bodies each having a size to be a laminated ceramic capacitor, loaded in a box or the like, and put into a firing furnace. The inside of the firing furnace is set to a predetermined atmosphere. First, the body is heated to about 350 ° C. in an N 2 atmosphere having a predetermined oxygen concentration to heat the body, and after burning the binder contained in the body, For example, by firing at a predetermined temperature of 1000 ° C. to 1100 ° C. in a reducing atmosphere composed of H 2 —N 2 —H 2 O gas of about 10 −9 to 10 −12 MPa, the element body is sintered. To obtain a ceramic sintered body.
[0028]
On both end faces of the internal electrode of the ceramic sintered body faces exposed, metal powder such as Cu, a B 2 O 3 -Li 2 O- SiO 2 -BaO -based conductive paste containing glass frit of immersion It is applied by a method or the like, and sintered at a predetermined temperature in an N 2 atmosphere to form an external electrode. The external electrode may be formed only of a metal powder such as Ag, Pd, Ag-Pd, or a Cu alloy, and these metal powders are mixed with a B 2 O 3 —Li 2 O—SiO 2 —BaO-based, B 2 O 3 -SiO 2 -BaO-based, Li 2 O-SiO 2 -BaO-based, B 2 O 3 may be formed with those obtained by blending a glass frit -SiO 2 -ZnO system, or the like.
[0029]
Then, the surface of the external electrode may be plated with an undercoat made of Ni, Cu, Ni-Cu alloy or the like, if necessary, and the surface of the plating may be plated with solder made of Sn or Sn-Pb. .
[0030]
In the above-described manufacturing method, the sintering of the element body and the sintering of the external electrode were performed in separate steps, but the conductive paste for the external electrode was applied without sintering the element body, and The body and the external electrode may be sintered simultaneously.
[0031]
Next, Table 1 shows the results of measuring the electrical characteristics and the results of reliability tests of the multilayer ceramic capacitors manufactured in the above-described steps.
[0032]
[Table 1]
Figure 2004289087
[0033]
Here, as the electrical characteristics, the capacitance (C) and the dielectric loss (tan δ) when an alternating voltage of 1 kHz was applied at an effective voltage of 1 V were measured using an automatic bridge type measuring instrument, and the measured values were obtained. The dielectric constant (ε) was calculated from.
[0034]
The rate of change of the capacitance with respect to the temperature change is based on the capacitance at + 20 ° C., and the rate of change (ΔC / C 20 ) in the range of −25 ° C. to + 85 ° C. and the static rate at + 25 ° C. The amount of change (ΔC / C 25 ) in the range of −55 ° C. to + 125 ° C. was calculated based on the capacitance.
[0035]
In addition, for the quality determination regarding the amount of change in the capacitance, the B characteristic defined in the JIS standard and the X7R characteristic defined in the EIA standard were used.
[0036]
In the reliability test, a high-temperature load test was performed, and a time-dependent change in insulation resistance value was measured while applying a DC voltage of 10 kV / mm in an atmosphere at a temperature of + 150 ° C. In this test, it was determined that a failure occurred when the insulation resistance value of each sample became 10 5 Ω or less, and the average of this time was taken as the average life time under the condition.
[0037]
The multilayer ceramic capacitor used for this measurement and test was manufactured by the following method.
[0038]
First, four types of trioxide compounds having the composition shown in Table 2 were prepared as ceramic raw material powders, and BaO, CaO, MnO, MgO, Dy 2 O 3 having a purity of 99% or more were mixed with these. , Y 2 O 3 , and Gd 2 O 3 were prepared and blended in the molar ratio shown in Table 4.
[0039]
Further, as an oxide glass powder to be a sintering aid, the components of SiO 2 , B 2 O 3 , Li 2 O, and BaO were weighed and mixed so as to have a composition ratio of a molar ratio shown in Table 3. Four types of pulverized ones were prepared. These glass oxide powders were heated to about 1500 ° C. in a platinum crucible, quenched, and then pulverized so as to have an average particle size of 0.5 μm or less.
[0040]
[Table 2]
Figure 2004289087
[0041]
[Table 3]
Figure 2004289087
[0042]
[Table 4]
Figure 2004289087
[0043]
Here, “A”, “B”, “C”, and “D” in Table 4 correspond to the same symbols (symbols indicating the types of blending) shown in Table 2, and “a”, “b” , "C" and "d" correspond to the same symbols (symbols representing the types of blending) shown in Table 3.
[0044]
Next, the ceramic raw material powder and a part or all of the additional components (additional component α in Table 4) were mixed so as to have a composition ratio of a molar ratio shown in Table 4, and the mixed powder was subjected to a heat treatment temperature (Table 4). Heat treatment was performed at a predetermined temperature of 1150 ° C. to 1220 ° C.) for 2 hours, followed by pulverization to prepare a heat-treated raw material powder. Here, as samples corresponding to the comparative example and the conventional example, those that were not heat-treated and those that were heat-treated at 1000 ° C. (corresponding to Patent Document 1) were also manufactured.
[0045]
The thus-prepared heat-treated raw material powder, the sintering aid, and the rest of the additional components (the additional components β in Table 4) were mixed, and a polyvinyl butyral-based binder and an organic solvent such as ethanol were further added. The mixture was wet-mixed with a ball mill to prepare a ceramic slurry.
[0046]
Using this ceramic slurry, a ceramic green sheet in the form of a rectangular plate having a thickness of 2 μm was formed by the above-described method, and an internal electrode pattern was formed by the above-mentioned method and laminated to obtain a green sheet laminate.
[0047]
Then, the green sheet laminate was cut into each element, fired at each firing temperature shown in Table 1 for 2 hours to form a ceramic sintered body, and external electrodes were formed on the ceramic sintered body by the method described above. Thus, a multilayer ceramic capacitor serving as a sample was obtained.
[0048]
The external dimensions of the multilayer ceramic capacitor thus obtained were 3.2 mm in width, 4.5 mm in length, and 1.0 mm in thickness, and the thickness of the ceramic layer interposed between the internal electrodes was 1. It was 0 μm. The effective number of layers of the multilayer ceramic capacitor was set to 10, and the area of the facing electrodes was set to 8.8 mm 2 .
[0049]
As shown in Table 1, the samples according to the present invention (sample numbers 7 to 12) using ceramic raw materials (heat-treated raw material powders) previously heat-treated at a temperature higher than the sintering temperature have the B characteristic in the JIS standard. And the X7R characteristics in the EIA standard are satisfied, and the average life time exceeds 100 hours, so that the electrical characteristics and the reliability characteristics are excellent.
[0050]
On the other hand, the samples using the ceramic raw material that has not been heat-treated in advance (sample No. 1, sample Nos. 3 to 6) are inferior in reliability because the average life time by the high temperature load test is as short as 2 hours to 10 hours. Furthermore, the sample of sample No. 1 does not satisfy the above-mentioned standard even in the rate of change of the capacitance, and is inferior in electric characteristics.
[0051]
Further, in the case of Sample No. 2 in which the heat treatment temperature to be performed in advance is lower than the firing temperature, the average life time is 30 hours, which is improved from the case where no heat treatment is performed. As compared with the case where the test is performed, the average life time becomes very short, so that the reliability is inferior. Furthermore, it does not satisfy the X7R characteristics of the EIA standard and is inferior in electric characteristics.
[0052]
Next, the multilayer ceramic capacitor of Sample No. 1 as a sample not subjected to the above-described heat treatment and the multilayer ceramic capacitor of Sample No. 7 as a sample to be subjected to the high-temperature heat treatment were mechanically polished, and then subjected to thin film processing by ion milling, and observed by TEM. At the same time, the concentration of the rare earth element (additive component) in the crystal grain was measured by EDX.
[0053]
FIG. 2A is a TEM photograph of the ceramic layer of the multilayer ceramic capacitor of Sample No. 1 (conventional example), and FIG. 2B is a conceptual diagram thereof. FIG. 3A is a TEM photograph of the ceramic layer of the multilayer ceramic capacitor of Sample No. 7 (the present invention), and FIG. 3B is a conceptual diagram thereof.
[0054]
As shown in FIGS. 2 and 3, the ceramic layer of the multilayer ceramic capacitor manufactured by the manufacturing method of the present invention has a core-shell structure having a clear boundary (FIG. 3), and the multilayer ceramic capacitor manufactured by the conventional manufacturing method. In the ceramic layer, the core portion and the shell portion are not clear.
[0055]
Further, in the ceramic layer of the multilayer ceramic capacitor of the present invention, the additive component was detected only in the shell portion and was not detected in the core portion, but in the ceramic layer of the conventional multilayer ceramic capacitor, the additive component was detected in the grain boundary portion. Detected and not detected in the crystal grains.
[0056]
As described above, at a temperature higher than the firing temperature of the elementary body, at least a part of the ceramic raw material and the additional components are mixed and heat-treated in advance, whereby a multilayer ceramic capacitor having excellent electrical characteristics and reliability can be manufactured. it can.
[0057]
In the present embodiment, a multilayer ceramic capacitor has been described as an example. However, the present invention can be applied to general multilayer ceramic electronic components in which the core-shell structure of the ceramic layer affects the electrical characteristics and reliability of the element.
[0058]
【The invention's effect】
According to the present invention, a multilayer ceramic electronic device in which a ceramic body is sintered at a relatively low temperature by mixing a ceramic raw material and at least a part of an additive component and performing a heat treatment at a temperature higher than a firing temperature of the body. Even a component can form a core-shell structure having a clear boundary in the ceramic layer. Thus, a multilayer ceramic electronic component having excellent electrical characteristics and reliability can be manufactured.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a structure of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 2 is a TEM photograph (sample number 1) of a ceramic layer of a multilayer ceramic capacitor using a conventional manufacturing method.
FIG. 3 is a TEM photograph of a ceramic layer of a multilayer ceramic capacitor using the manufacturing method of the present invention (sample number 7).
[Explanation of symbols]
1—ceramic sintered body 2—ceramic layers 3a and 3b—internal electrodes 4a and 4b—external electrodes 5—base plating 6—solder plating

Claims (4)

誘電体セラミック原料の主成分と少なくとも1種類の添加成分とを混合してセラミックスラリーを作製する工程と、該セラミックスラリーを用いて形成されたセラミックグリーンシート表面に内部電極パターンを形成して所定枚数積層し、プレスすることでグリーンシート積層体を形成する工程と、該グリーンシート積層体を所定形状の素体に切り分け、所定温度で焼成することでセラミック焼結体を形成する工程とを含む積層セラミック電子部品の製造方法であって、
前記セラミックスラリーを作製する工程は、
前記誘電体セラミック原料の主成分と前記添加成分の少なくとも一部とを混合する工程と、前記主成分と前記添加成分との混合物を、前記セラミック焼結体を形成する工程の焼成温度よりも高い温度で熱処理する工程と、熱処理した混合物に前記添加成分の残部を混合する工程とを含むことを特徴とする積層セラミック電子部品の製造方法。
Mixing a main component of the dielectric ceramic raw material and at least one additive component to form a ceramic slurry; forming a predetermined number of internal electrode patterns on a surface of a ceramic green sheet formed using the ceramic slurry; A step of forming a green sheet laminate by laminating and pressing, and a step of forming a ceramic sintered body by cutting the green sheet laminate into a body having a predetermined shape and firing at a predetermined temperature. A method of manufacturing a ceramic electronic component,
The step of preparing the ceramic slurry,
A step of mixing the main component of the dielectric ceramic raw material and at least a part of the additive component, and a step of forming a mixture of the main component and the additive component at a temperature higher than the firing temperature in the step of forming the ceramic sintered body. A method for producing a multilayer ceramic electronic component, comprising: a step of heat-treating at a temperature; and a step of mixing the remainder of the additive component into the heat-treated mixture.
前記誘電体セラミック原料の主成分は、Ba,CaおよびSrのうちの少なくとも1種類の元素と、TiおよびZrのうちの少なくとも1種類の元素とを含む三酸化化合物である請求項1に記載の積層セラミック電子部品の製造方法。The main component of the dielectric ceramic raw material is a trioxide compound containing at least one element of Ba, Ca and Sr and at least one element of Ti and Zr. A method for manufacturing a multilayer ceramic electronic component. 前記誘電体セラミック原料の主成分は、BaTiOである請求項2に記載の積層セラミック電子部品。The main component of the dielectric ceramic material is a laminated ceramic electronic component according to claim 2 which is BaTiO 3. 前記焼成温度が略1000℃〜1100℃であり、前記熱処理温度が約1200℃である請求項1〜3のいずれかに記載の積層セラミック電子部品の製造方法。The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the firing temperature is approximately 1000 ° C. to 1100 ° C., and the heat treatment temperature is approximately 1200 ° C. 5.
JP2003082527A 2003-03-25 2003-03-25 Method of manufacturing laminated ceramic electronic component Pending JP2004289087A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003082527A JP2004289087A (en) 2003-03-25 2003-03-25 Method of manufacturing laminated ceramic electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003082527A JP2004289087A (en) 2003-03-25 2003-03-25 Method of manufacturing laminated ceramic electronic component

Publications (1)

Publication Number Publication Date
JP2004289087A true JP2004289087A (en) 2004-10-14

Family

ID=33295802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003082527A Pending JP2004289087A (en) 2003-03-25 2003-03-25 Method of manufacturing laminated ceramic electronic component

Country Status (1)

Country Link
JP (1) JP2004289087A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02265229A (en) * 1989-04-05 1990-10-30 Murata Mfg Co Ltd Laminated ceramic capacitor
JPH11302072A (en) * 1998-02-17 1999-11-02 Murata Mfg Co Ltd Dielectric ceramic, laminated ceramic capacitor and its production
JP2001206770A (en) * 2000-01-19 2001-07-31 Ngk Insulators Ltd Composite, its manufacturing method and electronic component
JP2003335575A (en) * 2002-05-21 2003-11-25 Kcm Corp Dielectric ceramic composition

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02265229A (en) * 1989-04-05 1990-10-30 Murata Mfg Co Ltd Laminated ceramic capacitor
JPH11302072A (en) * 1998-02-17 1999-11-02 Murata Mfg Co Ltd Dielectric ceramic, laminated ceramic capacitor and its production
JP2001206770A (en) * 2000-01-19 2001-07-31 Ngk Insulators Ltd Composite, its manufacturing method and electronic component
JP2003335575A (en) * 2002-05-21 2003-11-25 Kcm Corp Dielectric ceramic composition

Similar Documents

Publication Publication Date Title
KR100841506B1 (en) Dielectric ceramic composition and manufacturing method thereof
KR100463776B1 (en) Electroconductive paste, method of producing monolithic ceramic electronic part, and monolithic ceramic electronic part
US6301092B1 (en) Ceramic capacitor and method for making the same
EP0794542B1 (en) Dielectric ceramic and monolithic ceramic electronic part using the same
KR100278416B1 (en) Dielectric Ceramic, Method for Producing the Same, Laminated Ceramic Electronic Element, and Method for Producing the Same
JP4345071B2 (en) Multilayer ceramic capacitor and method for manufacturing the multilayer ceramic capacitor
US7057876B2 (en) Multilayer ceramic capacitor and manufacturing method thereof
WO2011024582A1 (en) Process for producing multilayered ceramic capacitor, and multilayered ceramic capacitor
JP2007331958A (en) Electronic component, dielectric ceramic composition and method for producing the same
CN105693236B (en) Low temperature sintered dielectric composition and multilayer ceramic capacitor formed therefrom
JP4497162B2 (en) Dielectric ceramic and multilayer ceramic capacitor
JP2005298315A (en) Reduction-resistant dielectric ceramic composition and ultra-thin laminated ceramic capacitor
CN115206679B (en) Dielectric ceramic composition and application thereof
JP2012169620A (en) Multilayer ceramic electronic component and method for manufacturing the same
JP2004214539A (en) Dielectric ceramic and laminated ceramic capacitor
JP3603607B2 (en) Dielectric ceramic, multilayer ceramic capacitor and method of manufacturing multilayer ceramic capacitor
JP2004345927A (en) Method for manufacturing irreducible dielectric ceramic, irreducible dielectric ceramic, and laminated ceramic capacitor
JP2004189588A (en) Dielectric ceramic, method of manufacturing the same, and monolithic ceramic capacitor
JP2004323315A (en) Dielectric ceramic composition, its production method, and multilayer ceramic capacitor obtained by using the same
WO2011162044A1 (en) Dielectric ceramic composition and multilayer ceramic electronic component
JP2003165768A (en) Dielectric ceramic composition and laminated ceramic electronic part
JP5151039B2 (en) Dielectric ceramic, manufacturing method thereof, and multilayer ceramic capacitor
JP4729847B2 (en) Non-reducing dielectric ceramic and multilayer ceramic capacitors
JP3945033B2 (en) Manufacturing method of multilayer ceramic capacitor
JP2003277136A (en) Dielectric ceramic composition and multilayer ceramic electronic parts

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060223

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20081212

A131 Notification of reasons for refusal

Effective date: 20081224

Free format text: JAPANESE INTERMEDIATE CODE: A131

RD02 Notification of acceptance of power of attorney

Effective date: 20090223

Free format text: JAPANESE INTERMEDIATE CODE: A7422

A521 Written amendment

Effective date: 20090223

Free format text: JAPANESE INTERMEDIATE CODE: A523

A02 Decision of refusal

Effective date: 20091117

Free format text: JAPANESE INTERMEDIATE CODE: A02

A521 Written amendment

Effective date: 20100215

Free format text: JAPANESE INTERMEDIATE CODE: A523

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Effective date: 20100225

Free format text: JAPANESE INTERMEDIATE CODE: A911

A912 Removal of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20100514