JP2004259769A - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP2004259769A
JP2004259769A JP2003046302A JP2003046302A JP2004259769A JP 2004259769 A JP2004259769 A JP 2004259769A JP 2003046302 A JP2003046302 A JP 2003046302A JP 2003046302 A JP2003046302 A JP 2003046302A JP 2004259769 A JP2004259769 A JP 2004259769A
Authority
JP
Japan
Prior art keywords
wiring conductor
semiconductor element
base
ground
bonding wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003046302A
Other languages
Japanese (ja)
Inventor
Manabu Yonekura
学 米倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2003046302A priority Critical patent/JP2004259769A/en
Publication of JP2004259769A publication Critical patent/JP2004259769A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that transmission characteristics of a high-frequency electric signal is remarkably deteriorated due to reflection. <P>SOLUTION: A semiconductor device includes a base 1, a ground wiring conductor 2b and a first wiring conductor 2a, a ground pad 3b and an I/O pad 3a respectively electrically connected to the ground wiring conductor 2b and the first wiring conductor 2a, a second wiring conductor 4, a package 7 for housing a semiconductor element having a connector 5 electrically connected to the second wiring conductor 4, and the semiconductor element 6 for transmitting/receiving the electric signal of 40 to 80 GHz. The semiconductor element 5 is fixed to the packaging 7 for housing the semiconductor element; the electrodes of the semiconductor element 6 are respectively electrically connected to the ground wiring conductor 2b, the first wiring conductor 2a, and the second wiring conductor 4 via bonding wires 8a, 8b; and the periphery of the wire 8b for connecting the second wiring conductor 4 to the electrode of the semiconductor element 6 is covered with a resin 9 having substantially the same relative permittivity as the base 1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は高周波の電気信号を送受信する半導体素子を半導体素子収納用パッケージ内に気密に収容して成る半導体装置に関するものである。
【0002】
【従来の技術】
近年、光通信や無線通信等の機器には多数の半導体装置が使用されており、かかる半導体装置は一般に、高周波の電気信号を送受信する半導体素子を半導体素子収納用パッケージ内に気密に収容することによって形成されている。
【0003】
前記半導体素子収納用パッケージは、通常、図5および図6に示すように、酸化アルミニウム質焼結体、ムライト質焼結体、窒化アルミニウム質焼結体、ガラスセラミックス等の電気絶縁材料から成り、上面に半導体素子の搭載部21aが形成された基体21と、タングステン、モリブデン、マンガン、銅、銀等の金属材料から成り、基体21の半導体素子搭載部21aから下面にかけて被着導出された複数の電気信号の入出力用およびグランド用の配線導体22a、22bと、この配線導体22a、22bと電気的に接続するようにして基体21の下面に形成された複数個のグランド用パッド23bおよび入出力用パッド23aと、基体21の搭載部21aより上面もしくは側面にかけて導出されている出入力用の配線導体24と、この出入力用配線導体24に一端が接続されるとともに他端が外部に導出されているコネクター25とにより構成されている。
【0004】
そして、かかる半導体素子収納用パッケージ27には、その搭載部21aに電気信号を送受信する半導体素子26がAu−Snろう材あるいは半田等の接合材を介して接着固定されるとともに、半導体素子26の各電極が入出力配線導体(第1配線導体)22a、グランド配線導体22bおよび出入力配線導体(第2配線導体)24にボンディングワイヤ28を介して接続され、その後、必要に応じて蓋体30等で半導体素子26を封止することによって半導体装置となる。
【0005】
また前記半導体装置は基体21の下面に形成されているグランド用パッド23bおよび入出力用パッド23aを外部電気回路基板の回路導体(図示せず)に半田バンプ等を介し接続させることによって内部に収容する半導体素子26が外部電気回路に接続され、同時にコネクター25に同軸ケーブル等を介し外部の通信装置等の外部機器(図示せず)を接続させることによって半導体素子26と外部機器とが接続するようになっている。
【0006】
なお、前記半導体装置に使用されている半導体素子26は複数の電気信号を合成して一つの電気信号に変換する、或いは一つの電気信号を分離して複数の電気信号に変換する機能を有しており、外部電気回路から第1配線導体22aを介して入力される複数の周波数帯域が低い電気信号は半導体素子26で合成されて一つの周波数帯域が高い電気信号となり、この周波数帯域の高い電気信号は第2配線導体24を介してコネクター25に伝送されるとともにコネクター25より外部の通信装置等の外部機器に伝送され、またコネクター25を介して外部機器より伝送された周波数帯域の高い電気信号は半導体素子26で複数の周波数帯域が低い電気信号に変換され、各々の周波数帯域の低い電気信号は第1配線導体22aを介して外部電気回路に伝送されることとなる。
【0007】
この場合、周波数帯域の高い電気信号が伝送される第2配線導体24や、第2配線導体24と接続したボンディングワイヤ28等は、基体21内部から搭載部21a表面にかけて形成され前記グランド配線導体22bと接続する広面積のグランド層29や、グランド配線導体22bと接続したボンディングワイヤ28との間で一定の静電容量成分が生じるため、この静電容量成分の大きさに応じてインピーダンスが減少している。
【0008】
また前記半導体装置において、半導体素子26の各電極と入出力用配線導体(第1配線導体)22aや出入力用配線導体(第2配線導体)24等とを接続するボンディングワイヤ28は一般に直径が18μm〜50μm、純度が99.9%以上、破断強度が0.05〜0.78(N)程度の金線(Auワイヤ)が使用されている。
【0009】
【特許文献1】
特開2002−164466号公報
【0010】
【発明が解決しようとする課題】
しかしながら、この従来の半導体装置においては、半導体素子の電極と第2配線導体とを接続しているボンディングワイヤの破断強度が0.05〜0.78(N)程度であり、弱いことから外力印加によって接続領域近傍で切れるのを防止するため長さを1mm以上として余裕をもたせていること、第2配線導体が比誘電率約2〜10の基板上に形成されているのに対し、ボンディングワイヤはその周囲が比誘電率1の空気で囲まれており、この比誘電率の差に起因する静電容量の差により、ボンディングワイヤに対するインピーダンスの低減効果が、第2配線導体に対するインピーダンスの低減効果に比べて小さくなり、ボンディングワイヤのインピーダンスが第2配線導体のインピーダンスよりも高くなっていること等から、半導体素子とコネクターを結ぶ線路中にインピーダンスが他よりも高い領域が1mm以上の長さにわたって形成されていることとなる。そのため、この第2配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に40GHz〜80GHzの高周波の電気信号を伝送させた場合、インピーダンスが高いボンディングワイヤで信号に反射等を起こし、伝送特性が大きく劣化するという欠点を有していた。
【0011】
本発明は上記欠点に鑑み案出されたもので、その目的は半導体素子とコネクターとの間に40GHz〜80GHzの高周波の電気信号を反射等を起こすことなく良好に伝送させることができる半導体装置を提供することにある。
【0012】
【課題を解決するための手段】
本発明は、半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部近傍より下面にかけて導出されている複数個のグランド配線導体および第1配線導体と、前記基体の下面に形成され、前記グランド配線導体および第1配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第2配線導体と、前記第2配線導体に電気的に接続されているコネクターとから成る半導体素子収納用パッケージと、40GHz乃至80GHzの電気信号を送受信する半導体素子とで構成され、前記半導体素子収納用パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極をグランド配線導体、第1配線導体、第2配線導体にボンディングワイヤを介し電気的に接続して成る半導体装置であって、前記第2配線導体と半導体素子の電極とを接続するボンディングワイヤの周囲が、前記基体の比誘電率と略同一の比誘電率を有する樹脂で被覆されていることを特徴とするものである。
【0013】
本発明の半導体装置によれば、第2配線導体と半導体素子の電極とを接続するボンディングワイヤの周囲を、基体と略同一の比誘電率を有する樹脂で被覆したことから、ボンディングワイヤとグランド層等との間に生じる静電容量成分と、第2配線導体とグランド層等との間に生じる静電容量成分とをほぼ同じとすることができるため、ボンディングワイヤのインピーダンスを第2配線導体のインピーダンスと効果的に整合させることができ、その結果、第2配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に40GHz〜80GHzの高周波の電気信号を伝送させた場合、第2配線導体と半導体素子とを接続するボンディングワイヤの長さが1mm以上であったとしても、信号に大きな反射等を起こすことはほとんどなく、伝送特性を優れたものとなすことができる。
【0014】
【発明の実施の形態】
次に、本発明を添付図面に基づき詳細に説明する。
【0015】
図1は本発明の半導体装置の一実施例を示し、半導体素子収納用パッケージ7内に半導体素子6を収容して構成されている。
【0016】
前記半導体素子収納用パッケージ7は、基体1、第1配線導体2a、グランド配線導体2b、入出力用パッド3a、グランド用パッド3b、第2配線導体4およびコネクター5により形成されている。
【0017】
前記基体1は酸化アルミニウム質焼結体、ムライト質焼結体、ガラスセラミックス、窒化アルミニウム質焼結体等の電気絶縁材料から成り、例えば、酸化アルミニウム質焼結体から成る場合、酸化アルミニウム、酸化ケイ素、酸化マグネシウム、酸化カルシウム等の原料粉末に適当な有機溶剤、溶媒、可塑剤、分散剤を添加混合して泥漿物を作り、この泥漿物を従来周知のドクターブレード法やカレンダーロール法等のシート形成法を採用しシート状に形成してセラミックグリーンシート(セラミック生シート)を得、しかる後、それらセラミックグリーンシートに適当な打ち抜き加工を施すとともにこれを必要に応じて複数枚積層し、約1600℃の高温で焼成することによって製作される。
【0018】
また前記基体1は、半導体素子の搭載部1aから下面にかけて複数個の第1配線導体2aおよびグランド配線導体2bが形成されており、該各配線導体2a、2bは半導体素子の電気信号入出力用、接地用の各電極を、入出力用パッド3aやグランド用パッド3bに接続するための導電路として作用し、搭載部1a側の一端には半導体素子6の電気信号入出力用、接地用の各電極がボンディングワイヤ8aを介して電気的に接続される。
【0019】
なお、前記グランド配線導体2bの一部は、基体1の内部から搭載部1a表面にかけて形成された広面積のグランド層Gと接続しており、これにより半導体素子6が搭載される搭載部1a表面が接地されている。
【0020】
前記第1配線導体2aおよびグランド配線導体2b、入出力用パッド3a、グランド用パッド3bおよびグランド層Gは、銅、銀、金、パラジウム、タングステン、モリブデン、マンガン等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤を添加して成る金属ペーストを基体1となるセラミックグリーンシートの表面にスクリーン印刷等により所定パターンに印刷しておくことによって形成される。
【0021】
この第1配線導体2aおよびグランド配線導体2bの基体1下面側の一端は、それぞれ対応する入出力用パッド3aおよびグランド用パッド3bと電気的に接続しており、これらの入出力用パッド3a、グランド用パッド3bを外部電気回路の所定の信号用や接地用等の回路導体に接続することにより、半導体素子6の電気信号入出力用、接地用の各電極が外部電気回路と電気的に接続される。
【0022】
また前記基体1は、半導体素子の搭載部1aから上面や側面等にかけて第2配線導体4が形成されており、該第2配線導体4は半導体素子6の電極をコネクター5の線材5aに接続するための導電路として作用し、搭載部1a側の一端には半導体素子6の電極がボンディングワイヤ8bを介して電気的に接続される。
【0023】
前記第2配線導体4は、上述の第1配線導体2a等と同様に、銅、銀、金、パラジウム、タングステン、モリブデン、マンガン等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体1となるセラミックグリーンシートの表面にスクリーン印刷等により所定パターンに印刷しておくことによって形成される。
【0024】
この第2配線導体4の基体1外表面側の一端はコネクター5の線材5aと電気的に接続しており、このコネクター5を同軸ケーブル等を介して通信装置等の外部機器に接続することにより半導体素子6と外部機器との間で高周波信号の送受信が行われる。
【0025】
前記コネクター5は、半導体素子収納用パッケージ7の第2配線導体4を同軸ケーブル等を介して外部機器に接続するための接続体として作用し、例えば、鉄−ニッケル−コバルト合金等の金属の線材5aの周囲を、ホウ珪酸系ガラス等の絶縁性の外囲体5bで取り囲んだ構造である。
【0026】
前記線材5aと外囲体5bとから成るコネクター5は、例えば、鉄−ニッケル−コバルト合金から成る線材5aを、鉄−ニッケル−コバルト合金等の金属から成る円筒状の容器の中央にセットし、容器内にホウ珪酸ガラス等のガラス粉末を充填した後、ガラス粉末を加熱溶融させて線材5aの周囲に被着させることによって製作される。
【0027】
かくして上述の半導体素子収納用パッケージによれば、基体1の搭載部1aに半導体素子6を搭載するとともにガラス、樹脂、ロウ材等の接着材を介して固定し、しかる後、半導体素子6の各電極を第1配線導体2a、グランド配線導体2bおよび第2配線導体4に、ボンディングワイヤ8a、8bを介して接続し、最後に蓋体10を基体1の上面に封止材を介して接合させ、半導体素子6を気密に封入することによって半導体装置11となる。
【0028】
この半導体装置11は基体1下面の入出力用パッド3aおよびグランド用パッド3bが外部電気回路基板の所定の信号用や接地用等の回路導体に半田バンプ等の外部端子を介して接続され、これによって半導体素子6の信号用、接地用の各電極は外部電気回路と電気的に接続される。
【0029】
また、この半導体装置11に取着されているコネクター5の線材5aに同軸ケーブル等の外部接続用の導線を接続することにより、半導体素子6の電極が通信装置等の外部機器に接続される。
【0030】
そしてかかる半導体装置11は、外部電気回路から供給される複数の周波数帯域が低い(5〜10GHz)電気信号を第1配線導体2aを介して半導体素子6に入力させ、半導体素子6でこれら入力された電気信号を合成して、一つの周波数帯域が高い(40〜80GHz)電気信号とするとともにこれを第2配線導体4を介してコネクター5に出力し、該コネクター5の線材5aを介して外部の通信装置等の外部機器に伝送する、或いは、外部の通信装置等の外部機器から伝送された一つの周波数帯域が高い(40〜80GHz)電気信号をコネクター5の線材5a及び第2配線導体4を介して半導体素子6に入力し、半導体素子6で入力された周波数帯域が高い(40〜80GHz)電気信号を複数の周波数帯域が低い(5〜10GHz)電気信号に変換するとともにこれらの個々の周波数帯域が低い電気信号を第1配線導体2aを介して外部電気回路に供給することとなる。
【0031】
本発明の半導体装置11においては、図2および図3に示すように、第2配線導体4と半導体素子6とを接続するボンディングワイヤ8bの周囲を、前記基体1と略同一の比誘電率を有する樹脂9で被覆しておくことが重要である。
【0032】
前記ボンディングワイヤ8bの周囲を、前記基体1と略同一の比誘電率を有する樹脂9で被覆すると、このボンディングワイヤ8bとグランド層G等との間に生じる静電容量成分を、第2配線導体4とグランド層Gとの間に生じる静電容量成分と同程度として、それぞれに対するインピーダンス低減効果をほぼ同じとすることができ、ボンディングワイヤ8bのインピーダンスを、基体1上に形成されている第2配線導体4のインピーダンスと効果的に整合させることができる。その結果、ボンディングワイヤ8bで信号に反射等を起こし、伝送特性が大きく劣化することを防止でき、周波数帯域の高い(40〜80GHz)電気信号の伝送特性を優れたものとなすことができる。
【0033】
前記樹脂9は、その比誘電率が基体1と略同一であれば基体1および半導体素子6の材質や、半導体素子収納用パッケージ7の用途等に応じて任意の材質を選択することができ、例えば、基体1が比誘電率5〜6のガラスセラミックスから成る場合には、比誘電率が3〜4のシリコーン樹脂、ゴム変性エポキシ樹脂等が好適に使用され、第2配線導体4および半導体素子6の電極にボンディングワイヤ8bを接続させた後、ボンディングワイヤ8bの表面に液状のシリコーン樹脂やゴム変性エポキシ樹脂を滴下・被着させて覆い、しかる後、これを熱硬化させることによって形成される。
【0034】
この場合、ボンディングワイヤ8bの周囲を被覆する樹脂9は、ボンディングワイヤ8bを1本ずつ被覆するような形態に限らず、図4に示すように、ボンディングワイヤ8bが第2配線導体4と半導体素子6とを接続している領域全体を樹脂9で埋めるようにして、ボンディングワイヤ8bの第2配線導体4等に対する接合を補強するとともに、このボンディングワイヤ8bと、グランド配線導体2bに接続しているボンディングワイヤ8aとの間でのインピーダンスの低減をより効果的なものとするようにしてもよい。
【0035】
なお、樹脂9と基体1との比誘電率が略同一とは、基体1の比誘電率に対して樹脂9の比誘電率が50%〜150%である状態を意味し、例えば、前述の比誘電率が5〜6のガラスセラミックスへ適用する場合、適用が可能な樹脂9は比誘電率が2.5〜9である。ただし、ボンディングワイヤ8bの表面に液状の樹脂9を滴下・被着させて覆い、しかる後、これを熱硬化させることによって樹脂9を形成する場合には、滴下性や被覆性が良好で熱硬化後の硬さが最適な観点からはシリコーン樹脂、ゴム変性エポキシ樹脂等を用いる方が好ましく、これらの比誘電率は3〜4である。
【0036】
また、前記第2配線導体4と半導体素子6の電極とを接続するボンディングワイヤ8bは、その長さを0.3mm以下としておくことが好ましい。
【0037】
前記第2配線導体4と半導体素子6の電極とを接続するボンディングワイヤ8bの長さを0.3mm以下と短くすると、半導体素子6とコネクター5とを結ぶ線路中に形成され、基体1と略同一の比誘電率を有する樹脂9で被覆する必要のある高インピーダンスの領域(ボンディングワイヤ8bの領域)が極めて短いものとなり、この樹脂9による被覆をより一層確実かつ容易なものとすることができ、その結果、第2配線導体4とボンディングワイヤ8bとを介してコネクター5と半導体素子6との間に40GHz〜80GHzの高周波の電気信号を伝送させた場合、ボンディングワイヤ8bが短いことから、信号に大きな反射等を起こすことをより一層確実に防止し、伝送特性を極めて優れたものとなすことができる。
【0038】
また、ボンディングワイヤ8bおよび第2配線導体4は、断面積を同一としておくことが好ましい。両者の断面積を同一としておくことにより、より一層確実に両者のインピーダンスを整合させることができ、40〜80GHzの高周波の電気信号の伝送特性をより一層優れたものとすることができる。
【0039】
また、前記第2配線導体4は、そのループ高さを極力低くし、第2配線導体4との高低差を少なくしておくことが好ましい。この高低差を小さくしておくと、両者からグランド層Gまでの間の距離がほぼ同じとなるため、それぞれの間に生じる静電容量成分をより一層確実に同一とすることができるため、両者のインピーダンスをより一層確実に整合させることができる。
【0040】
なお、前記第2配線導体4と半導体素子6の電極とのボンディングワイヤ8bを介しての接続は、例えば、ウエッジボンド法、具体的には、ボンディングワイヤ8bをボンディング装置のワイヤ用キャピラリを通して第2配線導体4や半導体素子6の電極に当接させるとともに、キャピラリ先端の楔状の部分でボンディングワイヤ8bを接続部位に押し付け、超音波振動、接合することによって、例えばボンディングワイヤ8bの長さを0.3mm以下として、第2配線導体4と半導体素子6の電極に接続される。この場合、ボンディングワイヤは、例えばボールボンド法によるように第2配線導体4等に接合させるために先端部分を溶融させて金属ボールを形成させるような必要がなく、キャピラリの移動角度によりループ高さを低く調整することができるため、ボンディングワイヤ8bの長さが必要以上に長くなることを効果的に防止することができる。
【0041】
また、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。
【0042】
【発明の効果】
本発明の半導体装置によれば、第2配線導体と半導体素子の電極とを接続するボンディングワイヤの周囲を、基体と略同一の比誘電率を有する樹脂で被覆したことから、ボンディングワイヤとグランド層等との間に生じる静電容量成分と、第2配線導体とグランド層等との間に生じる静電容量成分とをほぼ同じとすることができるため、ボンディングワイヤのインピーダンスを第2配線導体のインピーダンスと効果的に整合させることができ、その結果、第2配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に40GHz〜80GHzの高周波の電気信号を伝送させた場合、第2配線導体と半導体素子とを接続するボンディングワイヤの長さが1mm以上であったとしても、信号に大きな反射等を起こすことはほとんどなく、伝送特性を優れたものとなすことができる。
【図面の簡単な説明】
【図1】本発明の半導体装置の一実施例を示す断面図である。
【図2】図1に示す半導体装置の要部拡大平面図である。
【図3】図1に示す半導体装置の要部拡大断面図である。
【図4】本発明の半導体装置の他の実施例を示す要部拡大平面図である。
【図5】従来の半導体装置の断面図である。
【図6】図5に示す半導体装置の要部拡大平面図である。
【符号の説明】
1・・・・・・基体
1a・・・・・搭載部
2a・・・・・第1配線導体
2b・・・・・グランド配線導体
3a・・・・・入出力用パッド
3b・・・・・グランド用パッド
4・・・・・・第2配線導体
5・・・・・・コネクター
5a・・・・・線材
5b・・・・・外囲体
6・・・・・・半導体素子
7・・・・・・半導体素子収納用パッケージ
8a、8b・・ボンディングワイヤ
9・・・・・・樹脂
10・・・・・蓋体
11・・・・・半導体装置
G・・・・・・グランド層
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element for transmitting and receiving a high-frequency electric signal is hermetically housed in a semiconductor element housing package.
[0002]
[Prior art]
2. Description of the Related Art In recent years, a large number of semiconductor devices have been used for devices such as optical communication and wireless communication. In general, such semiconductor devices hermetically house semiconductor elements that transmit and receive high-frequency electric signals in a semiconductor element housing package. Is formed by
[0003]
As shown in FIGS. 5 and 6, the semiconductor element housing package is usually made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, or a glass ceramic, A base 21 having a semiconductor element mounting portion 21a formed on an upper surface thereof, and a plurality of metal members made of a metal material such as tungsten, molybdenum, manganese, copper, or silver, which are attached and led from the semiconductor element mounting portion 21a to the lower surface of the base 21. Wiring conductors 22a, 22b for input / output of electric signals and ground, and a plurality of ground pads 23b formed on the lower surface of the base 21 so as to be electrically connected to the wiring conductors 22a, 22b. And an input / output wiring conductor 24 extending from the mounting portion 21a of the base 21 to the upper surface or the side surface. The other end with one end to a force for the wiring conductor 24 is connected is constituted by a connector 25 that is led to the outside.
[0004]
The semiconductor element 26 for transmitting and receiving electric signals to and from the mounting portion 21a of the semiconductor element housing package 27 is bonded and fixed to the mounting section 21a via a bonding material such as Au-Sn brazing material or solder. Each electrode is connected to an input / output wiring conductor (first wiring conductor) 22a, a ground wiring conductor 22b, and an input / output wiring conductor (second wiring conductor) 24 via a bonding wire 28, and then, if necessary, a lid 30. A semiconductor device is obtained by sealing the semiconductor element 26 with the above.
[0005]
The semiconductor device is housed inside by connecting ground pads 23b and input / output pads 23a formed on the lower surface of the base 21 to circuit conductors (not shown) of an external electric circuit board via solder bumps or the like. The semiconductor element 26 is connected to an external electric circuit, and at the same time, an external device (not shown) such as an external communication device is connected to the connector 25 via a coaxial cable or the like so that the semiconductor device 26 and the external device are connected. It has become.
[0006]
The semiconductor element 26 used in the semiconductor device has a function of synthesizing a plurality of electric signals and converting it into one electric signal, or separating one electric signal and converting it into a plurality of electric signals. The plurality of electric signals having a low frequency band input from the external electric circuit via the first wiring conductor 22a are combined by the semiconductor element 26 to become an electric signal having one frequency band, and the electric signal having a high frequency band is obtained. The signal is transmitted to the connector 25 via the second wiring conductor 24, is transmitted from the connector 25 to an external device such as an external communication device, and is an electric signal having a high frequency band transmitted from the external device via the connector 25. Are converted into electric signals having a plurality of low frequency bands by the semiconductor element 26, and the electric signals having the low frequency bands are supplied to the external electric circuit via the first wiring conductor 22a. The be transmitted to.
[0007]
In this case, the second wiring conductor 24 to which an electric signal having a high frequency band is transmitted, the bonding wire 28 connected to the second wiring conductor 24, and the like are formed from the inside of the base 21 to the surface of the mounting portion 21a. A constant capacitance component is generated between the ground layer 29 having a large area connected to the ground wire 29 and the bonding wire 28 connected to the ground wiring conductor 22b. Therefore, the impedance decreases according to the magnitude of the capacitance component. ing.
[0008]
In the semiconductor device, the bonding wire 28 that connects each electrode of the semiconductor element 26 to the input / output wiring conductor (first wiring conductor) 22a and the input / output wiring conductor (second wiring conductor) 24 generally has a diameter. A gold wire (Au wire) having a size of 18 μm to 50 μm, a purity of 99.9% or more, and a breaking strength of about 0.05 to 0.78 (N) is used.
[0009]
[Patent Document 1]
JP, 2002-164466, A
[Problems to be solved by the invention]
However, in this conventional semiconductor device, the breaking strength of the bonding wire connecting the electrode of the semiconductor element and the second wiring conductor is about 0.05 to 0.78 (N) and is weak. In order to prevent disconnection in the vicinity of the connection region, the length is set to 1 mm or more to provide a margin, and the second wiring conductor is formed on a substrate having a relative dielectric constant of about 2 to 10, whereas the bonding wire Is surrounded by air having a relative dielectric constant of 1. The difference in capacitance caused by the difference in the relative dielectric constant causes the effect of reducing the impedance to the bonding wire to be reduced by the effect of reducing the impedance to the second wiring conductor. And the impedance of the bonding wire is higher than the impedance of the second wiring conductor. Impedance in the line connecting the connector so that the region higher than the other is formed over a length of 1 mm. Therefore, when a high-frequency electric signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the signal is reflected by the bonding wire having a high impedance, and the transmission is performed. There was a disadvantage that the characteristics were greatly deteriorated.
[0011]
The present invention has been devised in view of the above drawbacks, and has as its object to provide a semiconductor device capable of transmitting a high-frequency electric signal of 40 GHz to 80 GHz between a semiconductor element and a connector without causing reflection or the like. To provide.
[0012]
[Means for Solving the Problems]
The present invention provides a base having a mounting portion on which a semiconductor element is mounted, a plurality of ground wiring conductors and first wiring conductors extending from the vicinity of the mounting portion to the lower surface of the base, and formed on a lower surface of the base. A plurality of ground pads and input / output pads electrically connected to the ground wiring conductor and the first wiring conductor; and a second wiring conductor extending from a mounting portion of the base to an upper surface or a side surface. And a semiconductor element housing package comprising: a connector electrically connected to the second wiring conductor; and a semiconductor element for transmitting and receiving an electric signal of 40 GHz to 80 GHz. The semiconductor element is mounted and fixed on the portion, and each electrode of the semiconductor element is bonded to the ground wiring conductor, the first wiring conductor, and the second wiring conductor. A semiconductor device electrically connected via a bonding wire, wherein a periphery of a bonding wire connecting the second wiring conductor and an electrode of a semiconductor element has a relative permittivity substantially equal to a relative permittivity of the base. Characterized by being coated with a resin having the same.
[0013]
According to the semiconductor device of the present invention, since the periphery of the bonding wire connecting the second wiring conductor and the electrode of the semiconductor element is covered with the resin having substantially the same relative dielectric constant as the base, the bonding wire and the ground layer are covered. And the capacitance component generated between the second wiring conductor and the ground layer or the like can be made substantially the same, so that the impedance of the bonding wire is reduced by the second wiring conductor. The impedance can be effectively matched. As a result, when a high-frequency electric signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the second wiring Even if the length of the bonding wire connecting the conductor and the semiconductor element is 1 mm or more, the signal rarely causes large reflection. No, it can be made with excellent transmission characteristics.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0015]
FIG. 1 shows an embodiment of a semiconductor device according to the present invention, in which a semiconductor element 6 is housed in a semiconductor element housing package 7.
[0016]
The semiconductor element housing package 7 includes a base 1, a first wiring conductor 2a, a ground wiring conductor 2b, an input / output pad 3a, a ground pad 3b, a second wiring conductor 4, and a connector 5.
[0017]
The base 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, a glass ceramic, an aluminum nitride sintered body. A suitable organic solvent, solvent, plasticizer, and dispersant are added to and mixed with raw material powders such as silicon, magnesium oxide, and calcium oxide to form a slurry, and the slurry is subjected to a conventionally known doctor blade method, calender roll method, or the like. A ceramic green sheet (ceramic green sheet) is obtained by forming a sheet by adopting a sheet forming method. Thereafter, the ceramic green sheet is subjected to an appropriate punching process, and a plurality of the green sheets are laminated as necessary. It is manufactured by firing at a high temperature of 1600 ° C.
[0018]
The base 1 has a plurality of first wiring conductors 2a and ground wiring conductors 2b formed from the mounting portion 1a of the semiconductor element to the lower surface, and each of the wiring conductors 2a and 2b is used for inputting / outputting an electric signal of the semiconductor element. , Acts as a conductive path for connecting the ground electrode to the input / output pad 3a or the ground pad 3b, and has one end on the side of the mounting portion 1a for input / output of electric signals of the semiconductor element 6 and ground. Each electrode is electrically connected via a bonding wire 8a.
[0019]
Note that a part of the ground wiring conductor 2b is connected to a large-area ground layer G formed from the inside of the base 1 to the surface of the mounting portion 1a, so that the surface of the mounting portion 1a on which the semiconductor element 6 is mounted. Is grounded.
[0020]
The first wiring conductor 2a and the ground wiring conductor 2b, the input / output pad 3a, the ground pad 3b, and the ground layer G are made of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, and manganese. In this case, the metal paste is formed by printing a metal paste obtained by adding an organic solvent to copper powder on a surface of a ceramic green sheet serving as the base 1 in a predetermined pattern by screen printing or the like.
[0021]
One ends of the first wiring conductor 2a and the ground wiring conductor 2b on the lower surface side of the base 1 are electrically connected to corresponding input / output pads 3a and ground pads 3b, respectively. By connecting the ground pad 3b to a predetermined signal conductor or a circuit conductor for grounding of the external electric circuit, the electric signal input / output and ground electrodes of the semiconductor element 6 are electrically connected to the external electric circuit. Is done.
[0022]
The base 1 has a second wiring conductor 4 formed from the mounting portion 1a of the semiconductor element to the upper surface, the side surface, and the like. The second wiring conductor 4 connects the electrode of the semiconductor element 6 to the wire 5a of the connector 5. And an electrode of the semiconductor element 6 is electrically connected to one end of the mounting portion 1a via a bonding wire 8b.
[0023]
The second wiring conductor 4 is made of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, or manganese, like the first wiring conductor 2a described above. It is formed by printing a metal paste obtained by adding an organic solvent or the like to the powder in a predetermined pattern by screen printing or the like on the surface of the ceramic green sheet serving as the base 1.
[0024]
One end of the second wiring conductor 4 on the outer surface side of the base 1 is electrically connected to a wire 5a of a connector 5, and the connector 5 is connected to an external device such as a communication device via a coaxial cable or the like. Transmission and reception of high-frequency signals are performed between the semiconductor element 6 and an external device.
[0025]
The connector 5 functions as a connector for connecting the second wiring conductor 4 of the semiconductor element housing package 7 to an external device via a coaxial cable or the like, and is, for example, a metal wire such as an iron-nickel-cobalt alloy. The structure is such that the periphery of 5a is surrounded by an insulating outer body 5b such as borosilicate glass.
[0026]
For the connector 5 composed of the wire 5a and the outer body 5b, for example, a wire 5a made of an iron-nickel-cobalt alloy is set at the center of a cylindrical container made of a metal such as an iron-nickel-cobalt alloy, After the glass powder such as borosilicate glass is filled in the container, the glass powder is heated and melted and adhered around the wire 5a.
[0027]
Thus, according to the above-described semiconductor element storage package, the semiconductor element 6 is mounted on the mounting portion 1a of the base 1 and fixed via an adhesive such as glass, resin, brazing material, and the like. The electrodes are connected to the first wiring conductor 2a, the ground wiring conductor 2b, and the second wiring conductor 4 via bonding wires 8a and 8b, and finally the lid 10 is joined to the upper surface of the base 1 via a sealing material. The semiconductor device 11 is obtained by hermetically sealing the semiconductor element 6.
[0028]
In the semiconductor device 11, input / output pads 3a and ground pads 3b on the lower surface of the base 1 are connected to predetermined signal and ground circuit conductors of an external electric circuit board via external terminals such as solder bumps. Accordingly, the signal and ground electrodes of the semiconductor element 6 are electrically connected to an external electric circuit.
[0029]
In addition, by connecting a conductor for external connection such as a coaxial cable to the wire 5a of the connector 5 attached to the semiconductor device 11, the electrode of the semiconductor element 6 is connected to an external device such as a communication device.
[0030]
The semiconductor device 11 causes a plurality of low-frequency band (5 to 10 GHz) electric signals supplied from an external electric circuit to be input to the semiconductor element 6 via the first wiring conductor 2a, and the semiconductor element 6 inputs these electric signals. The electric signals are combined into one electric signal having a high frequency band (40 to 80 GHz), and the electric signal is output to the connector 5 via the second wiring conductor 4 and externally connected via the wire 5a of the connector 5. Or a single high frequency band (40 to 80 GHz) electric signal transmitted from an external device such as an external communication device or the like to the external device such as a communication device. To the semiconductor element 6 via the semiconductor element 6, and the electric signal having a high frequency band (40 to 80 GHz) input by the semiconductor element 6 is converted into a plurality of low frequency bands (5 to 10 GHz). The supplying to the external electrical circuit through the first wiring conductor 2a of these individual frequency band lower electrical signals and converts into an electrical signal.
[0031]
In the semiconductor device 11 of the present invention, as shown in FIGS. 2 and 3, the periphery of the bonding wire 8 b connecting the second wiring conductor 4 and the semiconductor element 6 has substantially the same relative dielectric constant as the base 1. It is important to cover with the resin 9 having.
[0032]
When the periphery of the bonding wire 8b is covered with a resin 9 having a dielectric constant substantially the same as that of the base 1, a capacitance component generated between the bonding wire 8b and the ground layer G or the like is reduced to a second wiring conductor. 4 and the ground layer G, the impedance reduction effect for each of them can be made substantially the same, and the impedance of the bonding wire 8b is reduced to the second component formed on the base 1. It can be effectively matched with the impedance of the wiring conductor 4. As a result, it is possible to prevent a signal from being reflected by the bonding wire 8b or the like, and to prevent the transmission characteristics from being largely degraded, and to make the transmission characteristics of an electric signal having a high frequency band (40 to 80 GHz) excellent.
[0033]
As long as the relative dielectric constant of the resin 9 is substantially the same as that of the base 1, any material can be selected according to the material of the base 1 and the semiconductor element 6, the use of the semiconductor element housing package 7, and the like. For example, when the base 1 is made of a glass ceramic having a relative dielectric constant of 5 to 6, a silicone resin or a rubber-modified epoxy resin having a relative dielectric constant of 3 to 4 is preferably used, and the second wiring conductor 4 and the semiconductor element are preferably used. After the bonding wire 8b is connected to the electrode No. 6, a liquid silicone resin or rubber-modified epoxy resin is dropped and adhered on the surface of the bonding wire 8b to cover the surface, and then, the surface is thermally cured. .
[0034]
In this case, the resin 9 covering the periphery of the bonding wire 8b is not limited to a mode in which the bonding wire 8b is covered one by one, and as shown in FIG. 6 is filled with a resin 9 to reinforce the bonding of the bonding wire 8b to the second wiring conductor 4 and the like, and is connected to the bonding wire 8b and the ground wiring conductor 2b. You may make it more effective to reduce the impedance with the bonding wire 8a.
[0035]
The term “substantially the same relative dielectric constant between the resin 9 and the base 1” means a state where the relative dielectric constant of the resin 9 is 50% to 150% with respect to the relative dielectric constant of the base 1, for example, as described above. When applied to glass ceramics having a relative permittivity of 5 to 6, the applicable resin 9 has a relative permittivity of 2.5 to 9. However, when the resin 9 is formed by dropping and applying a liquid resin 9 on the surface of the bonding wire 8b and then curing the resin 9 by heat, the dropping and covering properties are good and the thermosetting is performed. It is preferable to use a silicone resin, a rubber-modified epoxy resin, or the like from the viewpoint of optimal hardness later, and their relative dielectric constants are 3 to 4.
[0036]
Further, it is preferable that the length of the bonding wire 8b connecting the second wiring conductor 4 and the electrode of the semiconductor element 6 be 0.3 mm or less.
[0037]
When the length of the bonding wire 8b connecting the second wiring conductor 4 and the electrode of the semiconductor element 6 is reduced to 0.3 mm or less, the bonding wire 8b is formed in a line connecting the semiconductor element 6 and the connector 5, and is substantially the same as the base 1. The high-impedance region (the region of the bonding wire 8b) that needs to be covered with the resin 9 having the same relative dielectric constant is extremely short, and the covering with the resin 9 can be made more reliable and easier. As a result, when a high-frequency electric signal of 40 GHz to 80 GHz is transmitted between the connector 5 and the semiconductor element 6 via the second wiring conductor 4 and the bonding wire 8b, the signal is transmitted because the bonding wire 8b is short. It is possible to more reliably prevent the occurrence of large reflection and the like, and to make the transmission characteristics extremely excellent.
[0038]
It is preferable that the bonding wire 8b and the second wiring conductor 4 have the same sectional area. By setting the cross-sectional areas of the two to be the same, the impedances of the two can be more reliably matched, and the transmission characteristics of a high-frequency electric signal of 40 to 80 GHz can be further improved.
[0039]
Further, it is preferable that the loop height of the second wiring conductor 4 be as low as possible to reduce the difference in height from the second wiring conductor 4. If the height difference is reduced, the distance between the two and the ground layer G becomes substantially the same, so that the capacitance component generated between the two can be more reliably made the same. Can be more reliably matched.
[0040]
The connection between the second wiring conductor 4 and the electrode of the semiconductor element 6 via the bonding wire 8b is performed, for example, by a wedge bonding method, specifically, by connecting the bonding wire 8b through a wire capillary of a bonding apparatus. The bonding wire 8b is brought into contact with the wiring conductor 4 and the electrode of the semiconductor element 6, and the bonding wire 8b is pressed against the connection portion at the wedge-shaped portion at the tip of the capillary, and is ultrasonically vibrated and joined, for example, to reduce the length of the bonding wire 8b to 0. It is connected to the second wiring conductor 4 and the electrode of the semiconductor element 6 with a length of 3 mm or less. In this case, the bonding wire does not need to be melted at the tip to form a metal ball in order to be bonded to the second wiring conductor 4 or the like, for example, by a ball bonding method, and the loop height is determined by the moving angle of the capillary. Can be adjusted to be low, so that the bonding wire 8b can be effectively prevented from being unnecessarily long.
[0041]
Further, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.
[0042]
【The invention's effect】
According to the semiconductor device of the present invention, since the periphery of the bonding wire connecting the second wiring conductor and the electrode of the semiconductor element is covered with the resin having the same relative dielectric constant as the base, the bonding wire and the ground layer are covered. And the capacitance component generated between the second wiring conductor and the ground layer or the like can be made substantially the same, so that the impedance of the bonding wire is reduced by the second wiring conductor. The impedance can be effectively matched. As a result, when a high-frequency electric signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the second wiring Even if the length of the bonding wire connecting the conductor and the semiconductor element is 1 mm or more, the signal rarely causes large reflection. No, it can be made with excellent transmission characteristics.
[Brief description of the drawings]
FIG. 1 is a sectional view showing one embodiment of a semiconductor device of the present invention.
FIG. 2 is an enlarged plan view of a main part of the semiconductor device shown in FIG. 1;
FIG. 3 is an enlarged sectional view of a main part of the semiconductor device shown in FIG. 1;
FIG. 4 is a main part enlarged plan view showing another embodiment of the semiconductor device of the present invention.
FIG. 5 is a sectional view of a conventional semiconductor device.
FIG. 6 is an enlarged plan view of a main part of the semiconductor device shown in FIG. 5;
[Explanation of symbols]
1 Base 1a Mounting part 2a First wiring conductor 2b Ground wiring conductor 3a Input / output pad 3b Ground pad 4 Second wiring conductor 5 Connector 5 a Wire 5 b Enclosure 6 Semiconductor element 7 ····· Semiconductor element storage packages 8a and 8b ··· Bonding wires 9 ··· Resin 10 ···· Lid 11 ··· Semiconductor device G ··· Ground layer

Claims (1)

半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部近傍より下面にかけて導出されている複数個のグランド配線導体および第1配線導体と、前記基体の下面に形成され、前記グランド配線導体および第1配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第2配線導体と、前記第2配線導体に電気的に接続されているコネクターとから成る半導体素子収納用パッケージと、40GHz乃至80GHzの電気信号を送受信する半導体素子とで構成され、前記半導体素子収納用パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極をグランド配線導体、第1配線導体、第2配線導体にボンディングワイヤを介し電気的に接続して成る半導体装置であって、前記第2配線導体と半導体素子の電極とを接続するボンディングワイヤの周囲が、前記基体の比誘電率と略同一の比誘電率を有する樹脂で被覆されていることを特徴とする半導体装置。A base having a mounting portion on which a semiconductor element is mounted, a plurality of ground wiring conductors and first wiring conductors extending from the vicinity of the mounting portion of the base to a lower surface; A plurality of ground pads and input / output pads electrically connected to the wiring conductor and the first wiring conductor; a second wiring conductor extending from a mounting portion of the base to an upper surface or a side surface; (2) a semiconductor element storage package including a connector electrically connected to a wiring conductor; and a semiconductor element configured to transmit and receive an electric signal of 40 GHz to 80 GHz. And bonding the electrodes of the semiconductor element to the ground wiring conductor, the first wiring conductor, and the second wiring conductor. A semiconductor device electrically connected to the base via a bonding wire connecting the second wiring conductor and an electrode of the semiconductor element, the periphery of the bonding wire having a dielectric constant substantially equal to the dielectric constant of the base. A semiconductor device characterized by being coated with a resin.
JP2003046302A 2003-02-24 2003-02-24 Semiconductor device Pending JP2004259769A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003046302A JP2004259769A (en) 2003-02-24 2003-02-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003046302A JP2004259769A (en) 2003-02-24 2003-02-24 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2004259769A true JP2004259769A (en) 2004-09-16

Family

ID=33112882

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003046302A Pending JP2004259769A (en) 2003-02-24 2003-02-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2004259769A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7532085B2 (en) 2006-05-31 2009-05-12 Eudyna Devices Inc. Electronic device
US8063476B2 (en) 2007-12-04 2011-11-22 Elpida Memory, Inc. Semiconductor device
CN105164870A (en) * 2013-04-26 2015-12-16 矢崎总业株式会社 Connector

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7532085B2 (en) 2006-05-31 2009-05-12 Eudyna Devices Inc. Electronic device
US8063476B2 (en) 2007-12-04 2011-11-22 Elpida Memory, Inc. Semiconductor device
CN105164870A (en) * 2013-04-26 2015-12-16 矢崎总业株式会社 Connector
US9711896B2 (en) 2013-04-26 2017-07-18 Yazaki Corporation Connector

Similar Documents

Publication Publication Date Title
JP2004259769A (en) Semiconductor device
JP4077769B2 (en) Semiconductor device
JP3811460B2 (en) Semiconductor device
JP3847249B2 (en) Semiconductor device
JP3679090B2 (en) Semiconductor device
JP4002540B2 (en) Semiconductor device
JP4077770B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3811459B2 (en) Semiconductor device
JP3847247B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3780514B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3847250B2 (en) Mounting structure of semiconductor device
JP3722796B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3808423B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3847248B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3847239B2 (en) Semiconductor device
JP4480390B2 (en) Mounting structure of semiconductor device
JP3722793B2 (en) Semiconductor element storage package and semiconductor device using the same
JP3878901B2 (en) Manufacturing method of semiconductor element storage package
JP3811447B2 (en) Semiconductor element storage package and semiconductor device using the same
JP2004179180A (en) Semiconductor element housing package and semiconductor device housing the same
JP2005101210A (en) Semiconductor device
JP3808421B2 (en) Semiconductor element storage package and semiconductor device using the same
JP2004207523A (en) Package for housing semiconductor element and semiconductor device using it
JP2006128301A (en) Wiring board
JP2005150467A (en) Semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Effective date: 20040924

Free format text: JAPANESE INTERMEDIATE CODE: A621

A977 Report on retrieval

Effective date: 20060728

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Effective date: 20060801

Free format text: JAPANESE INTERMEDIATE CODE: A131

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20061002

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20061121