JP2004253746A - Wiring board - Google Patents

Wiring board Download PDF

Info

Publication number
JP2004253746A
JP2004253746A JP2003046808A JP2003046808A JP2004253746A JP 2004253746 A JP2004253746 A JP 2004253746A JP 2003046808 A JP2003046808 A JP 2003046808A JP 2003046808 A JP2003046808 A JP 2003046808A JP 2004253746 A JP2004253746 A JP 2004253746A
Authority
JP
Japan
Prior art keywords
line
transmission line
differential transmission
signal
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003046808A
Other languages
Japanese (ja)
Inventor
Koki Kawabata
幸喜 川畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2003046808A priority Critical patent/JP2004253746A/en
Publication of JP2004253746A publication Critical patent/JP2004253746A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of suppressing the reflection loss generated at a part at which a line interval widens from the part at which the line interval is fixed to extremely small in a differential transmission line, thereby making the operational properties of a semiconductor element good. <P>SOLUTION: A differential transmission line 8 is formed on an insulating substrate 2, and respective line widths increase at a part 8d where the line interval of the differential transmission line 8 widens in a wiring board 1. Moreover, the line width is preferably made large in such a manner that a differential impedance at a part 8c where the line interval of the differential transmission line 8 is fixed is roughly same as the differential impedance at the part 8d where the line interval widens. The reflection loss of high-frequency signals due to the mismatching of the differential impedance due to the change in the line interval of the differential transmission line 8 can be suppressed at the part 8d where the line interval widens, and the operational properties of the mounted semiconductor element 5 is made good. <P>COPYRIGHT: (C)2004,JPO&amp;NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、高速で作動する半導体素子や光半導体素子等の電子部品を搭載するのに好適な、差動伝送線路を有する配線基板に関するものである。
【0002】
【従来の技術】
高速で作動する半導体素子や光半導体素子等の電子部品を搭載するための配線基板4においては、高速信号を正確かつ効率よく伝播させるために、図6に従来の配線基板の例を断面図で、また図7にその差動伝送線路の周辺部を要部拡大平面図で示すように、高速信号が伝播する信号線路に差動伝送線路48を用いている。
【0003】
差動伝送線路48は、図7に示すように、一対の伝送線路48a・48bを用いてそれぞれの伝送線路の入力側に正相および逆相の信号を印加し、出力側でその差をとることによりコモンモードノイズ成分をキャンセルすることができ、高品質の信号を伝送することができる伝送方式に用いられるものである。この差動伝送線路48の構造は、一対の伝送線路48a・48bによって決定される差動インピーダンスが所望の特性に一致するように、絶縁基板42の絶縁層42a〜42dの材料や、絶縁層42a〜42dの断面構造(配線導体43・44の幅および厚み,グランド層やグランド導体との距離等)を制御し決定されている。
【0004】
また、差動伝送線路48のレイアウト設計においては、半導体素子45の電極と導体バンプ46および半導体素子接続用電極47を介して電気的に接続された差動伝送線路48を用いて配線基板4の上面で信号を伝送し、配線基板4の二次実装側である外部接続用電極410等の配列間隔に応じてその差動伝送線路48を形成する一対の伝送線路48a・48b間の線路間隔を広げて、二次実装部である外部接続用電極410に接続されている。
【0005】
【特許文献1】
特開2002−9511号公報
【0006】
【発明が解決しようとする課題】
しかしながら、従来の配線基板40上に形成された差動伝送線路48においては、差動インピーダンスが例えば約100Ωになるように設計された線路間隔が一定の部分48cに対し、2次実装部である外部接続用電極410の配列間隔に合わせて差動伝送線路48を展開して配線する必要がある。このとき、線路間隔が広がる部分48dにおいて差動伝送線路48の線路間隔が変化することから差動インピーダンスが100Ωからずれて高くなってしまい、線路間隔が一定の部分48cと線路間隔が広がる部分48dとにおいてインピーダンスの不整合が起こり、反射損失が大きくなり信号の伝送が阻害され、半導体素子45の作動性が損なわれる場合があるという問題点を有していた。
【0007】
本発明は上記問題点に鑑み案出されたものであり、その目的は、差動伝送線路において線路間隔が一定の部分から線路間隔が広がる部分において生じる反射損失を非常に小さなものに抑制することができ、それにより半導体素子の作動性を良好なものとできる配線基板を提供することにある。
【0008】
【課題を解決するための手段】
本発明の配線基板は、絶縁基板上に差動伝送線路が形成されており、この差動伝送線路の線路間隔が広がる部分においてそれぞれの線路幅が大きくなっていることを特徴とするものである。
【0009】
また、本発明の配線基板は、上記構成において、前記線路幅は、前記差動伝送線路の線路間隔が一定の部分における差動インピーダンスと、前記線路間隔が広がる部分における差動インピーダンスとが略同じとなるように大きくされていることを特徴とするものである。
【0010】
また、本発明の配線基板は、上記各構成において、前記差動伝送線路の線路間隔が広がった後の端部にそれぞれ信号用貫通導体が接続されるとともに、この信号用貫通導体を取り囲むようにそれぞれ複数の接地用貫通導体が形成されていることを特徴とするものである。
【0011】
また、本発明の配線基板は、上記構成において、前記接地用貫通導体は、前記差動伝送線路の前記線路間隔が広がる部分における差動インピーダンスと前記信号用貫通導体の差動インピーダンスとが略同じとなるように形成されていることを特徴とするものである。
【0012】
本発明の配線基板によれば、配線基板上に形成された差動伝送線路について、差動伝送線路の線路間隔が広がる部分においてそれぞれの線路幅が大きくなっていることから、その部分においては一対の伝送線路の容量成分の増加により差動インピーダンスが減少することとなるので、線路間隔が広がる部分において差動伝送線路の線路間隔の変化による差動インピーダンスの不整合による反射損失を抑えることが可能となる。
【0013】
また、線路幅が、差動伝送線路の線路間隔が一定の部分における差動インピーダンスと、線路間隔が広がる部分における差動インピーダンスとが略同じとなるように大きくされているときには、差動伝送線路の線路間隔が広がる部分における差動インピーダンスの不整合をなくすことができ、高周波信号の反射損失を無視できる程度に小さく抑えることが可能となる。
【0014】
また、差動伝送線路の線路間隔が広がった後の端部にそれぞれ信号用貫通導体が接続されるとともに、この信号用貫通導体を取り囲むようにそれぞれ複数の接地用貫通導体が形成されていることにより、これら信号用貫通導体および接地用貫通導体によって擬似同軸線路が形成され、信号用貫通導体からの放射による高周波信号の透過損失を抑えることが可能となる。
【0015】
また、差動伝送線路の線路間隔が広がる部分における差動インピーダンスと信号用貫通導体の差動インピーダンスとが略同じとなるように接地用貫通導体が形成されていることにより、差動伝送線路と信号用貫通導体との接続部における差動インピーダンスの不整合をなくすことができ、高周波信号の反射損失を抑えることが可能となる。
【0016】
これらのことにより、本発明の配線基板によれば、差動伝送線路の線路間隔が広がる部分における高周波信号の反射損失および透過損失を極めて小さなものとすることができるので、これに搭載される半導体素子の高周波領域における作動性を良好なものとすることができる。
【0017】
【発明の実施の形態】
本発明の配線基板について以下に図面を参照しつつ詳細に説明する。
【0018】
図1は本発明の配線基板の実施の形態の一例を示す断面図であり、図2は図1に示す配線基板における差動伝送線路の周辺部の要部拡大平面図である。
【0019】
この例の配線基板1においては、絶縁基板2を構成する絶縁層2a〜2dは基本的には同じ比誘電率を有する絶縁材料で形成されている。絶縁層2c上には信号配線群3が形成され、絶縁層2bおよび2d上には信号配線群3に対向させて広面積の電源配線層4aもしくは接地配線層4bが形成されており、信号配線群3の各信号配線はストリップ線路構造を有している。なお、電源配線層4aおよび接地配線層4bは、配線基板1の仕様に応じて入れ換えて配置されることもある。
【0020】
また、信号配線群3の各信号配線の配線幅および信号配線群3と電源配線層4aもしくは接地配線層4bとの間に介在する絶縁層2bおよび2cの厚みを適宜設定することで、信号配線群3の特性インピーダンスを任意の値に設定することができるため、良好な伝送特性を有する信号配線群3を形成することが可能となる。信号配線群3の特性インピーダンスは、一般的には50Ωに設定される場合が多い。
【0021】
なお、信号配線群3に含まれる複数の信号配線は、それぞれ異なる電気信号を伝送するものとしてもよい。
【0022】
この例では、配線基板1の上面には高速で動作する半導体素子や光半導体素子等の半導体素子5が搭載され、錫−鉛合金(Sn−Pb)等の半田や金(Au)等から成る導体バンプ6および半導体素子5を接続するための半導体素子接続用電極7を介して差動伝送線路8と電気的に接続されている。また、配線基板1の半導体素子5を搭載する上面と反対側の下面には、半導体素子5に信号の入出力および電源供給を行なうための外部接続用電極10を有している。
【0023】
また、差動伝送線路8は、絶縁層2aの上面に電源配線層もしくは接地配線層4aとの間で形成されたマイクロストリップ構造の一対の信号線路で形成され、半導体素子接続用電極7および錫−鉛合金(Sn−Pb)等の半田や金(Au)等から成る導体バンプ6を介して半導体素子5の電極と電気的に接続されており、外部と信号の入出力を行なうために貫通導体9を介して外部接続用電極10と電気的に接続されている。
【0024】
これを図2を用いて詳細に説明する。図2は本発明の配線基板の実施の形態の一例における差動伝送線路の周辺部を示す要部拡大平面図である。図2において、絶縁層2は図1に示す絶縁層2aに相当するものである。
【0025】
また、差動伝送線路8aおよび8bは、図1に示す差動伝送線路8に相当するものであり、半導体素子5と図1に示す導体バンプ6および半導体素子接続用電極7を介して電気的に接続され、また貫通導体9を介して外部接続用電極10と電気的に接続されている。差動伝送線路8は、一対の信号線路8a・8b間の間隔が一定である部分8cと一対の信号線路8a・8b間の間隔が広がる部分8dとによって形成され、信号線路8a・8b間の間隔が広がる部分8dの信号線路8a・8bの線路幅は信号線路8a・8b間の間隔が一定である部分8cにおける線路幅より大きく形成されている。そして、その信号線路8a・8b間の間隔が広がる部分8dの端部において、差動伝送線路8aおよび8bはそれぞれ貫通導体9aおよび9bを介して外部接続用電極10と電気的に接続されている。
【0026】
次に、図3は本発明の配線基板の実施の形態の一例における差動伝送線路の周辺部を示す要部拡大断面図である。図3において、差動伝送線路8aおよび8bは、差動伝送線路8の配線幅,配線間隔,配線厚みおよび電源配線層もしくは接地配線層4aとの間に介在する絶縁層2aの厚みを適宜設定することにより、差動伝送線路8の差動インピーダンスを任意の値に設定することができるため、良好な伝送特性を有する差動伝送線路8を形成することが可能となる。差動伝送線路8の差動インピーダンスは、一般的には100Ωに設定される場合が多い。
【0027】
次に、図4は本発明の配線基板の実施の形態の他の例を示す断面図であり、図5は図4に示す配線基板における差動伝送線路の周辺部の要部拡大平面図である。これら図4および図5において、図1〜図3と同様の箇所には同じ符号を付してある。
【0028】
この例の配線基板1’においては、差動伝送線路8は、その線路間隔が広がる部分8dにおいて、線路間隔が広がった後の信号線路8a・8bの端部に、それぞれ信号用貫通導体9が接続され、これを介して信号用の外部接続用電極10と電気的に接続されているとともに、信号用貫通導体9を取り囲むようにそれぞれ複数の接地用貫通導体11が形成され、これら接地用貫通導体11は電源配線層4aもしくは接地配線層4bを介して電源もしくは接地用の外部接続用電極10に電気的に接続されている。
【0029】
これを図5を用いて詳細に説明する。図5は本発明の配線基板の実施の形態の他の例における差動伝送線路の周辺部を示す図2と同様の要部拡大平面図である。
【0030】
図5において、差動伝送線路8aおよび8bは、図4に示す差動伝送線路8に相当するものであり、半導体素子5と図4に示す導体バンプ6および半導体素子接続用電極7を介して電気的に接続され、また信号用貫通導体9a・9bを介して信号用の外部接続用電極10と電気的に接続されている。信号用貫通導体9a・9bはそれぞれ複数の接地用貫通導体11によって疑似同軸線路を構成するように取り囲まれ、接地用貫通導体11は電源配線層4aもしくは接地配線層4bを介して電源用もしくは接地用の外部接続用電極10に接続されている。
【0031】
このような本発明の配線基板1’によれば、差動伝送線路8の線路間隔が広がった後の信号線路8a・8bの端部にそれぞれ信号用貫通導体9a・9bが接続されるとともに、この信号用貫通導体9a・9bを取り囲むようにそれぞれ複数の接地用貫通導体11が形成されていることにより、これら信号用貫通導体9a・9bおよび接地用貫通導体11によって擬似同軸線路が形成され、信号用貫通導体9a・9bからの放射による高周波信号の透過損失を抑えることが可能となる。
【0032】
また、差動伝送線路8の線路間隔が広がる部分8dにおける差動インピーダンスと信号用貫通導体9a・9bの差動インピーダンスとが略同じとなるように接地用貫通導体11が形成されていることにより、差動伝送線路8と信号用貫通導体9a・9bとの接続部における差動インピーダンスの不整合をなくすことができ、高周波信号の反射損失を抑えることが可能となる。
【0033】
本発明の配線基板1・1’は、同様の配線構造をさらに多層に積層して多層配線基板を構成したものであってもよい。
【0034】
また、信号配線群3および差動伝送線路8の構造は、信号配線群に対向して形成された電源配線層もしくは接地配線層を有するマイクロストリップ線路構造の他にも、信号配線群の上下に電源配線層もしくは接地配線層を有するストリップ線路構造や、信号配線群の各信号配線に隣接して電源配線層もしくは接地配線層を形成したコプレーナ線路構造であってもよく、配線基板1・1’に要求される仕様等に応じて適宜選択して用いることができる。
【0035】
また、この配線基板1・1’にチップ抵抗・薄膜抵抗・コイルインダクタ・クロスインダクタ・チップコンデンサまたは電解コンデンサ等といったものを取着して、電子回路モジュール等を構成してもよい。
【0036】
また、各絶縁層2a〜2dの平面視における形状は、正方形状や長方形状の他に、菱形状・六角形状または八角形状等の形状であってもよい。
【0037】
そして、このような本発明の配線基板1・1’は、半導体素子収納用パッケージ等の電子部品収納用パッケージや電子部品搭載用基板、多数の半導体素子が搭載されるいわゆるマルチチップモジュールやマルチチップパッケージ、あるいはマザーボード等として使用される。
【0038】
本発明の配線基板1・1’において、各絶縁層2a〜2dは、例えばセラミックグリーンシート積層法によって、酸化アルミニウム質焼結体・窒化アルミニウム質焼結体・炭化珪素質焼結体・窒化珪素質焼結体・ムライト質焼結体またはガラスセラミックス焼結体等の無機絶縁材料を使用して、あるいはポリイミド・エポキシ樹脂・フッ素樹脂・ポリノルボルネンまたはベンゾシクロブテン等の有機絶縁材料を使用して、あるいはセラミックス粉末等の無機絶縁物粉末をエポキシ樹脂等の熱硬化性樹脂で結合して成る複合絶縁材料等の電気絶縁材料を使用して形成される。
【0039】
これらの絶縁層2a〜2dは以下のようにして作製される。例えば酸化アルミニウム質焼結体から成る場合であれば、まず、酸化アルミニウム・酸化珪素・酸化カルシウムまたは酸化マグネシウム等の原料粉末に適当な有機バインダや溶剤等を添加混合して泥漿状となすとともに、これをドクターブレード法等を採用してシート状となすことによってセラミックグリーンシートを得る。そして、各信号配線群3および各導体層4となる金属ペーストを所定のパターンに印刷塗布して上下に積層し、最後にこの積層体を還元雰囲気中にて約1600℃の温度で焼成することによって製作される。
【0040】
また、例えばエポキシ樹脂から成る場合であれば、一般に酸化アルミニウム質焼結体から成るセラミックスやガラス繊維を織り込んだ布にエポキシ樹脂を含浸させて形成されるガラスエポキシ樹脂等から成る絶縁層の上面に、有機樹脂前駆体をスピンコート法もしくはカーテンコート法等により被着させ、これを熱硬化処理することによって形成されるエポキシ樹脂等の有機樹脂から成る絶縁層と、銅を無電解めっき法や蒸着法等の薄膜形成技術およびフォトリソグラフィ技術を採用することによって形成される薄膜配線導体層とを交互に積層し、約170℃程度の温度で加熱硬化することによって製作される。
【0041】
これらの絶縁層2a〜2dの厚みとしては、使用する材料の特性に応じて、要求される仕様に対応する機械的強度や電気的特性等の条件を満たすように適宜設定される。
【0042】
また、異なる比誘電率を有する絶縁層2a〜2dを得るための方法としては、例えば酸化アルミニウム・窒化アルミニウム・炭化珪素・窒化珪素・ムライトまたはガラスセラミックス等の無機絶縁材料や、あるいはポリイミド・エポキシ樹脂・フッ素樹脂・ポリノルボルネンまたはベンゾシクロブテン等の有機絶縁材料にチタン酸バリウム・チタン酸ストロンチウム・チタン酸カルシウムまたはチタン酸マグネシウム等の高誘電体材料の粉末を添加混合し、しかるべき温度で加熱硬化することによって、所望の比誘電率のものを得るようにすればよい。
【0043】
このとき、無機絶縁材料や有機絶縁材料に添加混合する高誘電体材料の粒径は、無機絶縁材料あるいは有機絶縁材料に高誘電体材料を添加混合したことによって起こる絶縁層内の比誘電率のバラツキの発生の低下や、絶縁層の粘度変化による加工性の低下を低減するため、0.5〜50μmの範囲とすることが望ましい。
【0044】
また、無機絶縁材料や有機絶縁材料に添加混合する高誘電体材料の含有量は、絶縁層の比誘電率を大きな値とするためと、無機絶縁材料や有機絶縁材料と高誘電体材料の接着強度の低下を防止するために、5〜75重量%とすることが望ましい。
【0045】
また、信号配線群3および各差動伝送線路8や電源配線層4aもしくは接地配線層4bは、例えばタングステン(W)・モリブデン(Mo)・モリブデンマンガン(Mo−Mn)・銅(Cu)・銀(Ag)または銀パラジウム(Ag−Pd)等の金属粉末メタライズ、あるいは銅(Cu)・銀(Ag)・ニッケル(Ni)・クロム(Cr)・チタン(Ti)・金(Au)またはニオブ(Nb)やそれらの合金等の金属材料の薄膜等により形成すればよい。
【0046】
具体的には、信号配線群3や電源配線層4aもしくは接地配線層4bをWの金属粉末メタライズで形成する場合は、W粉末に適当な有機バインダや溶剤等を添加混合して得た金属ペーストを絶縁層2a〜2dとなるセラミックグリーンシートに所定のパターンに印刷塗布し、これをセラミックグリーンシートの積層体とともに焼成することによって形成することができる。
【0047】
また、金属材料の薄膜で形成する場合は、例えばスパッタリング法・真空蒸着法またはメッキ法により金属膜を形成した後、フォトリソグラフィ法により所定の配線パターンに形成することができる。
【0048】
このような配線基板1・1’は、信号配線群3が配設されている絶縁層2a〜2dの比誘電率に応じて、信号配線群3および差動伝送線路8の各信号配線の配線幅,配線厚み,配線間隔を適宜設定することで、信号配線群3の各信号配線の特性インピーダンス値および差動伝送線路8の差動インピーダンス値を所望の値とすることができる。
【0049】
本発明の配線基板1・1’において、差動伝送線路8の線路間隔が広がる部分8dにおいてそれぞれ大きくなっている信号線路8a・8bの線路幅は、例えば、誘電率が5.3で絶縁層の厚みが100μmの絶縁基板2上に、導体幅が100μmで導体厚みが12μmの一対の線路導体8a・8bが形成され、差動インピーダンスが100Ωになるよう線路間隔が一定の部分8cの線路間隔が75μmに設定されている差動伝送線路8において、線路間隔が広がる部分8dの一対の線路導体8a・8bの線路幅をそれぞれ約165μmに設定することによって、その部分における差動インピーダンスを約100Ωとすることが可能である。
【0050】
また、差動伝送線路8の線路間隔が一定の部分8cにおける差動インピーダンスと、線路間隔が広がる部分8dにおける差動インピーダンスとを略同じとするように信号線路8a・8bの線路幅を大きくするには、線路間隔が広がる部分8dにおける差動インピーダンスが100Ω±5%となるように線路幅を設定すればよい。例えば、誘電率が5.3で絶縁層の厚みが100μmの絶縁基板2上に導体幅が100μmで導体厚みが12μmの一対の線路導体8a・8bが形成され、差動インピーダンスが100Ωになるよう線路間隔が75μmに設定されている差動伝送線路8において、一対の線路導体8a・8bの線路幅をそれぞれ152μm〜180μmの間に設定することによって、差動伝送線路8の線路間隔が一定の部分8cにおける差動インピーダンスと、線路間隔が広がる部分8dにおける差動インピーダンスとを略同じとすることが可能である。
【0051】
また、本発明の配線基板1’において、信号用貫通導体9a・9bを取り囲むように形成された接地用貫通導体11は、例えば、誘電率が5.3の絶縁基板2上に線路間隔が広がる部分8dにおける差動インピーダンスが100Ωになるように差動伝送線路8が形成され、線路間隔が広がる部分8dの一対の信号線路8a・8bの端部に接続される直径75μmの信号用貫通導体9a・9bに対して、信号用貫通導体9a・9bを中心としてそれぞれ230μmの位置に同心円状に接地用貫通導体11を等間隔で4本設置することにより、その部分における差動インピーダンスを約100Ωとすることが可能である。
【0052】
また、信号用貫通導体9a・9bを取り囲むようにそれぞれ形成された複数の接地用貫通導体11を、差動伝送線路8の線路間隔が広がる部分8dにおける差動インピーダンスと信号用貫通導体9a・9bの差動インピーダンスとを略同じとなるように形成するには、信号用貫通導体9a・9bの差動インピーダンスが100Ω±5%となるように信号用貫通導体9a・9bと接地用貫通導体11との距離を設定すればよい。例えば、誘電率が5.3の絶縁基板2上に線路間隔が広がる部分8dにおける差動インピーダンスが100Ωになるよう差動伝送線路8が形成され、線路間隔が広がる部分8dの一対の信号線路8a・8bの端部に接続される直径75μmの信号用貫通導体9a・9bにおいて、信号用貫通導体9a・9bを中心としてそれぞれ225μm〜250μmの間の位置に同心円状に接地用貫通導体11を等間隔で4本設置することにより、その部分における信号用貫通導体9a・9bの差動インピーダンスを約100Ω±5%とすることが可能である。
【0053】
なお、本発明は上記の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更を行なうことは何ら差し支えない。
【0054】
例えば、差動伝送線路は、配線基板の内層に形成されてもよく、さらに差動伝送線路が電気的に接続される二次実装部は、コネクタやワイヤボンディングパッド等でもよい。また、線路間隔が一定の部分から線路間隔が広がる部分において、線路幅は変化部を設けて序々に大きくしてもよい。
【0055】
【発明の効果】
本発明の配線基板によれば、絶縁基板上に形成された差動伝送線路について、差動伝送線路の線路間隔が広がる部分においてそれぞれの線路幅が大きくなっていることから、その部分においては一対の伝送線路の容量成分の増加により差動インピーダンスが減少することとなるので、線路間隔が広がる部分において差動伝送線路の線路間隔の変化による差動インピーダンスの不整合による反射損失を抑えることが可能となる。
【0056】
また、線路幅が、差動伝送線路の線路間隔が一定の部分における差動インピーダンスと、線路間隔が広がる部分における差動インピーダンスとが略同じとなるように大きくされているときには、差動伝送線路の線路間隔が広がる部分における差動インピーダンスの不整合をなくすことができ、高周波信号の反射損失を無視できる程度に小さく抑えることが可能となる。
【0057】
また、差動伝送線路の線路間隔が広がった後の端部にそれぞれ信号用貫通導体が接続されるとともに、この信号用貫通導体を取り囲むようにそれぞれ複数の接地用貫通導体が形成されていることにより、これら信号用貫通導体および接地用貫通導体によって擬似同軸線路が形成され、信号用貫通導体からの放射による高周波信号の透過損失を抑えることが可能となる。
【0058】
また、差動伝送線路の線路間隔が広がる部分における差動インピーダンスと信号用貫通導体の差動インピーダンスとが略同じとなるように接地用貫通導体が形成されていることにより、差動伝送線路と信号用貫通導体との接続部における差動インピーダンスの不整合をなくすことができ、高周波信号の反射損失を抑えることが可能となる。
【0059】
これらのことにより、本発明の配線基板によれば、差動伝送線路の線路間隔が広がる部分における高周波信号の反射損失および透過損失を極めて小さなものとすることができるので、これに搭載される半導体素子の高周波領域における作動性を良好なものとすることができる。
【図面の簡単な説明】
【図1】本発明の配線基板の実施の形態の一例を示す断面図である。
【図2】図1に示す配線基板における差動伝送線路の周辺部の要部拡大平面図である。
【図3】図1に示す配線基板における差動伝送線路の周辺部の要部拡大断面図である。
【図4】本発明の配線基板の実施の形態の他の例を示す断面図である。
【図5】図4に示す配線基板における差動伝送線路の周辺部の要部拡大平面図である。
【図6】従来の配線基板の例を示す断面図である。
【図7】図6に示す配線基板における差動伝送線路の周辺部の要部拡大平面図である。
【符号の説明】
1,1’・・・配線基板
2・・・絶縁基板
2a〜2d・・・絶縁層
3・・・信号配線群
4・・・電源配線層および接地配線層
5・・・半導体素子
6・・・導体バンプ
7・・・半導体素子接続用電極
8・・・差動伝送線路
8c・・・線路間隔が一定の部分
8d・・・線路間隔が広がる部分
9,9a,9b・・・貫通導体(信号用貫通導体)
10・・・外部接続用電極
11・・・接地用貫通導体
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board having a differential transmission line suitable for mounting electronic components such as semiconductor elements and optical semiconductor elements that operate at high speed.
[0002]
[Prior art]
FIG. 6 is a cross-sectional view showing an example of a conventional wiring board in order to accurately and efficiently propagate a high-speed signal in a wiring board 4 for mounting electronic components such as semiconductor elements and optical semiconductor elements that operate at high speed. 7, a differential transmission line 48 is used as a signal line through which a high-speed signal propagates, as shown in an enlarged plan view of a peripheral portion of the differential transmission line.
[0003]
As shown in FIG. 7, the differential transmission line 48 uses a pair of transmission lines 48a and 48b to apply positive-phase and negative-phase signals to the input side of each transmission line and take the difference at the output side. Thus, the common mode noise component can be canceled, and this is used for a transmission system capable of transmitting a high-quality signal. The structure of the differential transmission line 48 is such that the material of the insulating layers 42a to 42d of the insulating substrate 42 and the insulating layer 42a are selected so that the differential impedance determined by the pair of transmission lines 48a and 48b matches desired characteristics. 42d is controlled and determined (the width and thickness of the wiring conductors 43 and 44, the distance from the ground layer and the ground conductor, and the like).
[0004]
In the layout design of the differential transmission line 48, the wiring board 4 is formed using the differential transmission line 48 electrically connected to the electrode of the semiconductor element 45 via the conductor bump 46 and the semiconductor element connection electrode 47. A signal is transmitted on the upper surface, and the line interval between the pair of transmission lines 48a and 48b forming the differential transmission line 48 is determined according to the arrangement interval of the external connection electrodes 410 on the secondary mounting side of the wiring board 4. It is spread and connected to the external connection electrode 410 as a secondary mounting portion.
[0005]
[Patent Document 1]
JP-A-2002-9511
[0006]
[Problems to be solved by the invention]
However, in the conventional differential transmission line 48 formed on the wiring board 40, the portion 48c having a constant line spacing designed to have a differential impedance of, for example, about 100Ω is a secondary mounting portion. It is necessary to extend and wire the differential transmission line 48 in accordance with the arrangement interval of the external connection electrodes 410. At this time, since the line interval of the differential transmission line 48 changes in the portion 48d where the line interval is widened, the differential impedance deviates from 100Ω and increases, and the portion 48c where the line interval is constant and the portion 48d where the line interval is widened However, there is a problem that impedance mismatch occurs between the two, and the reflection loss increases, signal transmission is hindered, and the operability of the semiconductor element 45 may be impaired.
[0007]
The present invention has been devised in view of the above problems, and an object of the present invention is to suppress a reflection loss occurring in a portion of a differential transmission line from a portion where a line interval is constant to a portion where a line interval is widened to a very small one. It is an object of the present invention to provide a wiring board which can improve the operability of a semiconductor element.
[0008]
[Means for Solving the Problems]
The wiring board of the present invention is characterized in that a differential transmission line is formed on an insulating substrate, and the line width of each of the differential transmission lines is increased in a portion where the line interval of the differential transmission line is widened. .
[0009]
Further, in the wiring board according to the present invention, in the above-described configuration, the line width is substantially the same as the differential impedance in a portion where the line interval of the differential transmission line is constant and the differential impedance in a portion where the line interval is widened. It is characterized by being made large so that
[0010]
Further, in the wiring board of the present invention, in each of the above-described configurations, a signal through conductor is connected to each of the ends of the differential transmission lines after the line spacing is widened and surrounds the signal through conductor. A plurality of grounding through conductors are formed, respectively.
[0011]
Further, in the wiring board according to the present invention, in the above-described configuration, the grounding through conductor has substantially the same differential impedance as that of the signal transmission through conductor at a portion where the line interval of the differential transmission line is widened. It is characterized by being formed so that it becomes.
[0012]
According to the wiring board of the present invention, as for the differential transmission line formed on the wiring board, each line width is increased in a portion where the line interval of the differential transmission line is widened. Because the differential impedance decreases due to the increase in the capacitance component of the transmission line, it is possible to suppress the reflection loss due to the mismatch of the differential impedance due to the change in the line interval of the differential transmission line in the part where the line interval increases. It becomes.
[0013]
Further, when the line width is increased so that the differential impedance at a portion where the line interval of the differential transmission line is constant and the differential impedance at a portion where the line interval is widened are approximately the same, the differential transmission line In this case, it is possible to eliminate the mismatch of the differential impedance in the portion where the line interval is widened, and it is possible to suppress the reflection loss of the high frequency signal to a negligible level.
[0014]
In addition, a through conductor for signal is connected to each end of the differential transmission line after the line interval is widened, and a plurality of through conductors for ground are formed so as to surround the through conductor for signal. Accordingly, a pseudo coaxial line is formed by the through conductor for signal and the through conductor for ground, and transmission loss of a high-frequency signal due to radiation from the through conductor for signal can be suppressed.
[0015]
In addition, the through conductor for grounding is formed so that the differential impedance of the portion where the line spacing of the differential transmission line is widened and the differential impedance of the through conductor for signal are substantially the same, so that the differential transmission line It is possible to eliminate the mismatch of the differential impedance at the connection portion with the signal through conductor, and it is possible to suppress the reflection loss of the high-frequency signal.
[0016]
As a result, according to the wiring board of the present invention, the reflection loss and the transmission loss of the high-frequency signal in the portion where the line spacing of the differential transmission line is widened can be made extremely small, and the semiconductor mounted on this The operability of the element in a high frequency range can be improved.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
The wiring board of the present invention will be described below in detail with reference to the drawings.
[0018]
FIG. 1 is a sectional view showing an example of an embodiment of a wiring board according to the present invention, and FIG. 2 is an enlarged plan view of a main part around a differential transmission line in the wiring board shown in FIG.
[0019]
In the wiring board 1 of this example, the insulating layers 2a to 2d constituting the insulating substrate 2 are basically formed of an insulating material having the same relative dielectric constant. A signal wiring group 3 is formed on the insulating layer 2c, and a large-area power supply wiring layer 4a or a ground wiring layer 4b is formed on the insulating layers 2b and 2d so as to face the signal wiring group 3. Each signal wiring of group 3 has a strip line structure. Note that the power supply wiring layer 4a and the ground wiring layer 4b may be interchanged according to the specifications of the wiring board 1.
[0020]
Also, by appropriately setting the wiring width of each signal wiring of the signal wiring group 3 and the thickness of the insulating layers 2b and 2c interposed between the signal wiring group 3 and the power supply wiring layer 4a or the ground wiring layer 4b, Since the characteristic impedance of the group 3 can be set to an arbitrary value, it is possible to form the signal wiring group 3 having good transmission characteristics. Generally, the characteristic impedance of the signal wiring group 3 is often set to 50Ω.
[0021]
The plurality of signal lines included in the signal line group 3 may transmit different electric signals.
[0022]
In this example, a semiconductor element 5 such as a semiconductor element or an optical semiconductor element that operates at a high speed is mounted on the upper surface of the wiring board 1 and is made of a solder such as a tin-lead alloy (Sn-Pb) or gold (Au). It is electrically connected to a differential transmission line 8 via a semiconductor element connection electrode 7 for connecting the conductor bump 6 and the semiconductor element 5. On the lower surface of the wiring substrate 1 opposite to the upper surface on which the semiconductor element 5 is mounted, an external connection electrode 10 for inputting / outputting signals and supplying power to the semiconductor element 5 is provided.
[0023]
The differential transmission line 8 is formed of a pair of signal lines having a microstrip structure formed between the power supply wiring layer or the ground wiring layer 4a on the upper surface of the insulating layer 2a. It is electrically connected to electrodes of the semiconductor element 5 through conductor bumps 6 made of solder such as lead alloy (Sn-Pb) or gold (Au), and penetrates to input / output signals to / from the outside; It is electrically connected to the external connection electrode 10 via the conductor 9.
[0024]
This will be described in detail with reference to FIG. FIG. 2 is an enlarged plan view of a main part showing a peripheral portion of a differential transmission line in an example of a wiring board according to an embodiment of the present invention. 2, the insulating layer 2 corresponds to the insulating layer 2a shown in FIG.
[0025]
The differential transmission lines 8a and 8b correspond to the differential transmission line 8 shown in FIG. 1, and are electrically connected via the semiconductor element 5 and the conductor bumps 6 and the semiconductor element connection electrodes 7 shown in FIG. And is electrically connected to the external connection electrode 10 via the through conductor 9. The differential transmission line 8 is formed by a portion 8c having a constant interval between the pair of signal lines 8a and 8b and a portion 8d having an increased interval between the pair of signal lines 8a and 8b. The line width of the signal lines 8a and 8b in the portion 8d where the space is widened is formed larger than the line width in the portion 8c where the space between the signal lines 8a and 8b is constant. At the end of the portion 8d where the interval between the signal lines 8a and 8b is widened, the differential transmission lines 8a and 8b are electrically connected to the external connection electrode 10 via the through conductors 9a and 9b, respectively. .
[0026]
Next, FIG. 3 is an enlarged sectional view of a main part showing a peripheral portion of a differential transmission line in an example of an embodiment of a wiring board of the present invention. In FIG. 3, the differential transmission lines 8a and 8b are appropriately set for the wiring width, wiring interval, wiring thickness of the differential transmission line 8, and the thickness of the insulating layer 2a interposed between the power transmission wiring layer and the ground wiring layer 4a. By doing so, the differential impedance of the differential transmission line 8 can be set to an arbitrary value, so that the differential transmission line 8 having good transmission characteristics can be formed. In general, the differential impedance of the differential transmission line 8 is often set to 100Ω.
[0027]
Next, FIG. 4 is a cross-sectional view showing another example of the embodiment of the wiring board of the present invention, and FIG. 5 is an enlarged plan view of a main part around a differential transmission line in the wiring board shown in FIG. is there. 4 and 5, the same parts as those in FIGS. 1 to 3 are denoted by the same reference numerals.
[0028]
In the wiring board 1 'of this example, the differential transmission line 8 has a signal through conductor 9 at the end of the signal line 8a or 8b after the line interval is widened at the portion 8d where the line interval is wide. And a plurality of grounding through-conductors 11 are formed so as to surround the signal through-conductor 9 while being electrically connected to the signal external connection electrode 10 via this. The conductor 11 is electrically connected to the power supply or ground external connection electrode 10 via the power supply wiring layer 4a or the ground wiring layer 4b.
[0029]
This will be described in detail with reference to FIG. FIG. 5 is an enlarged plan view of a main part similar to FIG. 2 showing a peripheral portion of a differential transmission line in another example of the embodiment of the wiring board of the present invention.
[0030]
In FIG. 5, the differential transmission lines 8a and 8b correspond to the differential transmission line 8 shown in FIG. 4, via the semiconductor element 5 and the conductor bump 6 and the semiconductor element connection electrode 7 shown in FIG. It is electrically connected and is electrically connected to the external signal connection electrode 10 via the signal through conductors 9a and 9b. Each of the signal through conductors 9a and 9b is surrounded by a plurality of ground through conductors 11 so as to form a pseudo coaxial line, and the ground through conductor 11 is used for power supply or ground through the power supply wiring layer 4a or the ground wiring layer 4b. Connected to the external connection electrode 10.
[0031]
According to such a wiring board 1 ′ of the present invention, the signal through conductors 9a and 9b are connected to the ends of the signal lines 8a and 8b after the line interval of the differential transmission line 8 is widened, respectively. By forming a plurality of ground through conductors 11 so as to surround the signal through conductors 9a and 9b, a pseudo coaxial line is formed by the signal through conductors 9a and 9b and the ground through conductor 11. It is possible to suppress transmission loss of high-frequency signals due to radiation from the signal through conductors 9a and 9b.
[0032]
Further, the ground through conductor 11 is formed so that the differential impedance of the portion 8d of the differential transmission line 8 where the line interval is widened and the differential impedance of the signal through conductors 9a and 9b are substantially the same. In addition, it is possible to eliminate the mismatch of the differential impedance at the connection between the differential transmission line 8 and the signal through conductors 9a and 9b, and to suppress the reflection loss of the high-frequency signal.
[0033]
The wiring boards 1 and 1 ′ of the present invention may have a multilayer wiring board in which the same wiring structure is further laminated in multiple layers.
[0034]
The signal wiring group 3 and the differential transmission line 8 have a structure above and below the signal wiring group in addition to a microstrip line structure having a power supply wiring layer or a ground wiring layer formed to face the signal wiring group. A strip line structure having a power supply wiring layer or a ground wiring layer, or a coplanar line structure having a power supply wiring layer or a ground wiring layer formed adjacent to each signal wiring of a signal wiring group may be used. Can be appropriately selected and used according to the specifications and the like required for.
[0035]
Further, an electronic circuit module or the like may be configured by attaching a chip resistor, a thin film resistor, a coil inductor, a cross inductor, a chip capacitor, an electrolytic capacitor, or the like to the wiring board 1.1 ′.
[0036]
Further, the shape of each of the insulating layers 2a to 2d in plan view may be a shape such as a diamond shape, a hexagonal shape, or an octagonal shape in addition to a square shape or a rectangular shape.
[0037]
Such a wiring board 1 1 ′ of the present invention includes a package for storing electronic components such as a package for storing semiconductor elements, a board for mounting electronic components, a so-called multi-chip module or multi-chip on which a large number of semiconductor elements are mounted. Used as a package or motherboard.
[0038]
In the wiring board 1 ・ 1 ′ of the present invention, each of the insulating layers 2a to 2d is formed by, for example, a ceramic green sheet lamination method using an aluminum oxide-based sintered body, an aluminum nitride-based sintered body, a silicon carbide-based sintered body, or silicon nitride. Using an inorganic insulating material such as porous sintered body, mullite sintered body or glass ceramic sintered body, or using an organic insulating material such as polyimide, epoxy resin, fluororesin, polynorbornene or benzocyclobutene Alternatively, it is formed using an electrical insulating material such as a composite insulating material formed by bonding an inorganic insulating powder such as a ceramic powder with a thermosetting resin such as an epoxy resin.
[0039]
These insulating layers 2a to 2d are manufactured as follows. For example, if it is made of an aluminum oxide sintered body, first, an appropriate organic binder and a solvent are added to a raw material powder such as aluminum oxide, silicon oxide, calcium oxide, or magnesium oxide to form a slurry. This is formed into a sheet by using a doctor blade method or the like to obtain a ceramic green sheet. Then, a metal paste to be each of the signal wiring groups 3 and each of the conductor layers 4 is printed and applied in a predetermined pattern and laminated vertically, and finally the laminate is fired in a reducing atmosphere at a temperature of about 1600 ° C. Produced by
[0040]
Further, for example, in the case of an epoxy resin, an insulating layer made of a glass epoxy resin or the like formed by impregnating a ceramic or glass fiber woven cloth of an aluminum oxide sintered body with an epoxy resin is generally used. An organic resin precursor is applied by a spin coating method or a curtain coating method or the like, and an insulating layer made of an organic resin such as an epoxy resin formed by subjecting the organic resin precursor to a thermosetting treatment, and copper is formed by electroless plating or vapor deposition. It is manufactured by alternately laminating thin film wiring conductor layers formed by adopting a thin film forming technique such as a method and a photolithography technique and heating and curing at a temperature of about 170 ° C.
[0041]
The thicknesses of these insulating layers 2a to 2d are appropriately set according to the characteristics of the material to be used, so as to satisfy conditions such as mechanical strength and electrical characteristics corresponding to required specifications.
[0042]
As a method for obtaining the insulating layers 2a to 2d having different relative dielectric constants, for example, an inorganic insulating material such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, mullite or glass ceramics, or a polyimide / epoxy resin・ Add powder of high dielectric material such as barium titanate, strontium titanate, calcium titanate or magnesium titanate to organic insulating material such as fluororesin, polynorbornene or benzocyclobutene, and heat and cure at appropriate temperature By doing so, a material having a desired relative permittivity may be obtained.
[0043]
At this time, the particle diameter of the high dielectric material added and mixed with the inorganic insulating material or the organic insulating material is determined by the relative dielectric constant in the insulating layer caused by adding the high dielectric material to the inorganic insulating material or the organic insulating material. In order to reduce the occurrence of variation and the reduction in workability due to a change in the viscosity of the insulating layer, the thickness is desirably 0.5 to 50 μm.
[0044]
In addition, the content of the high dielectric material to be added to and mixed with the inorganic insulating material and the organic insulating material is to increase the relative dielectric constant of the insulating layer and to adhere the inorganic insulating material or the organic insulating material to the high dielectric material. In order to prevent a decrease in strength, the content is desirably 5 to 75% by weight.
[0045]
The signal wiring group 3 and each differential transmission line 8, the power supply wiring layer 4a or the ground wiring layer 4b are made of, for example, tungsten (W), molybdenum (Mo), molybdenum manganese (Mo-Mn), copper (Cu), and silver. Metal powder such as (Ag) or silver palladium (Ag-Pd), or copper (Cu), silver (Ag), nickel (Ni), chromium (Cr), titanium (Ti), gold (Au), or niobium ( It may be formed of a thin film of a metal material such as Nb) or an alloy thereof.
[0046]
Specifically, when the signal wiring group 3, the power supply wiring layer 4a, or the ground wiring layer 4b is formed by metallization of W metal powder, a metal paste obtained by adding and mixing an appropriate organic binder, a solvent or the like to the W powder. Is printed and applied in a predetermined pattern on ceramic green sheets to be the insulating layers 2a to 2d, and is fired together with the ceramic green sheet laminate.
[0047]
When a thin film of a metal material is used, a metal film can be formed by, for example, a sputtering method, a vacuum evaporation method, or a plating method, and then can be formed into a predetermined wiring pattern by a photolithography method.
[0048]
Such wiring boards 1 and 1 ′ are provided with the signal wiring group 3 and the wiring of each signal wiring of the differential transmission line 8 according to the relative permittivity of the insulating layers 2 a to 2 d on which the signal wiring group 3 is provided. By appropriately setting the width, the wiring thickness, and the wiring interval, the characteristic impedance value of each signal wiring of the signal wiring group 3 and the differential impedance value of the differential transmission line 8 can be set to desired values.
[0049]
In the wiring boards 1 and 1 'of the present invention, the line widths of the signal lines 8a and 8b, which are respectively large in the portion 8d where the line interval of the differential transmission line 8 is widened, are, for example, a dielectric constant of 5.3 and an insulating layer. A pair of line conductors 8a and 8b having a conductor width of 100 .mu.m and a conductor thickness of 12 .mu.m are formed on an insulating substrate 2 having a thickness of 100 .mu.m. Is set to 75 μm, the line width of the pair of line conductors 8 a and 8 b of the portion 8 d where the line spacing is widened is set to approximately 165 μm, respectively, so that the differential impedance at that portion is approximately 100 Ω. It is possible to
[0050]
In addition, the line width of the signal lines 8a and 8b is increased so that the differential impedance at the portion 8c where the line interval of the differential transmission line 8 is constant is substantially the same as the differential impedance at the portion 8d where the line interval is widened. In this case, the line width may be set so that the differential impedance in the portion 8d where the line interval is widened is 100Ω ± 5%. For example, a pair of line conductors 8a and 8b each having a conductor width of 100 μm and a conductor thickness of 12 μm are formed on an insulating substrate 2 having a dielectric constant of 5.3 and an insulation layer thickness of 100 μm so that the differential impedance becomes 100Ω. In the differential transmission line 8 in which the line spacing is set to 75 μm, the line width of the pair of line conductors 8 a and 8 b is set between 152 μm and 180 μm, so that the line spacing of the differential transmission line 8 is constant. It is possible to make the differential impedance in the portion 8c and the differential impedance in the portion 8d where the line interval is widened substantially the same.
[0051]
In the wiring board 1 ′ of the present invention, the grounding through-conductors 11 formed so as to surround the signal through-conductors 9 a and 9 b have, for example, a wider line spacing on the insulating substrate 2 having a dielectric constant of 5.3. The differential transmission line 8 is formed such that the differential impedance in the portion 8d becomes 100Ω, and the signal through conductor 9a having a diameter of 75 μm is connected to the ends of the pair of signal lines 8a and 8b in the portion 8d where the line interval is widened. By providing four grounding through-conductors 11 equidistantly at a position of 230 μm around the signal through-conductors 9a and 9b with respect to the signal through-conductors 9a and 9b, the differential impedance at that part is reduced to about 100Ω. It is possible to do.
[0052]
Further, the plurality of grounding through-conductors 11 formed so as to surround the signal through-conductors 9a and 9b are connected to the differential impedance and the signal through-conductors 9a and 9b in the portion 8d of the differential transmission line 8 where the line interval is widened. Of the signal through conductors 9a and 9b and the ground through conductor 11 so that the differential impedance of the signal through conductors 9a and 9b becomes 100Ω ± 5%. What is necessary is just to set the distance with. For example, the differential transmission line 8 is formed on the insulating substrate 2 having a permittivity of 5.3 so that the differential impedance at the portion 8d where the line interval is widened becomes 100Ω, and a pair of signal lines 8a of the portion 8d where the line interval is widened. In the signal through conductors 9a and 9b having a diameter of 75 μm connected to the end of 8b, the ground through conductors 11 are arranged concentrically at positions between 225 μm and 250 μm around the signal through conductors 9a and 9b. By arranging four at intervals, the differential impedance of the signal through conductors 9a and 9b at that portion can be set to about 100Ω ± 5%.
[0053]
Note that the present invention is not limited to the above-described embodiment, and various changes may be made without departing from the spirit of the present invention.
[0054]
For example, the differential transmission line may be formed on an inner layer of the wiring board, and the secondary mounting portion to which the differential transmission line is electrically connected may be a connector, a wire bonding pad, or the like. In a portion where the line interval is widened from a portion where the line interval is constant, the line width may be gradually increased by providing a change portion.
[0055]
【The invention's effect】
According to the wiring board of the present invention, as for the differential transmission line formed on the insulating substrate, each line width is increased at a portion where the line interval of the differential transmission line is widened. Because the differential impedance decreases due to the increase in the capacitance component of the transmission line, it is possible to suppress the reflection loss due to the mismatch of the differential impedance due to the change in the line interval of the differential transmission line in the part where the line interval increases. It becomes.
[0056]
Further, when the line width is increased so that the differential impedance at a portion where the line interval of the differential transmission line is constant and the differential impedance at a portion where the line interval is widened are approximately the same, the differential transmission line In this case, it is possible to eliminate the mismatch of the differential impedance in the portion where the line interval is widened, and it is possible to suppress the reflection loss of the high frequency signal to a negligible level.
[0057]
In addition, a through conductor for signal is connected to each end of the differential transmission line after the line interval is widened, and a plurality of through conductors for ground are formed so as to surround the through conductor for signal. Accordingly, a pseudo coaxial line is formed by the through conductor for signal and the through conductor for ground, and transmission loss of a high-frequency signal due to radiation from the through conductor for signal can be suppressed.
[0058]
In addition, the through conductor for grounding is formed so that the differential impedance of the portion where the line spacing of the differential transmission line is widened and the differential impedance of the through conductor for signal are substantially the same, so that the differential transmission line It is possible to eliminate the mismatch of the differential impedance at the connection portion with the signal through conductor, and it is possible to suppress the reflection loss of the high-frequency signal.
[0059]
As a result, according to the wiring board of the present invention, the reflection loss and the transmission loss of the high-frequency signal in the portion where the line spacing of the differential transmission line is widened can be made extremely small, and the semiconductor mounted on this The operability of the element in a high frequency range can be improved.
[Brief description of the drawings]
FIG. 1 is a sectional view showing an example of an embodiment of a wiring board of the present invention.
FIG. 2 is an enlarged plan view of a main part around a differential transmission line in the wiring board shown in FIG. 1;
FIG. 3 is an enlarged cross-sectional view of a main part around a differential transmission line in the wiring board shown in FIG. 1;
FIG. 4 is a sectional view showing another example of the embodiment of the wiring board of the present invention.
FIG. 5 is an enlarged plan view of a main part around a differential transmission line in the wiring board shown in FIG. 4;
FIG. 6 is a cross-sectional view illustrating an example of a conventional wiring board.
7 is an enlarged plan view of a main part around a differential transmission line in the wiring board shown in FIG. 6;
[Explanation of symbols]
1,1 '・ ・ ・ Wiring board
2 ... insulating substrate
2a to 2d: insulating layer
3 ... signal wiring group
4: Power supply wiring layer and ground wiring layer
5 ... Semiconductor element
6 ... Conductor bump
7 ... Semiconductor element connection electrode
8 ... Differential transmission line
8c: Part where the line spacing is constant
8d: Part where the line spacing is widened
9, 9a, 9b ... through conductor (through conductor for signal)
10 ... electrode for external connection
11 ... Through conductor for grounding

Claims (4)

絶縁基板上に差動伝送線路が形成されており、該差動伝送線路の線路間隔が広がる部分においてそれぞれの線路幅が大きくなっていることを特徴とする配線基板。A wiring board, wherein a differential transmission line is formed on an insulating substrate, and a line width of each of the differential transmission lines is increased in a portion where a line interval of the differential transmission line is widened. 前記線路幅は、前記差動伝送線路の線路間隔が一定の部分における差動インピーダンスと、前記線路間隔が広がる部分における差動インピーダンスとが略同じとなるように大きくされていることを特徴とする請求項1記載の配線基板。The line width is increased such that the differential impedance at a portion where the line interval of the differential transmission line is constant is substantially the same as the differential impedance at a portion where the line interval is widened. The wiring board according to claim 1. 前記差動伝送線路の線路間隔が広がった後の端部にそれぞれ信号用貫通導体が接続されるとともに、該信号用貫通導体を取り囲むようにそれぞれ複数の接地用貫通導体が形成されていることを特徴とする請求項1または請求項2記載の配線基板。A signal through conductor is connected to each of the ends of the differential transmission line after the line spacing is widened, and a plurality of ground through conductors are formed so as to surround the signal through conductor. The wiring board according to claim 1 or 2, wherein 前記接地用貫通導体は、前記差動伝送線路の前記線路間隔が広がる部分における差動インピーダンスと前記信号用貫通導体の差動インピーダンスとが略同じとなるように形成されていることを特徴とする請求項3記載の配線基板。The ground through conductor is formed such that the differential impedance of the differential transmission line at a portion where the line interval is widened and the differential impedance of the signal through conductor are substantially the same. The wiring board according to claim 3.
JP2003046808A 2002-12-26 2003-02-25 Wiring board Pending JP2004253746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003046808A JP2004253746A (en) 2002-12-26 2003-02-25 Wiring board

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002375758 2002-12-26
JP2003046808A JP2004253746A (en) 2002-12-26 2003-02-25 Wiring board

Publications (1)

Publication Number Publication Date
JP2004253746A true JP2004253746A (en) 2004-09-09

Family

ID=33031790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003046808A Pending JP2004253746A (en) 2002-12-26 2003-02-25 Wiring board

Country Status (1)

Country Link
JP (1) JP2004253746A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004274005A (en) * 2003-01-15 2004-09-30 Kyocera Corp Wiring board
JP2006093324A (en) * 2004-09-22 2006-04-06 Kyocera Corp Wiring board
JP2006093325A (en) * 2004-09-22 2006-04-06 Kyocera Corp Wiring board
JP2010258390A (en) * 2009-04-28 2010-11-11 Kyocer Slc Technologies Corp Wiring board
CN106535470A (en) * 2016-12-26 2017-03-22 郑州云海信息技术有限公司 SMA interface based PCB (Printed Circuit Board) wiring method, wiring width determination device and PCB

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004274005A (en) * 2003-01-15 2004-09-30 Kyocera Corp Wiring board
JP2006093324A (en) * 2004-09-22 2006-04-06 Kyocera Corp Wiring board
JP2006093325A (en) * 2004-09-22 2006-04-06 Kyocera Corp Wiring board
JP4511294B2 (en) * 2004-09-22 2010-07-28 京セラ株式会社 Wiring board
JP4601369B2 (en) * 2004-09-22 2010-12-22 京セラ株式会社 Wiring board
JP2010258390A (en) * 2009-04-28 2010-11-11 Kyocer Slc Technologies Corp Wiring board
CN106535470A (en) * 2016-12-26 2017-03-22 郑州云海信息技术有限公司 SMA interface based PCB (Printed Circuit Board) wiring method, wiring width determination device and PCB

Similar Documents

Publication Publication Date Title
JP2002329976A (en) Multilayer wiring board
JP2009111658A (en) Multilayer wiring board
JP2007288180A (en) Wiring structure, multilayered wiring board, and electronic device
JP5155582B2 (en) Wiring board and electronic device
JP5318360B2 (en) Wiring board and electronic device
JP2005243864A (en) Wiring board
JP2008311682A (en) Wiring board
JP2004289094A (en) Wiring board
JP2009004809A (en) Wiring substrate
JP2004253746A (en) Wiring board
JP4373752B2 (en) Wiring board
JP4340131B2 (en) Wiring board
JP4349827B2 (en) Wiring board
JP2002158448A (en) Multilayer wring board
JP2003110046A (en) Multilayer interconnection board
JP4511294B2 (en) Wiring board
JP2002217545A (en) Multilayer wiring board
JP2003204163A (en) Multilayer circuit board
JP3798959B2 (en) Multilayer wiring board
JP4601369B2 (en) Wiring board
JP4557768B2 (en) Semiconductor device
JP2003204165A (en) Multilayer circuit board
JP2009088153A (en) Multilayer wiring board and electronic device
JP2003110047A (en) Multilayer interconnection board
JP2001007518A (en) Multilayered wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040924

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060801

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20061128