JP2004165525A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture Download PDF

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Publication number
JP2004165525A
JP2004165525A JP2002331521A JP2002331521A JP2004165525A JP 2004165525 A JP2004165525 A JP 2004165525A JP 2002331521 A JP2002331521 A JP 2002331521A JP 2002331521 A JP2002331521 A JP 2002331521A JP 2004165525 A JP2004165525 A JP 2004165525A
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Japan
Prior art keywords
component
semiconductor device
component mounting
lead
mounting portion
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JP2002331521A
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Japanese (ja)
Inventor
Ryozaburo Shioda
良三郎 塩田
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Sony Corp
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Sony Corp
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Priority to JP2002331521A priority Critical patent/JP2004165525A/en
Publication of JP2004165525A publication Critical patent/JP2004165525A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which a semiconductor element such as an IC and peripheral circuit parts of the semiconductor element can be mounted on a low-cost lead frame, and good electrical connection as a circuit module can be ensured, and to provide a method for manufacturing the semiconductor. <P>SOLUTION: The semiconductor device 1 is arranged such that the semiconductor element 7 is mounted on the lead frame 6, an insulation material 2 is provided to cover and seal the lead frame 6 and the semiconductor element 7 for packaging, part mounting portions 5 each exposing a portion of a lead are provided in the insulation material 2, and a part 9 is mounted on the exposed lead portion in each part mounting portion 5. The method for manufacturing the semiconductor device 1 comprises steps of making a body of the lead frame 6, mounting the semiconductor element 7 on the body of the lead frame 6, sealing and packaging the body of the lead frame 6 and the semiconductor element 7 by covering them with the insulation material 2, forming the part mounting portions 5 in the insulation material 2, each exposing a portion of the lead, and mounting the part 9 in each part mounting portion 5. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置及びその製造方法に関するものである。
【0002】
【従来の技術】
電子機器等の電子回路は、IC(integrated circuit)等の半導体素子と、抵抗やコンデンサ等の受動部品が、プリント基板上に実装されて形成される。
【0003】
近年の電子機器への要求は、小型、軽量、高性能、高機能、低コストなどであるが、これらに付け加えて、開発設計期間の短縮も重要な課題となっている。そして、これらを満足させるために様々な工夫がなされているが、電子回路の機能ブロックを形成するICとその周辺回路部品を一体化した電子回路モジュール、いわゆるハイブリッドICやSIP(System In Package)等は、まさにこれらの要求から生み出されたものである。
【0004】
この電子回路モジュールを採用することにより、電子機器の電子回路を短期間で開発設計できるという利点がある。
【0005】
【発明が解決しようとする課題】
しかしながら、上記ハイブリッドICやSIP等は、ICや周辺回路部品を実装するためのインターポーザーと呼ばれる配線回路基板が必要であり、これには有機プリント基板やセラミックス基板等が用いられるが、最近の低コスト要求は、このインターポーザーの部品コストが無視できないものとなっている。
【0006】
そこで、図9に示すような半導体パッケージに多用されている安価なリードフレーム材20から作製される図10に示すリードフレーム6を用い、図11に示すように、リードフレーム6のダイパッド12上に半導体素子7を実装し、金属ワイヤー13を用いて半導体素子7の電極15とインナーリード部8をそれぞれ接続すると共に、インナーリード部8に抵抗やコンデンサ等の受動部品(周辺回路部品)21を実装することが望まれる。
【0007】
上記のように、リードフレーム6上に半導体素子7を実装すると共に、受動部品21もまた実装する場合、半導体素子7に接続された金属ワイヤー13は極細のため非常に弱く、ワイヤリング後に触れると変形や断線、短絡を発生させてしまうので、リードフレーム6のインナーリード部8への受動部品21の実装は、半導体素子7の実装前にすることとなる。
【0008】
しかしながら、リードフレーム6への受動部品21接続において、例えば接続材22としてはんだを用いる場合、はんだに含有されているフラックス成分がリード上を濡れ広がり、これがワイヤーボンドエリアにまで及び、良好なワイヤーボンド接続が得られない。
【0009】
また、リードフレーム6への受動部品21接続において、例えば接続材22として導電ペーストを用いると、導電ペースト自体が濡れ広がり、これがワイヤーボンドエリアにまで及び、良好なワイヤーボンド接続が得られない。
【0010】
また、はんだ又は導電ペーストの濡れ広がりにより、リード間を短絡させてしまう。
【0011】
さらに、受動部品21実装後に半導体素子7を実装するが、この半導体素子7実装時のワイヤーボンドの加熱によってはんだが再溶融し、受動部品21が位置ずれを起こす。
【0012】
また、受動部品21及び半導体素子7実装後に、半導体素子7及び金属ワイヤー13を保護する目的で樹脂封止するため、組み立て後に受動部品21の調節、交換ができない。
【0013】
本発明は、上述したような問題点を解決するためになされたものであって、その目的は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の半導体素子と、この半導体素子の周辺回路部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能な半導体装置及びその製造方法を提供することにある。
【0014】
【課題を解決するための手段】
即ち、本発明は、リードフレーム上に半導体素子が実装され、これらを覆うように絶縁物質によって封止されてパッケージ化されると共に、前記絶縁物質に部品実装部が設けられ、この部品実装部にリード部の一部分が露出し、この露出部において前記部品実装部に部品が実装されている、半導体装置に係るものである。
【0015】
また、リードフレーム本体を製造する工程と、前記リードフレーム本体上に半導体素子を実装する工程と、これらを覆うように絶縁物質によって封止してパッケージ化する工程と、リード部の一部分を露出させる部品実装部を前記絶縁物質に形成する工程と、前記部品実装部に部品を実装する工程とを有する、半導体装置の製造方法に係るものである。
【0016】
ここで、前記部品とは、主として、前記半導体素子の周辺回路部品、即ち、抵抗、コンデンサ、インダクタ等の受動素子を意味するものである。
【0017】
本発明によれば、前記絶縁物質によって封止されると共に、前記絶縁物質に前記部品実装部が設けられ、この部品実装部に前記リード部の一部分が露出し、この露出部において前記部品実装部に前記部品が実装されるので、例えば前記部品の接続にはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0018】
また、例えば前記部品の接続に導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0019】
また、はんだ又は導電ペーストの濡れ広がりがないので、リード間の短絡を防止することができる。
【0020】
さらに、上記したように、従来はワイヤーボンドの加熱によってはんだが再溶融し、実装部品が位置ずれを起こす問題があったが、これに対し本発明は、例えば前記半導体素子実装後、前記絶縁物質によって前記パッケージ化を行うと共に、前記絶縁物質に前記リード部の一部分が露出した前記部品実装部を設け、前記部品が前記リード部の前記露出部において前記部品実装部に実装されるので、前記部品が位置ずれを起こすことはない。
【0021】
また、前記半導体素子実装後に、前記半導体素子等を保護する目的で前記絶縁物質によって封止して前記パッケージ化を行うが、前記絶縁物質に前記部品実装部が設けられ、この部品実装部に前記リード部の一部分が露出し、この露出部において前記部品実装部に前記部品が実装されているので、例えば前記部品が露出した状態に本発明の半導体装置を製造することができ、前記部品の後付け又は交換が可能となる。さらに、前記部品として例えば抵抗チップ等を用いた場合、定数調整のためのトリミングも可能である。
【0022】
従って、本発明は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の前記半導体素子と、この半導体素子の周辺回路部品としての前記部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能である。
【0023】
【発明の実施の形態】
本発明において、前記絶縁物質に前記部品実装部が設けられ、この部品実装部に前記リード部の一部分が露出し、この露出部において前記部品実装部に前記部品が実装されていることが特徴的であるが、特に、図1に本発明に基づく半導体装置1の概略図を示すように、絶縁物質2からなるパッケージ3の周辺部4に凹状の部品実装部5が形成されており、凹状部品実装部5の底面に前記リード部の一部分が露出していることが望ましい。
【0024】
具体的には、図1(b)に同図(a)のA−A’線断面図を示すように、本発明に基づく半導体装置1は、リードフレーム6上に半導体素子7が実装され、これらを覆うように絶縁物質2によって封止されてパッケージ化されると共に、絶縁物質2からなるパッケージ3の周辺部4に凹状の部品実装部5が形成されており、凹状部品実装部5の底面に前記リード部としてインナーリード部8の一部分が露出し、この露出部において部品実装部5に、前記部品としての受動素子9が実装されている。凹状部品実装部5は、インナーリード部8の一部分が露出した部分5aと、受動素子9の電極に挟持されている面が接する浅い部分5bとからなる。
【0025】
なお、凹状部品実装部5の前記リード部としてのインナーリード部8の露出域5aにおいて、受動素子9の電極と、インナーリード部8とが導電性材料10によって接合されている。
【0026】
ここで、図1(b)及び同図(c)に示すように、周辺部4での絶縁物質2の厚さがその内側領域11の厚さよりも小さいことが望ましく、これにより、半導体装置1の製造後における受動素子9の後付け、交換等を、より一層容易に行うことができる。
【0027】
さらに、凹状部品実装部5としては、前記部品としての受動素子9の最大外形寸法より大きい寸法と、前記部品としての受動素子9の厚み以下の深さに形成することが好ましい。これにより、前記部品としての受動素子9を実装する際の位置決め精度がより向上し、従来のようなはんだ等の接続材10の流れ出しをより一層防ぐことができる。
【0028】
次に、図2〜図6を参照しながら、本発明に基づく半導体装置の製造方法の一例を工程順に説明する。
【0029】
まず、図2に示すようなリードフレーム6本体を作製する。リードフレーム6本体の作製方法としては、従来公知の方法がいずれも適用可能であり、アウターリード部14のピッチは例えば0.5mmである。
【0030】
そして、図3に示すように、リードフレーム6のダイパッド12上に半導体素子7を圧着して貼り付け(マウント)、金属ワイヤー13を用いてインナーリード部8と半導体素子7の電極15をそれぞれ接続(ボンディング)する。ここで、半導体素子7のマウントの方法としては、ダイパッド12上に半球状の銀ペーストをポッティングする樹脂マウント法等の従来公知の方法がいずれも適用可能である。また、インナーリード部8と、半導体素子7の電極15との金属ワイヤー13による接続(ボンディング)方法についても、従来公知の方法がいずれも適用可能である。
【0031】
半導体素子7実装後、図示省略したが、半導体素子7が実装されたリードフレーム6を覆うよう、上記の凹状部品実装部5を形成するための凸部が予め形成された上型及び下型を配し、成形空間を形成する。そして、この成形空間に絶縁物質(モールド樹脂)2を注入し、これを硬化して上型及び下型を外すことによって、図4に示すように、前記パッケージ化を行うことができる。
【0032】
ここで、上記したように、凹状部品実装部5を形成するための凸部が予め形成された上型を用いるので、図4(b)に同図(a)のB−B’線断面図を示すように、成形によって絶縁物質2からなるパッケージ3の周辺部4に凹状部品実装部5が形成されており、凹状部品実装部5の底面に前記リード部としてのインナーリード部8の一部分が露出している。即ち、凹状部品実装部5は、インナーリード部8の一部分が露出した部分5aと、受動素子の電極に挟持されている面が接する浅い部分5bとからなる。
【0033】
また、周辺部4での絶縁物質2の厚さがその内側領域11の厚さよりも小さいことが望ましく、これにより、本発明に基づく半導体装置の製造後における受動素子9の後付け、交換等を、より一層容易に行うことができる。
【0034】
さらに、凹状部品実装部5としては、前記部品としての受動素子9の最大外形寸法より大きい寸法と、前記部品としての受動素子9の厚み以下の深さに形成することが好ましい。これにより、前記部品としての受動素子9を実装する際の位置決め精度がより向上し、従来のようなはんだ等の接合材の流れ出しをより一層防ぐことができる。
【0035】
なお、絶縁物質2としては、例えばエポキシ樹脂等を用いることができる。
【0036】
次に、図5に示すように、凹状部品実装部5に接合材10を付着させる。接合材10としては、後の工程において、前記部品としての受動素子9をインナーリード部8に接続固定する時に流動性のある、例えばはんだ等のペースト状の導電性材料を用いることが好ましい。
【0037】
次に、図6に示すように、導電性接合材10を介して、凹状部品実装部5の底面のインナーリード部8露出域において、前記部品としての受動素子9をインナーリード部8に接続固定する。
【0038】
そして、例えばタイバー16をそれぞれカットし、各アウターリード部14を分離することにより、図1(a)に示すような本発明に基づく半導体装置1を製造することができる。
【0039】
本発明に基づく半導体装置1は、上記のようにして、絶縁物質2からなるパッケージ3の周辺部4に、成形によって凹状部品実装部5が形成され、この凹状部品実装部5の底面にインナーリード部8の一部分が露出し、この露出部において凹状部品実装部5に前記部品としての受動素子9が接続固定されるので、受動素子9を接続固定する際の位置決め精度がより一層向上する。
【0040】
また、例えば受動素子9の接合材10としてはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、より良好なワイヤーボンド等の半導体素子7の接続を得ることができる。
【0041】
また、例えば受動素子9の接合材10として導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、より良好なワイヤーボンド等の半導体素子7の接続を得ることができる。
【0042】
また、接合材10としてのはんだ又は導電ペースト等の導電性材料の濡れ広がりがないので、リード間の短絡を防止することができる。
【0043】
さらに、半導体素子7実装後、絶縁物質2によって前記パッケージ化を行うと共に、絶縁物質2にインナーリード部8の一部分が露出した凹状部品実装部5を設け、受動素子9がインナーリード部8の露出部において凹状部品実装部5に実装されるので、受動素子9が位置ずれを起こすことはない。
【0044】
また、半導体素子7実装後に、半導体素子7及び金属ワイヤー13を保護する目的で絶縁物質2によって封止して前記パッケージ化を行うが、絶縁物質2に凹状部品実装部5が設けられ、この凹状部品実装部5にインナーリード部8の一部分が露出し、この露出部において凹状部品実装部5に受動素子9が実装されているので、例えば受動素子9がパッケージ3の表面に露出した状態に本発明の半導体装置1を製造することができ、受動素子9の後付け又は交換が可能である。さらに、前記部品として例えば抵抗チップ等を用いた場合、定数調整のためのトリミングも可能である。
【0045】
従って、本発明に基づく半導体装置1は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム6上にIC等の半導体素子7と、この半導体素子7の周辺回路部品としての受動素子9とを搭載することができ、電気回路モジュールとしてより一層良好な電気的接続が実現可能である。
【0046】
本発明に基づく半導体装置は、前記部品が前記絶縁物質の一方の面上と他方の面上との少なくとも一方に実装されていることが望ましく、上記に説明した、前記絶縁物質からなる前記パッケージの一方の面上のみに前記部品が実装されているのに代えて、前記パッケージの両面上にそれぞれ前記部品が実装されていてもよい。
【0047】
例えば、図7に示すように、絶縁物質2からなるパッケージ3の両面上にそれぞれ、底面に前記リード部としてのインナーリード部8の一部分が露出した凹状部品実装部5が形成されており、この凹状部品実装部5に前記部品としての受動素子9が実装され、導電性接合材10によって受動素子9の電極と、インナーリード部8とが接合されていてもよい。
【0048】
上記のように、絶縁物質2からなるパッケージ3の両面上に凹状部品実装部5を形成し、この凹状部品実装部5に前記部品としての受動素子9を実装すれば、絶縁物質2からなるパッケージ3のサイズを大きくすることなく、一つのリードから複数のリードへ受動素子9を実装することができる。
【0049】
また、本発明に基づく半導体装置は、前記リード部の一部分が、前記凹状部品実装部の前記底面及びこれとは反対側の面にそれぞれ露出しており、この反対側の面が外部接続端子となっていてもよい。
【0050】
具体的には、図1に示すような本発明に基づく半導体装置1は、アウターリード部14を介して実装基板(マザーボード)などに電気的に接続することができるが、これに代わり図8に示すように、前記アウターリード部は設けなくてもよい。この場合、絶縁物質2からなるパッケージ3の上面17に凹状部品実装部5を形成して、この凹状部品実装部5の底面にリード部8の一部分19を露出させ、上面17の凹状部品実装部5では導電性接合材10を介して受動素子9を接続固定すると共に、パッケージ3の下面18の所定の箇所に、リード部8の一部分19を露出させ、この露出域を外部接続端子として、図示省略したはんだ等を用いてリードレスで実装基板上に、本発明に基づく半導体装置1を実装することも可能である。なお、絶縁物質2からなるパッケージ3の下面18において、ダイパッド12が露出していてもよい。
【0051】
この場合、本発明に基づく半導体装置のより一層の薄型化、サイズの縮小化を図ることができる。特にBGA(Ball Grid Array)、即ち絶縁物質2からなるパッケージ3の下面18に形成されたリード部露出域19にはんだボール等を付着して、このはんだボールを介してマザーボードと接続する方法によれば、より一層はんだ付けし易く、また、はんだボールの厚みでマザーボードと半導体装置との距離をより大きくすることができ、熱などによるストレスをより一層低減することができる。
【0052】
ここで、上記に金属ワイヤー13を用いて半導体素子7の電極15と、インナーリード部8とをそれぞれ接続する例を示したが、本発明に基づく半導体装置1の製造方法によれば、上述した以外にも、フェイスダウン方式によるビームリード接続も可能である。
【0053】
また、上記に上型及び下型を配して凹状部品実装部5と共に絶縁物質2からなるパッケージ3を成形したが、前記成形空間に絶縁物質2を注入して成形した後、凹状部品実装部5を後加工で形成してもよい。さらに、前記凹状部品実装部を形成するよう凸部が予め形成された金型を用いるのに代えて、金型に所定の形状を有する入れ子を設置することにより、共通の金型を使用することも可能である。
【0054】
【発明の作用効果】
本発明によれば、前記絶縁物質によって封止されると共に、前記絶縁物質に前記部品実装部が設けられ、この部品実装部に前記リード部の一部分が露出し、この露出部において前記部品実装部に前記部品が実装されるので、例えば前記部品の接続にはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0055】
また、例えば前記部品の接続に導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0056】
また、はんだ又は導電ペーストの濡れ広がりがないので、リード間の短絡を防止することができる。
【0057】
さらに、上記したように、従来はワイヤーボンドの加熱によってはんだが再溶融し、実装部品が位置ずれを起こす問題があったが、これに対し本発明は、例えば前記半導体素子実装後、前記絶縁物質によって前記パッケージ化を行うと共に、前記絶縁物質に前記リード部の一部分が露出した前記部品実装部を設け、前記部品が前記リード部の前記露出部において前記部品実装部に実装されるので、前記部品が位置ずれを起こすことはない。
【0058】
また、前記半導体素子実装後に、前記半導体素子等を保護する目的で前記絶縁物質によって封止して前記パッケージ化を行うが、前記絶縁物質に前記部品実装部が設けられ、この部品実装部に前記リード部の一部分が露出し、この露出部において前記部品実装部に前記部品が実装されているので、例えば前記部品が露出した状態に本発明の半導体装置を製造することができ、前記部品の後付け又は交換が可能となる。さらに、前記部品として例えば抵抗チップ等を用いた場合、定数調整のためのトリミングも可能である。
【0059】
従って、本発明は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の前記半導体素子と、この半導体素子の周辺回路部品としての前記部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能である。
【図面の簡単な説明】
【図1】本発明の実施の形態による半導体装置の概略図である。
【図2】同、リードフレーム本体の概略平面図である。
【図3】同、リードフレームに半導体素子を実装したときの概略平面図である。
【図4】同、半導体素子実装後のリードフレームを絶縁物質で覆い、パッケージ化したときの概略図である。
【図5】同、絶縁物質の凹状部品実装部に導電性接合材を付着したときの概略図である。
【図6】同、凹状部品実装部に部品を接続固定したときの概略平面図である。
【図7】本発明の他の実施の形態による半導体装置の概略断面図である。
【図8】本発明の更に他の実施の形態による半導体装置の概略断面図である。
【図9】従来例による、リードフレーム材の概略平面図である。
【図10】同、リードフレームの一部分拡大概略平面図である。
【図11】同、半導体装置の概略平面図である。
【符号の説明】
1…半導体装置、2…絶縁物質、3…パッケージ、4…周辺部、
5…凹状部品実装部、6…リードフレーム、7…半導体素子、
8…インナーリード部、9…受動素子、10…導電性接合材、11…内側領域、12…ダイパッド、13…金属ワイヤー、14…アウターリード部、
15…電極、16…タイバー、17…上面、18…下面、19…外部接続端子
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same.
[0002]
[Prior art]
An electronic circuit such as an electronic device is formed by mounting a semiconductor element such as an integrated circuit (IC) and passive components such as a resistor and a capacitor on a printed circuit board.
[0003]
In recent years, demands for electronic devices include small size, light weight, high performance, high functionality, and low cost. In addition to these, shortening the development and design period is also an important issue. Various attempts have been made to satisfy these requirements, but an electronic circuit module in which an IC that forms a functional block of an electronic circuit and its peripheral circuit components are integrated, a so-called hybrid IC, SIP (System In Package), or the like. Is exactly the result of these requirements.
[0004]
Adopting this electronic circuit module has the advantage that the electronic circuit of the electronic device can be developed and designed in a short time.
[0005]
[Problems to be solved by the invention]
However, the above-described hybrid IC and SIP require a printed circuit board called an interposer for mounting the IC and peripheral circuit components. For this, an organic printed board or a ceramic substrate is used. Cost requirements are such that the component cost of this interposer cannot be ignored.
[0006]
Therefore, using a lead frame 6 shown in FIG. 10 made from an inexpensive lead frame material 20 frequently used for a semiconductor package as shown in FIG. 9, the lead frame 6 is mounted on a die pad 12 of the lead frame 6 as shown in FIG. The semiconductor element 7 is mounted, the electrode 15 of the semiconductor element 7 is connected to the inner lead portion 8 using the metal wire 13, and the passive component (peripheral circuit component) 21 such as a resistor or a capacitor is mounted on the inner lead portion 8. It is desired to do.
[0007]
As described above, when the semiconductor element 7 is mounted on the lead frame 6 and the passive component 21 is also mounted, the metal wire 13 connected to the semiconductor element 7 is extremely weak because it is extremely thin, and is deformed when touched after wiring. Therefore, the passive component 21 is mounted on the inner lead portion 8 of the lead frame 6 before the semiconductor element 7 is mounted.
[0008]
However, in the case of using the solder as the connection material 22 in the connection of the passive component 21 to the lead frame 6, for example, the flux component contained in the solder wets and spreads on the lead, and this spreads to the wire bond area, and a good wire bond area is formed. No connection.
[0009]
Further, in the connection of the passive component 21 to the lead frame 6, for example, if a conductive paste is used as the connecting material 22, the conductive paste itself spreads and spreads to the wire bond area, and good wire bond connection cannot be obtained.
[0010]
In addition, a short circuit occurs between the leads due to the spread of the solder or the conductive paste.
[0011]
Further, the semiconductor element 7 is mounted after the passive component 21 is mounted. However, the solder is re-melted by the heating of the wire bond at the time of mounting the semiconductor element 7, and the passive component 21 is displaced.
[0012]
In addition, after the passive component 21 and the semiconductor element 7 are mounted, the semiconductor element 7 and the metal wire 13 are sealed with resin for the purpose of protection, so that the passive component 21 cannot be adjusted or replaced after assembly.
[0013]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to use an IC on an inexpensive lead frame without using an expensive interposer such as an organic printed circuit board or a ceramic substrate. It is an object of the present invention to provide a semiconductor device on which a semiconductor element such as the above and a peripheral circuit component of the semiconductor element can be mounted, and which can realize good electrical connection as an electric circuit module, and a method of manufacturing the same.
[0014]
[Means for Solving the Problems]
That is, in the present invention, a semiconductor element is mounted on a lead frame, sealed and packaged with an insulating material so as to cover them, and a component mounting portion is provided on the insulating material. The present invention relates to a semiconductor device in which a part of a lead portion is exposed, and a component is mounted on the component mounting portion at the exposed portion.
[0015]
A step of manufacturing a lead frame main body; a step of mounting a semiconductor element on the lead frame main body; a step of packaging by sealing with an insulating material so as to cover these; and exposing a part of a lead portion The present invention relates to a method for manufacturing a semiconductor device, comprising: a step of forming a component mounting portion on the insulating material; and a step of mounting a component on the component mounting portion.
[0016]
Here, the components mainly mean peripheral circuit components of the semiconductor element, that is, passive elements such as resistors, capacitors, and inductors.
[0017]
According to the present invention, the component mounting portion is provided on the insulating material while being sealed by the insulating material, and a part of the lead portion is exposed on the component mounting portion, and the component mounting portion is exposed on the exposed portion. Since the component is mounted on, for example, even if a solder is used to connect the component, the flux component contained in the solder does not wet and spread on the lead as in the related art, and the wire bonding and the like described above can be performed. The connection of the semiconductor element can be obtained.
[0018]
Also, for example, when a conductive paste is used to connect the components, the conductive paste itself does not spread and wet as in the related art, and a good connection of the semiconductor element such as a wire bond is obtained for the same reason as described above. be able to.
[0019]
Further, since there is no spread of the solder or the conductive paste, a short circuit between the leads can be prevented.
[0020]
Further, as described above, conventionally, there has been a problem that the solder is re-melted due to the heating of the wire bond and the mounted component is displaced. In contrast, the present invention, for example, after mounting the semiconductor element, the insulating material The packaging is performed by providing the component mounting portion in which a part of the lead portion is exposed to the insulating material, and the component is mounted on the component mounting portion at the exposed portion of the lead portion. Does not cause displacement.
[0021]
Further, after mounting the semiconductor element, the packaging is performed by sealing with the insulating material for the purpose of protecting the semiconductor element and the like.The component mounting portion is provided on the insulating material, and the component mounting portion is provided with the component mounting portion. Since a part of the lead portion is exposed and the component is mounted on the component mounting portion in the exposed portion, for example, the semiconductor device of the present invention can be manufactured in a state where the component is exposed, and the component can be retrofitted. Or exchange becomes possible. Further, when a resistor chip or the like is used as the component, trimming for constant adjustment is possible.
[0022]
Therefore, the present invention does not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and uses a semiconductor element such as an IC on an inexpensive lead frame and the component as a peripheral circuit part of the semiconductor element. It can be mounted, and good electrical connection can be realized as an electric circuit module.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present invention, the component mounting portion is provided on the insulating material, a part of the lead portion is exposed on the component mounting portion, and the component is mounted on the component mounting portion at the exposed portion. However, in particular, as shown in FIG. 1 schematically showing a semiconductor device 1 according to the present invention, a concave component mounting portion 5 is formed in a peripheral portion 4 of a package 3 made of an insulating material 2, and a concave component is formed. It is desirable that a part of the lead part is exposed on the bottom surface of the mounting part 5.
[0024]
Specifically, as shown in FIG. 1B, a cross-sectional view taken along line AA ′ of FIG. 1A, the semiconductor device 1 according to the present invention has a semiconductor element 7 mounted on a lead frame 6, The package is sealed with the insulating material 2 so as to cover them, and a concave component mounting portion 5 is formed in the peripheral portion 4 of the package 3 made of the insulating material 2. A part of the inner lead portion 8 is exposed as the lead portion, and the passive element 9 as the component is mounted on the component mounting portion 5 at the exposed portion. The concave component mounting portion 5 includes a portion 5a where a part of the inner lead portion 8 is exposed, and a shallow portion 5b where a surface held between the electrodes of the passive element 9 is in contact.
[0025]
The electrode of the passive element 9 and the inner lead portion 8 are joined by a conductive material 10 in the exposed area 5a of the inner lead portion 8 as the lead portion of the concave component mounting portion 5.
[0026]
Here, as shown in FIGS. 1B and 1C, it is desirable that the thickness of the insulating material 2 in the peripheral portion 4 is smaller than the thickness of the inner region 11 thereof. , The replacement and the like of the passive element 9 after the manufacture of the device can be more easily performed.
[0027]
Further, the concave component mounting portion 5 is preferably formed to have a size larger than the maximum outer dimension of the passive element 9 as the component and a depth equal to or less than the thickness of the passive element 9 as the component. Thereby, the positioning accuracy when mounting the passive element 9 as the component is further improved, and it is possible to further prevent the outflow of the connecting material 10 such as solder as in the related art.
[0028]
Next, an example of a method for manufacturing a semiconductor device according to the present invention will be described in the order of steps with reference to FIGS.
[0029]
First, a lead frame 6 main body as shown in FIG. 2 is manufactured. As a manufacturing method of the lead frame 6, any conventionally known method can be applied, and the pitch of the outer lead portions 14 is, for example, 0.5 mm.
[0030]
Then, as shown in FIG. 3, the semiconductor element 7 is pressed and attached (mounted) on the die pad 12 of the lead frame 6, and the inner lead portion 8 and the electrode 15 of the semiconductor element 7 are connected using the metal wire 13. (Bonding). Here, as a method of mounting the semiconductor element 7, any conventionally known method such as a resin mounting method of potting a hemispherical silver paste on the die pad 12 can be applied. Also, as a method of connecting (bonding) the inner lead portion 8 and the electrode 15 of the semiconductor element 7 with the metal wire 13, any conventionally known method can be applied.
[0031]
After the mounting of the semiconductor element 7, although not shown, an upper mold and a lower mold in which a convex portion for forming the concave component mounting section 5 is formed in advance so as to cover the lead frame 6 on which the semiconductor element 7 is mounted. To form a molding space. Then, by injecting an insulating substance (mold resin) 2 into the molding space, curing the same, and removing the upper mold and the lower mold, the packaging can be performed as shown in FIG.
[0032]
Here, as described above, since the upper mold in which the convex portion for forming the concave component mounting portion 5 is formed in advance is used, FIG. 4B is a cross-sectional view taken along the line BB ′ in FIG. As shown in the figure, a concave component mounting portion 5 is formed in the peripheral portion 4 of the package 3 made of the insulating material 2 by molding, and a part of the inner lead portion 8 as the lead portion is formed on the bottom surface of the concave component mounting portion 5. It is exposed. That is, the concave component mounting portion 5 includes a portion 5a in which a part of the inner lead portion 8 is exposed, and a shallow portion 5b in which the surface sandwiched by the electrodes of the passive element is in contact.
[0033]
In addition, it is desirable that the thickness of the insulating material 2 at the peripheral portion 4 be smaller than the thickness of the inner region 11, so that the passive element 9 can be retrofitted or replaced after the semiconductor device according to the present invention is manufactured. It can be done even more easily.
[0034]
Further, the concave component mounting portion 5 is preferably formed to have a size larger than the maximum outer dimension of the passive element 9 as the component and a depth equal to or less than the thickness of the passive element 9 as the component. Thereby, the positioning accuracy when mounting the passive element 9 as the component is further improved, and it is possible to further prevent the flowing out of the bonding material such as the solder as in the related art.
[0035]
In addition, as the insulating material 2, for example, an epoxy resin or the like can be used.
[0036]
Next, as shown in FIG. 5, the bonding material 10 is attached to the concave component mounting portion 5. As the bonding material 10, it is preferable to use a paste-like conductive material, such as solder, which has fluidity when connecting and fixing the passive element 9 as the component to the inner lead portion 8 in a later step.
[0037]
Next, as shown in FIG. 6, the passive element 9 as the component is connected and fixed to the inner lead portion 8 in the exposed area of the inner lead portion 8 on the bottom surface of the concave component mounting portion 5 via the conductive bonding material 10. I do.
[0038]
Then, for example, by cutting the tie bars 16 and separating the outer lead portions 14, the semiconductor device 1 based on the present invention as shown in FIG. 1A can be manufactured.
[0039]
In the semiconductor device 1 according to the present invention, as described above, the concave component mounting portion 5 is formed on the peripheral portion 4 of the package 3 made of the insulating material 2 by molding, and the inner lead is formed on the bottom surface of the concave component mounting portion 5. A portion of the portion 8 is exposed, and the passive element 9 as the component is connected and fixed to the concave component mounting portion 5 at the exposed portion, so that the positioning accuracy when connecting and fixing the passive element 9 is further improved.
[0040]
Further, for example, even if solder is used as the bonding material 10 of the passive element 9, the flux component contained in the solder does not spread on the leads as in the related art, and the semiconductor element 7 such as a better wire bond can be formed. You can get a connection.
[0041]
Also, for example, when a conductive paste is used as the bonding material 10 of the passive element 9, for the same reason as described above, the conductive paste itself does not wet and spread as in the related art, and a better semiconductor element 7 such as a wire bond is used. Connection can be obtained.
[0042]
In addition, since there is no spread of the conductive material such as solder or conductive paste as the bonding material 10, a short circuit between the leads can be prevented.
[0043]
Further, after mounting the semiconductor element 7, the packaging is performed with the insulating material 2, and a concave component mounting portion 5 in which a part of the inner lead portion 8 is exposed is provided on the insulating material 2. Since the passive element 9 is mounted on the concave component mounting section 5 in the portion, the position of the passive element 9 does not occur.
[0044]
After the semiconductor element 7 is mounted, the semiconductor element 7 and the metal wire 13 are sealed and sealed with an insulating substance 2 to perform the packaging. The insulating substance 2 is provided with a concave component mounting portion 5. Since a part of the inner lead portion 8 is exposed to the component mounting portion 5, and the passive element 9 is mounted to the concave component mounting portion 5 in this exposed portion, for example, the passive element 9 is exposed to the surface of the package 3. The semiconductor device 1 of the invention can be manufactured, and the passive element 9 can be retrofitted or replaced. Further, when a resistor chip or the like is used as the component, trimming for constant adjustment is possible.
[0045]
Therefore, the semiconductor device 1 according to the present invention does not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and a semiconductor element 7 such as an IC and a peripheral circuit of the semiconductor element 7 on an inexpensive lead frame 6. The passive element 9 as a component can be mounted, and better electric connection can be realized as an electric circuit module.
[0046]
In the semiconductor device according to the present invention, it is preferable that the component is mounted on at least one of one surface and the other surface of the insulating material, and the package described above includes the insulating material. Instead of mounting the component on only one surface, the component may be mounted on both surfaces of the package.
[0047]
For example, as shown in FIG. 7, a concave component mounting portion 5 is formed on both surfaces of a package 3 made of an insulating material 2 so that a part of an inner lead portion 8 as the lead portion is exposed on the bottom surface. The passive element 9 as the component may be mounted on the concave component mounting portion 5, and the electrode of the passive element 9 and the inner lead portion 8 may be joined by the conductive bonding material 10.
[0048]
As described above, when the concave component mounting portions 5 are formed on both surfaces of the package 3 made of the insulating material 2 and the passive elements 9 as the components are mounted on the concave component mounting portions 5, the package made of the insulating material 2 can be obtained. The passive element 9 can be mounted from one lead to a plurality of leads without increasing the size of 3.
[0049]
Further, in the semiconductor device according to the present invention, a part of the lead portion is exposed on the bottom surface of the concave component mounting portion and a surface opposite to the bottom surface, and the opposite surface is provided with an external connection terminal. It may be.
[0050]
Specifically, the semiconductor device 1 according to the present invention as shown in FIG. 1 can be electrically connected to a mounting board (motherboard) or the like via the outer lead portions 14, but instead of this, FIG. As shown, the outer lead portion may not be provided. In this case, the concave component mounting portion 5 is formed on the upper surface 17 of the package 3 made of the insulating material 2, and a portion 19 of the lead 8 is exposed on the bottom surface of the concave component mounting portion 5. In 5, the passive element 9 is connected and fixed via the conductive bonding material 10, and a part 19 of the lead portion 8 is exposed at a predetermined position on the lower surface 18 of the package 3, and this exposed area is used as an external connection terminal. It is also possible to mount the semiconductor device 1 according to the present invention on a mounting board in a leadless manner using the omitted solder or the like. The die pad 12 may be exposed on the lower surface 18 of the package 3 made of the insulating material 2.
[0051]
In this case, the thickness and size of the semiconductor device according to the present invention can be further reduced. In particular, a method in which a solder ball or the like is attached to a BGA (Ball Grid Array), that is, a lead portion exposed area 19 formed on the lower surface 18 of the package 3 made of the insulating material 2 and connected to the motherboard via the solder ball. If this is the case, soldering can be further facilitated, the distance between the motherboard and the semiconductor device can be increased by the thickness of the solder ball, and stress due to heat or the like can be further reduced.
[0052]
Here, the example in which the electrode 15 of the semiconductor element 7 is connected to the inner lead portion 8 using the metal wire 13 has been described above. However, according to the method of manufacturing the semiconductor device 1 according to the present invention, the above description is given. Besides, beam lead connection by a face-down method is also possible.
[0053]
In addition, the package 3 made of the insulating material 2 is molded together with the concave component mounting portion 5 by disposing the upper die and the lower die, but after the insulating material 2 is injected into the molding space and molded, the concave component mounting portion is formed. 5 may be formed by post-processing. Further, instead of using a mold in which a convex portion is formed in advance to form the concave component mounting portion, a common mold is used by installing a nest having a predetermined shape in the mold. Is also possible.
[0054]
Effects of the Invention
According to the present invention, the component mounting portion is provided on the insulating material while being sealed by the insulating material, and a part of the lead portion is exposed on the component mounting portion, and the component mounting portion is exposed on the exposed portion. Since the component is mounted on, for example, even if a solder is used to connect the component, the flux component contained in the solder does not wet and spread on the lead as in the related art, and the wire bonding and the like described above can be performed. The connection of the semiconductor element can be obtained.
[0055]
Also, for example, when a conductive paste is used to connect the components, the conductive paste itself does not spread and wet as in the related art, and a good connection of the semiconductor element such as a wire bond is obtained for the same reason as described above. be able to.
[0056]
Further, since there is no spread of the solder or the conductive paste, a short circuit between the leads can be prevented.
[0057]
Further, as described above, conventionally, there has been a problem that the solder is re-melted due to the heating of the wire bond and the mounted component is displaced. In contrast, the present invention, for example, after mounting the semiconductor element, the insulating material The packaging is performed by providing the component mounting portion in which a part of the lead portion is exposed to the insulating material, and the component is mounted on the component mounting portion at the exposed portion of the lead portion. Does not cause displacement.
[0058]
Further, after mounting the semiconductor element, the packaging is performed by sealing with the insulating material for the purpose of protecting the semiconductor element and the like.The component mounting portion is provided on the insulating material, and the component mounting portion is provided with the component mounting portion. Since a part of the lead portion is exposed and the component is mounted on the component mounting portion in the exposed portion, for example, the semiconductor device of the present invention can be manufactured in a state where the component is exposed, and the component can be retrofitted. Or exchange becomes possible. Further, when a resistor chip or the like is used as the component, trimming for constant adjustment is possible.
[0059]
Therefore, the present invention does not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and uses a semiconductor element such as an IC on an inexpensive lead frame and the component as a peripheral circuit part of the semiconductor element. It can be mounted, and good electrical connection can be realized as an electric circuit module.
[Brief description of the drawings]
FIG. 1 is a schematic diagram of a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a schematic plan view of the lead frame body.
FIG. 3 is a schematic plan view when a semiconductor element is mounted on a lead frame.
FIG. 4 is a schematic diagram when the lead frame after mounting the semiconductor element is covered with an insulating material and packaged.
FIG. 5 is a schematic view when a conductive bonding material is attached to a concave component mounting portion made of an insulating material.
FIG. 6 is a schematic plan view when a component is connected and fixed to the concave component mounting portion.
FIG. 7 is a schematic sectional view of a semiconductor device according to another embodiment of the present invention.
FIG. 8 is a schematic sectional view of a semiconductor device according to still another embodiment of the present invention.
FIG. 9 is a schematic plan view of a lead frame material according to a conventional example.
FIG. 10 is a partially enlarged schematic plan view of the lead frame.
FIG. 11 is a schematic plan view of the same semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 2 ... Insulating material, 3 ... Package, 4 ... Peripheral part,
5: concave component mounting portion, 6: lead frame, 7: semiconductor element,
8: inner lead portion, 9: passive element, 10: conductive bonding material, 11: inner region, 12: die pad, 13: metal wire, 14: outer lead portion,
Reference numeral 15: electrode, 16: tie bar, 17: upper surface, 18: lower surface, 19: external connection terminal

Claims (18)

リードフレーム上に半導体素子が実装され、これらを覆うように絶縁物質によって封止されてパッケージ化されると共に、前記絶縁物質に部品実装部が設けられ、この部品実装部にリード部の一部分が露出し、この露出部において前記部品実装部に部品が実装されている、半導体装置。A semiconductor element is mounted on a lead frame, sealed and packaged with an insulating material so as to cover them, and a component mounting portion is provided on the insulating material, and a part of the lead portion is exposed in the component mounting portion. And a component mounted on the component mounting portion at the exposed portion. 前記絶縁物質からなるパッケージの周辺部に凹状の前記部品実装部が形成されており、前記凹状部品実装部の底面にリード部の一部分が露出している、請求項1に記載した半導体装置。2. The semiconductor device according to claim 1, wherein the component mounting portion having a concave shape is formed in a peripheral portion of the package made of the insulating material, and a part of a lead portion is exposed on a bottom surface of the concave component mounting portion. 3. 前記周辺部での前記絶縁物質の厚さがその内側領域の厚さよりも小さい、請求項2に記載した半導体装置。3. The semiconductor device according to claim 2, wherein a thickness of said insulating material at said peripheral portion is smaller than a thickness of an inner region thereof. 前記部品実装部のリード部の露出域において、前記部品の電極と、前記リード部とが導電性材料によって接合されている、請求項1に記載した半導体装置。2. The semiconductor device according to claim 1, wherein the electrode of the component and the lead are joined by a conductive material in an exposed area of the lead of the component mounting portion. 3. 前記部品が前記絶縁物質の一方の面上と他方の面上との少なくとも一方に実装されている、請求項1に記載した半導体装置。2. The semiconductor device according to claim 1, wherein the component is mounted on at least one of one surface and the other surface of the insulating material. 前記リード部がインナーリード部である、請求項2に記載した半導体装置。3. The semiconductor device according to claim 2, wherein said lead portion is an inner lead portion. 前記リード部の一部分が、前記凹状部品実装部の前記底面及びこれとは反対側の面にそれぞれ露出しており、この反対側の面が外部接続端子となっている、請求項2に記載した半導体装置。The part according to claim 2, wherein a part of the lead portion is exposed on the bottom surface of the concave component mounting portion and a surface opposite to the bottom surface, and the opposite surface serves as an external connection terminal. Semiconductor device. 前記凹状部品実装部が、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成されている、請求項2に記載した半導体装置。The semiconductor device according to claim 2, wherein the concave component mounting portion is formed to have a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. 前記部品が受動素子である、請求項1に記載した半導体装置。The semiconductor device according to claim 1, wherein the component is a passive element. リードフレーム本体を製造する工程と、前記リードフレーム本体上に半導体素子を実装する工程と、これらを覆うように絶縁物質によって封止してパッケージ化する工程と、リード部の一部分を露出させる部品実装部を前記絶縁物質に形成する工程と、前記部品実装部に部品を実装する工程とを有する、半導体装置の製造方法。A step of manufacturing a lead frame main body, a step of mounting a semiconductor element on the lead frame main body, a step of sealing and packaging with an insulating material so as to cover these, and a component mounting for exposing a part of a lead portion A method of manufacturing a semiconductor device, comprising: forming a part on the insulating material; and mounting a component on the component mounting part. 前記絶縁物質からなるパッケージの周辺部に凹状の前記部品実装部を形成し、前記凹状部品実装部の底面にリード部の一部分を露出する、請求項10に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 10, wherein the concave component mounting portion is formed in a peripheral portion of the package made of the insulating material, and a part of a lead portion is exposed on a bottom surface of the concave component mounting portion. 前記周辺部での前記絶縁物質の厚さをその内側領域の厚さよりも小さく形成する、請求項11に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 11, wherein a thickness of the insulating material at the peripheral portion is smaller than a thickness of an inner region thereof. 前記部品実装部のリード部の露出域において、前記部品の電極と、前記リード部とを導電性材料によって接合する、請求項10に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 10, wherein an electrode of the component and the lead portion are joined by a conductive material in an exposed area of a lead portion of the component mounting portion. 前記部品を前記絶縁物質の一方の面上と他方の面上との少なくとも一方に実装する、請求項10に記載した半導体装置の製造方法。The method according to claim 10, wherein the component is mounted on at least one of one surface and the other surface of the insulating material. 前記リード部をインナーリード部とする、請求項11に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 11, wherein the lead portion is an inner lead portion. 前記リード部の一部分を、前記凹状部品実装部の前記底面及びこれとは反対側の面にそれぞれ露出し、この反対側の面を外部接続端子とする、請求項11に記載した半導体装置の製造方法。12. The manufacturing of the semiconductor device according to claim 11, wherein a part of the lead portion is exposed on the bottom surface of the concave component mounting portion and a surface opposite to the bottom surface, and the opposite surface is used as an external connection terminal. Method. 前記凹状部品実装部を、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成する、請求項11に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 11, wherein the concave component mounting portion is formed to have a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. 前記部品を受動素子とする、請求項10に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 10, wherein the component is a passive element.
JP2002331521A 2002-11-15 2002-11-15 Semiconductor device and its manufacture Pending JP2004165525A (en)

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Cited By (5)

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JP2011243790A (en) * 2010-05-19 2011-12-01 Panasonic Electric Works Co Ltd Wiring method, structure provided wiring on surface, semiconductor device, wiring board, memory card, electric device, module, and multilayer circuit board
JP2012074495A (en) * 2010-09-28 2012-04-12 Dainippon Printing Co Ltd Semiconductor device
WO2012070529A1 (en) * 2010-11-24 2012-05-31 住友ベークライト株式会社 Epoxy resin composition for semiconductor encapsulation and semiconductor device
JP2013534320A (en) * 2010-08-20 2013-09-02 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング Sensor module for housing pressure sensor chip and assembling to sensor housing
US9263374B2 (en) 2010-09-28 2016-02-16 Dai Nippon Printing Co., Ltd. Semiconductor device and manufacturing method therefor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011243790A (en) * 2010-05-19 2011-12-01 Panasonic Electric Works Co Ltd Wiring method, structure provided wiring on surface, semiconductor device, wiring board, memory card, electric device, module, and multilayer circuit board
JP2013534320A (en) * 2010-08-20 2013-09-02 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング Sensor module for housing pressure sensor chip and assembling to sensor housing
US9006847B2 (en) 2010-08-20 2015-04-14 Robert Bosch Gmbh Sensor module for accommodating a pressure sensor chip and for installation into a sensor housing
EP2606329B1 (en) * 2010-08-20 2018-09-12 Robert Bosch GmbH Sensor module for receiving a pressure sensing chip and for assembling in a sensor housing
JP2012074495A (en) * 2010-09-28 2012-04-12 Dainippon Printing Co Ltd Semiconductor device
US9263374B2 (en) 2010-09-28 2016-02-16 Dai Nippon Printing Co., Ltd. Semiconductor device and manufacturing method therefor
WO2012070529A1 (en) * 2010-11-24 2012-05-31 住友ベークライト株式会社 Epoxy resin composition for semiconductor encapsulation and semiconductor device
CN103221480A (en) * 2010-11-24 2013-07-24 住友电木株式会社 Epoxy resin composition for semiconductor encapsulation and semiconductor device

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