JP2003347589A - Led chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an LED chip that can materialize a small chip package and has a high light extraction efficiency. <P>SOLUTION: The LED chip 1 is structured such that a quantum well structure comprising an n-type semiconductor layer 3 and light-emitting layer 4 of a GaN compound semiconductor, and a p-type semiconductor layer 5 are laminated in order on the crystal of a translucent substrate 2. The n-type semiconductor layer 3 and the p-type semiconductor layer 5 each are provided with feeders 6 and 7 for the n-side electrode and p-side electrode on the surfaces of both semiconductor layers 3 and 5 opposite to the translucent substrate 2. Further, an insulating film 8 is formed onto the side and bottom surfaces of both semiconductor layers 3 and 5 except where the feeders 6 and 7 are built. Here, in order that light moving in parallel with the light-emitting layer 4 in the light-emitting layer 4 may be totally reflected in the light extraction direction, the end face of the light-emitting layer 4 is inclined toward a face A parallel to the light- emitting layer 4 so that the angle that its normal L1 forms with the face A parallel to the light-emitting layer 4 may become a specified angle or more. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、結晶基板上にｐ型
半導体層、ｎ型半導体層を形成したＬＥＤチップに関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED chip having a p-type semiconductor layer and an n-type semiconductor layer formed on a crystal substrate.

【０００２】[0002]

【従来の技術】従来、例えばＩｎＧａＮなどの窒化ガリ
ウム（ＧａＮ）系の化合物半導体ＬＥＤチップ１は、一
般的に図９に示すような構造を有している。つまり、サ
ファイアのような透光性基板２の結晶上に窒化ガリウム
のバッファ層（図示せず）を形成し、その上にｎ型窒化
ガリウム層（以下ｎ型半導体層と言う）３、更にその上
に多層の量子井戸構造層（発光層を含む）４を順次形成
し、また更にその上にｐ型窒化ガリウム層（ｐ型半導体
層と言う）５を形成してＬＥＤチップ１を構成してあ
る。場合によっては更にその上に光取り出し率向上のた
めのキャップ層が形成されることがある。また、電気的
に絶縁するためｎ型半導体層３、発光層４及びｐ型半導
体層５の側面および下面を絶縁膜８で覆っている。2. Description of the Related Art Conventionally, a gallium nitride (GaN) based compound semiconductor LED chip 1 such as InGaN generally has a structure as shown in FIG. That is, a buffer layer (not shown) of gallium nitride is formed on a crystal of the translucent substrate 2 such as sapphire, and an n-type gallium nitride layer (hereinafter referred to as an n-type semiconductor layer) 3 is formed thereon. A multilayer quantum well structure layer (including a light emitting layer) 4 is sequentially formed thereon, and a p-type gallium nitride layer (referred to as a p-type semiconductor layer) 5 is further formed thereon to form the LED chip 1. is there. In some cases, a cap layer for improving the light extraction rate may be further formed thereon. Further, the side and lower surfaces of the n-type semiconductor layer 3, the light-emitting layer 4, and the p-type semiconductor layer 5 are covered with an insulating film 8 for electrical insulation.

【０００３】発光層付近の構造は、一般に、バンドギャ
ップの小さい発光層をバンドギャップの大きいクラッド
層で挟んだダブルへテロ（ＤＨ）構造と呼ばれる層構造
を成している。このＤＨ構造によって、正孔や電子が発
光層にトラップされ、正孔と電子とが再結合する確率が
増大したことが、ＧａＮ系ＬＥＤにおいて従来のＧａＡ
ｓ系ＬＥＤと同程度の発光効率が得られた一因と考えら
れているところで、基板として用いるサファイアは導電
性がないため、ｐ型半導体層５と発光層４の一部をエッ
チング除去し、ｎ型半導体層３を露出させてその上にｎ
型半導体層３に対応するｎ側電極を形成している。従っ
て、窒化ガリウム系ＬＥＤチップ１では、半導体層形成
面側にｎ，ｐの二種類の電極が存在している構造が一般
的であり、ｎ側及びｐ側の各電極上には、ワイヤボンデ
ィング或いはバンプ接合に適した面積を有する丸形若し
くは四角形の給電部（パッド）６，７を１つずつ形成す
るのが通常である。[0003] The structure near the light emitting layer generally has a layer structure called a double hetero (DH) structure in which a light emitting layer having a small band gap is sandwiched between cladding layers having a large band gap. This DH structure traps holes and electrons in the light-emitting layer and increases the probability of recombination of holes and electrons.
It is considered that sapphire used as a substrate has no conductivity, so that a part of the p-type semiconductor layer 5 and a part of the light emitting layer 4 are removed by etching, which is considered to be one of the causes of obtaining the same luminous efficiency as the s-based LED. The n-type semiconductor layer 3 is exposed and n
An n-side electrode corresponding to the type semiconductor layer 3 is formed. Therefore, the gallium nitride LED chip 1 generally has a structure in which two types of electrodes, n and p, are present on the semiconductor layer forming surface side, and wire bonding is performed on each of the n-side and p-side electrodes. Alternatively, it is usual to form round or square power supply portions (pads) 6, 7 each having an area suitable for bump bonding.

【０００４】[0004]

【発明が解決しようとする課題】ところで、上述のよう
なＤＨ構造を有するＬＥＤチップ１では、発光層４と、
発光層４に近接するクラッド層との屈折率差によって、
発光層４で生じた光の内、少なからぬ割合の光が、発光
層４とクラッド層との界面で全反射を繰り返しながら、
発光層４と平行な向きに進行して発光層４端面に到達
し、ＬＥＤチップ１の側面から外部へと放射される。そ
のため、ＬＥＤチップ１の側面から放射される光を光の
取り出し方向に取り出して利用するためには、ＬＥＤチ
ップ１の外部に反射部を設置する必要があり、ＬＥＤチ
ップ１を配線基板などに実装して使用する場合はＬＥＤ
チップ１の実装部を小型にできないという問題があっ
た。By the way, in the LED chip 1 having the DH structure as described above, the light emitting layer 4
Due to the difference in the refractive index between the light emitting layer 4 and the cladding layer adjacent thereto,
A considerable percentage of the light generated in the light emitting layer 4 repeats total reflection at the interface between the light emitting layer 4 and the cladding layer,
The light proceeds in a direction parallel to the light emitting layer 4, reaches the end face of the light emitting layer 4, and is emitted from the side surface of the LED chip 1 to the outside. Therefore, in order to extract and use the light radiated from the side surface of the LED chip 1 in the light extraction direction, it is necessary to install a reflection portion outside the LED chip 1 and mount the LED chip 1 on a wiring board or the like. LED when used
There is a problem that the mounting portion of the chip 1 cannot be reduced in size.

【０００５】また、近年、１個のＬＥＤチップ１から得
られる光量を増大させるために、チップの大型化を目指
す開発傾向にあり、チップの大型化に伴う発光面内での
発光むらを緩和するために、本発明者らは、ｐ側及びｎ
側の電極を複数の電極に分けるといった電極部に関する
改良を提案している（特願２００１−１２４５５６参
照）。しかしながら、電極構造が複雑になると、発光層
と平行な向きに進行する光がＬＥＤチップ１の側面から
外部へ放射される以前に、電極部で散乱されるなどして
減衰し、光取り出し効率が低下するというような悪影響
が考えられる。In recent years, in order to increase the amount of light obtained from one LED chip 1, there has been a development trend to increase the size of the chip, and light emission unevenness in the light emitting surface due to the increase in size of the chip has been reduced. For this reason, we consider p-side and n-side
There has been proposed an improvement relating to an electrode portion such as dividing the electrode on the side into a plurality of electrodes (see Japanese Patent Application No. 2001-124556). However, when the electrode structure is complicated, light traveling in the direction parallel to the light emitting layer is attenuated by being scattered by the electrode portion before being emitted from the side surface of the LED chip 1 to the outside, and the light extraction efficiency is reduced. An adverse effect such as a decrease is considered.

【０００６】本発明は上記問題点に鑑みて為されたもの
であり、その目的とするところは、チップ実装部の小型
化が可能で光取り出し効率の高いＬＥＤチップを提供す
ることにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide an LED chip having a high light extraction efficiency, in which a chip mounting portion can be reduced in size.

【０００７】[0007]

【課題を解決するための手段】上記目的を達成するため
に、請求項１の発明では、結晶基板上に少なくとも一対
のｐ型半導体層及びｎ型半導体層を形成し、ｐ型半導体
層とｎ型半導体層との対向部に発光層を設け、ｐ型半導
体層、発光層及びｎ型半導体層の側面を少なくとも覆う
絶縁膜を設けたＬＥＤチップにおいて、発光層内を発光
層と平行に進行する光が光の取り出し方向へ全反射され
るように、発光層の端面、又は、発光層の端面に接する
絶縁膜の外側面の内、少なくとも何れか一方の面を、そ
の法線が発光層に平行な面と成す角度を所定の角度以上
とするように、発光層に平行な面に対して傾斜させたこ
とを特徴とする。According to a first aspect of the present invention, at least a pair of a p-type semiconductor layer and an n-type semiconductor layer are formed on a crystal substrate. In an LED chip provided with a light-emitting layer at a portion facing the type semiconductor layer and provided with an insulating film covering at least the side surfaces of the p-type semiconductor layer, the light-emitting layer, and the n-type semiconductor layer, the light-emitting layer travels in parallel with the light-emitting layer. The end face of the light emitting layer, or at least one of the outer surfaces of the insulating film in contact with the end face of the light emitting layer, so that the light is totally reflected in the light extraction direction, the normal of the light emitting layer to the light emitting layer. It is characterized by being inclined with respect to the plane parallel to the light emitting layer so that the angle formed with the parallel plane is equal to or larger than a predetermined angle.

【０００８】請求項２の発明では、請求項１の発明にお
いて、発光層の端面の法線と発光層に平行な面とが成す
角度を鋭角とし、絶縁膜の屈折率を発光層の屈折率で除
した値の逆正弦以上としたことを特徴とする。According to a second aspect of the present invention, in the first aspect of the present invention, the angle formed between the normal to the end face of the light emitting layer and a plane parallel to the light emitting layer is an acute angle, and the refractive index of the insulating film is changed to the refractive index of the light emitting layer. And a value greater than the inverse sine of the value divided by.

【０００９】請求項３の発明では、請求項１の発明にお
いて、発光層の端面と発光層に平行な面とを略直交さ
せ、発光層の端面に接する絶縁膜の外側面の法線と発光
層に平行な面とが成す角度を鋭角とし、その角度を、基
板実装後の完成状態において絶縁膜の外側面が接する物
質の屈折率を絶縁膜の屈折率で除した値の逆正弦以上と
したことを特徴とする請求項４の発明では、請求項１の
発明において、発光層の端面の法線と発光層に平行な面
とが成す第１の角度と、発光層の端面に接する絶縁膜の
外側面の法線と発光層に平行な面とが成す第２の角度と
はそれぞれ鋭角であって、第２の角度を第１の角度より
も大きくし、第１の角度を、絶縁膜の屈折率を発光層の
屈折率で除した値の逆正弦よりも小さい角度とし、且
つ、第２の角度と第１の角度との差に、発光層の屈折率
を絶縁膜の屈折率で除した値に第１の角度の正弦を乗じ
た値の逆正弦を加算した値を、基板実装後の完成状態に
おいて絶縁膜の外側面が接する物質の屈折率を絶縁膜の
屈折率で除した値の逆正弦以上としたことを特徴とす
る。According to a third aspect of the present invention, in the first aspect of the present invention, the end face of the light emitting layer and the plane parallel to the light emitting layer are substantially perpendicular to each other, and the normal to the outer face of the insulating film in contact with the end face of the light emitting layer is emitted. The angle formed by the plane parallel to the layer is an acute angle, and the angle is equal to or greater than the inverse sine of the value obtained by dividing the refractive index of the substance in contact with the outer surface of the insulating film in the completed state after mounting the substrate by the refractive index of the insulating film. According to a fourth aspect of the present invention, in the first aspect of the present invention, the first angle formed between the normal to the end face of the light emitting layer and a plane parallel to the light emitting layer, and the insulation in contact with the end face of the light emitting layer. The second angle formed between the normal to the outer surface of the film and the plane parallel to the light emitting layer is an acute angle, and the second angle is larger than the first angle, and the first angle is insulated. An angle smaller than the inverse sine of a value obtained by dividing the refractive index of the film by the refractive index of the light emitting layer, and the second angle and the first angle The value obtained by adding the inverse sine of the value obtained by dividing the refractive index of the light emitting layer by the refractive index of the insulating film to the difference from the angle and the value obtained by multiplying the sine of the first angle by the sine of the insulating film in the completed state after mounting on the substrate Wherein the refractive index of a substance in contact with the outer surface is divided by an inverse sine of a value obtained by dividing by a refractive index of the insulating film.

【００１０】請求項５の発明では、請求項４の発明にお
いて、発光層の端面に接する絶縁膜の外側面を、発光層
の端面と非平行としたことを特徴とする。According to a fifth aspect of the present invention, in the fourth aspect, the outer surface of the insulating film in contact with the end surface of the light emitting layer is not parallel to the end surface of the light emitting layer.

【００１１】請求項６の発明では、請求項１乃至５の何
れか１つの発明において、絶縁膜の外側に金属膜を設け
たことを特徴とする。According to a sixth aspect of the present invention, in any one of the first to fifth aspects of the present invention, a metal film is provided outside the insulating film.

【００１２】請求項７の発明では、請求項６の発明にお
いて、金属膜を、ｐ型半導体層又はｎ型半導体層の内少
なくとも何れか一方への配線部として兼用したことを特
徴とする。According to a seventh aspect of the present invention, in the sixth aspect, the metal film also serves as a wiring portion for at least one of the p-type semiconductor layer and the n-type semiconductor layer.

【００１３】請求項８の発明では、請求項１乃至７の何
れか１つの発明において、チップ側面を発光層と平行な
面に対して斜めに傾斜させたことを特徴とする。According to an eighth aspect of the present invention, in any one of the first to seventh aspects of the present invention, the chip side surface is inclined with respect to a plane parallel to the light emitting layer.

【００１４】請求項９の発明では、請求項１乃至８の何
れか１つの発明において、ｐ型半導体層とｎ型半導体層
の各々に接続するｐ側電極とｎ側電極を半導体層形成側
のチップ面に設け、複数のｐ側電極と、複数のｎ側電極
とを、略平行に等間隔で交互に並行配列して、複数のｐ
側電極の配列方向と交差する方向における一方の端を互
いに連結して櫛形に形成するとともに、複数のｎ側電極
の配列方向と交差する方向における他方の端を互いに連
結して櫛形に形成して成ることを特徴とする。According to a ninth aspect of the present invention, in any one of the first to eighth aspects of the present invention, the p-side electrode and the n-side electrode connected to each of the p-type semiconductor layer and the n-type semiconductor layer are formed on the semiconductor layer forming side. A plurality of p-side electrodes and a plurality of n-side electrodes are provided on the chip surface, and are alternately and substantially parallel arranged at equal intervals in parallel.
One end in a direction intersecting the arrangement direction of the side electrodes is connected to each other to form a comb shape, and the other end in a direction intersecting the arrangement direction of the plurality of n-side electrodes is connected to each other to form a comb shape. It is characterized by comprising.

【００１５】請求項１０の発明では、請求項９の発明に
おいて、各電極の連結されていない側の端部に丸みをも
たせたことを特徴とする。According to a tenth aspect of the present invention, in the ninth aspect of the present invention, the ends of the electrodes not connected are rounded.

【００１６】請求項１１の発明では、請求項１乃至１０
の何れか１つの発明において、ｐ型半導体層とｎ型半導
体層との対を複数対積層したことを特徴とする。In the eleventh aspect of the present invention, the first to tenth aspects are provided.
In any one of the inventions described above, a plurality of pairs of a p-type semiconductor layer and an n-type semiconductor layer are stacked.

【００１７】[0017]

【発明の実施の形態】本発明の実施の形態を図面を参照
して説明する。Embodiments of the present invention will be described with reference to the drawings.

【００１８】（実施形態１）本実施形態のＬＥＤチップ
の断面図を図１に示す。本実施形態では、サファイアの
ような透光性基板２の結晶上に、ＧａＮ系化合物半導体
のｎ型半導体層３、発光層４を含む量子井戸構造、及び
ｐ型半導体層５を順番に積層してある。そして、ｎ型半
導体層３及びｐ型半導体層５の各々には、ｎ側電極及び
ｐ側電極の給電部６，７が両半導体層３，５における透
光性基板２と反対側の面に設けてある。また、ｎ型及び
ｐ型の各半導体層３，５と発光層４の側面及び下面に
は、ｎ側及びｐ側電極の給電部６，７が形成された部位
を除いて絶縁膜８を形成してある。尚、本実施形態では
絶縁膜８の材料として屈折率が約１．５のＳｉＯ_２を用
いている。また、図１中の矢印は発光層４で生じた光の
内、発光層４と平行な方向に進行して発光層４の端面に
到達した光の光路の一例を示している。(Embodiment 1) FIG. 1 shows a cross-sectional view of an LED chip of this embodiment. In the present embodiment, an n-type semiconductor layer 3 of a GaN-based compound semiconductor, a quantum well structure including a light-emitting layer 4, and a p-type semiconductor layer 5 are sequentially stacked on a crystal of a translucent substrate 2 such as sapphire. It is. In each of the n-type semiconductor layer 3 and the p-type semiconductor layer 5, power supply portions 6 and 7 of the n-side electrode and the p-side electrode are provided on the surfaces of the semiconductor layers 3 and 5 on the side opposite to the light-transmitting substrate 2. It is provided. An insulating film 8 is formed on the side and lower surfaces of the n-type and p-type semiconductor layers 3 and 5 and the light emitting layer 4 except for the portions where the power supply portions 6 and 7 of the n-side and p-side electrodes are formed. I have. In this embodiment, SiO ₂ having a refractive index of about 1.5 is used as the material of the insulating film 8. The arrows in FIG. 1 indicate an example of the optical path of the light generated in the light emitting layer 4 that travels in a direction parallel to the light emitting layer 4 and reaches the end face of the light emitting layer 4.

【００１９】ここで、本実施形態では発光層４の端面の
法線Ｌ１と、発光層４に平行な面Ａとの成す角度θ
_１（鋭角）が、絶縁膜８の屈折率ｎ_２を発光層４の屈折
率ｎ_１で除した値の逆正弦以上となり（θ_１≧ｓｉｎ
^−１（ｎ_２／ｎ_１））、透光性基板２に近い側ほど幅広
となるように、発光層４を含む両半導体層３，５の側面
をエッチングしている。例えば発光層４の屈折率ｎ_１が
約２．６、ＳｉＯ_２からなる絶縁膜８の屈折率ｎ_２が約
１．５の場合、ｓｉｎ^−１（ｎ_２／ｎ_１）＝３５．２と
なるので、本実施形態では角度θ_１が約４０度となるよ
うに、発光層４を含む両半導体層３，５の側面をエッチ
ングして、斜面を形成している。Here, in the present embodiment, the angle θ formed between the normal L 1 to the end face of the light emitting layer 4 and the plane A parallel to the light emitting layer 4.
_{1 (acute} angle) becomes a refractive index n ₂ of the insulating film 8 over the arcsine of a value obtained by dividing a refractive index n ₁ of the light-emitting layer 4 (theta ₁ ≧ sin
⁻¹ (n ₂ / n ₁ )), the side surfaces of both the semiconductor layers 3 and 5 including the light emitting layer 4 are etched so as to be wider on the side closer to the light transmitting substrate 2. For example the refractive index _{n 1} of the light-emitting layer 4 is about 2.6, the refractive index _{n 2} of the insulating film 8 made of SiO ₂ is about ^1.5, and _{sin -1 (n 2 / n 1} ) = 35.2 since, in the present embodiment, as the angle theta ₁ is about 40 degrees, the side surfaces of the two semiconductor layers 3 and 5 including the light emitting layer 4 is etched to form a slope.

【００２０】本実施形態のＬＥＤチップ１を図示しない
配線基板にフェースダウンの状態で実装して、点灯させ
たところ、発光層４で発生し、発光層４とクラッド層と
の界面で全反射を繰り返しながら、発光層４と平行な向
きに進行して発光層４の端面に到達した光は、発光層４
の端面で光取り出し方向（透光性基板２側）に全反射さ
れるので、発光層４の端面から側方に放射される無駄な
光を少なくして、光取り出し効率を高めることができ
る。When the LED chip 1 of this embodiment is mounted face down on a wiring board (not shown) and turned on, the LED chip 1 is generated in the light emitting layer 4 and totally reflected at the interface between the light emitting layer 4 and the cladding layer. While repeating, the light traveling in the direction parallel to the light emitting layer 4 and reaching the end face of the light emitting layer 4
The light is totally reflected in the light extraction direction (the light-transmitting substrate 2 side) at the end face of the light emitting layer 4, so that useless light radiated laterally from the end face of the light emitting layer 4 can be reduced, and the light extraction efficiency can be increased.

【００２１】尚、本実施形態ではＬＥＤチップ１とし
て、フェースダウンの状態で配線基板に実装される構造
のものを例に説明を行ったが、ＬＥＤチップ１をフェー
スダウンの状態で配線基板に実装される構造のものに限
定する趣旨のものではなく、図２に示すようにフェース
アップの状態で配線基板に実装される場合には、発光層
４内を発光層４と平行な向きに進行する光が、発光層４
の端面で光の取り出し面側（透光性基板２と反対側）に
全反射されるように、発光層４の端面の法線Ｌ１と発光
層４に平行な面Ａとの成す角度θ_１が、絶縁膜８の屈折
率ｎ_２を発光層４の屈折率ｎ_１で除した値の逆正弦以上
となり（θ_１≧ｓｉｎ^−１（ｎ_２／ｎ_１））、透光性基
板２から遠い側ほど幅広となるように、発光層４を含む
両半導体層３，５の側面をエッチングなどの方法でカッ
トすれば良い。尚、図２中の７ａはｐ型半導体層５の上
面に形成された透光性の金属膜からなるｐ側電極であ
る。In this embodiment, the LED chip 1 has a structure in which the LED chip 1 is mounted on the wiring board in a face-down state. However, the LED chip 1 is mounted on the wiring board in a face-down state. The structure is not limited to the structure described above, and when the light emitting layer 4 is mounted on the wiring board in a face-up state as shown in FIG. The light is emitted from the light emitting layer 4
The angle θ ₁ between the normal L 1 of the end face of the light emitting layer 4 and the plane A parallel to the light emitting layer 4 so that the light is completely reflected on the light extraction surface side (the side opposite to the light transmitting substrate 2) at the end face of the light emitting layer 4. but it becomes the refractive index _{n 2} of the insulating film 8 over the arcsine of a value obtained by dividing a refractive index _{n 1} of the light-emitting layer ^{_{4 (θ 1 ≧ sin -1 (}} n 2 / n 1)), a transparent substrate 2 The side surfaces of the two semiconductor layers 3 and 5 including the light emitting layer 4 may be cut by a method such as etching so that the farther side becomes wider. Incidentally, 7a in FIG. 2 is a p-side electrode made of a light-transmitting metal film formed on the upper surface of the p-type semiconductor layer 5.

【００２２】（実施形態２）本実施形態のＬＥＤチップ
の断面図を図３に示す。尚、ＬＥＤチップ１の基本構成
は実施形態１と同様であるので、同一の構成要素には同
一の符号を付して、その説明は省略する。また、図３中
の矢印は発光層４で生じた光の内、発光層４と平行な方
向に進行して発光層４の端面に到達した光の光路の一例
を示している。(Embodiment 2) FIG. 3 is a sectional view of an LED chip according to this embodiment. Since the basic configuration of the LED chip 1 is the same as that of the first embodiment, the same components are denoted by the same reference numerals and description thereof will be omitted. Arrows in FIG. 3 indicate an example of an optical path of light that has traveled in a direction parallel to the light emitting layer 4 and has reached the end face of the light emitting layer 4 among the light generated in the light emitting layer 4.

【００２３】実施形態１では透光性基板２の側面が、発
光層４に平行な面と略直交しているのに対して、本実施
形態では透光性基板２の側面を、発光層４を含む両半導
体層３，５の側面と同様、発光層４に平行な面に対して
斜めにカットしており、透光性基板２の側面を発光層４
と平行な面に対して斜めに傾斜させることで、発光層４
から透光性基板２の側面に向かって進行する光の内、透
光性基板２の側面で光取り出し方向（図３の上側）へ全
反射される割合が増加し、光取り出し効率をさらに向上
させている。また直方体形状のＬＥＤチップ１では、チ
ップ側面に入射した光が全反射されてチップ内部を進行
した場合、入射角が変化しないために別の面でも再び全
反射されてしまい、チップ内で全反射を繰り返して進行
する所謂繰り返し完全反射が発生するが、図３に示すよ
うにチップ側面を傾斜させることで、繰り返し完全反射
が起こりにくくなり、光の取り出し効率が向上する。In the first embodiment, the side surface of the light-transmitting substrate 2 is substantially orthogonal to the plane parallel to the light emitting layer 4, whereas in the present embodiment, the side surface of the light transmitting substrate 2 is Are cut obliquely to a plane parallel to the light emitting layer 4 like the side surfaces of the semiconductor layers 3 and 5 including the light emitting layer 4.
The light emitting layer 4 is tilted obliquely with respect to a plane parallel to
Of the light traveling toward the side surface of the light-transmitting substrate 2 from the side, the ratio of the total reflection in the light extraction direction (upper side in FIG. 3) on the side surface of the light-transmitting substrate 2 increases, further improving the light extraction efficiency. Let me. In the case of the LED chip 1 having a rectangular parallelepiped shape, when light incident on the side surface of the chip is totally reflected and travels inside the chip, the incident angle does not change, so that the light is totally reflected again on another surface. The so-called repetitive perfect reflection that occurs by repeating the above steps occurs. However, by inclining the chip side face as shown in FIG. 3, the repetitive perfect reflection is less likely to occur and the light extraction efficiency is improved.

【００２４】また図３に示すＬＥＤチップ１では、絶縁
膜８の外側面に金属膜９ａ，９ｂを蒸着させており、さ
らにＬＥＤチップ１の下面側の絶縁膜８に蒸着させた金
属膜９ａをｎ型半導体層３と接合させ、ｎ型半導体層３
への配線部を金属膜９ａで兼用する構造としている。こ
こで、金属膜９ａによりｎ型半導体層３への配線部を兼
用しているので、ＬＥＤチップ１をフェースダウンの状
態で配線基板に実装する際には、ｎ側電極の給電部６に
比べて面積的に広い金属膜９ａにバンプを接合すること
ができ、ＬＥＤチップ１の配線基板への実装が容易にな
る。また、ｎ側電極の給電部６に比べて金属膜９ａの方
が面積が広いので、より大きなバンプを用いたり、複数
個のバンプを用いることができ、ＬＥＤチップ１と配線
基板との間の熱抵抗を小さくして、ＬＥＤチップ１の放
熱性を高めることができる。In the LED chip 1 shown in FIG. 3, metal films 9a and 9b are deposited on the outer surface of the insulating film 8, and the metal film 9a deposited on the insulating film 8 on the lower surface side of the LED chip 1 is also provided. bonding with the n-type semiconductor layer 3;
The structure is such that the metal film 9a also serves as a wiring portion to the wiring. Here, since the metal film 9a also serves as a wiring portion to the n-type semiconductor layer 3, when the LED chip 1 is mounted on a wiring board in a face-down state, compared with the power supply portion 6 of the n-side electrode. The bumps can be bonded to the metal film 9a which is large in area and area, and the mounting of the LED chip 1 on the wiring board becomes easy. In addition, since the metal film 9a has a larger area than the power supply section 6 of the n-side electrode, a larger bump or a plurality of bumps can be used, and the distance between the LED chip 1 and the wiring board can be increased. The heat resistance of the LED chip 1 can be improved by reducing the thermal resistance.

【００２５】また、絶縁膜８の外側に蒸着した金属膜９
ａ，９ｂは、入射した光を光の取り出し方向へ反射する
反射部としても機能するので、光の取り出し効率がさら
に向上するという効果が得られる。Further, a metal film 9 deposited outside the insulating film 8
Since a and 9b also function as reflectors for reflecting the incident light in the light extraction direction, the effect of further improving the light extraction efficiency can be obtained.

【００２６】尚、本実施形態では実施形態１のＬＥＤチ
ップ１において、チップ側面を発光層４と平行な面に対
して傾斜させるとともに、絶縁膜８の外側に金属膜９
ａ，９ｂを蒸着して、金属膜９ｂでｎ型半導体層３への
配線部を兼用しているが、後述の実施形態において、本
実施形態と同様に、チップ側面を発光層４と平行な面に
対して傾斜させたり、絶縁膜８の外側に金属膜９ａ，９
ｂを蒸着して、金属膜９ｂでｎ型半導体層３への配線部
を兼用したりしても良いことは言うまでもない。In this embodiment, in the LED chip 1 of the first embodiment, the side surface of the chip is inclined with respect to a plane parallel to the light emitting layer 4 and the metal film 9 is formed outside the insulating film 8.
Although a and 9b are deposited and the metal film 9b also serves as a wiring portion to the n-type semiconductor layer 3, in a later-described embodiment, similarly to this embodiment, the chip side surface is parallel to the light emitting layer 4. The metal films 9a and 9
It goes without saying that b may be deposited and the metal film 9b may also serve as the wiring portion to the n-type semiconductor layer 3.

【００２７】（実施形態３）本実施形態のＬＥＤチップ
の断面図を図４に示す。本実施形態では、サファイアの
ような透光性基板２の結晶上に、ＧａＮ系化合物半導体
のｎ型半導体層３、発光層４を含む量子井戸構造、及び
ｐ型半導体層５を順番に積層してある。そして、ｎ型半
導体層３及びｐ型半導体層５の各々には、ｎ側電極及び
ｐ側電極の給電部６，７が両半導体層３，５における透
光性基板２と反対側の面に設けてある。また、ｎ型及び
ｐ型の各半導体層３，５の側面及び下面には、ｎ側及び
ｐ側電極への給電部６，７の形成部位を除いて絶縁膜８
を形成してある。尚、本実施形態では絶縁膜８の材料と
して屈折率ｎ_２が約２．０の窒化ケイ素を用いている。
また、図４中の矢印は発光層４で生じた光の内、発光層
４と平行な方向に進行して発光層４の端面に到達した光
の光路の一例を示している。(Embodiment 3) FIG. 4 shows a sectional view of an LED chip of this embodiment. In the present embodiment, an n-type semiconductor layer 3 of a GaN-based compound semiconductor, a quantum well structure including a light-emitting layer 4, and a p-type semiconductor layer 5 are sequentially stacked on a crystal of a translucent substrate 2 such as sapphire. It is. In each of the n-type semiconductor layer 3 and the p-type semiconductor layer 5, power supply portions 6 and 7 of the n-side electrode and the p-side electrode are provided on the surfaces of the semiconductor layers 3 and 5 on the side opposite to the light-transmitting substrate 2. It is provided. The insulating film 8 is formed on the side and lower surfaces of the n-type and p-type semiconductor layers 3 and 5 except for the portions where the power supply portions 6 and 7 for the n-side and p-side electrodes are formed.
Is formed. In this embodiment the refractive index n ₂ is using about 2.0 of silicon nitride as a material of the insulating film 8.
Arrows in FIG. 4 indicate an example of an optical path of light emitted from the light emitting layer 4 that travels in a direction parallel to the light emitting layer 4 and reaches an end face of the light emitting layer 4.

【００２８】また、本実施形態のＬＥＤチップ１はフェ
ースダウンの状態で図示しない配線基板に実装され、Ｌ
ＥＤチップ１の周囲を屈折率ｎ_３が約１．４の透光性の
封止樹脂（図示せず）で封止している。The LED chip 1 of this embodiment is mounted face down on a wiring board (not shown).
Around the ED chip 1 is the refractive index n ₃ is sealed at about 1.4 of the translucent sealing resin (not shown).

【００２９】ここで、上述した実施形態１では発光層４
の端面の法線Ｌ１と、発光層４に平行な面Ａとの成す角
度θ_１が、絶縁膜８の屈折率ｎ_２を発光層４の屈折率ｎ
_１で除した値の逆正弦以上となるように、発光層４を含
む両半導体層３，５の側面をエッチングしているのに対
して、本実施形態では発光層４の端面を発光層４に平行
な面Ａと略直交させている（すなわち発光層４の端面の
法線を発光層４に平行な面Ａと平行させている）。そし
て、発光層４の側面に接する絶縁膜８の外側面の法線Ｌ
２と、発光層４に平行な面Ａとの成す角度（鋭角）θ_２
が、封止樹脂の屈折率ｎ_３を絶縁膜の屈折率ｎ_２で除し
た値の逆正弦以上となるように（θ_２≧ｓｉｎ^−１（ｎ
_３／ｎ_２））、絶縁膜８の外側面をエッチングなどの方
法でカットして傾斜面８ａを形成している。例えば絶縁
膜８の屈折率ｎ_２が約２．０、封止樹脂の屈折率ｎ_３が
約１．４の場合、ｓｉｎ^−１（ｎ_３／ｎ_２）≒４４とな
るので、本実施形態では角度θ_２が約４５度となるよう
に、発光層４に接する絶縁膜８の外側面をエッチングし
て、傾斜面８ａを形成している。このように、発光層４
に接する絶縁膜８の外側面を発光層４と平行な面Ａに対
して傾斜させることで、発光層４と平行な向きに進行す
る光が、絶縁膜８の外側面に設けた傾斜面８ａで光の取
り出し方向へ全反射されるから、従来のＬＥＤチップ１
に比べて光の取り出し方向への光の取り出し効率を向上
させることができる。Here, in the first embodiment, the light emitting layer 4
The angle θ ₁ between the normal L 1 to the end face of the light emitting layer 4 and the plane A parallel to the light emitting layer 4 changes the refractive index n ₂ of the insulating film 8 to the refractive index n of the light emitting layer 4.
The side surfaces of the two semiconductor layers 3 and 5 including the light-emitting layer 4 are etched so as to have a value equal to or greater than the inverse sine of the value obtained by dividing by ₁ , whereas in the present embodiment, the end surface of the light-emitting layer 4 is (That is, the normal of the end face of the light emitting layer 4 is parallel to the plane A parallel to the light emitting layer 4). Then, the normal L to the outer surface of the insulating film 8 in contact with the side surface of the light emitting layer 4
2 and the plane A parallel to the light emitting layer 4 (acute angle) θ ₂
But so that the refractive index n ₃ of the sealing resin than arcsine of a value obtained by dividing the refractive index n ₂ of the insulating film ^(θ ₂ ≧ sin -1 (n
₃ / n ₂ )), the outer surface of the insulating film 8 is cut by a method such as etching to form the inclined surface 8a. For example the refractive index _{n 2} is approximately 2.0 of the insulating film 8, when the refractive index _{n 3} of the sealing resin is about ^1.4, since the _{sin -1 (n 3 / n 2} ) ≒ 44, the present embodiment in such an angle theta ₂ is about 45 degrees, the outer surface of the insulating film 8 in contact with the light-emitting layer 4 is etched to form an inclined surface 8a. Thus, the light emitting layer 4
Is inclined with respect to a plane A parallel to the light emitting layer 4 so that light traveling in a direction parallel to the light emitting layer 4 can be inclined by the inclined surface 8 a provided on the outer surface of the insulating film 8. Is totally reflected in the light extraction direction by the conventional LED chip 1
It is possible to improve the light extraction efficiency in the light extraction direction as compared with the above.

【００３０】（実施形態４）本実施形態のＬＥＤチップ
の断面図を図５に示す。本実施形態では、サファイアの
ような透光性基板２の結晶上に、ＧａＮ系化合物半導体
のｎ型半導体層３、屈折率ｎ_１が約２．６の発光層４を
含む量子井戸構造、及びｐ型半導体層５を順番に積層し
てある。そして、ｎ型半導体層３及びｐ型半導体層５の
各々には、ｎ側電極及びｐ側電極の給電部６，７が両半
導体層３，５における透光性基板２と反対側の面に設け
てある。また、ｎ型及びｐ型の各半導体層３，５と発光
層４の側面及び下面には、ｎ側及びｐ側電極への給電部
６，７の形成部位を除いて、屈折率ｎ_２が約１．５のＳ
ｉＯ_２からなる絶縁膜８を形成してある。このＬＥＤチ
ップ１はフェースダウンの状態で図示しない実装基板に
実装され、ＬＥＤチップ１の周囲を屈折率ｎ_３が約１．
２の透光性の封止樹脂（図示せず）で封止している。
尚、図４中の矢印は発光層４で生じた光の内、発光層４
と平行な方向に進行して発光層４の端面に到達した光の
光路の一例を示している。(Embodiment 4) FIG. 5 is a sectional view of an LED chip according to this embodiment. In the present embodiment, a quantum well structure including an n-type semiconductor layer 3 of a GaN-based compound semiconductor and a light emitting layer 4 having a refractive index n ₁ of about 2.6 on a crystal of a light transmitting substrate 2 such as sapphire; The p-type semiconductor layers 5 are sequentially stacked. In each of the n-type semiconductor layer 3 and the p-type semiconductor layer 5, power supply portions 6 and 7 of the n-side electrode and the p-side electrode are provided on the surfaces of the semiconductor layers 3 and 5 on the side opposite to the light-transmitting substrate 2. It is provided. The refractive index n ₂ is set on the side surfaces and the lower surface of each of the n-type and p-type semiconductor layers 3 and 5 and the light emitting layer 4 except for the portions where the power supply portions 6 and 7 for the n-side and p-side electrodes are formed. About 1.5 S
An insulating film 8 made of iO ₂ is formed. The LED chip 1 is mounted on a mounting board (not shown) in a state of face-down, the periphery of the LED chip 1 is a refractive index n ₃ of about 1.
2 and is sealed with a light-transmitting sealing resin (not shown).
The arrow in FIG. 4 indicates the light emitting layer 4 of the light generated in the light emitting layer 4.
3 shows an example of an optical path of light that travels in a direction parallel to FIG.

【００３１】ところで、上述した各実施形態のＬＥＤチ
ップ１では、発光層４の端面の法線Ｌ１、又は、発光層
４の端面に接する絶縁膜８の外側面８ａの法線Ｌ２と、
発光層４に平行な面Ａとがそれぞれ成す角θ_１，θ
_２が、θ_１≧ｓｉｎ^−１（ｎ_２／ｎ_１）、θ_２≧ｓｉｎ
^−１（ｎ_３／ｎ_２）なる条件を満たすように、発光層４
の端面、又は、発光層４の端面に接する絶縁膜８の外側
面８ａの内の一方のみを、発光層４と平行な面Ａに対し
て傾斜させているが、ＬＥＤチップ１の大型化に伴って
電極構造が複雑化した場合、上記角度θ_１，θ_２を単独
で大きくできない場合も想定される。また、電極構造が
比較的単純な構造であったとしても、使用する絶縁膜８
や封止樹脂の材料によっては、発光層４と絶縁膜８との
屈折率ｎ_１，ｎ_２の差、絶縁膜８と封止樹脂との屈折率
ｎ_２，ｎ_３の差が小さくなって、上記の条件式を満たす
ために角度θ_１，θ_２の値を製作が困難なほど大きい値
に設定しなければならない場合も考えられる。By the way, in the LED chip 1 of each embodiment described above, the normal L1 of the end face of the light emitting layer 4 or the normal L2 of the outer face 8a of the insulating film 8 which is in contact with the end face of the light emitting layer 4,
The angles θ ₁ and θ formed by the plane A parallel to the light emitting layer 4 respectively.
₂ is θ ₁ ≧ sin ⁻¹ (n ₂ / n ₁ ), θ ₂ ≧ sin
^-1 (n ₃ / n ₂ ) so as to satisfy the condition of
, Or only one of the outer surfaces 8a of the insulating film 8 in contact with the end surface of the light emitting layer 4 is inclined with respect to the plane A parallel to the light emitting layer 4. If the electrode structure is complicated, the angles θ ₁ and θ ₂ may not be increased alone. Even if the electrode structure is relatively simple, the insulating film 8 to be used can be used.
Depending on the material of the sealing resin, the difference between the refractive indexes n ₁ and n ₂ between the light emitting layer 4 and the insulating film 8 and the difference between the refractive indexes n ₂ and n ₃ between the insulating film 8 and the sealing resin become small. In some cases, the values of the angles θ ₁ and θ ₂ must be set to values that are so large that production is difficult to satisfy the above conditional expressions.

【００３２】そこで、本実施形態では図５に示すよう
に、発光層４の端面の法線Ｌ１と面Ａとの成す第１の角
度（鋭角）がθ_１となるように、発光層４の端面を面Ａ
に対して傾斜させるとともに、発光層４の端面に接する
絶縁膜８の外側面８ａの法線Ｌ２と面Ａとの成す第２の
角度（鋭角）が第１の角度θ_１よりも大きい角度θ_２と
なるように、発光層４の端面が接する絶縁膜８の外側面
８ａを面Ａに対して傾斜させている。[0032] Therefore, in the present embodiment, as shown in FIG. 5, as the first angle formed between the normal line L1 and the surface A of the end face of the light-emitting layer 4 (acute) becomes theta _1, the light-emitting layer 4 End face to face A
And a second angle (acute angle) between the normal L2 of the outer surface 8a of the insulating film 8 and the surface A in contact with the end surface of the light emitting layer 4 is larger than the _first angle θ1. ₂ , the outer surface 8a of the insulating film 8 with which the end surface of the light emitting layer 4 contacts is inclined with respect to the surface A.

【００３３】ここで、上記の角度θ_１を、絶縁膜８の屈
折率ｎ_２を発光層４の屈折率ｎ_１で除した値の逆正弦よ
りも小さい値とし（θ_１＜ｓｉｎ^−１（ｎ_２／
ｎ_１））、且つ、第２の角度θ_２と第１の角度θ_１との
差に、発光層４の屈折率ｎ_１を絶縁膜８の屈折率ｎ_２で
除した値に角度θ_１の正弦を乗じた値の逆正弦を加算し
た値αを、基板実装後の完成状態において絶縁膜８の外
側面が接する封止樹脂の屈折率ｎ_３を絶縁膜８の屈折率
ｎ_２で除した値の逆正弦以上とするように（α＝（θ_２
−θ_１）＋ｓｉｎ^−１（（ｎ_１／ｎ_２）・ｓｉｎθ_１）
≧ｓｉｎ^−１（ｎ_３／ｎ _２））、角度θ_１，θ_２の値を
設定している。例えば発光層４の屈折率ｎ_１が約２．
６、絶縁膜８の屈折率ｎ_２が約１．５、封止樹脂の屈折
率ｎ_３が約１．２の場合は、θ_１＜ｓｉｎ^−１（ｎ_２／
ｎ_１）＝３５．２、α≧ｓｉｎ^−１（ｎ_３／ｎ_２）＝５
３．１となるので、上記の条件式を満足するように、本
実施形態では角度θ_１＝２５°、角度θ_２＝４０°とし
ている。Here, the angle θ₁Of the insulating film 8
Folding ratio n₂Is the refractive index n of the light emitting layer 4₁Arc sine of the value divided by
Smaller value (θ₁<Sin^-1(N₂/
n₁)) And the second angle θ₂And the first angle θ₁With
The difference is the refractive index n of the light emitting layer 4.₁Is the refractive index n of the insulating film 8₂so
Divided by the angle θ₁Add the inverse sine of the value multiplied by the sine of
The value α outside the insulating film 8 in the completed state after mounting on the substrate.
Refractive index n of the sealing resin with which the side surface contacts₃Is the refractive index of the insulating film 8
n₂(Α = (θ₂
−θ₁) + Sin^-1((N₁/ N₂) · Sin θ₁)
≧ sin^-1(N₃/ N ₂)), Angle θ₁, Θ₂The value of
You have set. For example, the refractive index n of the light emitting layer 4₁Is about 2.
6. Refractive index n of insulating film 8₂Is about 1.5, refraction of sealing resin
Rate n₃Is about 1.2, θ₁<Sin^-1(N₂/
n₁) = 35.2, α ≧ sin^-1(N₃/ N₂) = 5
3.1, so that the above conditional expression is satisfied.
In the embodiment, the angle θ₁= 25 °, angle θ₂= 40 °
ing.

【００３４】この時、α＝６２°となり、発光層４内を
発光層４と平行な方向に進行する光が、発光層４と絶縁
膜８との界面で屈折し、絶縁膜８の外側面に設けた傾斜
面８ａに対して臨界条件（α≧ｓｉｎ^−１（ｎ_３／
ｎ_２））を超える入射角αで入射するので、絶縁膜８の
外側面に設けた傾斜面８ａで光の取り出し方向へ全反射
されることになり、従来のＬＥＤチップ１に比べて光の
取り出し方向への光の取り出し効率が向上する。At this time, α = 62 °, and the light traveling in the light emitting layer 4 in the direction parallel to the light emitting layer 4 is refracted at the interface between the light emitting layer 4 and the insulating film 8, and the outer surface of the insulating film 8 Critical condition (α ≧ sin ⁻¹ (n ₃ /
n ₂ )), the light is totally reflected in the light extraction direction by the inclined surface 8 a provided on the outer surface of the insulating film 8. Light extraction efficiency in the light extraction direction is improved.

【００３５】上述した実施形態１〜３のＬＥＤチップ１
のように、発光層４の端面、又は、発光層４の端面が接
する絶縁膜８の外側面の内の一方のみを傾斜させる場合
は、角度θ_１，θ_２が大きい値となって、製作が難しい
場合があるが、本実施形態では発光層４の端面、およ
び、発光層４の端面が接する絶縁膜８の外側面を、それ
ぞれ、発光層４と平行な面Ａに対して、製作可能な角度
θ_１，θ_２で傾斜させているので、ＬＥＤチップ１の製
造が容易であり、発光層４内を発光層４と平行な方向に
進行する光を、光の取り出し方向に全反射させることが
できる。また、発光層４及び絶縁膜８として、屈折率ｎ
_１と屈折率ｎ_２との差が小さいような組み合わせの材料
を用いたり、絶縁膜８及び封止樹脂として、屈折率ｎ_２
と屈折率ｎ _３との差が小さいような組み合わせの材料を
用いることができ、絶縁膜８や封止樹脂に使用できる材
料の種類が増えるから、材料選択の自由度が向上すると
いう利点もある。The LED chips 1 of the first to third embodiments described above
The end face of the light emitting layer 4 or the end face of the light emitting layer 4
When only one of the outer surfaces of the insulating film 8 is inclined
Is the angle θ₁, Θ₂Is large and difficult to manufacture
In some cases, in this embodiment, the end face of the light emitting layer 4 and
And the outer surface of the insulating film 8 with which the end surface of the light emitting layer 4 is in contact.
The angle which can be manufactured with respect to the plane A parallel to the light emitting layer 4
θ₁, Θ₂The LED chip 1
It is easy to fabricate the light emitting layer 4 in a direction parallel to the light emitting layer 4.
The traveling light can be totally reflected in the light extraction direction.
it can. The light emitting layer 4 and the insulating film 8 have a refractive index n
₁And the refractive index n₂Combination material with small difference from
Or the refractive index n as the insulating film 8 and the sealing resin.₂
And the refractive index n ₃Materials that have a small difference from
Materials that can be used and can be used for the insulating film 8 and the sealing resin
As the number of types of ingredients increases, the degree of freedom in material selection increases
There is also an advantage.

【００３６】尚、本実施形態では発光層４の端面と、発
光層４の端面に接する絶縁膜８の外側面とを非平行とし
ているが（θ_１≠θ_２）、図６に示すように、θ_１＜ｓ
ｉｎ ^−１（ｎ_２／ｎ_１））、α≧ｓｉｎ^−１（ｎ_３／ｎ
_２）なる条件を満足するように角度θ_１，θ_２を設定す
るとともに、発光層４の端面と、発光層４の端面に接す
る絶縁膜８の外側面とを略平行としても良く（θ_１＝θ
_２）、上述と同様に光の取り出し効率を向上させること
ができる。In the present embodiment, the end face of the light emitting layer 4 is
The outer surface of the insulating film 8 that is in contact with the end surface of the optical layer 4 is non-parallel.
(Θ₁≠ θ₂), As shown in FIG.₁<S
in ^-1(N₂/ N₁)), Α ≧ sin^-1(N₃/ N
₂) To satisfy the condition₁, Θ₂Set
And contact the end face of the light emitting layer 4 and the end face of the light emitting layer 4
May be substantially parallel to the outer surface of the insulating film 8 (θ₁= Θ
₂), To improve the light extraction efficiency as described above.
Can be.

【００３７】ところで、発光層４の端面と、発光層４の
端面に接する絶縁膜８の外側面とを略平行にした場合、
半導体層の厚みによっては、図６に示すように、半導体
層の端面と絶縁膜８の外側面との間で全反射を複数回繰
り返した後に、透光性基板２を通してＬＥＤチップ１の
外部へ放射される場合が考えられ、光路が長くなること
で光量の減衰や配光むらが発生する可能性がある。それ
に対して、図５に示すように発光層４の端面と、発光層
４の端面に接する絶縁膜８の外側面とを非平行にすれ
ば、絶縁膜８の外側面で全反射した光は、そのまま光の
取り出し面側に放射され、上述のような繰り返し反射は
発生しないので、発光層４の端面と発光層４の端面に接
する絶縁膜８の外側面とを非平行にした場合は略平行に
した場合に比べて、光の取り出し効率がさらに向上する
という利点がある。When the end surface of the light emitting layer 4 and the outer surface of the insulating film 8 in contact with the end surface of the light emitting layer 4 are substantially parallel,
Depending on the thickness of the semiconductor layer, as shown in FIG. 6, after total reflection is repeated a plurality of times between the end surface of the semiconductor layer and the outer surface of the insulating film 8, the light is transmitted to the outside of the LED chip 1 through the translucent substrate 2. It is conceivable that the light is radiated, and there is a possibility that attenuation of the light amount or uneven light distribution may occur due to the longer optical path. On the other hand, if the end surface of the light emitting layer 4 is not parallel to the outer surface of the insulating film 8 in contact with the end surface of the light emitting layer 4 as shown in FIG. Since the light is radiated to the light extraction surface as it is and the above-described repetitive reflection does not occur, it is almost impossible to make the end surface of the light emitting layer 4 and the outer surface of the insulating film 8 in contact with the end surface of the light emitting layer 4 non-parallel. There is an advantage that the light extraction efficiency is further improved as compared with the case where they are parallel.

【００３８】（実施形態５）本発明の実施形態５を図７
（ａ）（ｂ）を参照して説明する。尚、ＬＥＤチップ１
の基本的な構成は実施形態１と同様であるので、同一の
構成要素には同一の符号を付して、その説明は省略す
る。(Embodiment 5) FIG. 7 shows Embodiment 5 of the present invention.
Description will be made with reference to (a) and (b). In addition, LED chip 1
Is basically the same as that of the first embodiment, the same components are denoted by the same reference numerals, and description thereof will be omitted.

【００３９】図７（ａ）は本実施形態のＬＥＤチップ１
の電極配置を説明する説明図である。ＬＥＤチップ１の
発光面は一辺が約１ｍｍの正方形をしており、従来のＬ
ＥＤチップに比べて大型である。ここで、複数の短冊状
のｎ側電極６ａと、複数の短冊状のｐ側電極７ａとが、
平行且つ等間隔に交互に並行配列され、複数のｎ側電極
６ａの配列方向と交差する方向における一方の端を互い
に連結して櫛形に形成するとともに、複数のｐ側電極７
ａの配列方向と交差する方向における他方の端を互いに
連結して櫛形に形成している。そして、複数のｎ側電極
６ａを連結する連結部６ｃに給電部６を形成するととも
に、複数のｐ側電極７ａを連結する連結部７ｃに給電部
７を形成しており、複数のｎ側電極６ａと複数のｐ側電
極７ａとを等間隔で交互に並行配列することで、発光面
の輝度を均一にできる。尚、ｎ側及びｐ側電極６ａ，７
ａやその給電部６，７は例えばＡｕ或いはＡｌを蒸着す
るなどして形成される。FIG. 7A shows the LED chip 1 of the present embodiment.
FIG. 4 is an explanatory diagram illustrating the electrode arrangement of FIG. The light emitting surface of the LED chip 1 has a square shape with a side of about 1 mm.
Larger than ED chips. Here, the plurality of strip-shaped n-side electrodes 6a and the plurality of strip-shaped p-side electrodes 7a are
One end in a direction intersecting with the arrangement direction of the plurality of n-side electrodes 6 a is alternately arranged in parallel and at equal intervals, and is connected to each other to form a comb shape.
The other ends in a direction intersecting with the arrangement direction of a are connected to each other to form a comb shape. The power supply section 6 is formed at the connection section 6c connecting the plurality of n-side electrodes 6a, and the power supply section 7 is formed at the connection section 7c connecting the plurality of p-side electrodes 7a. By alternately arranging the 6a and the plurality of p-side electrodes 7a at equal intervals in parallel, the luminance of the light emitting surface can be made uniform. The n-side and p-side electrodes 6a, 7
a and its power supply parts 6 and 7 are formed, for example, by depositing Au or Al.

【００４０】ここで、積層方向において透光性基板２に
近い側に形成された複数のｎ側電極６ａは、給電部６か
ら遠ざかるにつれて、幅寸法が徐々に狭くなっている。
また、ｎ側電極６ａ上では給電部６から離れた点ほど、
その近傍の発光層４を所定の光量で発光させるのに必要
な電流密度は小さくなる。したがって、ｎ側電極６ａの
幅寸法を、必要な電流密度の減少に合わせて狭めれば、
ｎ側電極６ａに対向するｐ側電極７ａと接続されたｐ型
半導体層５や発光層４の面積を大きく取ることができ、
発光効率がさらに向上する。また、ＬＥＤチップ１の半
導体層形成側のチップ面の全域に亘るように幅広の電極
を形成した場合、各々の電極が半導体層形成側のチップ
面から放射される光の反射部として機能することにな
り、光の取り出し効率が向上するという利点がある。ま
た、複数のｎ側電極６ａにおいて櫛の歯に相当する部位
の互いに連結されていない側の端部と、複数のｐ側電極
７ａにおいて櫛の歯に相当する部位の互いに連結されて
いない側の端部とは、先端部に電界が集中しやすいた
め、先端部に丸みを持たせることで電界の集中を抑える
ことができ、発光輝度をさらに均一にできる。Here, the width of the plurality of n-side electrodes 6 a formed on the side closer to the light-transmitting substrate 2 in the laminating direction gradually decreases as the distance from the power supply section 6 increases.
On the n-side electrode 6a, the further away from the power supply unit 6, the more
The current density required to cause the adjacent light emitting layer 4 to emit light with a predetermined amount of light is reduced. Therefore, if the width of the n-side electrode 6a is reduced in accordance with the required current density,
The area of the p-type semiconductor layer 5 and the light-emitting layer 4 connected to the p-side electrode 7a facing the n-side electrode 6a can be increased,
The luminous efficiency is further improved. Further, when wide electrodes are formed so as to cover the entire chip surface on the semiconductor layer forming side of the LED chip 1, each electrode functions as a reflecting portion of light emitted from the semiconductor layer forming side chip surface. And there is an advantage that the light extraction efficiency is improved. Further, the ends of the plurality of n-side electrodes 6a corresponding to the teeth of the comb not connected to each other and the ends of the plurality of p-side electrodes 7a corresponding to the teeth of the comb which are not connected to each other. In the end portion, the electric field tends to be concentrated at the front end portion. Therefore, by making the front end portion round, the concentration of the electric field can be suppressed, and the emission luminance can be made more uniform.

【００４１】また図７（ｂ）は、図７（ａ）のＢ−Ｂ’
線断面図を示しており、絶縁膜８の材料には屈折率ｎ_２
が約１．５のＳｉＯ_２を用いている。また、このＬＥＤ
チップ１はフェースダウンの状態で図示しない実装基板
に実装され、ＬＥＤチップ１の周囲を屈折率ｎ_３が約
１．２の透光性を有する封止樹脂（図示せず）で封止し
ている。FIG. 7B is a sectional view taken along the line BB 'of FIG.
FIG. 4 shows a cross-sectional view of the line, and the material of the insulating film 8 has a refractive index n _2.
Uses about 1.5 SiO ₂ . Also, this LED
Chip 1 is mounted on a mounting board (not shown) in a state of face-down, the periphery of the LED chip 1 is a refractive index n ₃ is sealed with a sealing resin having about 1.2 translucent (not shown) I have.

【００４２】ここで、本実施形態においても実施形態４
と同様に、発光層４（屈折率ｎ_１＝約２．６）の端面の
法線Ｌ１が発光層４と平行な面Ａと成す角度をθ_１、発
光層４の端面と接する絶縁膜８の外側面の法線Ｌ２が発
光層４と平行な面Ａと成す角度をθ_２とすると、角度θ
_１を、絶縁膜８の屈折率ｎ_２を発光層４の屈折率ｎ_１で
除した値の逆正弦より小さい値とし（θ_１＜ｓｉｎ^−１
（ｎ_２／ｎ_１））、且つ、角度θ_２と角度θ_１との差
に、発光層４の屈折率ｎ_１を絶縁膜８の屈折率ｎ _２で除
した値に角度θ_１の正弦を乗じた値の逆正弦を加算した
値αを、基板実装後の完成状態において絶縁膜８の外側
面が接する封止樹脂の屈折率ｎ_３を絶縁膜８の屈折率ｎ
_２で除した値の逆正弦以上とするように（α＝（θ_２−
θ_１）＋ｓｉｎ^−１（（ｎ_１／ｎ_２）・ｓｉｎθ_１）≧
ｓｉｎ^−１（ｎ_３／ｎ_２））、角度θ_１，θ_２の値を設
定している。例えば発光層４の屈折率ｎ_１が約２．６、
絶縁膜８の屈折率ｎ_２が約１．５、封止樹脂の屈折率ｎ
_３が約１．２の場合は、θ_１＜ｓｉｎ^−１（ｎ_２／
ｎ_１）＝３５．２、α≧ｓｉｎ^−１（ｎ_３／ｎ_２）＝５
３．１となるので、上記の条件式を満足するように、本
実施形態では角度θ_１＝２５°、角度θ_２＝４０°とし
ている。Here, also in this embodiment, the fourth embodiment
Similarly, the light emitting layer 4 (refractive index n₁= About 2.6) of the end face
The angle between normal L1 and plane A parallel to light emitting layer 4 is θ₁, Departure
A normal L2 on the outer surface of the insulating film 8 in contact with the end surface of the optical layer 4 is emitted.
The angle formed by the plane A parallel to the optical layer 4 is θ₂Then the angle θ
₁Is the refractive index n of the insulating film 8₂Is the refractive index n of the light emitting layer 4₁so
Value smaller than the inverse sine of the divided value (θ₁<Sin^-1
(N₂/ N₁)) And the angle θ₂And angle θ₁Difference with
The refractive index n of the light emitting layer 4₁Is the refractive index n of the insulating film 8 ₂Divided by
Angle θ₁Added the inverse sine of the value multiplied by the sine of
The value α is set outside the insulating film 8 in the completed state after mounting on the substrate.
Refractive index n of sealing resin in contact with the surface₃Is the refractive index n of the insulating film 8
₂(Α = (θ₂−
θ₁) + Sin^-1((N₁/ N₂) · Sin θ₁) ≧
sin^-1(N₃/ N₂)), Angle θ₁, Θ₂Set the value of
I have decided. For example, the refractive index n of the light emitting layer 4₁Is about 2.6,
Refractive index n of insulating film 8₂Is about 1.5, the refractive index n of the sealing resin
₃Is about 1.2, θ₁<Sin^-1(N₂/
n₁) = 35.2, α ≧ sin^-1(N₃/ N₂) = 5
3.1, so that the above conditional expression is satisfied.
In the embodiment, the angle θ₁= 25 °, angle θ₂= 40 °
ing.

【００４３】この時、α＝６２°となり、発光層４内を
発光層４と平行な方向に進行する光が、発光層４と絶縁
膜８との界面で屈折し、絶縁膜８の外側面に設けた傾斜
面８ａに対して臨界条件（α≧ｓｉｎ^−１（ｎ_３／
ｎ_２））を超える入射角αで入射するので、絶縁膜８の
外側面に設けた傾斜面８ａで光の取り出し方向へ全反射
されることになり、従来のＬＥＤチップ１に比べて光の
取り出し方向への光の取り出し効率が向上する。At this time, α = 62 °, and light traveling in the light emitting layer 4 in the direction parallel to the light emitting layer 4 is refracted at the interface between the light emitting layer 4 and the insulating film 8, and the outer surface of the insulating film 8 Critical condition (α ≧ sin ⁻¹ (n ₃ /
n ₂ )), the light is totally reflected in the light extraction direction by the inclined surface 8 a provided on the outer surface of the insulating film 8. Light extraction efficiency in the light extraction direction is improved.

【００４４】本実施形態のような複雑な電極構造を有し
ている場合、発光層４内を発光層４と平行な方向に進行
する光が、電極で乱反射されるなどして、光の取り出し
面側への光の取り出し効率が減少する可能性があるが、
図７（ｂ）に示すように、ｎ側電極６ａによって複数に
分かれている発光層４の端面を斜めにカットするととも
に、発光層４の端面に接する絶縁膜８の外側面を斜めに
カットしているので、発光層４内を発光層４と平行な方
向に進行する光を、光の取り出し方向に全反射させるこ
とができ、従来のＬＥＤチップ１に比べて光の取り出し
効率を向上させることができる。尚、本実施形態では、
実施形態１のＬＥＤチップ１においてｎ側電極及びｐ側
電極を櫛形に形成して、ｎ側電極の櫛の歯に相当する部
位と、ｐ側電極の櫛の歯に相当する部位とを、平行且つ
等間隔に交互に配置しているが、他の実施形態のＬＥＤ
チップ１において本実施形態の電極構造を適用しても良
いことは言うまでもない。In the case of having a complicated electrode structure as in the present embodiment, light that travels in the light emitting layer 4 in a direction parallel to the light emitting layer 4 is diffusely reflected by the electrode, and the light is extracted. There is a possibility that the light extraction efficiency to the surface side may decrease,
As shown in FIG. 7B, the end surface of the light emitting layer 4 divided into a plurality by the n-side electrode 6a is cut obliquely, and the outer surface of the insulating film 8 in contact with the end surface of the light emitting layer 4 is cut obliquely. Therefore, light traveling in the light emitting layer 4 in a direction parallel to the light emitting layer 4 can be totally reflected in the light extraction direction, and the light extraction efficiency can be improved as compared with the conventional LED chip 1. Can be. In this embodiment,
In the LED chip 1 of the first embodiment, the n-side electrode and the p-side electrode are formed in a comb shape, and a portion corresponding to the comb teeth of the n-side electrode and a portion corresponding to the comb teeth of the p-side electrode are parallel to each other. And are arranged alternately at equal intervals, but LEDs of other embodiments
It goes without saying that the electrode structure of the present embodiment may be applied to the chip 1.

【００４５】（実施形態６）本発明の実施形態６を図８
を参照して説明する。上述した実施形態４では、透光性
基板２上にｎ型半導体層３と発光層４を含む量子井戸構
造とｐ型半導体層５とを順番に積層したｐｎ接合部を１
組だけ形成しているのに対して、本実施形態では、ｎ型
半導体層３と発光層４を含む量子井戸構造とｐ型半導体
層５とを順番に積層したｐｎ接合部１０ａ〜１０ｃを３
組積み重ねた構造を有しており、１つのＬＥＤチップ１
内に発光層４が３層存在するので、実施形態４に比べて
１個当たりのＬＥＤチップ１の光量を増大させることが
できる。尚、ＬＥＤチップ１の基本構成は実施形態４と
同様であるので、同一の構成要素には同一の符号を付し
て、その説明は省略する。(Embodiment 6) FIG. 8 shows Embodiment 6 of the present invention.
This will be described with reference to FIG. In the fourth embodiment described above, a pn junction in which a quantum well structure including an n-type semiconductor layer 3 and a light-emitting layer 4 and a p-type semiconductor layer 5 are sequentially stacked on a light-transmitting substrate 2 is formed as one pn junction.
In the present embodiment, only the pn junctions 10 a to 10 c in which the quantum well structure including the n-type semiconductor layer 3 and the light emitting layer 4 and the p-type semiconductor layer 5 are sequentially stacked are formed.
One LED chip 1 having a stacked structure
Since there are three light emitting layers 4 therein, the amount of light per LED chip 1 can be increased as compared with the fourth embodiment. Since the basic configuration of the LED chip 1 is the same as that of the fourth embodiment, the same components are denoted by the same reference numerals and description thereof will be omitted.

【００４６】本実施形態では、半導体層のうち透光性基
板２から最も遠いｐ型半導体層５の表面と、各ｐｎ接合
部１０ａ〜１０ｃの端面とを絶縁膜８で覆っているが、
絶縁膜８の材料としては、屈折率ｎ_２が約１．５のＳｉ
Ｏ_２を用いている。また、このＬＥＤチップ１はフェー
スダウンの状態で図示しない実装基板に実装され、チッ
プの周囲は屈折率ｎ_３が約１．２の透光性の封止樹脂
（図示せず）で封止されている。In the present embodiment, the surface of the p-type semiconductor layer 5 farthest from the light-transmitting substrate 2 of the semiconductor layers and the end faces of the pn junctions 10a to 10c are covered with the insulating film 8.
As the material of the insulating film 8, a refractive index _{n 2} of about 1.5 Si
O ₂ is used. Further, the LED chip 1 is mounted on a mounting board (not shown) in a state of face-down, around the tip refractive index n ₃ is sealed at about 1.2 transparent sealing resin (not shown) ing.

【００４７】ここで、各ｐｎ接合部１０ａ〜１０ｃの端
面の形状は、実施形態４で説明した図５に示すＬＥＤチ
ップ１と同様であり、発光層４（屈折率ｎ_１＝約２．
６）の端面の法線Ｌ１が発光層４と平行な面Ａと成す角
度をθ_１、発光層４の端面と接する絶縁膜８の外側面の
法線Ｌ２が発光層４と平行な面Ａと成す角度をθ_２とす
ると、角度θ_１を、絶縁膜８の屈折率ｎ_２を発光層４の
屈折率ｎ_１で除した値の逆正弦より小さい値とし（θ_１
＜ｓｉｎ^−１（ｎ_２／ｎ_１））、且つ、角度θ_２と角度
θ_１との差に、発光層４の屈折率ｎ_１を絶縁膜８の屈折
率ｎ_２で除した値に角度θ_１の正弦を乗じた値の逆正弦
を加算した値αを、基板実装後の使用状態において絶縁
膜８の外側面が接する封止樹脂の屈折率ｎ_３を絶縁膜８
の屈折率ｎ _２で除した値の逆正弦以上とするように（α
＝（θ_２−θ_１）＋ｓｉｎ^−１（（ｎ_１／ｎ_２）・ｓｉ
ｎθ_１）≧ｓｉｎ^−１（ｎ_３／ｎ_２））、角度θ_１，θ
_２の値を設定している。例えば発光層４の屈折率ｎ_１が
約２．６、絶縁膜８の屈折率ｎ_２が約１．５、封止樹脂
の屈折率ｎ_３が約１．２の場合は、θ_１＜ｓｉｎ
^−１（ｎ_２／ｎ_１）＝３５．２、α≧ｓｉｎ^−１（ｎ_３
／ｎ_２）＝５３．１となるので、上記の条件式を満足す
るように、本実施形態では角度θ_１＝２５°、角度θ _２
＝４０°としている。Here, the ends of the respective pn junctions 10a to 10c
The shape of the surface is the same as the LED chip shown in FIG.
The light emitting layer 4 (refractive index n₁= About 2.
6) The angle formed by the normal L1 of the end face to the plane A parallel to the light emitting layer 4
Degree θ₁Of the outer surface of the insulating film 8 in contact with the end surface of the light emitting layer 4
The angle between normal L2 and plane A parallel to light emitting layer 4 is θ₂Toss
The angle θ₁Is the refractive index n of the insulating film 8₂Of the light emitting layer 4
Refractive index n₁Is smaller than the inverse sine of the value divided by (θ₁
<Sin^-1(N₂/ N₁)) And the angle θ₂And angle
θ₁And the refractive index n of the light emitting layer 4₁Of the insulating film 8
Rate n₂Angle θ₁Inverse sine of sine multiplied by
Is insulated in the state of use after mounting on the board
The refractive index n of the sealing resin with which the outer surface of the film 8 contacts₃To the insulating film 8
Refractive index n ₂(Α)
= (Θ₂−θ₁) + Sin^-1((N₁/ N₂) ・ Si
nθ₁) ≧ sin^-1(N₃/ N₂)), Angle θ₁, Θ
₂Is set. For example, the refractive index n of the light emitting layer 4₁But
About 2.6, refractive index n of insulating film 8₂About 1.5, sealing resin
Refractive index n₃Is about 1.2, θ₁<Sin
^-1(N₂/ N₁) = 35.2, α ≧ sin^-1(N₃
/ N₂) = 53.1, so that the above conditional expression is satisfied.
As described above, in the present embodiment, the angle θ₁= 25 °, angle θ ₂
= 40 °.

【００４８】この時、α＝６２°となり、発光層４内を
発光層４と平行な方向に進行する光が、発光層４と絶縁
膜８との界面で屈折し、絶縁膜８の外側面に設けた傾斜
面８ａに対して臨界条件（α≧ｓｉｎ^−１（ｎ_３／
ｎ_２））を超える入射角αで入射するので、絶縁膜８の
外側面に設けた傾斜面８ａで光の取り出し方向へ全反射
されることになり、従来のＬＥＤチップ１に比べて光の
取り出し方向への光の取り出し効率が向上する。At this time, α = 62 °, and the light traveling in the light emitting layer 4 in the direction parallel to the light emitting layer 4 is refracted at the interface between the light emitting layer 4 and the insulating film 8, and the outer surface of the insulating film 8 Critical condition (α ≧ sin ⁻¹ (n ₃ /
n ₂ )), the light is totally reflected in the light extraction direction by the inclined surface 8 a provided on the outer surface of the insulating film 8. Light extraction efficiency in the light extraction direction is improved.

【００４９】尚、本実施形態では対向するｎ型半導体層
３とｐ型半導体層５とを含むｐｎ接合部を３組形成して
いるが、ｐｎ接合部の数は２組以上であれば何組でも良
く、１個当たりのＬＥＤチップ１の光量を大きくでき
る。また、複数の発光層４は、全て同じ波長の光を放射
するものでも良いが、一部又は全ての発光層４が互いに
異なる波長の光を放射するようにしても良い。また、上
述した各実施形態において、対向するｎ型半導体層３と
ｐ型半導体層５とを含むｐｎ接合部を複数組形成しても
良く、本実施形態と同様に１個当たりのＬＥＤチップ１
の光量を大きくできる。In the present embodiment, three sets of pn junctions including the opposing n-type semiconductor layer 3 and p-type semiconductor layer 5 are formed. A pair may be used, and the light quantity of one LED chip 1 can be increased. Further, the plurality of light emitting layers 4 may all emit light of the same wavelength, but a part or all of the light emitting layers 4 may emit light of different wavelengths. In each of the above-described embodiments, a plurality of sets of pn junctions including the opposing n-type semiconductor layer 3 and p-type semiconductor layer 5 may be formed.
Light amount can be increased.

【００５０】ところで、上述した各実施形態において
は、透光性基板２としてサファイア基板を例に説明を行
ったが、透光性基板２をサファイア基板に限定する趣旨
のものではなく、配線基板にフェースダウンの状態で実
装する場合には、透光性の結晶基板であればどのような
基板を用いても良く、サファイア以外のＳｉＣやＧａＩ
Ｎなどの結晶基板を用いても良い。また、ＬＥＤチップ
１を配線基板にフェースアップの状態で実装する場合に
は、透光性を有していない結晶基板でも良い。By the way, in each of the embodiments described above, the sapphire substrate is described as an example of the light-transmitting substrate 2, but the light-transmitting substrate 2 is not limited to the sapphire substrate, but is not limited to the sapphire substrate. When mounting in a face-down state, any substrate may be used as long as it is a translucent crystal substrate, and SiC or GaI other than sapphire may be used.
A crystal substrate such as N may be used. When the LED chip 1 is mounted on the wiring board in a face-up state, a crystal substrate having no translucency may be used.

【００５１】また、ｎ型半導体層３及びｐ型半導体層５
の各々に接続されたｎ側及びｐ側電極の給電部６，７は
それぞれ結晶基板における半導体層側のチップ面に設け
ているが、例えばＳｉＣのように導電性を有する結晶基
板を用いた場合には、結晶基板に近い側の半導体層（本
実施形態の場合はｎ型半導体層３）に接続される電極
を、結晶基板における半導体層側と反対側の表面に形成
しても良い。The n-type semiconductor layer 3 and the p-type semiconductor layer 5
Are provided on the chip surface on the semiconductor layer side of the crystal substrate, respectively. For example, when a conductive crystal substrate such as SiC is used. Alternatively, an electrode connected to the semiconductor layer closer to the crystal substrate (the n-type semiconductor layer 3 in this embodiment) may be formed on the surface of the crystal substrate opposite to the semiconductor layer side.

【００５２】また、上記各実施形態では結晶基板上に、
ｎ型半導体層３、発光層４を含む量子井戸構造、及びｐ
型半導体層５をこの順番で積層してあるが、ｐ型半導体
層５、発光層４を含む量子井戸構造、及びｎ型半導体層
３の順番で積層するようにしても良い。また更に、ｎ型
半導体層３及びｐ型半導体層５としてＧａＮ系化合物半
導体を例に説明を行っているが、半導体の種類を上記の
ものに限定する趣旨のものではなく、ＧａＡｓ系化合物
半導体などでも良い。また、発光層４付近の構造として
は量子井戸構造を用いているが、特に量子井戸構造に限
定するものではなく、それ以外の構造のものを用いても
良い。In each of the above embodiments, the crystal substrate is
a quantum well structure including an n-type semiconductor layer 3 and a light emitting layer 4;
Although the type semiconductor layers 5 are stacked in this order, the p-type semiconductor layer 5, the quantum well structure including the light emitting layer 4, and the n-type semiconductor layer 3 may be stacked in this order. Further, the GaN-based compound semiconductor has been described as an example of the n-type semiconductor layer 3 and the p-type semiconductor layer 5, but this is not intended to limit the types of semiconductors to those described above. But it is good. Further, although a quantum well structure is used as a structure near the light emitting layer 4, the structure is not particularly limited to the quantum well structure, and other structures may be used.

【００５３】[0053]

【発明の効果】上述のように、請求項１の発明は、結晶
基板上に少なくとも一対のｐ型半導体層及びｎ型半導体
層を形成し、ｐ型半導体層とｎ型半導体層との対向部に
発光層を設け、ｐ型半導体層、発光層及びｎ型半導体層
の側面を少なくとも覆う絶縁膜を設けたＬＥＤチップに
おいて、発光層内を発光層と平行に進行する光が光の取
り出し方向へ全反射されるように、発光層の端面、又
は、発光層の端面に接する絶縁膜の外側面の内、少なく
とも何れか一方の面を、その法線が発光層に平行な面と
成す角度を所定の角度以上とするように、発光層に平行
な面に対して傾斜させたことを特徴とし、発光層の端
面、又は、発光層の端面に接する絶縁膜の外側面の内、
少なくとも何れか一方の面を、その法線が発光層に平行
な面と成す角度を所定の角度以上とするように、発光層
に平行な面に対して傾斜させることで、発光層内を発光
層と平行な方向に進行する光を、発光層の端面、又は、
発光層の端面に接する絶縁膜の外側面の何れかで光の取
り出し方向へ全反射させているので、光の取り出し方向
へ放射される光量を増やして、光の取り出し効率を高め
ることができる。さらに、従来のＬＥＤチップのよう
に、発光層内を発光層と平行な方向に進行する光を光の
取り出し方向に反射する部材をＬＥＤチップの外側に設
ける場合に比べて、ＬＥＤチップの実装部を小型にでき
るから、光の取り出し効率を高めた小型のＬＥＤチップ
を実現できる。As described above, according to the first aspect of the present invention, at least a pair of a p-type semiconductor layer and an n-type semiconductor layer are formed on a crystal substrate, and an opposing portion between the p-type semiconductor layer and the n-type semiconductor layer is formed. In an LED chip provided with a light-emitting layer, and an insulating film covering at least the side surfaces of the p-type semiconductor layer, the light-emitting layer, and the n-type semiconductor layer, light traveling in the light-emitting layer in parallel with the light-emitting layer is directed in a light extraction direction. As for total reflection, the end face of the light-emitting layer, or at least one of the outer faces of the insulating film in contact with the end face of the light-emitting layer, has an angle formed by a normal to a plane parallel to the light-emitting layer. As a predetermined angle or more, characterized by being inclined with respect to the plane parallel to the light emitting layer, the end face of the light emitting layer, or, of the outer surface of the insulating film in contact with the end face of the light emitting layer,
At least one of the surfaces is inclined with respect to the surface parallel to the light emitting layer so that the angle formed by the normal line to the surface parallel to the light emitting layer is equal to or larger than a predetermined angle. Light traveling in a direction parallel to the layer, the end face of the light-emitting layer, or
Since the light is totally reflected in any of the outer surfaces of the insulating film in contact with the end surface of the light emitting layer in the light extraction direction, the amount of light emitted in the light extraction direction can be increased, and the light extraction efficiency can be increased. Furthermore, as compared with a conventional LED chip in which a member that reflects light traveling in a direction parallel to the light emitting layer in the light emitting layer in a light extraction direction is provided outside the LED chip, Can be reduced in size, so that a small LED chip with improved light extraction efficiency can be realized.

【００５４】請求項２の発明は、請求項１の発明におい
て、発光層の端面の法線と発光層に平行な面とが成す角
度を鋭角とし、絶縁膜の屈折率を発光層の屈折率で除し
た値の逆正弦以上としたことを特徴とし、発光層内を発
光層と平行な方向に進行する光が、発光層の端面で光の
取り出し方向に全反射されるので、光の取り出し方向へ
放射される光量を増やして、光の取り出し効率を高める
ことができる。According to a second aspect of the present invention, in the first aspect of the present invention, the angle between the normal to the end face of the light emitting layer and the plane parallel to the light emitting layer is an acute angle, and the refractive index of the insulating film is the refractive index of the light emitting layer. The light that travels in a direction parallel to the light-emitting layer in the light-emitting layer is totally reflected at the end face of the light-emitting layer in the light extraction direction. The light extraction efficiency can be increased by increasing the amount of light radiated in the direction.

【００５５】請求項３の発明は、請求項１の発明におい
て、発光層の端面と発光層に平行な面とを略直交させ、
発光層の端面に接する絶縁膜の外側面の法線と発光層に
平行な面とが成す角度を鋭角とし、その角度を、基板実
装後の完成状態において絶縁膜の外側面が接する物質の
屈折率を絶縁膜の屈折率で除した値の逆正弦以上とした
ことを特徴とし、発光層内を発光層と平行な方向に進行
する光が、発光層の端面と接する絶縁膜の外側面で、光
の取り出し方向に全反射されるので、光の取り出し方向
へ放射される光量を増やして、光の取り出し効率を高め
ることができる。According to a third aspect of the present invention, in the first aspect of the present invention, the end face of the light emitting layer and the plane parallel to the light emitting layer are substantially orthogonal to each other;
The angle between the normal to the outer surface of the insulating film that is in contact with the end surface of the light emitting layer and the surface parallel to the light emitting layer is an acute angle, and the angle is determined by the refraction of the material that the outer surface of the insulating film touches in the completed state after mounting on the board. Light that travels in a direction parallel to the light-emitting layer in the light-emitting layer is characterized in that the light traveling in the light-emitting layer in a direction parallel to the light-emitting layer is the outer surface of the insulating film in contact with the end face of the light-emitting layer. Since the light is totally reflected in the light extraction direction, the amount of light emitted in the light extraction direction can be increased, and the light extraction efficiency can be increased.

【００５６】請求項４の発明は、請求項１の発明におい
て、発光層の端面の法線と発光層に平行な面とが成す第
１の角度と、発光層の端面に接する絶縁膜の外側面の法
線と発光層に平行な面とが成す第２の角度とはそれぞれ
鋭角であって、第２の角度を第１の角度よりも大きく
し、第１の角度を、絶縁膜の屈折率を発光層の屈折率で
除した値の逆正弦よりも小さい角度とし、且つ、第２の
角度と第１の角度との差に、発光層の屈折率を絶縁膜の
屈折率で除した値に第１の角度の正弦を乗じた値の逆正
弦を加算した値を、基板実装後の完成状態において絶縁
膜の外側面が接する物質の屈折率を絶縁膜の屈折率で除
した値の逆正弦以上としたことを特徴とし、発光層内を
発光層と平行な方向に進行する光は、絶縁膜との界面で
屈折された後、絶縁膜の外側面に入射するのであるが、
絶縁膜の外側面への入射角が臨界角以下となり、絶縁膜
の外側面で光の取り出し方向に全反射されるから、光の
取り出し方向へ放射される光量を増やして、光りの取り
出し効率を高めることができる。また、絶縁膜や封止材
料に使用できる材料は屈折率によって或る程度決まって
しまうが、発光層の端面と、発光層の端面に接する絶縁
膜の外側面の両方を発光層と平行な面に対して傾斜させ
た場合は、何れか一方の面のみを傾斜させた場合に比べ
て、各材料の屈折率の設定の自由度が高くなり、その結
果、使用できる材料の自由度が高くなるという効果があ
る。According to a fourth aspect of the present invention, in the first aspect of the present invention, the first angle formed between the normal to the end face of the light emitting layer and a plane parallel to the light emitting layer, and the outside angle of the insulating film in contact with the end face of the light emitting layer. The second angle formed between the normal to the side surface and the plane parallel to the light emitting layer is an acute angle, and the second angle is set to be larger than the first angle. The refractive index of the light emitting layer was divided by the refractive index of the insulating film by an angle smaller than the inverse sine of the value obtained by dividing the refractive index by the refractive index of the light emitting layer, and the difference between the second angle and the first angle. The value obtained by adding the inverse sine of the value obtained by multiplying the value by the sine of the first angle to the value obtained by dividing the refractive index of the substance in contact with the outer surface of the insulating film in the completed state after mounting the substrate by the refractive index of the insulating film. It is characterized by having an inverse sine or more, and light traveling in a direction parallel to the light emitting layer in the light emitting layer is refracted at the interface with the insulating film and then insulated. Although for the incident on the outer surface,
Since the angle of incidence on the outer surface of the insulating film becomes less than the critical angle and is totally reflected on the outer surface of the insulating film in the light extraction direction, the amount of light radiated in the light extraction direction is increased to increase the light extraction efficiency. Can be enhanced. In addition, the materials that can be used for the insulating film and the sealing material are determined to some extent by the refractive index, but both the end face of the light emitting layer and the outer face of the insulating film in contact with the end face of the light emitting layer are parallel to the light emitting layer. When it is inclined with respect to, the degree of freedom in setting the refractive index of each material is higher than in the case where only one of the surfaces is inclined, and as a result, the degree of freedom of usable materials is higher. This has the effect.

【００５７】請求項５の発明は、請求項４の発明におい
て、発光層の端面に接する絶縁膜の外側面を、発光層の
端面と非平行としたことを特徴とし、発光層の端面に接
する絶縁膜の外側面と発光層の端面とを平行にした場合
は、発光層内を発光層と平行な方向に進行した光が絶縁
膜の外側面で一旦反射された後、絶縁膜の外側面と発光
層の端面との間で反射を繰り返して光の取り出し方向へ
放射されるため、光路が長くなって光量が減衰したり配
光むらが発生するといった問題が発生するが、発光層の
端面に接する絶縁膜の外側面と発光層の端面とを非平行
にすることで、絶縁膜の外側面と発光層の端面との間で
反射が繰り返されるのを防止し、光路長を短くして光量
の減衰や配光むらを低減できるという効果がある。According to a fifth aspect of the present invention, in the invention of the fourth aspect, the outer surface of the insulating film in contact with the end face of the light emitting layer is not parallel to the end face of the light emitting layer, and is in contact with the end face of the light emitting layer. When the outer surface of the insulating film and the end surface of the light emitting layer are parallel to each other, light traveling in the light emitting layer in a direction parallel to the light emitting layer is once reflected by the outer surface of the insulating film, and then the outer surface of the insulating film. Since the light is emitted in the light extraction direction by repeating reflection between the light emitting layer and the end face of the light emitting layer, there arises a problem that the optical path becomes longer, the light amount is attenuated, and uneven light distribution occurs. By making the outer surface of the insulating film in contact with the end surface of the light emitting layer non-parallel with the outer surface of the insulating film, the reflection between the outer surface of the insulating film and the end surface of the light emitting layer is prevented from being repeated, and the optical path length is shortened. There is an effect that attenuation of light amount and uneven light distribution can be reduced.

【００５８】請求項６の発明は、請求項１乃至５の何れ
か１つの発明において、絶縁膜の外側に金属膜を設けた
ことを特徴とし、絶縁膜の外側面で反射せずに透過した
光を金属膜の表面で反射させることにより、光の取り出
し方向に放射される光量を増やして、光の取り出し効率
を向上させることができる。According to a sixth aspect of the present invention, in any one of the first to fifth aspects of the present invention, a metal film is provided outside the insulating film, and the light is transmitted without being reflected on the outer surface of the insulating film. By reflecting light on the surface of the metal film, the amount of light emitted in the light extraction direction can be increased, and the light extraction efficiency can be improved.

【００５９】請求項７の発明は、請求項６の発明におい
て、金属膜を、ｐ型半導体層又はｎ型半導体層の内少な
くとも何れか一方への配線部として兼用したことを特徴
とし、金属膜で配線部を兼用しているので、フェースダ
ウンの状態で実装する場合には、半導体層に設けた電極
部に比べて面積の広い金属膜にバンプを接合すれば良
く、基板への実装を容易に行えるという効果がある。さ
らに、半導体層に設けた電極部に比べて金属膜の方が面
積が広いので、より大きなバンプを用いたり、複数のバ
ンプを使用することができ、ＬＥＤチップと基板との間
の熱抵抗を小さくして、放熱性を高めることができる。According to a seventh aspect of the present invention, in the sixth aspect of the present invention, the metal film is also used as a wiring portion to at least one of the p-type semiconductor layer and the n-type semiconductor layer. When mounting in a face-down state, it is only necessary to bond the bump to a metal film with a larger area than the electrode part provided on the semiconductor layer, which makes mounting on the board easy. There is an effect that can be performed. Furthermore, since the metal film has a larger area than the electrode portion provided on the semiconductor layer, a larger bump or a plurality of bumps can be used, and the thermal resistance between the LED chip and the substrate is reduced. By reducing the size, heat dissipation can be improved.

【００６０】請求項８の発明は、請求項１乃至７の何れ
か１つの発明において、チップ側面を発光層と平行な面
に対して斜めに傾斜させたことを特徴とし、チップ側面
を発光層と平行な面に対して略直交させた場合、チップ
側面で一旦全反射された光が、ＬＥＤチップの他の面で
次々に全反射されて、チップ内を進行する所謂繰り返し
完全反射が発生するが、チップ側面を発光層と平行な面
に対して斜めに傾斜させているので、繰り返し完全反射
の発生を抑制して、光の取り出し効率を向上させること
ができる。According to an eighth aspect of the present invention, in any one of the first to seventh aspects of the present invention, the chip side surface is inclined with respect to a plane parallel to the light emitting layer. When the light is substantially perpendicular to a plane parallel to the LED chip, the light once totally reflected on the side surface of the chip is totally reflected one after another on the other surface of the LED chip, so that a so-called repeated perfect reflection that travels inside the chip occurs. However, since the side surface of the chip is inclined obliquely with respect to a plane parallel to the light emitting layer, the occurrence of complete reflection is suppressed repeatedly, and the light extraction efficiency can be improved.

【００６１】請求項９の発明は、請求項１乃至８の何れ
か１つの発明において、ｐ型半導体層とｎ型半導体層の
各々に接続するｐ側電極とｎ側電極を半導体層形成側の
チップ面に設け、複数のｐ側電極と、複数のｎ側電極と
を、略平行に等間隔で交互に並行配列して、複数のｐ側
電極の配列方向と交差する方向における一方の端を互い
に連結して櫛形に形成するとともに、複数のｎ側電極の
配列方向と交差する方向における他方の端を互いに連結
して櫛形に形成して成ることを特徴とし、チップ面にｐ
型半導体層とｎ型半導体層の各々に接続する電極を略平
行に等間隔で並行配置しているので、発光面内で発光輝
度を均一にできる。According to a ninth aspect of the present invention, in any one of the first to eighth aspects, the p-side electrode and the n-side electrode connected to the p-type semiconductor layer and the n-type semiconductor layer, respectively, are formed on the semiconductor layer forming side. Provided on the chip surface, a plurality of p-side electrodes and a plurality of n-side electrodes are alternately arranged in parallel and at substantially equal intervals, and one end in a direction intersecting the arrangement direction of the plurality of p-side electrodes is A plurality of n-side electrodes are connected to each other to form a comb, and the other ends in a direction intersecting the arrangement direction of the plurality of n-side electrodes are connected to each other to form a comb.
Since the electrodes connected to each of the n-type semiconductor layer and the n-type semiconductor layer are arranged substantially in parallel at equal intervals, light emission luminance can be made uniform within the light emitting surface.

【００６２】請求項１０の発明は、請求項９の発明にお
いて、各電極の連結されていない側の端部に丸みをもた
せたことを特徴とし、先端部に電界が集中するのを防止
して、発光面内での発光輝度をさらに均一にできる。A tenth aspect of the present invention is characterized in that, in the ninth aspect of the present invention, the ends of the electrodes not connected are rounded to prevent the electric field from concentrating at the tip. In addition, the light emission luminance in the light emitting surface can be made more uniform.

【００６３】請求項１１の発明は、請求項１乃至１０の
何れか１つの発明において、ｐ型半導体層とｎ型半導体
層との対を複数対積層したことを特徴とし、発光層を複
数設けることで、１個当たりのＬＥＤチップの光量を増
大させることができる。According to an eleventh aspect, in any one of the first to tenth aspects, a plurality of pairs of a p-type semiconductor layer and an n-type semiconductor layer are stacked, and a plurality of light emitting layers are provided. This makes it possible to increase the amount of light per LED chip.

【図面の簡単な説明】[Brief description of the drawings]

【図１】実施形態１のＬＥＤチップの断面図である。FIG. 1 is a cross-sectional view of an LED chip according to a first embodiment.

【図２】同上の別のＬＥＤチップの断面図である。FIG. 2 is a sectional view of another LED chip of the above.

【図３】実施形態２のＬＥＤチップの断面図である。FIG. 3 is a cross-sectional view of an LED chip according to a second embodiment.

【図４】実施形態３のＬＥＤチップの断面図である。FIG. 4 is a cross-sectional view of an LED chip according to a third embodiment.

【図５】実施形態４のＬＥＤチップの断面図である。FIG. 5 is a cross-sectional view of an LED chip according to a fourth embodiment.

【図６】同上の別のＬＥＤチップの断面図である。FIG. 6 is a cross-sectional view of another LED chip of the above.

【図７】実施形態５のＬＥＤチップを示し、（ａ）は電
極の配置を上側から見た図、（ｂ）はＢ−Ｂ’断面図で
ある。FIGS. 7A and 7B show an LED chip according to a fifth embodiment, in which FIG. 7A is a diagram in which the arrangement of electrodes is viewed from above, and FIG.

【図８】実施形態６のＬＥＤチップの断面図である。FIG. 8 is a sectional view of an LED chip according to a sixth embodiment.

【図９】従来のＬＥＤチップの断面図である。FIG. 9 is a cross-sectional view of a conventional LED chip.

【符号の説明】[Explanation of symbols]

１ ＬＥＤチップ ２ 透光性基板 ３ ｎ型半導体層 ４ 発光層 ５ ｐ型半導体層 ６，７ 給電部 ８ 絶縁膜 Ａ 面 Ｌ１ 法線 1 LED chip 2 Translucent substrate 3 n-type semiconductor layer 4 Light-emitting layer 5 p-type semiconductor layer 6,7 power supply 8 Insulating film A side L1 normal

───────────────────────────────────────────────────── フロントページの続き (72)発明者 木村 秀吉 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 野田 渉 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 塩濱 英二 大阪府門真市大字門真1048番地松下電工株 式会社内 Ｆターム(参考） 5F041 AA03 AA04 AA05 AA33 AA47 CA04 CA05 CA12 CA13 CA40 CA46 CA74 CA88 CA93 CB11 CB15 CB36 DA04 DA09    ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Hideyoshi Kimura             1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd.             In the formula company (72) Inventor Wataru Noda             1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd.             In the formula company (72) Inventor Eiji Shiohama             1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd.             In the formula company F term (reference) 5F041 AA03 AA04 AA05 AA33 AA47                       CA04 CA05 CA12 CA13 CA40                       CA46 CA74 CA88 CA93 CB11                       CB15 CB36 DA04 DA09

Claims (11)

【特許請求の範囲】[Claims] 【請求項１】結晶基板上に少なくとも一対のｐ型半導体
層及びｎ型半導体層を形成し、前記ｐ型半導体層と前記
ｎ型半導体層との対向部に発光層を設け、ｐ型半導体
層、発光層及びｎ型半導体層の側面を少なくとも覆う絶
縁膜を設けたＬＥＤチップにおいて、発光層内を発光層
と平行に進行する光が光の取り出し方向へ全反射される
ように、発光層の端面、又は、発光層の端面に接する絶
縁膜の外側面の内、少なくとも何れか一方の面を、その
法線が発光層に平行な面と成す角度を所定の角度以上と
するように、発光層に平行な面に対して傾斜させたこと
を特徴とするＬＥＤチップ。A p-type semiconductor layer formed on at least a pair of a p-type semiconductor layer and an n-type semiconductor layer on a crystal substrate; and a light-emitting layer provided at a portion where the p-type semiconductor layer and the n-type semiconductor layer face each other. In an LED chip provided with an insulating film that covers at least the side surfaces of the light emitting layer and the n-type semiconductor layer, the light emitting layer is formed such that light traveling in the light emitting layer in parallel with the light emitting layer is totally reflected in the light extraction direction. The end face, or at least one of the outer faces of the insulating film that is in contact with the end face of the light emitting layer, emits light so that an angle formed by a normal line to a plane parallel to the light emitting layer is equal to or larger than a predetermined angle. An LED chip which is inclined with respect to a plane parallel to a layer. 【請求項２】前記発光層の端面の法線と発光層に平行な
面とが成す角度を鋭角とし、前記絶縁膜の屈折率を前記
発光層の屈折率で除した値の逆正弦以上としたことを特
徴とする請求項１記載のＬＥＤチップ。2. An angle formed between a normal line of an end face of the light emitting layer and a plane parallel to the light emitting layer is an acute angle, and a value obtained by dividing a refractive index of the insulating film by a refractive index of the light emitting layer is an inverse sine or more. The LED chip according to claim 1, wherein: 【請求項３】前記発光層の端面と前記発光層に平行な面
とを略直交させ、前記発光層の端面に接する前記絶縁膜
の外側面の法線と前記発光層に平行な面とが成す角度を
鋭角とし、その角度を、基板実装後の完成状態において
前記絶縁膜の外側面が接する物質の屈折率を前記絶縁膜
の屈折率で除した値の逆正弦以上としたことを特徴とす
る請求項１記載のＬＥＤチップ。3. An end face of the light emitting layer and a plane parallel to the light emitting layer are substantially orthogonal to each other, and a normal line of an outer surface of the insulating film in contact with the end face of the light emitting layer and a plane parallel to the light emitting layer. The angle formed is an acute angle, and the angle is equal to or greater than the inverse sine of the value obtained by dividing the refractive index of the substance in contact with the outer surface of the insulating film in the completed state after mounting on the substrate by the refractive index of the insulating film. The LED chip according to claim 1. 【請求項４】前記発光層の端面の法線と発光層に平行な
面とが成す第１の角度と、前記発光層の端面に接する前
記絶縁膜の外側面の法線と前記発光層に平行な面とが成
す第２の角度とはそれぞれ鋭角であって、前記第２の角
度を前記第１の角度よりも大きくし、前記第１の角度
を、前記絶縁膜の屈折率を前記発光層の屈折率で除した
値の逆正弦よりも小さい角度とし、且つ、前記第２の角
度と前記第１の角度との差に、前記発光層の屈折率を前
記絶縁膜の屈折率で除した値に前記第１の角度の正弦を
乗じた値の逆正弦を加算した値を、基板実装後の完成状
態において前記絶縁膜の外側面が接する物質の屈折率を
前記絶縁膜の屈折率で除した値の逆正弦以上としたこと
を特徴とする請求項１記載のＬＥＤチップ。4. A first angle formed by a normal line of an end face of the light emitting layer and a plane parallel to the light emitting layer, a normal angle of an outer surface of the insulating film in contact with the end face of the light emitting layer, and the light emitting layer. The second angles formed by the parallel surfaces are acute angles, and the second angle is greater than the first angle, the first angle is the refractive index of the insulating film, and the refractive index is the light emission. An angle smaller than the inverse sine of the value obtained by dividing the refractive index of the layer is used, and the difference between the second angle and the first angle is divided by the refractive index of the light emitting layer by the refractive index of the insulating film. The value obtained by adding the inverse sine of the value obtained by multiplying the value obtained by multiplying the sine of the first angle, the refractive index of the material with which the outer surface of the insulating film is in contact with the completed state after mounting on the substrate is the refractive index of the insulating film. 2. The LED chip according to claim 1, wherein the value is equal to or greater than the inverse sine of the divided value. 【請求項５】前記発光層の端面に接する前記絶縁膜の外
側面を、前記発光層の端面と非平行としたことを特徴と
する請求項４記載のＬＥＤチップ。5. The LED chip according to claim 4, wherein an outer surface of said insulating film in contact with an end surface of said light emitting layer is not parallel to an end surface of said light emitting layer. 【請求項６】前記絶縁膜の外側に金属膜を設けたことを
特徴とする請求項１乃至５の何れか１つに記載のＬＥＤ
チップ。6. The LED according to claim 1, wherein a metal film is provided outside the insulating film.
Chips. 【請求項７】前記金属膜を、ｐ型半導体層又はｎ型半導
体層の内少なくとも何れか一方への配線部として兼用し
たことを特徴とする請求項６記載のＬＥＤチップ。7. The LED chip according to claim 6, wherein said metal film also serves as a wiring portion for at least one of a p-type semiconductor layer and an n-type semiconductor layer. 【請求項８】チップ側面を発光層と平行な面に対して斜
めに傾斜させたことを特徴とする請求項１乃至７の何れ
か１つに記載のＬＥＤチップ。8. The LED chip according to claim 1, wherein a side surface of the LED chip is inclined with respect to a plane parallel to the light emitting layer. 【請求項９】ｐ型半導体層とｎ型半導体層の各々に接続
するｐ側電極とｎ側電極を半導体層形成側のチップ面に
設け、複数のｐ側電極と、複数のｎ側電極とを、略平行
に等間隔で交互に並行配列して、複数のｐ側電極の配列
方向と交差する方向における一方の端を互いに連結して
櫛形に形成するとともに、複数のｎ側電極の配列方向と
交差する方向における他方の端を互いに連結して櫛形に
形成して成ることを特徴とする請求項１乃至８の何れか
１つに記載のＬＥＤチップ。9. A p-side electrode and an n-side electrode connected to each of a p-type semiconductor layer and an n-type semiconductor layer are provided on a chip surface on a semiconductor layer forming side, and a plurality of p-side electrodes and a plurality of n-side electrodes are provided. Are arranged substantially in parallel and alternately at equal intervals, one end in a direction intersecting the arrangement direction of the plurality of p-side electrodes is connected to each other to form a comb shape, and the arrangement direction of the plurality of n-side electrodes The LED chip according to any one of claims 1 to 8, wherein the other ends in a direction intersecting with the LED chip are connected to each other to form a comb shape. 【請求項１０】前記各電極の連結されていない側の端部
に丸みをもたせたことを特徴とする請求項９記載のＬＥ
Ｄチップ。10. The LE according to claim 9, wherein an end of each of the electrodes which is not connected is rounded.
D chip. 【請求項１１】前記ｐ型半導体層と前記ｎ型半導体層と
の対を複数対積層したことを特徴とする請求項１乃至１
０の何れか１つに記載のＬＥＤチップ。11. The semiconductor device according to claim 1, wherein a plurality of pairs of said p-type semiconductor layer and said n-type semiconductor layer are laminated.
0. The LED chip according to any one of 0.