JP2003297962A - Electronic device and its manufacturing method, and wiring board and sealing member used for manufacture of electronic device - Google Patents

Electronic device and its manufacturing method, and wiring board and sealing member used for manufacture of electronic device

Info

Publication number
JP2003297962A
JP2003297962A JP2002102557A JP2002102557A JP2003297962A JP 2003297962 A JP2003297962 A JP 2003297962A JP 2002102557 A JP2002102557 A JP 2002102557A JP 2002102557 A JP2002102557 A JP 2002102557A JP 2003297962 A JP2003297962 A JP 2003297962A
Authority
JP
Japan
Prior art keywords
chip
shaped element
wiring board
electronic device
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002102557A
Other languages
Japanese (ja)
Inventor
Akiji Shibata
明司 柴田
Koji Kawakatsu
孝治 川勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Murata Manufacturing Co Ltd
Original Assignee
Hitachi Cable Ltd
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Murata Manufacturing Co Ltd filed Critical Hitachi Cable Ltd
Priority to JP2002102557A priority Critical patent/JP2003297962A/en
Publication of JP2003297962A publication Critical patent/JP2003297962A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

<P>PROBLEM TO BE SOLVED: To suppress a rise in pressure in a cavity part by expansion of steam in the cavity part in an electronic device wherein the cavity is provided. <P>SOLUTION: The electronic device comprises a wiring board where wiring (a conductor pattern) is provided on the surface of an insulating board, a chip- like element provided on the wiring substrate a conductive member connecting and estimal terminal of the chip element with a wiring of the wiring boad, and a sealing member which seals the periphery of the chip-like element. The electronic device has the cavity between the wiring substrate and the chip-like element. The sealing member comprises a steam transmitting member which transmits the steam and a cap member which does not transmit or hardly transmits the steam. The steam transmitting member communicates the inside of the cavity and the outside of the sealing member. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、電子装置及びその
製造方法に関し、特に、弾性表面波素子を用いた電子装
置に適用して有効な技術に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device and a manufacturing method thereof, and more particularly to a technique effectively applied to an electronic device using a surface acoustic wave element.

【０００２】[0002]

【従来の技術】従来、携帯電話などの移動体通信機器用
の帯域通過フィルタ（バンドパスフィルタ）には、弾性
表面波（Surface Acoustic Wave；以下、ＳＡＷと称す
る）を利用したＳＡＷフィルタ素子が用いられている。2. Description of the Related Art Conventionally, a SAW filter element utilizing a surface acoustic wave (hereinafter referred to as SAW) is used as a bandpass filter (bandpass filter) for mobile communication devices such as mobile phones. Has been.

【０００３】前記ＳＡＷフィルタ素子は、例えば、ニオ
ブ酸リチウム（ＬｉＮｂＯ３）やタンタル酸リチウム
（ＬｉＴａＯ３）、水晶などの圧電基板の表面に、すだ
れ状電極（櫛型電極）が設けられた素子である。このと
き、前記すだれ状電極は、表面波を励起振動する入力用
の電極と、前記励起振動された表面波を受信して電気信
号に変換する出力用の電極とが設けられる。またこのと
き、前記すだれ状電極には、大きく分けて、遅延型の電
極構造と共振型の電極構造とがあり、用途や特性に合わ
せて選択される。The SAW filter element is an element in which interdigital electrodes (comb-shaped electrodes) are provided on the surface of a piezoelectric substrate such as lithium niobate (LiNbO 3 ), lithium tantalate (LiTaO 3 ), and quartz. is there. At this time, the interdigital electrode is provided with an input electrode for exciting and vibrating a surface wave and an output electrode for receiving the excited and vibrating surface wave and converting it into an electric signal. At this time, the interdigital electrodes are roughly classified into a delay type electrode structure and a resonance type electrode structure, which are selected according to the use and characteristics.

【０００４】前記ＳＡＷフィルタ素子では、前記入力用
のすだれ状電極に交流電圧（電気信号）を印加すると、
圧電効果により前記圧電基板に歪みが生じて表面波が励
起され、前記圧電基板の表面が振動する。前記圧電基板
の表面で振動する表面波は、前記圧電基板上を伝搬して
前記出力用のすだれ電極に到達し、受信される。In the SAW filter element, when an AC voltage (electric signal) is applied to the input interdigital transducer,
The piezoelectric effect causes strain in the piezoelectric substrate to excite surface waves, and the surface of the piezoelectric substrate vibrates. The surface wave vibrating on the surface of the piezoelectric substrate propagates on the piezoelectric substrate, reaches the output interdigital electrode, and is received.

【０００５】このとき、励起される表面波の周波数は、
前記すだれ状電極の周期（間隔）に依存する。そのた
め、前記出力用のすだれ状電極では、特定の周波数の表
面波（電気信号）のみを受信でき、帯域通過フィルタと
して用いることができる。At this time, the frequency of the surface wave excited is
It depends on the period (interval) of the interdigital transducer. Therefore, the interdigital transducer for output can receive only surface waves (electrical signals) of a specific frequency and can be used as a bandpass filter.

【０００６】また、前記ＳＡＷフィルタ素子を用いた電
子装置は、前記ＳＡＷフィルタ素子の表面に、前記表面
波を励起し、伝搬するための空間が必要であるため、従
来、セラミックパッケージ形態のものが用いられてい
る。Further, an electronic device using the SAW filter element requires a space for exciting and propagating the surface wave on the surface of the SAW filter element. It is used.

【０００７】前記セラミックパッケージは、配線が作り
こまれたセラミックケース内に前記ＳＡＷフィルタ素子
を接着し、前記ＳＡＷフィルタ素子の外部端子と前記セ
ラミックケースの配線（端子）とをボンディングワイヤ
で接続し、前記セラミックケースの開口部を金属あるい
はセラミック製のキャップで閉じている。In the ceramic package, the SAW filter element is adhered in a ceramic case having wiring formed therein, and an external terminal of the SAW filter element and a wiring (terminal) of the ceramic case are connected by a bonding wire, The opening of the ceramic case is closed with a metal or ceramic cap.

【０００８】しかしながら、前記セラミックパッケージ
の場合、前記セラミックケースの体積が大きく、比重も
大きいので、装置が大型で重くなる。そのため、前記移
動体通信機器の小型化、軽量化が難しいという問題があ
った。However, in the case of the ceramic package, since the volume of the ceramic case is large and the specific gravity is also large, the device is large and heavy. Therefore, there is a problem that it is difficult to reduce the size and weight of the mobile communication device.

【０００９】そこで、近年では、前記ＳＡＷフィルタ素
子を用いた電子装置を小型化、軽量化するために、ＢＧ
Ａ（Ball Grid Array）やＣＳＰ（Chip Size Package）
といった半導体装置のように、テープ状の絶縁基板の表
面に配線を形成した配線基板（テープキャリア）上に、
前記ＳＡＷフィルタ素子をフリップチップ実装し、前記
ＳＡＷフィルタ素子の周囲を絶縁体で封止する方法が提
案されている。Therefore, in recent years, in order to reduce the size and weight of an electronic device using the SAW filter element, a BG is used.
A (Ball Grid Array) and CSP (Chip Size Package)
Like a semiconductor device like this, on a wiring board (tape carrier) where wiring is formed on the surface of a tape-shaped insulating substrate,
A method has been proposed in which the SAW filter element is flip-chip mounted and the periphery of the SAW filter element is sealed with an insulator.

【００１０】前記テープキャリア上に前記ＳＡＷフィル
タ素子を実装した前記電子装置としては、例えば、図７
に示すように、絶縁基板１上に配線２が設けられた前記
テープキャリア（誘電体基板）上に、前記ＳＡＷフィル
タ素子３をフリップチップ実装、すなわち、前記ＳＡＷ
フィルタ素子のすだれ状電極３０２の端子部と前記配線
２を導電部材（金バンプ）４で接続した後、前記ＳＡＷ
フィルタ素子３上に封止用フィルム７をかぶせ、前記フ
ィルム７の外周部と前記テープキャリアを接着し、内部
に空洞６を設けたものがある（特開平１０−１２５８２
５号公報参照）。An example of the electronic device in which the SAW filter element is mounted on the tape carrier is shown in FIG.
As shown in FIG. 3, the SAW filter element 3 is flip-chip mounted on the tape carrier (dielectric substrate) in which the wiring 2 is provided on the insulating substrate 1, that is, the SAW filter element 3.
After connecting the terminal portion of the interdigital electrode 302 of the filter element and the wiring 2 with a conductive member (gold bump) 4, the SAW
There is one in which a sealing film 7 is covered on the filter element 3, the outer peripheral portion of the film 7 and the tape carrier are adhered, and a cavity 6 is provided inside (Japanese Patent Laid-Open No. 10-12582).
(See Japanese Patent Publication No. 5).

【００１１】また、前記ＳＡＷフィルタ素子を用いた電
子装置に限らず、例えば、ＧａＡｓＦＥＴ（Field Effe
ct Transistor）などの高周波動作をする半導体チップ
を用いた半導体装置でも、内部に空洞を設けたものがあ
る。Further, not only the electronic device using the SAW filter element but also a GaAs FET (Field Effe
Some semiconductor devices that use a semiconductor chip that operates at high frequency, such as a ct transistor, have a cavity inside.

【００１２】前記ＧａＡｓＦＥＴなどの半導体チップを
用いた半導体装置では、前記半導体チップを前記テープ
キャリア上にフリップチップ実装した後、前記半導体チ
ップと前記テープキャリアの間をアンダーフィル材で封
止してしまうと、前記アンダーフィル材の誘電率により
信号遅延などが起きて、特性が劣化する。そのため、例
えば、図８に示すように、絶縁基板１の表面に配線２が
形成されたテープキャリア上に、前記半導体チップ８を
フリップチップ実装して前記半導体チップの外部端子８
０１と前記配線２を導電部材４で接続し、前記半導体チ
ップ８の外周部だけに熱硬化性樹脂９を設け、前記テー
プキャリアと半導体チップ８の間に空洞６を設けた半導
体装置が提案されている（特開２０００−１６４６３５
号公報参照）。In a semiconductor device using a semiconductor chip such as the GaAsFET, after the semiconductor chip is flip-chip mounted on the tape carrier, an underfill material is sealed between the semiconductor chip and the tape carrier. Then, a signal delay or the like occurs due to the dielectric constant of the underfill material, and the characteristics deteriorate. Therefore, for example, as shown in FIG. 8, the semiconductor chip 8 is flip-chip mounted on the tape carrier having the wiring 2 formed on the surface of the insulating substrate 1, and the external terminals 8 of the semiconductor chip 8 are mounted.
01 and the wiring 2 are connected by a conductive member 4, a thermosetting resin 9 is provided only on the outer peripheral portion of the semiconductor chip 8, and a cavity 6 is provided between the tape carrier and the semiconductor chip 8. (Japanese Patent Laid-Open No. 2000-164635)
(See Japanese Patent Publication).

【００１３】前記図８に示したような半導体装置では、
前記半導体チップ８の回路形成面８Ａ上が空洞６になっ
ているため、高周波動作をさせたときにも信号遅延など
が起きにくく、特性の劣化を防げる。In the semiconductor device as shown in FIG.
Since the cavity 6 is formed on the circuit forming surface 8A of the semiconductor chip 8, signal delay is less likely to occur even when a high frequency operation is performed, and deterioration of characteristics can be prevented.

【００１４】[0014]

【発明が解決しようとする課題】しかしながら、前記従
来の技術では、前記電子装置の内部に空洞６を設けた場
合、例えば、前記電子装置を実装基板に実装（はんだ付
け）する際の加熱などにより、前記装置内の空気が膨張
し、内部（中空部）の気圧が上昇する。However, in the prior art, when the cavity 6 is provided inside the electronic device, for example, by heating when mounting (soldering) the electronic device on a mounting board, The air in the device expands, and the air pressure inside (hollow part) rises.

【００１５】このとき、例えば、前記特開平１０−１２
５８２５号公報に記載されたような封止用フィルム７を
用いて封止した装置では、図７に示したように、前記封
止用フィルム７が膨張することで、空洞６の圧力を下げ
ることができるが、膨張することにより前記封止用フィ
ルム７に負荷がかかり、前記ＳＡＷフィルタ素子３やテ
ープキャリアから剥がれるという問題があった。At this time, for example, the above-mentioned Japanese Patent Laid-Open No. 10-12
In the device sealed using the sealing film 7 as described in Japanese Patent No. 5825, the pressure in the cavity 6 is reduced by expanding the sealing film 7 as shown in FIG. However, there is a problem in that the sealing film 7 is loaded due to expansion and is peeled off from the SAW filter element 3 and the tape carrier.

【００１６】また、前記特開２０００−１６４６３５号
公報に記載された半導体装置のようにすると、中空部
（空洞６）の空気が膨張することにより、配線２と導電
部材４の接続部、あるいは半導体チップの外部端子８０
１と導電部材４の接続部が剥がれ、接続不良になるとい
う問題があった。Further, in the case of the semiconductor device described in the above-mentioned Japanese Patent Application Laid-Open No. 2000-164635, the air in the hollow portion (cavity 6) expands, thereby connecting the wiring 2 and the conductive member 4 or the semiconductor. External terminal of chip 80
There is a problem that the connection portion between 1 and the conductive member 4 is peeled off, resulting in poor connection.

【００１７】また、図７及び図８に示した電子装置（半
導体装置）の場合、前記空洞６と装置の外部が封止用の
絶縁体で遮断されているため、前記空洞６や前記封止材
料が吸湿した水分による導通不良が起こりやすいという
問題があった。Further, in the case of the electronic device (semiconductor device) shown in FIGS. 7 and 8, since the cavity 6 and the outside of the device are shielded by a sealing insulator, the cavity 6 and the sealing device are sealed. There has been a problem that poor conduction is likely to occur due to moisture absorbed by the material.

【００１８】また、図７に示したような、封止用フィル
ム７を用いた電子装置の場合、前記封止用フィルム７の
変形により、前記電子装置の外観形状にばらつきが生じ
る。また、前記封止用フィルム７が薄くて破れやすいた
め、実装時などの取り扱いが難しいという問題があっ
た。Further, in the case of an electronic device using the sealing film 7 as shown in FIG. 7, the external shape of the electronic device varies due to the deformation of the sealing film 7. In addition, since the sealing film 7 is thin and easily broken, there is a problem that handling at the time of mounting is difficult.

【００１９】また、例えば、前記特開２０００−１６４
６３５号公報に記載された半導体装置のようにすると、
前記半導体チップ８を実装したときに前記熱硬化性樹脂
９が広がるが、その広がり量の制御が難しい。そのた
め、半導体装置ごとに、前記空洞の体積にばらつきが生
じやすく、動作特性にばらつきが生じやすいという問題
があった。Further, for example, the above-mentioned Japanese Patent Laid-Open No. 2000-164.
When the semiconductor device described in Japanese Patent No. 635 is used,
Although the thermosetting resin 9 spreads when the semiconductor chip 8 is mounted, it is difficult to control the spread amount. Therefore, there is a problem that the volume of the cavity is likely to vary from one semiconductor device to another and the operating characteristics are likely to vary.

【００２０】本発明の目的は、内部に空洞を設けた電子
装置において、空洞内の水蒸気の膨張による、空洞部の
圧力の上昇を抑制することが可能な技術を提供すること
にある。本発明の他の目的は、内部に空洞を設けた電子
装置において、耐熱衝撃性を向上させることが可能な技
術を提供することにある。本発明の他の目的は、内部に
空洞を設けた電子装置において、空洞内の水蒸気による
導通不良を防ぐことが可能な技術を提供することにあ
る。本発明の他の目的は、内部に空洞を設けた電子装置
において、空洞部の体積の制御を容易にすることが可能
な技術を提供することにある。本発明の他の目的は、内
部に空洞を設けた電子装置において、装置の小型化、軽
量化が可能な技術を提供することにある。本発明の前記
ならびにその他の目的と新規な特徴は、本明細書の記述
および添付図面によって明らかになるであろう。It is an object of the present invention to provide a technique capable of suppressing an increase in pressure in the cavity due to expansion of water vapor in the cavity in an electronic device having a cavity inside. Another object of the present invention is to provide a technique capable of improving thermal shock resistance in an electronic device having a cavity inside. Another object of the present invention is to provide a technique capable of preventing a conduction failure due to water vapor in a cavity in an electronic device having a cavity inside. Another object of the present invention is to provide a technique capable of facilitating control of the volume of a cavity in an electronic device having a cavity inside. Another object of the present invention is to provide a technique capable of reducing the size and weight of an electronic device having a cavity inside. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【００２１】[0021]

【課題を解決するための手段】本願において開示される
発明の概要を説明すれば、以下のとおりである。 （１）絶縁基板の表面に配線（導体パターン）が設けら
れた配線基板と、前記配線基板上に設けられたチップ状
素子と、前記チップ状素子の外部端子と前記配線基板の
配線とを接続する導電部材と、前記チップ状素子の周囲
を封止する封止部材からなり、前記配線基板と前記チッ
プ状素子との間に空洞を有する電子装置であって、前記
封止部材は、水蒸気を透過する水蒸気透過部材と、水蒸
気を透過しない若しくは透過しにくいキャップ部材から
なり、前記水蒸気透過部材は、前記空洞内と前記封止部
材の外部を連通している電子装置である。The outline of the invention disclosed in the present application is as follows. (1) A wiring board having wiring (conductor pattern) provided on the surface of an insulating substrate, a chip-shaped element provided on the wiring board, an external terminal of the chip-shaped element, and a wiring of the wiring board A conductive member and a sealing member that seals the periphery of the chip-shaped element, which is an electronic device having a cavity between the wiring board and the chip-shaped element, wherein the sealing member prevents water vapor. A water vapor permeable member that transmits water vapor and a cap member that does not or hardly permeates water vapor. The water vapor permeable member is an electronic device that communicates the inside of the cavity with the outside of the sealing member.

【００２２】前記（１）の手段によれば、前記封止部材
に、前記水蒸気透過部材を設けていることにより、前記
空洞内の水蒸気（空気）を、前記水蒸気透過部材を通し
て前記電子装置の外部に放出することができる。そのた
め、例えば、加熱などにより前記空洞内の水蒸気が膨張
して、前記空洞内の圧力が上昇するのを抑制することが
できる。According to the above-mentioned means (1), since the water vapor permeable member is provided in the sealing member, the water vapor (air) in the cavity is passed through the water vapor permeable member to the outside of the electronic device. Can be released to. Therefore, for example, it is possible to prevent the pressure in the cavity from rising due to the expansion of water vapor in the cavity due to heating or the like.

【００２３】このとき、前記封止部材は、前記チップ状
素子の体積よりも大きい空間を有する凹部を設けてお
き、前記チップ状素子を、前記配線基板と前記封止部材
の凹部で囲まれた空間内に設けることにより、前記外部
端子と前記配線とを、前記導電部剤を用いた金属接合で
直接接続することができる。そのため、前記外部端子と
前記配線との接続強度が高く、剥がれにくい電子装置を
得ることができる。At this time, the sealing member is provided with a recess having a space larger than the volume of the chip-shaped element, and the chip-shaped element is surrounded by the wiring substrate and the recess of the sealing member. By providing in the space, the external terminal and the wiring can be directly connected by metal bonding using the conductive material. Therefore, it is possible to obtain an electronic device in which the connection strength between the external terminal and the wiring is high and peeling is difficult.

【００２４】また、前記チップ状素子を、前記配線基板
と前記封止部材の凹部で囲まれた空洞内に設けるため、
前記チップ状素子と前記配線基板の間に封止材料がな
い。そのため、従来のように、前記チップ状素子の周囲
を絶縁体で封止した電子装置に比べ、動作特性のばらつ
きを低減することができる。Further, since the chip-shaped element is provided in the cavity surrounded by the concave portion of the wiring board and the sealing member,
There is no sealing material between the chip-shaped element and the wiring board. Therefore, as compared with the conventional electronic device in which the periphery of the chip-shaped element is sealed with an insulator, it is possible to reduce variations in operating characteristics.

【００２５】またこのとき、前記水蒸気透過部材として
フィルム状の部材を用い、前記フィルム状の水蒸気透過
部材を、前記配線基板と前記キャップ部材の間に設ける
ことにより、電子装置を薄型化することが可能である。
また、前記フィルム状の材料を用いることにより、従来
のセラミックパッケージに比べ、軽量化が可能になる。At this time, a film-shaped member is used as the water vapor permeable member, and the film water vapor permeable member is provided between the wiring board and the cap member, whereby the electronic device can be made thin. It is possible.
Further, by using the film-shaped material, the weight can be reduced as compared with the conventional ceramic package.

【００２６】また、前記（１）の手段において、前記チ
ップ状素子としては、例えば、圧電材料の表面にすだれ
状電極（櫛型電極）が設けられた弾性表面波素子を用
い、前記すだれ状電極と前記配線基板が向かい合うよう
に設けるのが好ましい。このとき、前記弾性表面波素子
は、前記封止部材と前記配線基板で囲まれた空洞内に設
けられているため、前記すだれ状電極が形成された面の
全面に空洞ができ、前記弾性表面波素子の特性が劣化す
るのを防げる。Further, in the above-mentioned means (1), as the chip-shaped element, for example, a surface acoustic wave element having a comb-shaped electrode provided on the surface of a piezoelectric material is used. It is preferable that the wiring board and the wiring board face each other. At this time, since the surface acoustic wave element is provided in the cavity surrounded by the sealing member and the wiring board, a cavity is formed on the entire surface on which the interdigital electrode is formed. It is possible to prevent the characteristics of the wave element from deteriorating.

【００２７】（２）絶縁基板の表面に配線（導体パター
ン）が形成された配線基板上にチップ状素子を配置し、
前記配線基板の配線と前記チップ状素子の外部端子とを
接続するチップ状素子実装工程と、前記チップ状素子実
装工程の後、前記チップ状素子の周囲を、前記配線基板
と前記チップ状素子の間に空洞ができるように封止する
封止工程とを備える電子装置の製造方法であって、前記
配線基板は、前記チップ状素子を配置する領域が開口し
た水蒸気透過性フィルムが形成されており、前記封止工
程は、前記チップ状素子上に、水蒸気を透過しない若し
くは透過しにくいキャップ部材をかぶせ、前記水蒸気透
過性フィルムを介して前記キャップ部材と前記配線基板
とを接着する電子装置の製造方法である。(2) A chip-shaped element is arranged on a wiring board having wiring (conductor pattern) formed on the surface of an insulating board,
After the chip-shaped element mounting step of connecting the wiring of the wiring board and the external terminal of the chip-shaped element, after the chip-shaped element mounting step, the periphery of the chip-shaped element is divided into the wiring board and the chip-shaped element. A method of manufacturing an electronic device, comprising a sealing step of sealing so as to form a cavity between the wiring board and a water vapor permeable film in which a region in which the chip-shaped element is arranged is opened. In the sealing step, the chip-shaped element is covered with a cap member that is impermeable or impermeable to water vapor, and the cap member and the wiring board are bonded to each other via the water vapor permeable film. Is the way.

【００２８】前記（２）の手段によれば、前記水蒸気透
過性フィルムが形成された配線基板を用い、前記水蒸気
透過性フィルムに形成された開口部内に前記チップ状素
子を実装し、前記キャップ部材をかぶせて封止すること
により、前記チップ状素子と前記配線基板の間に容易に
空洞を設けることができる。According to the means (2), the wiring board on which the water vapor permeable film is formed is used, the chip-shaped element is mounted in the opening formed in the water vapor permeable film, and the cap member is formed. By covering with and sealing, a cavity can be easily provided between the chip-shaped element and the wiring board.

【００２９】また、前記配線基板上に前記水蒸気透過性
フィルムを形成しておくことにより、前記キャップ部材
をかぶせて封止した後でも、前記電子装置の空洞内の水
蒸気を、前記水蒸気透過性フィルムを通して前記電子装
置の外部に放出することができる。そのため、前記電子
装置の加熱時などに、前記空洞内の水蒸気（空気）が膨
張して、前記配線基板が剥がれたり、前記配線と前記外
部端子の接続部が剥がれたりするのを防げ、耐熱衝撃性
の高い電子装置を得ることができる。Further, by forming the water vapor permeable film on the wiring substrate, even after the cap member is covered and sealed, the water vapor in the cavity of the electronic device can be removed from the water vapor permeable film. To the outside of the electronic device. Therefore, when the electronic device is heated, water vapor (air) in the cavity expands to prevent the wiring board from peeling off or the connection between the wiring and the external terminal from peeling off, and thermal shock resistance is improved. A highly reliable electronic device can be obtained.

【００３０】またこのとき、前記水蒸気透過性フィルム
及び前記キャップ部材は、前記チップ状素子の外側を覆
うように形成するため、前記チップ状素子と前記配線基
板の間には封止部材がない。すなわち、前記チップ状素
子は、前記配線基板と向かい合う面の全面が露出するた
め、空洞の体積のばらつきにより電子装置ごとの動作特
性にばらつきが生じることを防げる。At this time, since the water vapor permeable film and the cap member are formed so as to cover the outside of the chip-shaped element, there is no sealing member between the chip-shaped element and the wiring board. That is, since the entire surface of the chip-shaped element facing the wiring board is exposed, it is possible to prevent variations in operating characteristics among electronic devices due to variations in the volume of the cavity.

【００３１】（３）絶縁基板の表面に配線（導体パター
ン）が形成された配線基板上にチップ状素子を配置し、
前記配線基板の配線と前記チップ状素子の外部端子とを
接続するチップ状素子実装工程と、前記チップ状素子実
装工程の後、前記チップ状素子の周囲を、前記配線基板
と前記チップ状素子の間に空洞ができるように封止する
封止工程とを備える電子装置の製造方法であって、前記
チップ状素子実装工程は、前記配線基板上に、前記チッ
プ状素子を配置する領域が開口した水蒸気透過性フィル
ムを接着するフィルム接着工程と、前記配線基板上にチ
ップ状素子を配置し、前記配線基板の配線と前記チップ
状素子の外部端子とを接続するチップ接続工程とを備
え、前記封止工程は、前記チップ状素子上に、水蒸気を
透過しない若しくは透過しにくいキャップ部材をかぶ
せ、前記水蒸気透過性フィルムを介して前記キャップ部
材と前記配線基板とを接着する電子装置の製造方法であ
る。(3) A chip-shaped element is arranged on a wiring substrate having wiring (conductor pattern) formed on the surface of an insulating substrate,
After the chip-shaped element mounting step of connecting the wiring of the wiring board and the external terminal of the chip-shaped element, after the chip-shaped element mounting step, the periphery of the chip-shaped element is divided into the wiring board and the chip-shaped element. A method of manufacturing an electronic device, comprising: a sealing step of sealing so that a cavity is formed between the chip-shaped element mounting step and the wiring board; A film bonding step of bonding a water vapor permeable film, a chip connecting step of arranging a chip-shaped element on the wiring board and connecting the wiring of the wiring board and an external terminal of the chip-shaped element, In the stopping step, the chip-shaped element is covered with a cap member that does not or does not allow water vapor to pass therethrough, and the cap member and the wiring board are attached via the water vapor permeable film. A method for producing a wear electronic device.

【００３２】前記（３）の手段によれば、前記チップ状
素子実装工程において、前記フィルム接着工程と、前記
チップ接続工程とを設けることにより、前記水蒸気透過
性フィルムに形成された開口部内に前記チップ状素子を
実装し、前記キャップ部材をかぶせて封止することで、
前記チップ状素子と前記配線基板の間に容易に空洞を設
けることができる。According to the above-mentioned means (3), in the step of mounting the chip-shaped element, the film bonding step and the chip connecting step are provided, so that the opening is formed in the opening formed in the water vapor permeable film. By mounting a chip-shaped element and covering with the cap member to seal it,
A cavity can be easily provided between the chip-shaped element and the wiring board.

【００３３】また、前記フィルム接着工程と、前記チッ
プ接続工程とを設けることにより、前記キャップ部材を
かぶせて封止した後でも、前記電子装置の空洞内の水蒸
気を、前記水蒸気透過性フィルムを通して前記電子装置
の外部に放出することができる。そのため、前記電子装
置の加熱時などに、前記空洞内の水蒸気（空気）が膨張
して、前記配線基板が剥がれたり、前記配線と前記外部
端子の接続部が剥がれたりするのを防げ、耐熱衝撃性の
高い電子装置を得ることができる。Further, by providing the film bonding step and the chip connecting step, the water vapor in the cavity of the electronic device is passed through the water vapor permeable film through the water vapor permeable film even after the cap member is covered and sealed. It can be released to the outside of the electronic device. Therefore, when the electronic device is heated, water vapor (air) in the cavity expands to prevent the wiring board from peeling off or the connection between the wiring and the external terminal from peeling off, and thermal shock resistance is improved. A highly reliable electronic device can be obtained.

【００３４】またこのとき、前記水蒸気透過性フィルム
及び前記キャップ部材は、前記チップ状素子の外側を覆
うように形成するため、前記チップ状素子と前記配線基
板の間には封止部材がない。すなわち、前記チップ状素
子は、前記配線基板と向かい合う面の全面が露出するた
め、空洞の体積のばらつきにより電子装置ごとの動作特
性にばらつきが生じることを防げる。At this time, since the water vapor permeable film and the cap member are formed so as to cover the outside of the chip-shaped element, there is no sealing member between the chip-shaped element and the wiring board. That is, since the entire surface of the chip-shaped element facing the wiring board is exposed, it is possible to prevent variations in operating characteristics among electronic devices due to variations in the volume of the cavity.

【００３５】（４）絶縁基板の表面に配線（導体パター
ン）が形成された配線基板を形成する配線基板形成工程
と、前記配線基板形成工程で形成された配線基板上にチ
ップ状素子を配置し、前記配線基板の配線と前記チップ
状素子の外部端子とを接続するチップ状素子実装工程
と、前記チップ状素子実装工程の後、前記チップ状素子
の周囲を、前記配線基板と前記チップ状素子の間に空洞
ができるように封止する封止工程とを備える電子装置の
製造方法であって、前記配線基板形成工程は、前記絶縁
基板の表面に前記配線を形成する配線形成工程と、前記
配線形成工程の後、前記絶縁基板上に、前記チップ状素
子を配置する領域が開口した水蒸気透過性フィルムを接
着するフィルム接着工程とを備え、前記封止工程は、前
記チップ状素子上に、水蒸気を透過しない若しくは透過
しにくいキャップ部材をかぶせ、前記水蒸気透過性フィ
ルムを介して前記キャップ部材と前記配線基板とを接着
する電子装置の製造方法である。(4) A wiring board forming step of forming a wiring board having wiring (conductor pattern) formed on the surface of an insulating board, and arranging chip-like elements on the wiring board formed in the wiring board forming step. A chip-shaped element mounting step of connecting the wiring of the wiring board and an external terminal of the chip-shaped element, and the wiring board and the chip-shaped element around the chip-shaped element after the chip-shaped element mounting step. A method of manufacturing an electronic device, comprising: a sealing step of sealing so that a cavity is formed between the wiring board and the wiring board forming step, the wiring forming step of forming the wiring on the surface of the insulating substrate; After the wiring forming step, a film adhering step of adhering a water vapor permeable film in which an area for disposing the chip-shaped element is opened on the insulating substrate, wherein the sealing step is performed on the chip-shaped element. Covered not transmitted or the transmission hardly cap member steam, a method of manufacturing an electronic device to bond with the wiring board and the cap member through the water vapor permeable film.

【００３６】前記（４）の手段によれば、前記配線基板
形成工程において、前記配線形成工程と、前記フィルム
接着工程とを設けることにより、前記水蒸気透過性フィ
ルムに形成された開口部内に前記チップ状素子を実装
し、前記キャップ部材をかぶせて封止することで、前記
チップ状素子と前記配線基板の間に容易に空洞を設ける
ことができる。According to the above-mentioned means (4), by providing the wiring forming step and the film adhering step in the wiring board forming step, the chip is formed in the opening formed in the water vapor permeable film. By mounting a chip-shaped element and covering with the cap member for sealing, a cavity can be easily provided between the chip-shaped element and the wiring board.

【００３７】また、前記フィルム接着工程を設けること
により、前記キャップ部材をかぶせて封止した後でも、
前記電子装置の空洞内の水蒸気を、前記水蒸気透過性フ
ィルムを通して前記電子装置の外部に放出することがで
きる。そのため、前記電子装置の加熱時などに、前記空
洞内の水蒸気（空気）が膨張して、前記配線基板が剥が
れたり、前記配線と前記外部端子の接続部が剥がれたり
するのを防げ、耐熱衝撃性の高い電子装置を得ることが
できる。Further, by providing the film bonding step, even after the cap member is covered and sealed,
Water vapor in the cavity of the electronic device may be discharged to the outside of the electronic device through the water vapor permeable film. Therefore, when the electronic device is heated, water vapor (air) in the cavity expands to prevent the wiring board from peeling off or the connection between the wiring and the external terminal from peeling off, and thermal shock resistance is improved. A highly reliable electronic device can be obtained.

【００３８】またこのとき、前記水蒸気透過性フィルム
及び前記キャップ部材は、前記チップ状素子の外側を覆
うように形成するため、前記チップ状素子と前記配線基
板の間には封止部材がない。すなわち、前記チップ状素
子は、前記配線基板と向かい合う面の全面が露出するた
め、空洞の体積のばらつきにより電子装置ごとの動作特
性にばらつきが生じることを防げる。At this time, since the water vapor permeable film and the cap member are formed so as to cover the outside of the chip-shaped element, there is no sealing member between the chip-shaped element and the wiring board. That is, since the entire surface of the chip-shaped element facing the wiring board is exposed, it is possible to prevent variations in operating characteristics among electronic devices due to variations in the volume of the cavity.

【００３９】（５）絶縁基板の表面に配線（導体パター
ン）が形成された配線基板上にチップ状素子を配置し、
前記配線基板の配線と前記チップ状素子の外部端子とを
接続するチップ状素子実装工程と、前記チップ状素子実
装工程の後、前記チップ状素子の周囲を、前記配線基板
と前記チップ状素子の間に空洞ができるように封止する
封止工程とを備える電子装置の製造方法であって、前記
封止工程は、前記チップ状素子が実装された配線基板上
に、水蒸気を透過する水蒸気透過性部材と、水蒸気を透
過しない若しくは透過しにくいキャップ部材とからな
り、前記チップ状素子の体積よりも大きい空間を有する
凹部が形成された封止部材をかぶせ、前記封止部材と前
記配線基板とを接着して封止する電子装置の製造方法で
ある。(5) A chip-shaped element is arranged on a wiring board having wiring (conductor pattern) formed on the surface of an insulating board,
After the chip-shaped element mounting step of connecting the wiring of the wiring board and the external terminal of the chip-shaped element, after the chip-shaped element mounting step, the periphery of the chip-shaped element is divided into the wiring board and the chip-shaped element. A method of manufacturing an electronic device, comprising: a sealing step of sealing so that a cavity is formed between the wiring board on which the chip-shaped element is mounted; And a sealing member having a concave portion having a space larger than the volume of the chip-shaped element, the sealing member and the wiring board. Is a method for manufacturing an electronic device in which the above are bonded and sealed.

【００４０】前記（５）の手段によれば、前記封止工程
において、前記チップ状素子が実装された配線基板上
に、水蒸気を透過する水蒸気透過性部材と、水蒸気を透
過しない若しくは透過しにくいキャップ部材とからな
り、前記チップ状素子の体積よりも大きい空間を有する
凹部が形成された封止部材をかぶせて封止することで、
前記チップ状素子と前記配線基板の間に容易に空洞を設
けることができる。According to the above-mentioned means (5), in the sealing step, the water vapor permeable member which transmits water vapor and the water vapor which does not permeate or hardly permeate on the wiring board on which the chip-shaped element is mounted. By capping and sealing with a sealing member having a recess having a space larger than the volume of the chip-shaped element,
A cavity can be easily provided between the chip-shaped element and the wiring board.

【００４１】また、前記封止部材に前記水蒸気透過性部
材を設けることにより、前記封止部材をかぶせて封止し
た後でも、前記電子装置の空洞内の水蒸気を、前記水蒸
気透過性部材を通して前記電子装置の外部に放出するこ
とができる。そのため、前記電子装置の加熱時などに、
前記空洞内の水蒸気（空気）が膨張して、前記配線基板
が剥がれたり、前記配線と前記外部端子の接続部が剥が
れたりするのを防げ、耐熱衝撃性の高い電子装置を得る
ことができる。Further, by providing the water vapor permeable member on the sealing member, the water vapor in the cavity of the electronic device is passed through the water vapor permeable member through the water vapor permeable member even after the sealing member is covered and sealed. It can be released to the outside of the electronic device. Therefore, when heating the electronic device,
It is possible to prevent expansion of water vapor (air) in the cavity and peeling of the wiring board and peeling of the connection portion between the wiring and the external terminal, and it is possible to obtain an electronic device having high thermal shock resistance.

【００４２】またこのとき、前記水蒸気透過性部材及び
前記キャップ部材は、前記チップ状素子の外側を覆うよ
うに形成するため、前記チップ状素子と前記配線基板の
間には封止部材がない。すなわち、前記チップ状素子
は、前記配線基板と向かい合う面の全面が露出するた
め、空洞の体積のばらつきにより電子装置ごとの動作特
性にばらつきが生じることを防げる。At this time, since the water vapor permeable member and the cap member are formed so as to cover the outside of the chip-shaped element, there is no sealing member between the chip-shaped element and the wiring board. That is, since the entire surface of the chip-shaped element facing the wiring board is exposed, it is possible to prevent variations in operating characteristics among electronic devices due to variations in the volume of the cavity.

【００４３】また、前記（２）の手段から前記（５）の
手段において、前記チップ状素子実装工程としては、例
えば、圧電材料の表面にすだれ状電極（櫛型電極）が設
けられた弾性表面波素子を用い、前記すだれ状電極と前
記配線基板が向かい合うように設けるのが好ましい。こ
のとき、前記弾性表面波素子は、前記封止部材と前記配
線基板で囲まれた空洞内に設けられているため、前記す
だれ状電極が形成された面の全面に空洞ができ、前記弾
性表面波素子の特性が劣化するのを防げる。Further, in the above-mentioned means (2) to (5), in the step of mounting the chip-shaped element, for example, an elastic surface in which a comb-shaped electrode is provided on the surface of a piezoelectric material is provided. It is preferable to use a wave element and to provide the interdigital electrodes and the wiring board so as to face each other. At this time, since the surface acoustic wave element is provided in the cavity surrounded by the sealing member and the wiring board, a cavity is formed on the entire surface on which the interdigital electrode is formed. It is possible to prevent the characteristics of the wave element from deteriorating.

【００４４】（６）絶縁基板の表面に配線（導体パター
ン）が設けられた配線基板上に、絶縁性の封止材料が設
けられており、前記配線基板上の前記封止材料が設けら
れた面にチップ状素子を設けたときに、前記配線基板と
前記チップ状素子の間に空洞が設けられる、電子装置の
製造に用いる配線基板であって、前記封止材料は、水蒸
気を透過する水蒸気透過性フィルムであり、前記チップ
状素子を設ける領域が開口している配線基板である。(6) An insulating sealing material is provided on the wiring board having wiring (conductor pattern) provided on the surface of the insulating board, and the sealing material on the wiring board is provided. A wiring board used for manufacturing an electronic device, wherein a cavity is provided between the wiring board and the chip-like element when a chip-like element is provided on a surface thereof, wherein the sealing material is water vapor permeable to water vapor. The wiring board is a transparent film and has an opening in a region where the chip-shaped element is provided.

【００４５】前記（６）の手段によれば、前記配線基板
上に、前記水蒸気透過性フィルムを設けることにより、
前記配線基板上に前記チップ状素子を設け、前記チップ
状素子の周囲を封止したときに、前記配線基板と前記チ
ップ状素子との間に空洞を容易に設けることができる。According to the means (6), by providing the water vapor permeable film on the wiring board,
When the chip-shaped element is provided on the wiring board and the periphery of the chip-shaped element is sealed, a cavity can be easily provided between the wiring board and the chip-shaped element.

【００４６】また、前記チップ状素子の周囲を封止した
後でも、前記空洞内の水蒸気を、前記水蒸気透過性フィ
ルムを通して外部に放出することができる。そのため、
前記配線基板を用いることにより、前記空洞内の水蒸気
（空気）が膨張して、前記配線基板が剥がれたり、前記
配線と前記外部端子の接続部が剥がれたりするのを防
げ、耐熱衝撃性の高い電子装置を製造することができ
る。Even after the periphery of the chip-shaped element is sealed, the water vapor in the cavity can be discharged to the outside through the water vapor permeable film. for that reason,
By using the wiring board, it is possible to prevent water vapor (air) in the cavity from expanding and peeling off the wiring board, or peeling off the connection portion between the wiring and the external terminal, and high thermal shock resistance. Electronic devices can be manufactured.

【００４７】（７）配線基板上に実装されたチップ状素
子を封止する封止部材であって、水蒸気を透過する水蒸
気透過性部材と、水蒸気を透過しない若しくは透過しに
くいキャップ部からなり、前記チップ状素子の体積より
も大きい空間を有する凹部が設けられている封止部材で
ある。(7) A sealing member for sealing the chip-shaped element mounted on the wiring board, which comprises a water vapor permeable member that allows water vapor to pass therethrough and a cap portion that does not or does not allow water vapor to pass therethrough. The sealing member is provided with a recess having a space larger than the volume of the chip-shaped element.

【００４８】前記（７）の手段によれば、前記封止部材
に、前記チップ状素子の体積よりも大きい空間を有する
凹部が設けられていることにより、配線基板上に実装さ
れたチップ状素子の周囲を封止する際に、前記チップ状
素子と前記配線基板の間に、容易に空洞を設けることが
できる。According to the above-mentioned means (7), since the sealing member is provided with the concave portion having a space larger than the volume of the chip-shaped element, the chip-shaped element mounted on the wiring board is formed. A cavity can be easily provided between the chip-shaped element and the wiring board when sealing the periphery of.

【００４９】また、前記封止部材を用いて前記チップ状
素子の周囲を封止した後でも、前記空洞内の水蒸気を、
前記水蒸気透過性フィルムを通して外部に放出すること
ができる。そのため、前記封止部材を用いることによ
り、前記空洞内の水蒸気（空気）が膨張して、前記配線
基板が剥がれたり、前記配線と前記外部端子の接続部が
剥がれたりするのを防げ、耐熱衝撃性の高い電子装置を
製造することができる。Even after the periphery of the chip-shaped element is sealed with the sealing member, the water vapor in the cavity is
It can be released to the outside through the water vapor permeable film. Therefore, by using the sealing member, it is possible to prevent water vapor (air) in the cavity from expanding and peeling off the wiring board, or peeling off the connection portion between the wiring and the external terminal, and thermal shock resistance. A highly reliable electronic device can be manufactured.

【００５０】またこのとき、前記水蒸気透過性部材はフ
ィルム状であり、前記キャップ部の、前記凹部の開口面
側に設けられていることにより、前記封止部材を薄型化
することができ、薄型の電子装置を製造することができ
る。Further, at this time, since the water vapor permeable member is in the form of a film and is provided on the opening side of the recess of the cap portion, the sealing member can be made thin and thin. The electronic device can be manufactured.

【００５１】以下、本発明について、図面を参照して実
施の形態（実施例）とともに詳細に説明する。なお、実
施例を説明するための全図において、同一機能を有する
ものは、同一符号をつけ、その繰り返しの説明は省略す
る。Hereinafter, the present invention will be described in detail with reference to the drawings together with the embodiments (embodiments). In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

【００５２】[0052]

【発明の実施の形態】（実施例１）図１は、本発明によ
る実施例１の電子装置の概略構成を示す模式図であり、
図１（ａ）は電子装置の平面図、図１（ｂ）は図１
（ａ）に示した電子装置のＡ−Ａ’線での断面図であ
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) FIG. 1 is a schematic diagram showing a schematic configuration of an electronic device according to Embodiment 1 of the present invention.
1A is a plan view of the electronic device, and FIG. 1B is FIG.
It is sectional drawing in the AA 'line of the electronic device shown to (a).

【００５３】図１（ａ）及び図１（ｂ）において、１は
絶縁基板、２は配線、２０１は第１導体膜、２０２は第
２導体膜（外部端子）、２０３は銅めっき（ビア）、２
０４は端子めっき、３はチップ状素子（弾性表面波フィ
ルタ素子）、３０１は圧電基板、３０２はすだれ状電
極、４は導電部材（金バンプ）、５は封止部材、５Ａは
封止部材の凹部、５０１は水蒸気透過性フィルム、５０
２はキャップ部材、６は空洞である。In FIGS. 1A and 1B, 1 is an insulating substrate, 2 is wiring, 201 is a first conductor film, 202 is a second conductor film (external terminal), and 203 is copper plating (via). Two
Reference numeral 04 is terminal plating, 3 is a chip-shaped element (surface acoustic wave filter element), 301 is a piezoelectric substrate, 302 is a comb-shaped electrode, 4 is a conductive member (gold bump), 5 is a sealing member, and 5A is a sealing member. Recesses, 501 is a water vapor permeable film, 50
2 is a cap member, and 6 is a cavity.

【００５４】本実施例１の電子装置は、図１に示すよう
に、絶縁基板１の表面に所定パターンの配線２が設けら
れた配線基板と、前記配線基板上に設けられたチップ状
素子３と、前記チップ状素子３の外部端子と前記配線基
板の配線２とを接続する導電部材４と、前記チップ状素
子３の周囲を封止する封止部材５からなり、前記配線基
板（絶縁基板１）と前記チップ状素子３との間に空洞６
が設けられている。As shown in FIG. 1, the electronic device according to the first embodiment has a wiring board in which wiring 2 having a predetermined pattern is provided on the surface of an insulating substrate 1, and a chip-shaped element 3 provided on the wiring board. A conductive member 4 for connecting an external terminal of the chip-shaped element 3 to the wiring 2 of the wiring board, and a sealing member 5 for sealing the periphery of the chip-shaped element 3. A cavity 6 is provided between 1) and the chip-shaped element 3.
Is provided.

【００５５】また、前記配線２は、前記絶縁基板１の第
１主面、言い換えると前記チップ状素子３が設けられた
面の第１導体膜２０１と、前記絶縁基板１の第１主面の
裏面（第２主面）に設けられた第２導体膜２０２と、前
記絶縁基板１に設けられた開口部（ビア穴）１Ａを通し
て前記第１導体膜２０１と前記第２導体膜２０２とを電
気的に接続する銅めっき２０３と、前記第２導体膜２０
２及び前記銅めっき２０３の表面に設けられた端子めっ
き２０４からなる。このとき、図示は省略するが、前記
端子めっき２０４は、例えば、ニッケルめっきを下地と
した金めっきからなる。The wiring 2 is formed on the first main surface of the insulating substrate 1, that is, the first conductor film 201 on the surface on which the chip-shaped element 3 is provided, and the first main surface of the insulating substrate 1. The first conductor film 201 and the second conductor film 202 are electrically connected to each other through the second conductor film 202 provided on the back surface (second main surface) and the opening (via hole) 1A provided in the insulating substrate 1. Plating 203 that is electrically connected to the second conductor film 20
2 and terminal plating 204 provided on the surface of the copper plating 203. At this time, although not shown, the terminal plating 204 is, for example, gold plating with nickel plating as a base.

【００５６】また、本実施例１の電子装置では、前記チ
ップ状素子３は、圧電基板３０１の表面にすだれ状電極
３０２が設けられた弾性表面波フィルタ素子であり、前
記すだれ状電極３０２が、前記配線基板（絶縁基板１）
と向かい合うように設けられている。このとき、前記す
だれ状電極３０２と前記配線基板の配線２を接続する導
電部材４には、金バンプを用い、金バンプ４と前記配線
２の表面の端子めっき（金めっき）２０４は金金接合と
する。Further, in the electronic device of the first embodiment, the chip-shaped element 3 is a surface acoustic wave filter element in which the interdigital electrode 302 is provided on the surface of the piezoelectric substrate 301, and the interdigital electrode 302 is The wiring board (insulating board 1)
It is installed so that it faces each other. At this time, a gold bump is used for the conductive member 4 connecting the interdigital electrode 302 and the wiring 2 of the wiring board, and the terminal plating (gold plating) 204 on the surface of the gold bump 4 and the wiring 2 is gold-gold bonded. And

【００５７】また、前記封止部材５は、前記封止部材５
は水蒸気を透過する水蒸気透過性フィルム５０１と、水
蒸気を透過しない若しくは透過しにくいキャップ部材５
０２からなり、前記チップ状素子３の体積よりも大きい
空間を有する凹部５Ａが設けられている。そのため、前
記チップ状素子３は、前記配線基板（絶縁基板１）と前
記封止部材の凹部５Ａで囲まれた空洞６内に設けられて
いる。またこのとき、前記水蒸気透過性フィルム５０１
は、前記空洞６と前記封止部材５の外部を連通してい
る。Further, the sealing member 5 is the sealing member 5
Is a water vapor permeable film 501 that allows water vapor to pass therethrough, and a cap member 5 that does not or does not allow water vapor to pass through
And a recess 5A having a space larger than the volume of the chip-shaped element 3 is provided. Therefore, the chip-shaped element 3 is provided in the cavity 6 surrounded by the wiring substrate (insulating substrate 1) and the recess 5A of the sealing member. At this time, the water vapor permeable film 501
Communicates the cavity 6 with the outside of the sealing member 5.

【００５８】本実施例１の電子装置によれば、前記封止
部材５に、前記水蒸気透過フィルム５０１を設けている
ことにより、前記空洞６内の水蒸気（空気）を、前記水
蒸気透過フィルムを通して前記電子装置の外部に放出す
ることができる。そのため、例えば、加熱などにより前
記空洞６の水蒸気が膨張して、前記空洞６の圧力が上昇
するのを抑制することができる。According to the electronic device of the first embodiment, since the sealing member 5 is provided with the water vapor permeable film 501, the water vapor (air) in the cavity 6 is passed through the water vapor permeable film to form the water vapor permeable film 501. It can be released to the outside of the electronic device. Therefore, for example, it is possible to prevent the steam in the cavity 6 from expanding due to heating or the like and the pressure in the cavity 6 from rising.

【００５９】このとき、前記封止部材５は、図１（ａ）
及び図１（ｂ）に示したように、前記チップ状素子３の
体積よりも大きい体積の凹部５Ａを設けておき、前記チ
ップ状素子３を、前記配線基板と前記封止部材５の凹部
５Ａで囲まれた空洞６に設けることにより、前記弾性表
面波フィルタ素子３のすだれ状電極３０２と前記配線基
板の配線２（金めっき２０４）とを、前記金バンプ４を
用いた金金接合で直接接続することができる。そのた
め、前記すだれ状電極３０２と前記配線２との接続強度
が高く、剥がれにくい電子装置を得ることができる。At this time, the sealing member 5 has the structure shown in FIG.
Also, as shown in FIG. 1B, a concave portion 5A having a volume larger than that of the chip-shaped element 3 is provided, and the chip-shaped element 3 is formed in the concave portion 5A of the wiring board and the sealing member 5. By providing in the cavity 6 surrounded by, the interdigital electrode 302 of the surface acoustic wave filter element 3 and the wiring 2 (gold plating 204) of the wiring board are directly bonded by gold-gold bonding using the gold bumps 4. Can be connected. Therefore, it is possible to obtain an electronic device in which the connection strength between the interdigital electrode 302 and the wiring 2 is high and peeling is difficult.

【００６０】また、前記水蒸気透過性フィルム５０１を
通して、前記空洞６の水分を装置の外部に放出すること
ができるため、空洞６内の水分による導通不良を防ぐこ
とができる。Further, since the moisture in the cavity 6 can be discharged to the outside of the device through the water vapor permeable film 501, the conduction failure due to the moisture in the cavity 6 can be prevented.

【００６１】またこのとき、前記水蒸気透過性フィルム
５０１を介して、前記配線基板と前記キャップ部材５０
２を接着することにより、電子装置を薄型化することが
可能である。また、前記配線基板、前記水蒸気透過性フ
ィルム５０１及び前記キャップ部材５０２を用いること
により、従来のセラミックパッケージに比べ、軽量化が
可能になる。At this time, the wiring board and the cap member 50 are interposed with the water vapor permeable film 501 interposed therebetween.
By bonding 2 together, the electronic device can be made thinner. Further, by using the wiring board, the water vapor permeable film 501 and the cap member 502, the weight can be reduced as compared with the conventional ceramic package.

【００６２】また、前記配線基板と前記封止部材の凹部
５Ａで囲まれた空洞６に前記弾性表面波フィルタ素子３
を設けることにより、前記弾性表面波フィルタ素子３
の、前記配線基板と向かい合う面は全面が空洞になる。
そのため、前記図８に示したような、従来の、熱硬化性
樹脂で周囲を封止した半導体装置に比べ、前記空洞６の
体積の制御が容易であり、電子装置ごとに動作特性のば
らつきが生じるのを防ぐことができる。The surface acoustic wave filter element 3 is placed in the cavity 6 surrounded by the wiring board and the recess 5A of the sealing member.
By providing the surface acoustic wave filter element 3
The entire surface of the surface facing the wiring board is hollow.
Therefore, it is easier to control the volume of the cavity 6 as compared with the conventional semiconductor device whose periphery is sealed with a thermosetting resin as shown in FIG. It can be prevented from occurring.

【００６３】図２及び図３は、本実施例１の電子装置の
製造方法を説明するための模式図であり、図２（ａ）、
図２（ｂ）、図２（ｃ）、及び図２（ｄ）は配線基板を
形成する各工程の断面図、図３（ａ）及び図３（ｂ）は
チップ状素子を実装して電子装置を製造する各工程の断
面図である。2 and 3 are schematic views for explaining the method of manufacturing the electronic device according to the first embodiment, and FIG.
2 (b), 2 (c), and 2 (d) are cross-sectional views of respective steps for forming a wiring board, and FIGS. 3 (a) and 3 (b) are electronic devices in which chip-shaped elements are mounted. It is sectional drawing of each process which manufactures a device.

【００６４】以下、図２及び図３に沿って、本実施例１
の電子装置の製造方法について説明するが、従来の製造
方法と同様の工程については、その詳細な説明を省略す
る。Hereinafter, the first embodiment will be described with reference to FIGS.
The method of manufacturing the electronic device will be described, but detailed description of steps similar to those of the conventional manufacturing method will be omitted.

【００６５】まず、図２（ａ）に示すように、絶縁基板
１の両面に、第１導体膜２０１及び第２導体膜２０２が
形成された両面銅張板の所定位置に、開口部（ビア穴）
１Ａを形成する。前記絶縁基板１には、例えば、ポリイ
ミドテープやガラス布基材エポキシ樹脂積層板等を用
い、前記第１導体膜２０１及び前記第２導体膜２０２に
は、例えば、電解銅箔や圧延銅箔を用いる。また、前記
開口部１Ａは、例えば、炭酸ガスレーザやエキシマレー
ザなどを用いたレーザエッチングで形成する。First, as shown in FIG. 2A, an opening (via) is formed at a predetermined position of the double-sided copper clad plate having the first conductor film 201 and the second conductor film 202 formed on both surfaces of the insulating substrate 1. hole)
Form 1A. For example, a polyimide tape or a glass cloth-based epoxy resin laminated plate is used for the insulating substrate 1, and an electrolytic copper foil or a rolled copper foil is used for the first conductor film 201 and the second conductor film 202. To use. The opening 1A is formed by laser etching using, for example, a carbon dioxide gas laser or an excimer laser.

【００６６】次に、図２（ｂ）に示すように、前記第１
導体膜２０１の表面全面、及び前記開口部１Ａの内部に
銅めっき２０３を形成する。前記銅めっき２０３は、例
えば、電気銅めっきにより形成する。Next, as shown in FIG. 2B, the first
Copper plating 203 is formed on the entire surface of the conductor film 201 and inside the opening 1A. The copper plating 203 is formed by electrolytic copper plating, for example.

【００６７】次に、図２（ｃ）に示すように、前記銅め
っき２０３が積層された第１導体膜２０１、及び前記第
２導体膜２０２をエッチング処理して、所定のパターン
の配線２を形成した後、前記配線２の表面に端子めっき
２０４を形成する。このとき、前記端子めっき２０４
は、例えば、ニッケルめっきを下地として金めっきを行
い形成する。Next, as shown in FIG. 2C, the first conductor film 201 and the second conductor film 202 on which the copper plating 203 is laminated are etched to form the wiring 2 having a predetermined pattern. After the formation, the terminal plating 204 is formed on the surface of the wiring 2. At this time, the terminal plating 204
Is formed by, for example, gold plating using nickel plating as a base.

【００６８】次に、図２（ｄ）に示すように、前記配線
２が形成された絶縁基板１の、チップ状素子３を実装す
る面に、前記チップ状素子３を配置する領域が開口した
水蒸気透過性フィルム５０１を貼り付ける。このとき、
前記水蒸気透過性フィルム５０１には、例えば、発泡性
のＰＴＦＥ（ポリテトラフルオロエチレン）を用いる。
また、図示は省略するが、前記水蒸気透過性フィルム５
０１の両面には、接着材層を設けておく。Next, as shown in FIG. 2D, a region in which the chip-shaped element 3 is arranged is opened on the surface of the insulating substrate 1 on which the wiring 2 is formed, on which the chip-shaped element 3 is mounted. A water vapor permeable film 501 is attached. At this time,
For the water vapor permeable film 501, for example, foamable PTFE (polytetrafluoroethylene) is used.
Although not shown, the water vapor permeable film 5
An adhesive layer is provided on both sides of 01.

【００６９】次に、図３（ａ）に示すように、前記水蒸
気透過性フィルム５０１の開口部５０１Ａの内部に弾性
表面波フィルタ素子３を配置し、前記弾性表面波フィル
タ素子３のすだれ状電極（配線）３０２と前記絶縁基板
１上の配線２を電気的に接続する。このとき、前記すだ
れ状電極３０２の端子部分には、金バンプ（導電部材）
４を形成しておき、超音波を併用した熱圧着により、前
記金バンプ４と前記配線２の端子めっき２０４とを金金
接合する。Next, as shown in FIG. 3A, the surface acoustic wave filter element 3 is arranged inside the opening 501A of the water vapor permeable film 501, and the interdigital transducer of the surface acoustic wave filter element 3 is arranged. The (wiring) 302 and the wiring 2 on the insulating substrate 1 are electrically connected. At this time, a gold bump (conductive member) is formed on the terminal portion of the interdigital electrode 302.
4 is formed, and the gold bump 4 and the terminal plating 204 of the wiring 2 are gold-gold bonded by thermocompression bonding together with ultrasonic waves.

【００７０】次に、図３（ｂ）に示すように、前記弾性
表面波フィルタ素子３上に、所定の深さの凹部５０２Ｂ
が設けられたキャップ部材５０２をかぶせ、前記キャッ
プ部材５０２と前記水蒸気透過性フィルム５０１とを接
着して前記弾性表面波フィルタ素子３を封止し、所定の
切断線で切断して個片化すると、図１（ａ）及び図１
（ｂ）に示したような電子装置を得ることができる。こ
のとき、前記キャップ部材としては、例えば、４２アロ
イのような金属材料を用いる。Next, as shown in FIG. 3B, a concave portion 502B having a predetermined depth is formed on the surface acoustic wave filter element 3.
If the cap member 502 provided with is covered, the cap member 502 and the water vapor permeable film 501 are adhered to seal the surface acoustic wave filter element 3, and the surface acoustic wave filter element 3 is cut along a predetermined cutting line to be separated into individual pieces. , FIG. 1 (a) and FIG.
The electronic device as shown in (b) can be obtained. At this time, as the cap member, for example, a metal material such as 42 alloy is used.

【００７１】前記手順で形成した電子装置（ＳＡＷフィ
ルタ装置）は、例えば、携帯電話等の移動体通信機器の
バンドパスフィルタとして用いられるものであり、実装
基板上に実装するときには、前記実装基板の配線と、前
記電子装置の配線２（外部端子２０２）とをはんだ付け
する。そのため、前記はんだ付けの際に、前記電子装置
が加熱され、前記空洞６の水蒸気（空気）が膨張する
が、膨張した水蒸気が前記水蒸気透過性フィルム５０１
を通して前記電子装置の外部に放出され、前記空洞６の
圧力が上昇するのを抑制することができる。The electronic device (SAW filter device) formed by the above procedure is used, for example, as a bandpass filter of a mobile communication device such as a mobile phone, and when mounted on a mounting board, the mounting board is mounted on the mounting board. The wiring and the wiring 2 (external terminal 202) of the electronic device are soldered. Therefore, during the soldering, the electronic device is heated and the water vapor (air) in the cavity 6 expands, but the expanded water vapor causes the water vapor permeable film 501 to expand.
It is possible to prevent the pressure of the cavity 6 from rising due to being discharged to the outside of the electronic device through.

【００７２】また、前記電子装置の加熱により前記空洞
６の圧力が上昇するのを抑制することができるため、前
記配線基板の剥がれなどによる装置の信頼性の低下を防
ぐことができる。Further, since it is possible to prevent the pressure in the cavity 6 from rising due to the heating of the electronic device, it is possible to prevent the reliability of the device from being lowered due to peeling of the wiring board.

【００７３】以上説明したように、本実施例１の電子装
置によれば、前記チップ状素子（弾性表面波フィルタ素
子）３を封止する封止部材５に、水蒸気透過性フィルム
５０１を設けることにより、加熱などにより空洞６の水
蒸気（空気）が膨張したときに、前記水蒸気を電子装置
の外部に放出することができ、空洞６の圧力が上昇する
のを抑制することができる。As described above, according to the electronic device of the first embodiment, the water vapor permeable film 501 is provided on the sealing member 5 for sealing the chip-shaped element (surface acoustic wave filter element) 3. Thus, when the water vapor (air) in the cavity 6 expands due to heating or the like, the water vapor can be released to the outside of the electronic device, and the pressure in the cavity 6 can be prevented from rising.

【００７４】また、前記電子装置の加熱により前記空洞
６の圧力が上昇するのを抑制することができるため、前
記配線基板の剥がれなどによる装置の信頼性の低下を防
ぐことができる。Further, since it is possible to prevent the pressure in the cavity 6 from rising due to the heating of the electronic device, it is possible to prevent the reliability of the device from being lowered due to peeling of the wiring board.

【００７５】また、前記封止部材５に、前記チップ状素
子３の体積よりも大きい体積の凹部５Ａを設けておき、
前記チップ状素子３を、前記配線基板と前記封止部材５
の凹部５Ａで囲まれた空洞６に設けることにより、前記
弾性表面波フィルタ素子３のすだれ状電極３０２と前記
配線基板の配線２（金めっき２０４）とを、前記金バン
プ４を用いた金金接合で直接接続することができる。そ
のため、前記すだれ状電極３０２と前記配線２との接続
強度が高く、剥がれにくい電子装置を得ることができ
る。Further, the sealing member 5 is provided with a recess 5A having a volume larger than that of the chip-shaped element 3,
The chip-shaped element 3 is connected to the wiring board and the sealing member 5.
By providing the interdigital electrode 302 of the surface acoustic wave filter element 3 and the wiring 2 (gold plating 204) of the wiring substrate by providing the cavity 6 surrounded by the concave portion 5A of the gold bump 4 using the gold bump 4 Can be connected directly with a joint. Therefore, it is possible to obtain an electronic device in which the connection strength between the interdigital electrode 302 and the wiring 2 is high and peeling is difficult.

【００７６】また、前記水蒸気透過性フィルム５０１を
介して、前記配線基板と前記キャップ部材５０２を接着
することにより、従来のセラミックパッケージに比べ、
軽量化が可能になる。また、前記キャップ部材５０２
の、前記弾性表面波フィルタ素子３上の部分の厚さを薄
くしたり、前記キャップ部材５０２と前記弾性表面波フ
ィルタ素子３の隙間を狭くしたりすることにより、前記
セラミックパッケージに比べ、装置の薄型化が可能にな
る。In addition, by bonding the wiring board and the cap member 502 through the water vapor permeable film 501, compared with the conventional ceramic package,
Weight reduction is possible. In addition, the cap member 502
In comparison with the ceramic package, by reducing the thickness of the portion on the surface acoustic wave filter element 3 or narrowing the gap between the cap member 502 and the surface acoustic wave filter element 3. Thinning is possible.

【００７７】また、前記配線基板と前記封止部材の凹部
５Ａで囲まれた空洞６に前記弾性表面波フィルタ素子３
を設けることにより、前記弾性表面波フィルタ素子３
の、前記配線基板と向かい合う面は全面が空洞になる。
そのため、従来の、前記図８に示した半導体装置のよう
に、熱硬化性樹脂で周囲を封止した場合に比べ、前記空
洞６の体積の制御が容易であり、電子装置ごとに動作特
性のばらつきが生じるのを防ぐことができる。Further, the surface acoustic wave filter element 3 is placed in the cavity 6 surrounded by the wiring board and the recess 5A of the sealing member.
By providing the surface acoustic wave filter element 3
The entire surface of the surface facing the wiring board is hollow.
Therefore, as compared with the conventional semiconductor device shown in FIG. 8 in which the periphery is sealed with a thermosetting resin, the volume of the cavity 6 can be easily controlled, and the operating characteristics of each electronic device can be improved. It is possible to prevent variations.

【００７８】（実施例２）図４乃至図６は、本発明によ
る実施例２の電子装置の製造方法を説明するための模式
図であり、図４（ａ）、図４（ｂ）、及び図４（ｃ）は
配線基板を形成する工程の断面図、図５（ａ）はチップ
状素子を実装する工程の断面図、図５（ｂ）は封止部材
の断面図、図６は封止する工程の断面図である。(Embodiment 2) FIGS. 4 to 6 are schematic views for explaining a method of manufacturing an electronic device according to a second embodiment of the present invention. FIGS. 4 (a), 4 (b) and 4C is a sectional view of the step of forming the wiring board, FIG. 5A is a sectional view of the step of mounting the chip-shaped element, FIG. 5B is a sectional view of the sealing member, and FIG. It is sectional drawing of the process of stopping.

【００７９】本実施例２の電子装置の製造方法は、前記
実施例１で説明した、図１（ａ）及び図１（ｂ）に示し
た電子装置の他の製造方法である。以下、図４乃至図６
に沿って、本実施例２の電子装置の製造方法について説
明するが、従来の製造方法と同様の工程については、そ
の詳細な説明を省略する。The method of manufacturing the electronic device of the second embodiment is another method of manufacturing the electronic device shown in FIGS. 1A and 1B described in the first embodiment. Hereinafter, FIG. 4 to FIG.
A method of manufacturing the electronic device according to the second embodiment will be described along with, but detailed description of steps similar to those of the conventional manufacturing method will be omitted.

【００８０】まず、図４（ａ）に示すように、絶縁基板
１の両面に、第１導体膜２０１及び第２導体膜２０２が
形成された両面銅張板の所定位置に、開口部（ビア穴）
１Ａを形成する。前記絶縁基板１には、例えば、ポリイ
ミドテープやガラス布基材エポキシ樹脂積層板等を用
い、前記第１導体膜２０１及び前記第２導体膜２０２に
は、例えば、電解銅箔や圧延銅箔を用いる。また、前記
開口部１Ａは、例えば、炭酸ガスレーザやエキシマレー
ザなどを用いたレーザエッチングで形成する。First, as shown in FIG. 4A, an opening (via) is formed at a predetermined position of the double-sided copper clad plate having the first conductor film 201 and the second conductor film 202 formed on both surfaces of the insulating substrate 1. hole)
Form 1A. For example, a polyimide tape or a glass cloth-based epoxy resin laminated plate is used for the insulating substrate 1, and an electrolytic copper foil or a rolled copper foil is used for the first conductor film 201 and the second conductor film 202. To use. The opening 1A is formed by laser etching using, for example, a carbon dioxide gas laser or an excimer laser.

【００８１】次に、図４（ｂ）に示すように、前記第１
導体膜２０１の表面全面、及び前記開口部１Ａの内部に
銅めっき２０３を形成する。前記銅めっき２０３は、例
えば、電気銅めっきにより形成する。Next, as shown in FIG. 4B, the first
Copper plating 203 is formed on the entire surface of the conductor film 201 and inside the opening 1A. The copper plating 203 is formed by electrolytic copper plating, for example.

【００８２】次に、図４（ｃ）に示すように、前記銅め
っき２０３が積層された第１導体膜２０１、及び前記第
２導体膜２０２をエッチング処理して、所定のパターン
の配線２を形成した後、前記配線２の表面に端子めっき
２０４を形成する。このとき、前記端子めっき２０４
は、例えば、ニッケルめっきを下地として金めっきを行
い形成する。Next, as shown in FIG. 4C, the first conductor film 201 and the second conductor film 202 on which the copper plating 203 is laminated are etched to form the wiring 2 having a predetermined pattern. After the formation, the terminal plating 204 is formed on the surface of the wiring 2. At this time, the terminal plating 204
Is formed by, for example, gold plating using nickel plating as a base.

【００８３】次に、図５（ａ）に示すように、前記弾性
表面波フィルタ素子３のすだれ状電極（櫛型電極）３０
２と前記絶縁基板１上の配線２を電気的に接続する。こ
のとき、前記すだれ状電極３０２の端子部分には、金バ
ンプ（導電部材）４を形成しておき、超音波を併用した
熱圧着により、前記金バンプ４と前記配線２の端子めっ
き２０４とを金金接合する。Next, as shown in FIG. 5A, the interdigital transducer (comb-shaped electrode) 30 of the surface acoustic wave filter element 3 is used.
2 and the wiring 2 on the insulating substrate 1 are electrically connected. At this time, a gold bump (conductive member) 4 is formed on the terminal portion of the interdigital electrode 302, and the gold bump 4 and the terminal plating 204 of the wiring 2 are bonded by thermocompression bonding using ultrasonic waves. Join gold and gold.

【００８４】次に、図５（ｂ）に示すように、水蒸気透
過性フィルム５０１を貼り付けたキャップ部材５０２
に、前記弾性表面波フィルタ素子３の体積よりも大きい
空間を有する凹部５Ａを形成した封止部材５を準備す
る。このとき、例えば、前記水蒸気透過性フィルム５０
１には発泡性のＰＴＦＥを用い、前記キャップ部材５０
２には４２アロイを用いる。また、図示は省略するが、
前記水蒸気透過性フィルム５０１の表面に、接着剤層を
設けておく。Next, as shown in FIG. 5B, the cap member 502 to which the water vapor permeable film 501 is attached.
Then, a sealing member 5 having a recess 5A having a space larger than the volume of the surface acoustic wave filter element 3 is prepared. At this time, for example, the water vapor permeable film 50
For the cap member 50, a foamable PTFE is used for 1.
For 42, 42 alloy is used. Although not shown,
An adhesive layer is provided on the surface of the water vapor permeable film 501.

【００８５】次に、図６に示すように、前記弾性表面波
フィルタ素子３上に、前記封止部材５をかぶせ、前記配
線基板（絶縁基板１）と前記水蒸気透過性フィルム５０
１とを接着して前記弾性表面波フィルタ素子３を封止
し、所定の切断線で切断して個片化すると、図１（ａ）
及び図１（ｂ）に示したような電子装置を得ることがで
きる。Next, as shown in FIG. 6, the surface acoustic wave filter element 3 is covered with the sealing member 5, and the wiring substrate (insulating substrate 1) and the water vapor permeable film 50 are covered.
1 is adhered to the surface acoustic wave filter element 3 to seal the surface acoustic wave filter element 3, and the surface acoustic wave filter element 3 is cut into pieces by cutting along a predetermined cutting line, as shown in FIG.
Also, the electronic device as shown in FIG. 1B can be obtained.

【００８６】前記手順で形成した電子装置（ＳＡＷフィ
ルタ装置）は、例えば、携帯電話等の移動体通信機器の
バンドパスフィルタとして用いられるものであり、実装
基板上に実装するときには、前記実装基板の配線と、前
記電子装置の配線２（外部端子２０２）とをはんだ付け
する。そのため、前記はんだ付けの際に、前記電子装置
が加熱され、前記空洞６の水蒸気（空気）が膨張する
が、膨張した水蒸気が前記水蒸気透過性フィルム５０１
を通して前記電子装置の外部に放出され、前記空洞６の
圧力が上昇するのを抑制することができる。The electronic device (SAW filter device) formed by the above procedure is used as, for example, a bandpass filter of a mobile communication device such as a mobile phone, and when it is mounted on a mounting board, it is mounted on the mounting board. The wiring and the wiring 2 (external terminal 202) of the electronic device are soldered. Therefore, during the soldering, the electronic device is heated and the water vapor (air) in the cavity 6 expands, but the expanded water vapor causes the water vapor permeable film 501 to expand.
It is possible to prevent the pressure of the cavity 6 from rising due to being discharged to the outside of the electronic device through.

【００８７】また、前記電子装置の加熱により前記空洞
６の圧力が上昇するのを抑制することができるため、前
記配線基板の剥がれなどによる装置の信頼性の低下を防
ぐことができる。Further, since it is possible to prevent the pressure in the cavity 6 from rising due to the heating of the electronic device, it is possible to prevent the reliability of the device from being lowered due to peeling of the wiring board.

【００８８】以上説明したように、本実施例２の電子装
置の製造方法によれば、前記チップ状素子（弾性表面波
フィルタ素子）３を封止する封止部材５に、水蒸気透過
性フィルム５０１を設けることにより、加熱などにより
空洞６の水蒸気（空気）が膨張したときに、前記水蒸気
を電子装置の外部に放出することができ、空洞６の圧力
が上昇するのを抑制することができる。As described above, according to the method of manufacturing the electronic device of the second embodiment, the water vapor permeable film 501 is formed on the sealing member 5 for sealing the chip-shaped element (surface acoustic wave filter element) 3. By providing the above, when the water vapor (air) in the cavity 6 is expanded by heating or the like, the water vapor can be released to the outside of the electronic device, and the pressure in the cavity 6 can be prevented from rising.

【００８９】また、前記電子装置の加熱により前記空洞
６の圧力が上昇するのを抑制することができるため、前
記配線基板の剥がれなどによる装置の信頼性の低下を防
ぐことができる。Further, since it is possible to prevent the pressure in the cavity 6 from rising due to the heating of the electronic device, it is possible to prevent the reliability of the device from being deteriorated due to peeling of the wiring board.

【００９０】また、前記封止部材５に、前記チップ状素
子３の体積よりも大きい体積の凹部５Ａを設けておき、
前記チップ状素子３を、前記配線基板と前記封止部材５
の凹部５Ａで囲まれた空洞６に設けることにより、前記
弾性表面波フィルタ素子３のすだれ状電極３０２と前記
配線基板の配線２（金めっき２０４）とを、前記金バン
プ４を用いた金金接合で直接接続することができる。そ
のため、前記すだれ状電極３０２と前記配線２との接続
強度が高く、剥がれにくい電子装置を得ることができ
る。Further, the sealing member 5 is provided with a recess 5A having a volume larger than that of the chip-shaped element 3,
The chip-shaped element 3 is connected to the wiring board and the sealing member 5.
By providing the interdigital electrode 302 of the surface acoustic wave filter element 3 and the wiring 2 (gold plating 204) of the wiring substrate by providing the cavity 6 surrounded by the concave portion 5A of the gold bump 4 using the gold bump 4 Can be connected directly with a joint. Therefore, it is possible to obtain an electronic device in which the connection strength between the interdigital electrode 302 and the wiring 2 is high and peeling is difficult.

【００９１】また、前記水蒸気透過性フィルム５０１を
通して、前記空洞６の水分を装置の外部に放出すること
ができるため、空洞６内の水分による導通不良を防ぐこ
とができる。Further, since the moisture in the cavity 6 can be discharged to the outside of the device through the water vapor permeable film 501, the conduction failure due to the moisture in the cavity 6 can be prevented.

【００９２】また、前記水蒸気透過性フィルム５０１を
用い、前記水蒸気透過性フィルム５０１を介して、前記
配線基板と前記キャップ部材５０２を接着することによ
り、従来のセラミックパッケージに比べ、軽量化が可能
になる。また、前記キャップ部材５０２の、前記弾性表
面波フィルタ素子３上の部分の厚さを薄くしたり、前記
キャップ部材５０２と前記弾性表面波フィルタ素子３の
隙間を狭くしたりすることにより、前記セラミックパッ
ケージに比べ、装置の薄型化が可能になる。Further, by using the water vapor permeable film 501 and adhering the wiring board and the cap member 502 via the water vapor permeable film 501, the weight can be reduced as compared with the conventional ceramic package. Become. Further, by reducing the thickness of the portion of the cap member 502 on the surface acoustic wave filter element 3, or by narrowing the gap between the cap member 502 and the surface acoustic wave filter element 3, the ceramic is obtained. The device can be made thinner than the package.

【００９３】また、前記配線基板と前記封止部材の凹部
５Ａで囲まれた空洞６に前記弾性表面波フィルタ素子３
を設けることにより、前記弾性表面波フィルタ素子３
の、前記配線基板と向かい合う面は全面が空洞になる。
そのため、従来の、前記図８に示した半導体装置のよう
に、熱硬化性樹脂で周囲を封止した場合に比べ、前記空
洞６の体積の制御が容易であり、電子装置ごとに動作特
性のばらつきが生じるのを防ぐことができる。The surface acoustic wave filter element 3 is provided in the cavity 6 surrounded by the wiring board and the recess 5A of the sealing member.
By providing the surface acoustic wave filter element 3
The entire surface of the surface facing the wiring board is hollow.
Therefore, as compared with the conventional semiconductor device shown in FIG. 8 in which the periphery is sealed with a thermosetting resin, the volume of the cavity 6 can be easily controlled, and the operating characteristics of each electronic device can be improved. It is possible to prevent variations.

【００９４】以上、本発明を、前記実施例に基づき具体
的に説明したが、本発明は、前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲において種々変
更可能であることはもちろんである。Although the present invention has been specifically described based on the above embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Of course.

【００９５】例えば、前記実施例１及び前記実施例２で
は、前記キャップ部材５０２として、４２アロイを用い
たが、これに限らず、他の金属材料や、例えば、熱硬化
性樹脂などの絶縁材料を用いてもよい。For example, in the first and second embodiments, the 42 alloy is used as the cap member 502, but the present invention is not limited to this, and other metal materials or insulating materials such as thermosetting resins are used. May be used.

【００９６】また、前記実施例１及び前記実施例２で
は、前記チップ状素子３として、圧電基板３０１の表面
にすだれ状電極（櫛型電極）３０２が形成された弾性表
面波フィルタ素子を用いた電子装置及びその製造方法に
ついて説明したが、これに限らず、例えば、共振子（発
振子）として用いる弾性表面波素子を用いてもよい。ま
た、前記チップ状素子３は、前記弾性表面波素子に限ら
ず、ＧａＡｓＦＥＴ（Field Effect Transistor）のよ
うな、高周波動作をする半導体チップを用いた半導体装
置に適用してもよい。Further, in the first and second embodiments, the surface acoustic wave filter element in which the interdigital electrode (comb-shaped electrode) 302 is formed on the surface of the piezoelectric substrate 301 is used as the chip-shaped element 3. Although the electronic device and the manufacturing method thereof have been described, the present invention is not limited to this, and for example, a surface acoustic wave element used as a resonator (oscillator) may be used. Further, the chip-shaped element 3 is not limited to the surface acoustic wave element, but may be applied to a semiconductor device using a semiconductor chip that operates at high frequency, such as GaAs FET (Field Effect Transistor).

【００９７】前記高周波動作をする半導体チップでは、
回路形成面、すなわち外部端子が形成された面が絶縁性
の樹脂で封止されていると、封止樹脂の誘電率による信
号遅延などが起きて、高周波特性が劣化する。そのた
め、図１（ｂ）に示したような構成にすることで、前記
半導体チップの回路形成面上に空洞６ができ、高周波特
性の劣化を防ぐことができる。In the semiconductor chip operating at high frequency,
If the circuit formation surface, that is, the surface on which the external terminals are formed, is sealed with an insulating resin, signal delay or the like occurs due to the dielectric constant of the sealing resin, and the high frequency characteristics deteriorate. Therefore, with the structure shown in FIG. 1B, the cavity 6 is formed on the circuit formation surface of the semiconductor chip, and the deterioration of the high frequency characteristics can be prevented.

【００９８】[0098]

【発明の効果】本願において開示される発明のうち、代
表的なものによって得られる効果を簡単に説明すれば、
以下のとおりである。 （１）内部に空洞を設けた電子装置において、空洞内の
水蒸気の膨張による、空洞部の圧力の上昇を抑制するこ
とができる。 （２）内部に空洞を設けた電子装置において、耐熱衝撃
性を向上させることができる。 （３）内部に空洞を設けた電子装置において、空洞内の
水蒸気による導通不良を防ぐことができる。 （４）内部に空洞を設けた電子装置において、空洞部の
体積の制御を容易にすることができる。 （５）内部に空洞を設けた電子装置において、装置を小
型化、軽量化できる。The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows. (1) In an electronic device having a cavity inside, an increase in pressure in the cavity due to expansion of water vapor in the cavity can be suppressed. (2) Thermal shock resistance can be improved in an electronic device having a cavity inside. (3) In an electronic device having a cavity inside, conduction failure due to water vapor in the cavity can be prevented. (4) In an electronic device having a cavity inside, it is possible to easily control the volume of the cavity. (5) In an electronic device having a cavity inside, the device can be made smaller and lighter.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明による実施例１の電子装置の概略構成を
示す模式図であり、図１（ａ）は電子装置の平面図、図
１（ｂ）は図１（ａ）のＡ−Ａ’線での断面図である。1A and 1B are schematic diagrams illustrating a schematic configuration of an electronic device according to a first embodiment of the present invention, FIG. 1A is a plan view of the electronic device, and FIG. 1B is AA of FIG. 1A. It is sectional drawing in a line.

【図２】本実施例１の電子装置の製造方法を説明するた
めの模式図であり、図２（ａ）、図２（ｂ）、及び図２
（ｃ）はそれぞれ、配線を形成する各工程の断面図、図
２（ｄ）は水蒸気透過性フィルムを接着する工程の断面
図である。FIG. 2 is a schematic diagram for explaining the method for manufacturing the electronic device of the first embodiment, and includes FIGS. 2 (a), 2 (b), and 2 (b).
2C is a cross-sectional view of each step of forming a wiring, and FIG. 2D is a cross-sectional view of the step of adhering a water vapor permeable film.

【図３】本実施例１の電子装置の製造方法を説明するた
めの模式図であり、図３（ａ）はチップ状素子を実装す
る工程の断面図、図３（ｂ）はチップ状素子を封止する
工程の断面図である。3A and 3B are schematic diagrams for explaining the method for manufacturing the electronic device according to the first embodiment. FIG. 3A is a cross-sectional view of a step of mounting a chip-shaped element, and FIG. 3B is a chip-shaped element. It is sectional drawing of the process of sealing.

【図４】本発明による実施例２の電子装置の製造方法を
説明するための模式図であり、図４（ａ）、図４
（ｂ）、及び図４（ｃ）はそれぞれ、配線基板を形成す
る各工程の断面図である。FIG. 4 is a schematic view for explaining the method for manufacturing the electronic device of the second embodiment according to the present invention, and FIGS.
4B and FIG. 4C are cross-sectional views of the respective steps for forming the wiring board.

【図５】本実施例２の電子装置の製造方法を説明するた
めの模式図であり、図５（ａ）はチップ状素子を実装す
る工程の断面図、図５（ｂ）はチップ状素子を封止する
封止部材の構成を示す断面図である。5A and 5B are schematic diagrams for explaining the method for manufacturing the electronic device according to the second embodiment. FIG. 5A is a cross-sectional view of a step of mounting a chip-shaped element, and FIG. 5B is a chip-shaped element. It is sectional drawing which shows the structure of the sealing member which seals.

【図６】本実施例２の電子装置の製造方法を説明するた
めの模式図であり、チップ状素子を封止する工程の断面
図である。FIG. 6 is a schematic view for explaining the method for manufacturing the electronic device of the second embodiment, which is a cross-sectional view of the step of sealing the chip-shaped element.

【図７】従来の、内部に空洞を有する電子装置の概略構
成を示す模式断面図である。FIG. 7 is a schematic cross-sectional view showing a schematic configuration of a conventional electronic device having a cavity inside.

【図８】従来の、内部に空洞を有する電子装置の他の概
略構成を示す模式断面図である。FIG. 8 is a schematic cross-sectional view showing another schematic configuration of a conventional electronic device having a cavity inside.

【符号の説明】 １…絶縁基板、１Ａ…開口部（ビア穴）、２…配線、２
０１…第１導体膜、２０２…第２導体膜、２０３…銅め
っき（ビア）、２０４…端子めっき、３…チップ状素子
（弾性表面波フィルタ素子）、３０１…圧電基板、３０
２…すだれ状電極（櫛型電極）、４…導電部材（金バン
プ）、５…封止部材、５０１…水蒸気透過性フィルム、
５０２…キャップ部材、６…空洞、７…封止用フィル
ム、８…半導体チップ、８０１…ボンディングパッド、
９，１０…熱硬化性樹脂。[Explanation of Codes] 1 ... Insulating substrate, 1A ... Opening (via hole), 2 ... Wiring, 2
01 ... First conductor film, 202 ... Second conductor film, 203 ... Copper plating (via), 204 ... Terminal plating, 3 ... Chip-shaped element (surface acoustic wave filter element), 301 ... Piezoelectric substrate, 30
2 ... Interdigital electrode (comb-shaped electrode), 4 ... Conductive member (gold bump), 5 ... Sealing member, 501 ... Water vapor permeable film,
502 ... Cap member, 6 ... Cavity, 7 ... Sealing film, 8 ... Semiconductor chip, 801 ... Bonding pad,
9, 10 ... Thermosetting resin.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 川勝 孝治 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 Ｆターム(参考） 5J097 AA24 BB11 HA04 JJ02 JJ10 KK10    ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Koji Kawakatsu             2-10-10 Tenjin, Nagaokakyo, Kyoto Stock             Murata Manufacturing Co., Ltd. F term (reference) 5J097 AA24 BB11 HA04 JJ02 JJ10                       KK10

Claims (12)

【特許請求の範囲】[Claims] 【請求項１】 絶縁基板の表面に配線（導体パターン）
が設けられた配線基板と、前記配線基板上に設けられた
チップ状素子と、前記チップ状素子の外部端子と前記配
線基板の配線とを接続する導電部材と、前記チップ状素
子の周囲を封止する封止部材からなり、前記配線基板と
前記チップ状素子との間に空洞を有する電子装置であっ
て、 前記封止部材は、水蒸気を透過する水蒸気透過部材と、
水蒸気を透過しない若しくは透過しにくいキャップ部材
からなり、 前記水蒸気透過部材は、前記空洞内と前記封止部材の外
部を連通していることを特徴とする電子装置。1. A wiring (conductor pattern) on the surface of an insulating substrate.
A wiring board provided with, a chip-shaped element provided on the wiring board, a conductive member for connecting an external terminal of the chip-shaped element and wiring of the wiring board, and a periphery of the chip-shaped element. An electronic device comprising a sealing member that stops, the electronic device having a cavity between the wiring board and the chip-shaped element, wherein the sealing member is a water vapor permeable member that transmits water vapor,
An electronic device, comprising a cap member that does not or does not allow water vapor to pass therethrough, wherein the water vapor permeable member communicates the inside of the cavity with the outside of the sealing member. 【請求項２】 前記封止部材は、前記チップ状素子の体
積よりも大きい空間を有する凹部が設けられており、前
記チップ状素子は、前記配線基板と前記封止部材の凹部
で囲まれた空洞内に設けられていることを特徴とする、
請求項1に記載の電子装置。2. The sealing member is provided with a recess having a space larger than the volume of the chip-shaped element, and the chip-shaped element is surrounded by the recess of the wiring board and the sealing member. Characterized in that it is provided in the cavity,
The electronic device according to claim 1. 【請求項３】 前記水蒸気透過部材はフィルム状であ
り、前記配線基板と前記キャップ部材の間に設けられて
いることを特徴とする、請求項１または請求項２に記載
の電子装置。3. The electronic device according to claim 1, wherein the water vapor permeable member has a film shape and is provided between the wiring board and the cap member. 【請求項４】 前記チップ状素子は、圧電材料の表面に
すだれ状電極（櫛型電極）が設けられた弾性表面波素子
であり、前記すだれ状電極と前記配線基板が向かい合う
ように設けられていることを特徴とする、請求項１乃至
請求項３のいずれか１項に記載の電子装置。4. The chip-shaped element is a surface acoustic wave element in which a comb-shaped electrode (comb-shaped electrode) is provided on a surface of a piezoelectric material, and the comb-shaped electrode and the wiring board are provided so as to face each other. The electronic device according to claim 1, wherein the electronic device is provided. 【請求項５】 絶縁基板の表面に配線（導体パターン）
が形成された配線基板上にチップ状素子を配置し、前記
配線基板の配線と前記チップ状素子の外部端子とを接続
するチップ状素子実装工程と、前記チップ状素子実装工
程の後、前記チップ状素子の周囲を、前記配線基板と前
記チップ状素子の間に空洞ができるように封止する封止
工程とを備える電子装置の製造方法であって、 前記配線基板は、前記チップ状素子を配置する領域が開
口した水蒸気透過性フィルムが形成されており、 前記封止工程は、 前記チップ状素子上に、水蒸気を透過しない若しくは透
過しにくいキャップ部材をかぶせ、前記水蒸気透過性フ
ィルムを介して前記キャップ部材と前記配線基板とを接
着することを特徴とする電子装置の製造方法。5. A wiring (conductor pattern) is formed on the surface of the insulating substrate.
A chip-shaped element is arranged on the wiring board on which the chip-shaped element is mounted, and the wiring of the wiring board and external terminals of the chip-shaped element are connected, and the chip-shaped element is mounted after the chip-shaped element mounting step. A method for manufacturing an electronic device, comprising: a sealing step of sealing a periphery of a chip-shaped element so that a cavity is formed between the wiring board and the chip-shaped element, wherein the wiring board includes the chip-shaped element. A water vapor permeable film in which a region to be arranged is opened is formed, and in the sealing step, the chip-shaped element is covered with a cap member that does not permeate or hardly permeates water vapor, and the water vapor permeable film is interposed. A method of manufacturing an electronic device, comprising adhering the cap member and the wiring board. 【請求項６】 絶縁基板の表面に配線（導体パターン）
が形成された配線基板上にチップ状素子を配置し、前記
配線基板の配線と前記チップ状素子の外部端子とを接続
するチップ状素子実装工程と、前記チップ状素子実装工
程の後、前記チップ状素子の周囲を、前記配線基板と前
記チップ状素子の間に空洞ができるように封止する封止
工程とを備える電子装置の製造方法であって、 前記チップ状素子実装工程は、 前記配線基板上に、前記チップ状素子を配置する領域が
開口した水蒸気透過性フィルムを接着するフィルム接着
工程と、 前記配線基板上にチップ状素子を配置し、前記配線基板
の配線と前記チップ状素子の外部端子とを接続するチッ
プ接続工程とを備え、 前記封止工程は、 前記チップ状素子上に、水蒸気を透過しない若しくは透
過しにくいキャップ部材をかぶせ、前記水蒸気透過性フ
ィルムを介して前記キャップ部材と前記配線基板とを接
着することを特徴とする電子装置の製造方法。6. A wiring (conductor pattern) on the surface of the insulating substrate.
A chip-shaped element is arranged on the wiring board on which the chip-shaped element is mounted, and the wiring of the wiring board and external terminals of the chip-shaped element are connected, and the chip-shaped element is mounted after the chip-shaped element mounting step. A method of manufacturing an electronic device, comprising: a sealing step of sealing the periphery of a chip-shaped element so that a cavity is formed between the wiring board and the chip-shaped element, wherein the chip-shaped element mounting step comprises: On the substrate, a film bonding step of adhering a water vapor permeable film in which a region for disposing the chip-shaped element is opened, disposing the chip-shaped element on the wiring board, and wiring of the wiring board and the chip-shaped element And a chip connecting step of connecting to an external terminal, wherein the sealing step covers the chip-shaped element with a cap member that does not or does not allow water vapor to pass therethrough. Method of manufacturing an electronic device characterized by bonding the said wiring board and the cap member via the Irumu. 【請求項７】 絶縁基板の表面に配線（導体パターン）
が形成された配線基板を形成する配線基板形成工程と、
前記配線基板形成工程で形成された配線基板上にチップ
状素子を配置し、前記配線基板の配線と前記チップ状素
子の外部端子とを接続するチップ状素子実装工程と、前
記チップ状素子実装工程の後、前記チップ状素子の周囲
を、前記配線基板と前記チップ状素子の間に空洞ができ
るように封止する封止工程とを備える電子装置の製造方
法であって、 前記配線基板形成工程は、 前記絶縁基板の表面に前記配線を形成する配線形成工程
と、 前記配線形成工程の後、前記絶縁基板上に、前記チップ
状素子を配置する領域が開口した水蒸気透過性フィルム
を接着するフィルム接着工程とを備え、 前記封止工程は、 前記チップ状素子上に、水蒸気を透過しない若しくは透
過しにくいキャップ部材をかぶせ、前記水蒸気透過性フ
ィルムを介して前記キャップ部材と前記配線基板とを接
着することを特徴とする電子装置の製造方法。7. A wiring (conductor pattern) on the surface of the insulating substrate.
A wiring board forming step of forming a wiring board on which is formed;
A chip-shaped element mounting step of arranging a chip-shaped element on the wiring board formed in the wiring board forming step and connecting the wiring of the wiring board and an external terminal of the chip-shaped element, and the chip-shaped element mounting step. And a sealing step of sealing the periphery of the chip-shaped element so that a cavity is formed between the wiring board and the chip-shaped element. Is a wiring forming step of forming the wiring on the surface of the insulating substrate, and a film for adhering a water vapor permeable film having an area where the chip-shaped element is arranged on the insulating substrate after the wiring forming step. And a cap member that does not allow water vapor to pass through the chip-shaped element and covers the chip-shaped element through the water vapor permeable film. Method of manufacturing an electronic device characterized by bonding a-up member and the wiring board. 【請求項８】 絶縁基板の表面に配線（導体パターン）
が形成された配線基板上にチップ状素子を配置し、前記
配線基板の配線と前記チップ状素子の外部端子とを接続
するチップ状素子実装工程と、前記チップ状素子実装工
程の後、前記チップ状素子の周囲を、前記配線基板と前
記チップ状素子の間に空洞ができるように封止する封止
工程とを備える電子装置の製造方法であって、 前記封止工程は、 前記チップ状素子が実装された配線基板上に、 水蒸気を透過する水蒸気透過性部材と、水蒸気を透過し
ない若しくは透過しにくいキャップ部材とからなり、前
記チップ状素子の体積よりも大きい空間を有する凹部が
形成された封止部材をかぶせ、前記封止部材と前記配線
基板とを接着して封止することを特徴とする電子装置の
製造方法。8. Wiring (conductor pattern) on the surface of the insulating substrate
A chip-shaped element is arranged on the wiring board on which the chip-shaped element is mounted, and the wiring of the wiring board and external terminals of the chip-shaped element are connected, and the chip-shaped element is mounted after the chip-shaped element mounting step. A method for manufacturing an electronic device, comprising: a sealing step of sealing the periphery of a chip-shaped element so that a cavity is formed between the wiring board and the chip-shaped element, wherein the sealing step includes the chip-shaped element. On the wiring board on which was mounted, there was formed a water vapor permeable member and a cap member that does not or hardly permeates water vapor, and a recess having a space larger than the volume of the chip-shaped element was formed. A method of manufacturing an electronic device, comprising: covering a sealing member, and bonding the sealing member and the wiring board together for sealing. 【請求項９】 前記チップ状素子実装工程は、 圧電材料の表面にすだれ状電極（櫛型電極）を形成した
弾性表面波素子を、前記すだれ状電極が前記配線基板と
向かい合うように配置することを特徴とする、請求項５
乃至請求項８のいずれか１項に記載の電子装置の製造方
法。9. In the step of mounting the chip-shaped element, a surface acoustic wave element having a comb-shaped electrode formed on the surface of a piezoelectric material is arranged so that the comb-shaped electrode faces the wiring board. 6. The method according to claim 5, wherein
9. A method of manufacturing an electronic device according to claim 8. 【請求項１０】 絶縁基板の表面に配線（導体パター
ン）が設けられた配線基板上に、絶縁性の封止材料が設
けられており、前記配線基板上の前記封止材料が設けら
れた面にチップ状素子を設けたときに、前記配線基板と
前記チップ状素子の間に空洞が設けられる、電子装置の
製造に用いる配線基板であって、 前記封止材料は、水蒸気を透過する水蒸気透過性フィル
ムであって、 前記チップ状素子を設ける領域が開口していることを特
徴とする配線基板。10. An insulating sealing material is provided on a wiring board having wiring (conductor pattern) provided on the surface of the insulating board, and a surface of the wiring board provided with the sealing material. A wiring board used for manufacturing an electronic device, wherein a cavity is provided between the wiring board and the chip-shaped element when the chip-shaped element is provided in the wiring board. A wiring board, which is a flexible film and has an opening in a region where the chip-shaped element is provided. 【請求項１１】 配線基板上に実装されたチップ状素子
を封止する封止部材であって、 水蒸気を透過する水蒸気透過性部材と、水蒸気を透過し
ない若しくは透過しにくいキャップ部からなり、 前記チップ状素子の体積よりも大きい空間を有する凹部
が設けられていることを特徴とする封止部材。11. A sealing member for sealing a chip-shaped element mounted on a wiring board, comprising a water vapor permeable member permeable to water vapor and a cap portion which does not or hardly permeates water vapor, A sealing member provided with a recess having a space larger than the volume of the chip-shaped element. 【請求項１２】 前記水蒸気透過性部材はフィルム状で
あり、前記キャップ部の、前記凹部の開口面側に設けら
れていることを特徴とする、請求項１１に記載の封止部
材。12. The sealing member according to claim 11, wherein the water vapor permeable member is in the form of a film and is provided on the opening surface side of the recess of the cap portion.
JP2002102557A 2002-04-04 2002-04-04 Electronic device and its manufacturing method, and wiring board and sealing member used for manufacture of electronic device Pending JP2003297962A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006006343A1 (en) * 2004-07-14 2006-01-19 Murata Manufacturing Co., Ltd. Piezoelectric device
JP2006286794A (en) * 2005-03-31 2006-10-19 Oki Electric Ind Co Ltd Semiconductor chip package and its manufacturing method
JP2009010591A (en) * 2007-06-27 2009-01-15 Fujitsu Media Device Kk Function device having package structure and manufacturing method thereof
JP2010103647A (en) * 2008-10-21 2010-05-06 Fujitsu Media Device Kk Surface acoustic wave device
CN115000024A (en) * 2022-04-18 2022-09-02 锐石创芯(重庆)科技有限公司 Chip packaging structure and method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006006343A1 (en) * 2004-07-14 2006-01-19 Murata Manufacturing Co., Ltd. Piezoelectric device
US7259500B2 (en) 2004-07-14 2007-08-21 Murata Manufacturing Co., Ltd. Piezoelectric device
JP2006286794A (en) * 2005-03-31 2006-10-19 Oki Electric Ind Co Ltd Semiconductor chip package and its manufacturing method
JP4518992B2 (en) * 2005-03-31 2010-08-04 Ｏｋｉセミコンダクタ株式会社 Semiconductor chip package and manufacturing method thereof
JP2009010591A (en) * 2007-06-27 2009-01-15 Fujitsu Media Device Kk Function device having package structure and manufacturing method thereof
JP2010103647A (en) * 2008-10-21 2010-05-06 Fujitsu Media Device Kk Surface acoustic wave device
CN115000024A (en) * 2022-04-18 2022-09-02 锐石创芯(重庆)科技有限公司 Chip packaging structure and method
CN115000024B (en) * 2022-04-18 2023-09-08 锐石创芯(重庆)科技有限公司 Chip packaging structure and method

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