JP2003283109A - Method for manufacturing board for forming circuit - Google Patents
Method for manufacturing board for forming circuitInfo
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- JP2003283109A JP2003283109A JP2003121197A JP2003121197A JP2003283109A JP 2003283109 A JP2003283109 A JP 2003283109A JP 2003121197 A JP2003121197 A JP 2003121197A JP 2003121197 A JP2003121197 A JP 2003121197A JP 2003283109 A JP2003283109 A JP 2003283109A
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- Prior art keywords
- circuit
- substrate
- manufacturing
- board
- heat treatment
- Prior art date
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、回路形成基板の製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board.
【０００２】[0002]
【従来の技術】近年の電子機器の小型化・高密度化に伴
って、電子部品を搭載する基板も従来の片面基板から両
面、多層基板の採用が進み、より多くの回路を基板上に
集積可能な基板の開発が行われている。2. Description of the Related Art With the recent miniaturization and high density of electronic equipment, the board for mounting electronic parts has been adopted from a conventional single-sided board to a double-sided board, and a multi-layer board has been adopted, and more circuits are integrated on the board. Possible substrates are being developed.
【０００３】このような基板においては、表面実装技術
を用いて、微小な電子部品を高密度で基板上に実装する
ため基板の反りを極力低減する必要がある。特に部品端
子の半田付けをリフロー法などで行なう場合には熱によ
る基板の反りにも注意する必要がある。In such a substrate, it is necessary to reduce warpage of the substrate as much as possible in order to mount minute electronic components on the substrate at a high density by using the surface mounting technique. In particular, when soldering the component terminals by the reflow method or the like, it is necessary to pay attention to the warpage of the board due to heat.
【０００４】また、多層基板の開発に伴って層間の接続
方法も従来の貫通スルーホールから、接続すべき層間に
のみビアホールを設けるＩＶＨ（インタースティシャル
ビアホール）の検討が行われている。With the development of multi-layer substrates, the method of connecting layers has been studied from conventional through-holes to IVH (interstitial via holes) in which via holes are provided only between layers to be connected.
【０００５】ＩＶＨの構成については、従来の貫通スル
ーホールと同様にメッキを用いるものや導電性ペースト
を用いる方法が検討されている。特に導電性ペーストを
用いる方法は接続の信頼性が確保できればＩＶＨの構成
として非常に有望である（たとえば、特許文献１参
照）。Regarding the IVH structure, a method using plating and a method using a conductive paste are being studied as in the conventional through-holes. In particular, the method using a conductive paste is very promising as a constitution of IVH if the reliability of connection can be secured (for example, refer to Patent Document 1).
【０００６】以下に従来の回路形成基板の製造方法につ
いて図面を参照しながら説明する。A conventional method for manufacturing a circuit board will be described below with reference to the drawings.
【０００７】図５は従来の回路形成基板の製造方法を示
す断面図である。まず（ａ）に示すようなガラス繊維織
布にエポキシ樹脂を含浸させ乾燥によってエポキシ樹脂
を半硬化状態にしたプリプレグ１０を用意する。FIG. 5 is a sectional view showing a conventional method for manufacturing a circuit board. First, a prepreg 10 is prepared by impregnating a glass fiber woven cloth as shown in (a) with an epoxy resin and drying the epoxy resin to a semi-cured state.
【０００８】次にプリプレグ１０の両面に銅箔１１を重
ね熱板１２によって両面より加熱加圧する（ｂ）。これ
を積層工程と呼び、その加熱はエポキシ樹脂を流動させ
成形する温度（約１２０℃）と硬化させる温度（約１７
０℃）の２段階で行うのが一般的である。加圧は十分に
エポキシ樹脂を流動させるために４０〜５０ｋｇｆ／cm
2の圧力をかける。エポキシ樹脂が十分に硬化した後、
熱板１２を開放し（ｃ）に示すようにスルーホールが必
要な部分に貫通孔１３をドリル等を用いて加工する。Next, copper foil 11 is placed on both sides of the prepreg 10 and heated and pressed from both sides by the hot plate 12 (b). This is called a laminating process, and the heating is performed by flowing the epoxy resin and molding it (about 120 ° C.) and curing temperature (about 17 ° C.).
It is generally performed in two steps (0 ° C). Pressurization is 40-50kgf / cm to make the epoxy resin flow sufficiently.
Apply pressure of 2. After the epoxy resin is fully cured,
The hot plate 12 is opened, and the through hole 13 is formed in a portion where a through hole is required by using a drill or the like as shown in (c).
【０００９】次に銅メッキを行い表面と裏面を導通させ
る（ｄ）。最後に（ｅ）に示すように銅箔１１と銅メッ
キ膜１４をエッチングし回路１５を両面に形成した回路
形成基板を完成する（回路形成工程）。Next, copper plating is performed to bring the front surface and the back surface into conduction (d). Finally, as shown in (e), the copper foil 11 and the copper plating film 14 are etched to complete the circuit-formed substrate on which the circuits 15 are formed (circuit forming step).
【００１０】図６はＩＶＨを持つ従来の回路形成基板の
製造方法を示す断面図である。まず（ａ）に示すように
プリプレグ１０に貫通孔１３をドリル、レーザー等を用
いて加工する。FIG. 6 is a sectional view showing a conventional method for manufacturing a circuit-formed substrate having IVH. First, as shown in (a), the through hole 13 is processed in the prepreg 10 using a drill, a laser, or the like.
【００１１】次に貫通孔１３に導電性ペースト１６を印
刷等の方法で充填する（ｂ）。導電性ペースト１６はエ
ポキシ樹脂等に銀、銅等の金属粒子を分散させたものを
用いる。Next, the through hole 13 is filled with a conductive paste 16 by a method such as printing (b). The conductive paste 16 uses epoxy resin or the like in which metal particles such as silver and copper are dispersed.
【００１２】次に前述の従来例と同様に銅箔１１を重ね
て加熱加圧する（ｃ）。樹脂の硬化が終了すると共に導
電性ペースト１６によって表裏の銅箔１１は導通してい
る。Next, the copper foils 11 are stacked and heated and pressed in the same manner as in the above-mentioned conventional example (c). When the curing of the resin is completed, the conductive paste 16 makes the copper foils 11 on the front and back sides conductive.
【００１３】最後に銅箔１１をエッチングして両面に回
路１５を形成した回路形成基板を完成する（ｄ）。さら
に工程を繰り返すことにより多層基板を製造することも
出来る（ｅ）。Finally, the copper foil 11 is etched to complete a circuit-formed substrate having circuits 15 formed on both sides (d). It is also possible to manufacture a multilayer substrate by repeating the steps (e).
【００１４】図７に回路形成基板への電子部品の取付方
法を示す。（ａ）に示すように回路形成基板１に搭載す
る電子部品の大きさに合わせた回路１５が銅箔により形
成されている。回路１５は電子部品を搭載するためのラ
ンドと配線からなるが図中にはランドのみ示した。FIG. 7 shows a method of mounting electronic components on a circuit board. As shown in (a), a circuit 15 is formed of copper foil in accordance with the size of the electronic component mounted on the circuit forming board 1. The circuit 15 is composed of lands for mounting electronic parts and wiring, but only the lands are shown in the drawing.
【００１５】次に（ｂ）に示すように、回路１５上に半
田ペースト１７を印刷等の方法で塗布する。次に（ｃ）
に示すようにチップ状部品１８を半田ペースト１７上に
載せる。次に回路形成基板１を加熱すると半田ペースト
１７が溶融して（ｄ）に示すように回路１５にチップ状
部品１８が半田付けされる。Next, as shown in (b), a solder paste 17 is applied on the circuit 15 by a method such as printing. Then (c)
The chip-shaped component 18 is placed on the solder paste 17 as shown in FIG. Next, when the circuit forming substrate 1 is heated, the solder paste 17 is melted and the chip-shaped component 18 is soldered to the circuit 15 as shown in FIG.
【００１６】回路形成基板１が半田付け時の加熱によっ
て（ｅ）のように反りを生じると半田付け不良やチップ
状部品１８の脱落などの不良が発生する。When the circuit-forming board 1 is warped due to heating during soldering as shown in (e), a soldering failure or a chip-shaped component 18 dropout occurs.
【００１７】[0017]
【特許文献１】特開平４−３３８６９５号公報[Patent Document 1] Japanese Patent Laid-Open No. 4-338695
【００１８】[0018]
【発明が解決しようとする課題】しかし、電子機器に用
いる回路形成基板の構成としてはエポキシ樹脂などの高
分子材料が用いられることが多く、半田付け時の加熱に
よって全く反りを生じない回路形成基板を製造すること
は難しい。However, a polymeric material such as an epoxy resin is often used for the structure of a circuit-forming board used in electronic equipment, and a circuit-forming board that does not warp at all during heating during soldering. Is difficult to manufacture.
【００１９】従来のリード付き部品を使用したような低
密度の回路形成基板においてはさほど問題にならなかっ
た程度の半田付け時の反りについても、チップ状部品の
高密度な表面実装を行うような回路形成基板では重要な
課題である。With respect to warpage during soldering, which is not a problem in a low-density circuit-forming board using a conventional leaded component, a high-density surface mounting of chip-shaped components is performed. This is an important issue for circuit boards.
【００２０】半田付け時の反りの原因は次のように考え
られる。まず、半田付け時の加熱によるエポキシ樹脂の
硬化反応により、エポキシ樹脂の硬化収縮が生じる。こ
の硬化収縮は金属箔による回路パターンのある部分では
金属箔によって阻害されるために小さく、無い部分では
大きくなり回路形成基板の面内で不均一となる。そのた
めに発生した応力により回路形成基板は反りを生じる。The cause of the warp during soldering is considered as follows. First, the epoxy resin cures and shrinks due to the curing reaction of the epoxy resin due to heating during soldering. This curing shrinkage is small in a portion where the circuit pattern is formed by the metal foil and is small in the portion where the circuit pattern is formed, and becomes large in the portion where the circuit pattern is not formed and becomes non-uniform in the plane of the circuit forming substrate. The circuit formation substrate warps due to the stress generated therefor.
【００２１】一般にエポキシ樹脂は硬化を進行させて重
合度を高めるほど高温下での特性は安定する。そこで積
層工程の条件を変更してエポキシ樹脂の重合度を上げて
やれば、半田付け時の硬化反応および硬化収縮は小さく
なり、反りも減少すると予想される。In general, the epoxy resin becomes more stable in characteristics at high temperature as the curing progresses to increase the degree of polymerization. Therefore, if the conditions of the lamination process are changed to increase the degree of polymerization of the epoxy resin, it is expected that the curing reaction and curing shrinkage at the time of soldering will be reduced, and the warpage will be reduced.
【００２２】しかし、発明者の実験によれば従来１７０
℃で行っていたエポキシ樹脂の硬化を２００℃以上に変
更した場合でも半田付け時の反りは改善されなかった。However, according to the experiments by the inventor, the conventional 170
Even when the curing of the epoxy resin, which was performed at ℃, was changed to 200 ℃ or more, the warpage during soldering was not improved.
【００２３】また、通常積層工程は熱プレス等の装置を
用いて行うためにあまり高温では装置の熱板の平行度を
保ちながら加圧することが難しく、加熱時間を延長して
硬化を進めることも生産効率の点から考えて望ましいも
のではない。Further, since the laminating step is usually carried out by using an apparatus such as a hot press, it is difficult to press while maintaining the parallelism of the hot plate of the apparatus at an excessively high temperature, and it is possible to extend the heating time to proceed with curing. It is not desirable in terms of production efficiency.
【００２４】本発明はこのような課題を解決するもので
あり、回路形成基板の品質向上に貢献できうるものであ
る。The present invention solves such a problem and can contribute to the improvement of the quality of the circuit-forming board.
【００２５】[0025]
【課題を解決するための手段】上記目的を達成するため
に、本発明の回路形成基板の製造方法は、絶縁基板と金
属箔を交互に配して加熱加圧し、片面あるいは両面以上
の多層基板とする積層工程と、前記金属箔をパターンニ
ングして前記片面基板あるいは両面以上の多層基板の表
面に回路を形成する回路形成工程と、前記回路が形成さ
れた片面基板あるいは両面以上の多層基板に対して熱を
加えた際に生じる反りを低減させるために再度加熱加圧
する熱処理工程とを備え、熱処理工程の加熱温度が前記
積層工程の加熱温度より高く、前記熱処理工程の加圧力
が前記積層工程の加圧力より低いことを特徴とするもの
である。In order to achieve the above object, a method of manufacturing a circuit-formed substrate according to the present invention is a multi-layer substrate having one side or two sides or more by alternately arranging an insulating substrate and a metal foil and applying heat and pressure. A laminating step, a circuit forming step of patterning the metal foil to form a circuit on the surface of the single-sided substrate or a multi-layered substrate having two or more surfaces, and a single-sided substrate having the circuit formed thereon or a multi-layered substrate having two or more surfaces. A heat treatment step of heating and pressing again in order to reduce warpage that occurs when heat is applied, the heating temperature of the heat treatment step is higher than the heating temperature of the laminating step, and the pressing force of the heat treatment step is the laminating step. It is characterized by being lower than the pressing force of.
【００２６】これによって、積層工程の加熱加圧は従来
通りの条件で行うことができ、かつ半田付け時の基板反
り量を低減出来るものである。As a result, the heating and pressing in the laminating step can be carried out under the conventional conditions, and the amount of warpage of the board during soldering can be reduced.
【００２７】これは、前述のように回路を形成した後の
熱処理工程を前記積層工程より高温で行なうことにより
硬化収縮を進め、かつ基板が反らずに保持できる程度の
前記積層工程より低い圧力で加圧を行なうことで達成さ
れるものである。This is because the heat treatment step after forming the circuit as described above is carried out at a temperature higher than that of the laminating step to promote curing shrinkage, and a pressure lower than that of the laminating step so that the substrate can be held without warping. It is achieved by applying pressure.
【００２８】これにより積層工程は樹脂の成形性を重視
した条件で行い、回路形成後の熱処理工程により回路形
成基板を反らせずに硬化収縮が行わせるという製造工程
となり、半田付け時の加熱による硬化収縮は減少し反り
の問題は解決する。As a result, the laminating step is carried out under the condition that the moldability of the resin is emphasized, and the heat treatment step after the circuit formation causes the curing and shrinkage without warping the circuit forming substrate, thus curing by heating during soldering. Shrinkage is reduced and the problem of warpage is solved.
【００２９】すなわち、本発明は回路形成前に熱処理を
行っても回路形成基板全体に接着されている金属箔によ
り阻害されるため硬化収縮は十分に行われず、回路形成
後に熱処理を行う場合でも積層工程のような高い圧力で
行うと硬化収縮が阻害されるために熱処理の効果が現れ
ないことを見いだしたものである。That is, according to the present invention, even if heat treatment is performed before circuit formation, curing shrinkage is not sufficiently performed because the metal foil adhered to the entire circuit formation substrate inhibits curing shrinkage. It was found that the effect of the heat treatment does not appear because the curing shrinkage is hindered when the process is performed at a high pressure.
【００３０】[0030]
【発明の実施の形態】以下、本発明の実施の形態につい
て同一機能を有するものには同一番号を付して詳しい説
明を省略し、相違する点について説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with respect to those having the same function by giving the same reference numerals and omitting a detailed description thereof, and different points.
【００３１】（実施の形態１）図１は本発明の第１の実
施の形態の回路形成基板の製造方法を示す断面図であ
る。回路形成基板１は従来例と同じ方法により製造した
ものである。(Embodiment 1) FIG. 1 is a cross-sectional view showing a method for manufacturing a circuit-forming board according to a first embodiment of the present invention. The circuit board 1 is manufactured by the same method as the conventional example.
【００３２】回路形成基板１を２枚の金属板２で挟み全
体を２００℃になるように加熱し、１時間保持した後に
冷却し回路形成基板１を取りだした。発明者の実験では
加熱の方法は恒温槽に投入したが、金属板２にヒーター
を内蔵する等の方法でも良い。The circuit-formed substrate 1 was sandwiched between two metal plates 2 and the whole was heated to 200 ° C., held for 1 hour and then cooled to take out the circuit-formed substrate 1. In the experiment of the inventor, the heating method was introduced into the constant temperature bath, but a method of incorporating a heater in the metal plate 2 may be used.
【００３３】２枚の金属板２で回路形成基板を挟む際
に、積層工程のような高い圧力は必要なく、金属板２の
平滑な表面に回路形成基板１が沿うていどのいわゆる接
触圧で良い。発明者の実験では１ｋｇｆ／cm2以下の圧
力で十分であった。この工程を積層工程、回路形成工程
に対して熱処理工程と呼ぶ。When sandwiching the circuit-forming board between the two metal plates 2, there is no need for a high pressure as in the laminating step, and the so-called contact pressure may be used as long as the circuit-forming board 1 follows the smooth surface of the metal plate 2. . In the inventors' experiments, a pressure of 1 kgf / cm2 or less was sufficient. This process is referred to as a heat treatment process in contrast to the lamination process and the circuit formation process.
【００３４】（表１）に熱処理工程の加熱温度について
検討した結果を示す。Table 1 shows the results of examining the heating temperature in the heat treatment step.
【００３５】[0035]
【表１】 [Table 1]
【００３６】検討に用いた回路形成基板はガラスエポキ
シプリプレグを基材として用い、大きさが２００mm角で
厚み１mmの基板である。The circuit-forming substrate used for the study is a substrate having a size of 200 mm square and a thickness of 1 mm, using glass epoxy prepreg as a base material.
【００３７】熱処理なしを含めて５条件の加熱温度につ
いて各々５枚の回路形成基板を用いて実験を行った。反
り量の測定は回路形成基板を精密定盤の上に凸面を下に
して静置し、回路形成基板の四隅が定盤より浮き上がっ
ている量をすき間ゲージ等を用いてそれぞれ測定し、５
枚中の最大値を反り量とした。Experiments were conducted using five circuit-forming substrates for each of five heating temperatures including no heat treatment. To measure the amount of warp, place the circuit board on the precision surface plate with the convex surface facing down, and then measure the amount of the four corners of the circuit board protruding from the surface plate using a gap gauge or the like.
The maximum value in the sheets was defined as the warp amount.
【００３８】半田付け前の回路形成基板では各基板とも
反り量は０．５mm以下であった。熱処理工程を通さなか
った回路形成基板では半田付け後の反り量は５mm程度あ
ったものが加熱温度２００℃の熱処理工程を通した基板
については０．５mmであった。In the circuit-formed boards before soldering, the warp amount of each board was 0.5 mm or less. The amount of warpage after soldering was about 5 mm in the circuit-formed substrate that did not pass the heat treatment process, but it was 0.5 mm in the substrate that passed the heat treatment process at a heating temperature of 200 ° C.
【００３９】このような効果の絶対量は回路形成基板の
種類、回路パターン、構成材料等によって異なるが、紙
フェノールプリプレグやアラミドエポキシプリプレグ等
の材料を用いた実験でも効果は確認された。The absolute amount of such an effect varies depending on the type of the circuit forming substrate, the circuit pattern, the constituent material, etc., but the effect was confirmed by an experiment using a material such as paper phenol prepreg or aramid epoxy prepreg.
【００４０】また、不織布を用いたプリプレグでは繊維
の配向性が制御しにくいため織布を用いた回路形成基板
より反り量は大きくなる場合があったが熱処理工程の導
入により問題の無いレベルに低減できた。In the case of a prepreg using a non-woven fabric, it is difficult to control the orientation of the fibers, so the warpage amount may be larger than that of a circuit-forming substrate using a woven fabric. did it.
【００４１】回路形成基板の構成は片面あるいは両面、
多層のいずれにおいても熱処理工程の効果は同様であ
る。The structure of the circuit-forming board may be one side or both sides,
The effect of the heat treatment process is the same in any of the multiple layers.
【００４２】エポキシ樹脂硬化物の硬化反応は、エポキ
シ樹脂硬化物のガラス転移点温度以上で起こるため、エ
ポキシ樹脂硬化物のガラス転移点温度以上で熱処理を行
わなければならない。本実施の形態の回路形成基板では
熱処理工程前のエポキシ樹脂のガラス転移点温度は（表
１）に示すように１９５℃であった。そのため１９５℃
以下の加熱温度では効果は得られなかった。Since the curing reaction of the cured epoxy resin product occurs at the glass transition temperature of the cured epoxy resin or above, the heat treatment must be carried out at the glass transition temperature of the cured epoxy resin or above. In the circuit-formed board of the present embodiment, the glass transition temperature of the epoxy resin before the heat treatment step was 195 ° C. as shown in (Table 1). Therefore 195 ℃
No effect was obtained at the following heating temperatures.
【００４３】一般に熱硬化性のエポキシ樹脂は硬化が進
むにつれて、硬化物の硬度、弾性率、ガラス転移点温度
が上昇し、高温領域での特性は安定する。Generally, as the thermosetting epoxy resin is hardened, the hardness, elastic modulus and glass transition temperature of the hardened product rise, and the characteristics in the high temperature region are stabilized.
【００４４】しかし、エポキシ樹脂の持つ塑性や柔軟性
は失われる。本実施の形態においても熱処理の温度を必
要以上に高くしたり処理時間を長くすると、エポキシ樹
脂と銅箔の間の接着強度が低下してしまう。However, the plasticity and flexibility of the epoxy resin are lost. Also in the present embodiment, if the temperature of the heat treatment is raised more than necessary or the treatment time is lengthened, the adhesive strength between the epoxy resin and the copper foil will decrease.
【００４５】そのため、使用する基板材料によって最適
な熱処理温度を選定する必要がある。本実施の形態の回
路形成基板について、その表面の銅箔の引き剥し強度を
測定したところ（表１）に示すように２００℃以下で処
理したサンプルについては約１ｋｇｆ／ｃｍの強度を示
したが、２５０℃で処理すると約０．２ｋｇｆ／ｃｍに
低下した。Therefore, it is necessary to select the optimum heat treatment temperature depending on the substrate material used. When the peel strength of the copper foil on the surface of the circuit-formed substrate of the present embodiment was measured (Table 1), the sample treated at 200 ° C. or lower showed a strength of about 1 kgf / cm. When it was treated at 250 ° C., it decreased to about 0.2 kgf / cm.
【００４６】熱処理工程を積層工程と同じ熱プレス装置
を用いて行った実験では、加圧力を積層工程と同じよう
に数十ｋｇｆ／cm2にすると、熱処理の効果が十分に得
られないだけでなく、スルーホール部分のメッキあるい
は導電性ペースト等による層間の接続について、熱処理
前後でスルーホール１箇所当たり数ｍΩから数百ｍΩの
接続抵抗の上昇がみられた。In an experiment in which the heat treatment process was performed using the same hot press machine as the laminating process, when the pressure was set to several tens of kgf / cm2 as in the laminating process, not only the effect of the heat treatment was not sufficiently obtained. With respect to the connection between the layers by plating or through the conductive paste in the through holes, the connection resistance was increased by several mΩ to several hundred mΩ per through hole before and after the heat treatment.
【００４７】熱処理による層間接続への影響を避けるた
めにはできるだけ加圧力を低くすることが望ましく、前
述のように１ｋｇ／cm2以下となるよう熱処理工程に使
用する装置については配慮が必要である。In order to avoid the influence of heat treatment on the interlayer connection, it is desirable to make the applied pressure as low as possible, and it is necessary to consider the equipment used in the heat treatment step so that the pressure is 1 kg / cm 2 or less as described above.
【００４８】熱処理を行った回路形成基板ではエポキシ
樹脂の重合度が通常の基板と比較して高いために吸水率
が低く、層間の接続などを含めた湿度に対する信頼性が
改善される。特に導電性ペーストを層間の接続に使用し
た場合は導電性ペースト中のエポキシ樹脂の吸水率も低
くなるため、その効果は大である。The heat-treated circuit-formed board has a low degree of water absorption because the degree of polymerization of the epoxy resin is higher than that of a normal board, and the reliability against humidity including the connection between layers is improved. In particular, when the conductive paste is used for connecting the layers, the water absorption of the epoxy resin in the conductive paste is also low, and the effect is great.
【００４９】（実施の形態２）図２、図３は本発明の第
２の実施の形態の回路形成基板の製造装置を示す斜視図
および断面図である。(Embodiment 2) FIGS. 2 and 3 are a perspective view and a cross-sectional view showing an apparatus for manufacturing a circuit board according to a second embodiment of the present invention.
【００５０】第１の実施の形態では熱処理を施す基板は
１枚であったが、実際の工程では何枚かの基板を同時に
処理できねばならない。In the first embodiment, the number of substrates to be heat-treated is one, but in the actual process, several substrates must be processed at the same time.
【００５１】しかし、２枚の金属板の間に多数の基板を
挟んで熱処理を行うと基板間の温度差が生じて均一な加
熱が行えない。However, if a large number of substrates are sandwiched between two metal plates for heat treatment, a temperature difference occurs between the substrates and uniform heating cannot be performed.
【００５２】そこで図２に示すように金属板２ａ、２ｂ
の間に１０枚程度の回路形成基板１を挟む際に、重ねた
回路形成基板１の中央にスペーサ３を挟む。スペーサ３
は金属板２ａ、２ｂと同様の金属板を数mmの間隔で支柱
を挟んで張り合わせたものである。Therefore, as shown in FIG. 2, the metal plates 2a, 2b are
When about 10 circuit-forming boards 1 are sandwiched between them, the spacer 3 is sandwiched in the center of the overlapped circuit-forming boards 1. Spacer 3
Is a metal plate similar to the metal plates 2a and 2b, which are attached to each other with columns between them at intervals of several mm.
【００５３】次に図３に示すように回路形成基板１とス
ペーサ３を挟んだ金属板２ａ、２ｂをホルダー５に固定
する。ホルダー５と金属板２ａの間にあるスプリング４
によって回路形成基板１には所望の圧力が加わる。Next, as shown in FIG. 3, the metal plates 2a and 2b sandwiching the circuit forming substrate 1 and the spacer 3 are fixed to the holder 5. Spring 4 between holder 5 and metal plate 2a
As a result, a desired pressure is applied to the circuit board 1.
【００５４】さらに、ホルダー５を恒温槽７に入れ温風
６を恒温槽７内に導入する。温風６は図２中の矢印に示
すようにスペーサ３内にも循環し、ホルダー５内に挟み
込まれた１０枚程度の回路形成基板１は均一に加熱され
る。Further, the holder 5 is put in the constant temperature bath 7, and the hot air 6 is introduced into the constant temperature bath 7. The warm air 6 also circulates in the spacer 3 as shown by the arrow in FIG. 2, and about 10 circuit-forming boards 1 sandwiched in the holder 5 are uniformly heated.
【００５５】約１mm厚みのガラスエポキシ基板を用いた
実験では、５から１０枚毎にスペーサ３を挟むことで数
十枚の回路形成基板１を同時に処理することも可能であ
る。温風６は通常は大気であるが、回路形成基板１の変
色および銅箔の酸化が問題になる場合には窒素等の不活
性ガスを温風６に用いることで防止できる。In an experiment using a glass epoxy substrate having a thickness of about 1 mm, it is possible to simultaneously process several tens of circuit-formed substrates 1 by sandwiching the spacer 3 every 5 to 10 substrates. The warm air 6 is usually atmospheric air, but when discoloration of the circuit forming substrate 1 and oxidation of the copper foil pose a problem, it can be prevented by using an inert gas such as nitrogen for the warm air 6.
【００５６】（実施の形態３）図４は本発明の第３の実
施の形態の回路形成基板の製造装置を示す断面図であ
る。実施の形態２においては恒温槽を使用するため実際
の生産においては効率の点で不都合を生じる場合があ
る。(Embodiment 3) FIG. 4 is a sectional view showing an apparatus for manufacturing a circuit-forming board according to a third embodiment of the present invention. In the second embodiment, since a constant temperature bath is used, there may be a problem in efficiency in actual production.
【００５７】そこで、図４に示すように回路形成基板を
挟み込んだホルダー５をベルト８によってヒータ９の中
を順次通過させる。ヒータ９の温度とベルト８の速度を
調整することで所望の熱処理条件を設定できる。Therefore, as shown in FIG. 4, the holder 5 sandwiching the circuit forming substrate is sequentially passed through the heater 9 by the belt 8. A desired heat treatment condition can be set by adjusting the temperature of the heater 9 and the speed of the belt 8.
【００５８】本実施の形態では間断なく回路形成基板を
投入し熱処理が行えるので、実施の形態２に比べて作業
効率の点では優れている。実施の形態２と同じ理由でヒ
ータ９の内部に不活性ガスを導入しても良い。また、ヒ
ータ９の加熱方法は遠赤外線、近赤外線、温風等を問わ
ない。In the present embodiment, the circuit forming substrate can be put in without interruption and heat treatment can be performed, so that it is superior in working efficiency to the second embodiment. An inert gas may be introduced into the heater 9 for the same reason as in the second embodiment. The heater 9 may be heated by far infrared rays, near infrared rays, warm air, or the like.
【００５９】[0059]
【発明の効果】上記実施の形態より明らかなように本発
明は回路形成基板の製造において、積層工程および回路
形成工程の終了後に再度加熱加圧する熱処理工程を導入
することで、回路形成基板の半田付け時の反りを改善で
き得るものである。As is apparent from the above-described embodiments, the present invention introduces a heat treatment step of heating and pressing again after the lamination step and the circuit forming step in the manufacture of the circuit forming board, so that the circuit forming board is soldered. The warp during attachment can be improved.
【００６０】また、回路形成基板にエポキシ樹脂を含む
場合は、エポキシ樹脂の吸水率も低くなるため湿度に対
する回路形成基板の信頼性も向上する。Further, when the circuit forming substrate contains an epoxy resin, the water absorption rate of the epoxy resin also becomes low, so that the reliability of the circuit forming substrate against humidity is improved.
【００６１】なお、従来の技術、本発明の実施の形態お
よび発明の効果はエポキシ樹脂の例を用いて説明した
が、フェノール樹脂、アクリル樹脂、ポリイミド等の高
分子材料、あるいはその混合物、変成物を用いた基板材
料において同様の効果を得ることができる。Although the prior art, the embodiments of the present invention and the effects of the present invention have been described by using the example of the epoxy resin, a polymer material such as a phenol resin, an acrylic resin or a polyimide, or a mixture or modified product thereof. The same effect can be obtained in the substrate material using.
【図１】本発明の回路形成基板の製造方法の一実施の形
態を示す断面図FIG. 1 is a cross-sectional view showing an embodiment of a method for manufacturing a circuit-formed substrate of the present invention.
【図２】本発明の回路形成基板の製造装置の一実施の形
態の斜視図FIG. 2 is a perspective view of an embodiment of an apparatus for manufacturing a circuit-formed board of the present invention.
【図３】本発明の回路基板の製造装置の他の実施の形態
を示す断面図FIG. 3 is a cross-sectional view showing another embodiment of the circuit board manufacturing apparatus of the present invention.
【図４】本発明の回路形成基板の製造装置の更に他の実
施の形態を示す断面図FIG. 4 is a cross-sectional view showing still another embodiment of the circuit-forming board manufacturing apparatus of the present invention.
【図５】従来の回路形成基板の製造方法の工程図FIG. 5 is a process diagram of a conventional method of manufacturing a circuit board.
【図６】従来の回路形成基板の製造方法の工程図FIG. 6 is a process diagram of a conventional method for manufacturing a circuit board.
【図７】従来の回路形成基板の製造方法の工程図FIG. 7 is a process diagram of a conventional method for manufacturing a circuit-formed substrate.
１ 回路形成基板 ２ａ，２ｂ 金属板 ３ スペーサ ４ スプリング ５ ホルダー ６ 温風 ７ 恒温槽 ８ ベルト ９ ヒーター １０ プリプレグ １１ 銅箔 １２ 熱板 １３ 貫通孔 １４ 銅メッキ膜 １５ 回路 １６ 導電性ペースト １７ 半田ペースト １８ チップ状部品 1 circuit board 2a, 2b Metal plate 3 spacers 4 spring 5 holder 6 warm air 7 constant temperature bath 8 belts 9 heater 10 prepreg 11 Copper foil 12 hot plate 13 through holes 14 Copper plating film 15 circuits 16 Conductive paste 17 Solder paste 18 Chip parts
───────────────────────────────────────────────────── フロントページの続き (72)発明者 竹中 敏昭 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 三田村 貞雄 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 岸本 邦雄 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 野沢 大輔 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 中谷 誠一 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Ｆターム(参考） 5E343 AA15 AA17 EE33 ER31 ER35 ER37 ER39 ER54 GG20 5E346 AA43 AA60 CC04 CC05 CC09 GG28 GG40 HH11 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Toshiaki Takenaka 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. (72) Inventor Sadao Mitamura 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. (72) Inventor Kunio Kishimoto 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. (72) Inventor Daisuke Nozawa 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. (72) Inventor Seiichi Nakatani 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. F-term (reference) 5E343 AA15 AA17 EE33 ER31 ER35 ER37 ER39 ER54 GG20 5E346 AA43 AA60 CC04 CC05 CC09 GG28 GG40 HH11
Claims (13)
圧し、片面あるいは両面以上の多層基板とする積層工程
と、前記金属箔をパターンニングして前記片面基板ある
いは両面以上の多層基板の表面に回路を形成する回路形
成工程と、前記回路が形成された片面基板あるいは両面
以上の多層基板に対して熱を加えた際に生じる反りを低
減させるために再度加熱加圧する熱処理工程とを備え、 熱処理工程の加熱温度が前記積層工程の加熱温度より高
く、前記熱処理工程の加圧力が前記積層工程の加圧力よ
り低いことを特徴とする回路形成基板の製造方法。1. A laminating step of alternately arranging insulating substrates and metal foils to heat and pressurize them to form a multi-layered substrate having one side or both sides, and patterning the metal foils to form the one-sided substrate or multi-layered substrates having more than two sides. A circuit forming step of forming a circuit on the surface of the substrate, and a heat treatment step of heating and pressurizing again in order to reduce the warp that occurs when heat is applied to the single-sided board or the multilayer board having two or more surfaces on which the circuit is formed. A manufacturing method of a circuit forming substrate, comprising: a heating temperature of the heat treatment step is higher than a heating temperature of the stacking step, and a pressing force of the heat treatment step is lower than a pressing force of the stacking step.
基板あるいは両面以上の多層基板を挟み、前記金属板を
介して前記片面基板あるいは両面以上の多層基板が加圧
されることを特徴とする請求項１記載の回路形成基板の
製造方法。2. In the heat treatment step, the single-sided substrate or the multi-layered substrate having two or more surfaces is sandwiched between metal plates, and the one-sided substrate or the multi-layered substrate having two or more surfaces is pressed through the metal plate. Item 2. A method for manufacturing a circuit-forming board according to Item 1.
の多層基板を挟み、さらにホルダーで加圧保持すること
を特徴とする請求項２記載の回路形成基板の製造方法。3. The method for manufacturing a circuit-formed board according to claim 2, wherein the single-sided board or the multi-layered board having two or more surfaces is sandwiched between metal plates and is further held under pressure by a holder.
前記貫通孔を通じて電気的接続手段による層間の接続を
行なう工程を備えたことを特徴とする請求項１記載の回
路形成基板の製造方法。4. A through hole is provided in the insulating substrate before the laminating step,
2. The method for manufacturing a circuit-formed substrate according to claim 1, further comprising a step of connecting layers through an electrical connection means through the through holes.
前記貫通孔を通じて電気的接続手段による層間の接続を
行なう工程を備えたことを特徴とする請求項１記載の回
路形成基板の製造方法。5. A through hole is provided in the insulating substrate before the laminating step,
2. The method for manufacturing a circuit-formed substrate according to claim 1, further comprising a step of connecting layers through an electrical connection means through the through holes.
たことを特徴とする請求項５記載の回路形成基板の製造
方法。6. The method of manufacturing a circuit forming substrate according to claim 5, wherein a conductive paste is used for the electrical connecting means.
電解メッキを用いたことを特徴とする請求項５記載の回
路形成基板の製造方法。7. The method for manufacturing a circuit-formed substrate according to claim 5, wherein electrolytic plating or electroless plating is used as the electrical connecting means.
メッキもしくは無電解メッキを施すことにより層間の接
続を行なう工程を備えたことを特徴とする請求項１記載
の回路形成基板の製造方法。8. The method of manufacturing a circuit-formed board according to claim 1, further comprising a step of forming through holes in the board after the stacking step and performing electrolytic plating or electroless plating to connect the layers. .
布に熱硬化性樹脂を含浸させたプリプレグを絶縁基板に
用いたことを特徴とする請求項１記載の回路形成基板の
製造方法。9. The method for producing a circuit-formed substrate according to claim 1, wherein a prepreg obtained by impregnating a glass fiber woven fabric or a glass fiber nonwoven fabric with a thermosetting resin is used as an insulating substrate.
維不織布に熱硬化性樹脂を含浸させたプリプレグを絶縁
基板に用いたことを特徴とする請求項１記載の回路形成
基板の製造方法。10. The method for producing a circuit-formed substrate according to claim 1, wherein a prepreg obtained by impregnating an aramid fiber woven fabric or an aramid fiber nonwoven fabric with a thermosetting resin is used as an insulating substrate.
いた樹脂のガラス転移点温度以上であることを特徴とす
る請求項１記載の回路形成基板の製造方法。11. The method for manufacturing a circuit forming substrate according to claim 1, wherein the heating temperature in the heat treatment step is equal to or higher than the glass transition temperature of the resin used for the insulating substrate.
以下であることを特徴とする請求項１記載の回路形成基
板の製造方法。12. The pressure applied in the heat treatment step is 1 kgf / cm 2.
The method for manufacturing a circuit-formed substrate according to claim 1, wherein:
とを特徴とする請求項１記載の回路形成基板の製造方
法。13. The method of manufacturing a circuit-formed substrate according to claim 1, wherein the heat treatment step is performed in an inert gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003121197A JP2003283109A (en) | 2003-04-25 | 2003-04-25 | Method for manufacturing board for forming circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003121197A JP2003283109A (en) | 2003-04-25 | 2003-04-25 | Method for manufacturing board for forming circuit |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6772895A Division JP3456784B2 (en) | 1995-03-27 | 1995-03-27 | Circuit forming substrate manufacturing method and circuit forming substrate manufacturing apparatus |
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| Publication Number | Publication Date |
|---|---|
| JP2003283109A true JP2003283109A (en) | 2003-10-03 |
Family
ID=29244591
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008099940A1 (en) * | 2007-02-16 | 2008-08-21 | Sumitomo Bakelite Co., Ltd. | Circuit board manufacturing method, semiconductor manufacturing apparatus, circuit board and semiconductor device |
| JP2008205004A (en) * | 2007-02-16 | 2008-09-04 | Sumitomo Bakelite Co Ltd | Method for manufacturing circuit board and semiconductor device manufacturing apparatus |
| JP2009094216A (en) * | 2007-10-05 | 2009-04-30 | Sumitomo Bakelite Co Ltd | Manufacturing method of semiconductor device, and manufacturing method of printed circuit board for semiconductor device |
-
2003
- 2003-04-25 JP JP2003121197A patent/JP2003283109A/en not_active Withdrawn
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008099940A1 (en) * | 2007-02-16 | 2008-08-21 | Sumitomo Bakelite Co., Ltd. | Circuit board manufacturing method, semiconductor manufacturing apparatus, circuit board and semiconductor device |
| JP2008205004A (en) * | 2007-02-16 | 2008-09-04 | Sumitomo Bakelite Co Ltd | Method for manufacturing circuit board and semiconductor device manufacturing apparatus |
| CN101611490B (en) * | 2007-02-16 | 2011-07-27 | 住友电木株式会社 | Circuit board manufacturing method, semiconductor manufacturing apparatus, circuit board and semiconductor device |
| US8592256B2 (en) | 2007-02-16 | 2013-11-26 | Sumitomo Bakelite Co., Ltd. | Circuit board manufacturing method, semiconductor manufacturing apparatus, circuit board and semiconductor device |
| TWI424510B (en) * | 2007-02-16 | 2014-01-21 | Sumitomo Bakelite Co | Circuit board manufacturing method and semiconductor manufacturing device |
| JP2009094216A (en) * | 2007-10-05 | 2009-04-30 | Sumitomo Bakelite Co Ltd | Manufacturing method of semiconductor device, and manufacturing method of printed circuit board for semiconductor device |
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