JP2003273266A - Package for housing semiconductor element - Google Patents

Package for housing semiconductor element

Info

Publication number
JP2003273266A
JP2003273266A JP2002076235A JP2002076235A JP2003273266A JP 2003273266 A JP2003273266 A JP 2003273266A JP 2002076235 A JP2002076235 A JP 2002076235A JP 2002076235 A JP2002076235 A JP 2002076235A JP 2003273266 A JP2003273266 A JP 2003273266A
Authority
JP
Japan
Prior art keywords
semiconductor element
base
package
copper
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002076235A
Other languages
Japanese (ja)
Inventor
Yoshihiro Basho
義博 芭蕉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002076235A priority Critical patent/JP2003273266A/en
Publication of JP2003273266A publication Critical patent/JP2003273266A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that heat generated at a semiconductor element operating time cannot be externally efficiently dissipated and a thermal breakage occurs in the element. <P>SOLUTION: A package for housing a semiconductor element comprises a base having a placing part for placing the element on an upper surface, a frame-like insulator mounted to surround the placing part on the base, and a cover mounted on the insulator for hermetically sealing the inside of the insulator. In this package, the base is formed by impregnating a base obtained by knitting carbon fibers in a three-dimensional manner with copper. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明はＬＳＩ（大規模集積
回路素子）や光半導体素子等の半導体素子を収容するた
めの半導体素子収納用パッケージに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element housing package for housing a semiconductor element such as an LSI (Large Scale Integrated Circuit Element) or an optical semiconductor element.

【０００２】[0002]

【従来の技術】従来、半導体素子を収容するための半導
体素子収納用パッケージは、上面に半導体素子が載置さ
れる載置部を有する銅−タングステン合金や銅−モリブ
デン合金等の金属材料からなる基体と、該基体の上面に
前記載置部を囲繞するようにして取着された酸化アルミ
ニウム質焼結体等の電気絶縁材料からなる枠状絶縁体
と、該枠状絶縁体の内周部から外周部にかけて被着導出
されているタングステン、モリブデン、マンガン等の高
融点金属からなる複数個の配線層と、前記枠状絶縁体の
上面に取着され、絶縁体の内側の穴を塞ぐ蓋体とから構
成されており、基体の半導体素子載置部に半導体素子を
接着剤を介して接着固定するとともに該半導体素子の各
電極をボンディングワイヤを介して枠状絶縁体に形成し
た配線層に電気的に接続し、しかる後、枠状絶縁体に蓋
体を該枠状絶縁体の内側の穴を塞ぐようにしてガラス、
樹脂、ロウ材等から成る封止材を介して接合させ、基体
と枠状絶縁体と蓋体とからなる容器内部に半導体素子を
気密に収容することによって製品としての半導体装置と
なる。2. Description of the Related Art Conventionally, a semiconductor element accommodating package for accommodating a semiconductor element is made of a metal material such as a copper-tungsten alloy or a copper-molybdenum alloy having a mounting portion on which the semiconductor element is mounted. A base body, a frame-shaped insulator made of an electrically insulating material such as an aluminum oxide sintered body attached to the upper surface of the base body so as to surround the mounting portion, and an inner peripheral portion of the frame-shaped insulator A plurality of wiring layers made of refractory metal such as tungsten, molybdenum, manganese, etc., which are adhered and led from the outer periphery to the outer peripheral portion, and a lid which is attached to the upper surface of the frame-shaped insulator and closes the hole inside the insulator. The semiconductor element is bonded and fixed to the semiconductor element mounting portion of the base body with an adhesive, and each electrode of the semiconductor element is formed on the wiring layer formed on the frame-shaped insulator through the bonding wire. Electrically Continued, and thereafter, the glass and the lid to the frame-shaped insulating member so as to close the inner hole of the frame-shaped insulator,
A semiconductor device as a product is obtained by joining them through a sealing material made of resin, a brazing material, etc., and hermetically housing the semiconductor element in a container made of a base, a frame-shaped insulator, and a lid.

【０００３】なお上述の半導体素子収納用パッケージに
おいては、半導体素子が載置される基体が銅−タングス
テン合金や銅−モリブデン合金等の金属材料で形成され
ており、該銅−タングステン合金や銅−モリブデン合金
等は熱伝導率が約１８０Ｗ／ｍ・Ｋと高く熱伝導性に優
れていることから基体は半導体素子の作動時に発する熱
を良好に吸収するとともに大気中に良好に放散させるこ
とができ、これによって半導体素子を常に適温とし半導
体素子に熱破壊が発生したり、特性に熱劣化が発生した
りするのを有効に防止している。In the above-mentioned package for housing a semiconductor element, the base on which the semiconductor element is mounted is made of a metal material such as a copper-tungsten alloy or a copper-molybdenum alloy, and the copper-tungsten alloy or copper-tungsten alloy is used. Since the molybdenum alloy has a high thermal conductivity of about 180 W / m · K and is excellent in thermal conductivity, the base body can well absorb the heat generated during the operation of the semiconductor element and can dissipate it into the atmosphere. As a result, the semiconductor element is always kept at an appropriate temperature, and the semiconductor element is effectively prevented from suffering thermal breakdown or thermal deterioration of its characteristics.

【０００４】また上述の半導体素子収納用パッケージの
基体として使用されている銅−タングステン合金や銅−
モリブデン合金はタングステン粉末やモリブデン粉末を
焼成して焼結多孔体を得、次に前記焼結多孔体の空孔内
に溶融させることによって製作されており、例えば、タ
ングステンから成る焼結多孔体に銅を含浸させる場合は
焼結多孔体が７５質量％乃至９０質量％、銅が１０質量
％乃至２５質量％の範囲に、モリブデンから成る焼結多
孔体に銅を含浸させる場合は焼結多孔体が８０質量％乃
至９０質量％、銅が１０質量％乃至２０質量％の範囲と
なっている。Further, copper-tungsten alloys and copper-based materials used as the base body of the above-mentioned package for accommodating semiconductor elements.
A molybdenum alloy is manufactured by firing tungsten powder or molybdenum powder to obtain a sintered porous body, and then melting the powder in the pores of the sintered porous body. When impregnating copper, the sintered porous body is in the range of 75% by mass to 90% by mass, and in the range of 10% by mass to 25% by mass of copper. Is 80% by mass to 90% by mass, and copper is 10% by mass to 20% by mass.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、基体がタ
ングステン粉末やモリブデン粉末を焼成して焼結多孔体
を得るとともに該焼結多孔体の空孔内に溶融させた銅を
含浸させることによって形成されており、前記銅の量を
増加させればさせるほど前記基体の熱伝導率は高くなる
が、それにつれて基体の線熱膨張係数も大きくなる。前
記基体は上面に取着される酸化アルミニウム質焼結体か
ら成る枠状絶縁体の線熱膨張係数（７ｐｐｍ／℃：室温
乃至８００℃）と大きく相違すると、両者の線熱膨張係
数の相違により発生する応力が両者の接合界面に働き、
該応力により前記接合界面にクラックがはいったり、ひ
どい場合には両者の接合界面に剥離が発生したりして、
半導体素子収納用パッケージの気密封止の信頼性が損な
われ、内部に収容する半導体素子を信頼性よく正常に作
動させることができなくなると言う問題が発生してしま
うことから、前記基体の線熱膨張係数は前記枠状絶縁体
の線熱膨張係数と近似させる必要があり、前記基体の銅
の含有率は１０質量％乃至２５質量％（基体が銅−タン
グステン合金から成る場合は銅の含有率は１０質量％乃
至２５質量％、銅−モリブデン合金から成る場合は銅の
含有率は１０質量％乃至２０質量％）の範囲に限定され
ることとなり、前記基体の熱伝導率は最大でも約１８０
Ｗ／ｍ・Ｋ程度であった。However, in this conventional package for accommodating semiconductor elements, the base body fires tungsten powder or molybdenum powder to obtain a sintered porous body, and the sintered porous body has pores inside. It is formed by impregnating molten copper, and the thermal conductivity of the base increases as the amount of copper increases, but the linear thermal expansion coefficient of the base also increases accordingly. When the base has a large difference from the linear thermal expansion coefficient (7 ppm / ° C .: room temperature to 800 ° C.) of the frame-shaped insulator made of an aluminum oxide sintered body attached to the upper surface, due to the difference in the linear thermal expansion coefficients of the two. The generated stress acts on the bonding interface between the two,
Due to the stress, cracks may be introduced at the joint interface, or in severe cases, peeling may occur at the joint interface between the two,
The reliability of the hermetic sealing of the package for housing the semiconductor element is impaired, and the problem that the semiconductor element housed inside cannot be reliably and normally operated occurs. The expansion coefficient needs to be approximated to the linear thermal expansion coefficient of the frame-shaped insulator, and the copper content of the base is 10% by mass to 25% by mass (the copper content of the base is copper-tungsten alloy). Is limited to 10% by mass to 25% by mass, and in the case of a copper-molybdenum alloy, the copper content is limited to the range of 10% by mass to 20% by mass), and the thermal conductivity of the substrate is about 180 at maximum.
It was about W / m · K.

【０００６】更に大きな熱伝導率を求められる場合には
前記基体として銅−タングステン合金に換えて一方向に
配列した炭素繊維を炭素で結合した炭素−炭素複合体が
提案されている。該炭素−炭素複合体は熱伝導率に方向
性があり炭素繊維方向の熱伝導率が約４００Ｗ／ｍ・Ｋ
と非常に大きく、半導体素子の基体接着面に対して垂直
方向に炭素繊維の方向を揃えた基体を作製しておくと半
導体素子が発生する熱を外部に効率よく放散することが
できることとなる。しかしながら前記炭素−炭素複合体
は熱伝導率が繊維方向にのみ高くなるという方向性があ
るため、半導体素子収納用パッケージ内に近時の高密度
化、高集積化が大きく進み、作動時に多量の熱を発する
半導体素子を収容した場合、半導体素子が作動時に発す
る熱は半導体素子から基体へは効率的に伝達されるが、
基体から外部への熱の伝達が律則となり基体を介して外
部に完全に放散させることができなくなり、その結果、
半導体素子が該素子自身の発する熱によって高温とな
り、半導体素子に熱破壊を招来させたり、特性にばらつ
きを生じ安定に作動させることができないという欠点を
有していた。When a higher thermal conductivity is required, a carbon-carbon composite has been proposed in which the copper-tungsten alloy is used instead of the copper-tungsten alloy and carbon fibers arranged in one direction are bonded by carbon. The carbon-carbon composite has a directional thermal conductivity, and the thermal conductivity in the carbon fiber direction is about 400 W / m · K.
It is very large, and if a base body in which the carbon fibers are aligned in the direction perpendicular to the base body bonding surface of the semiconductor element is manufactured, the heat generated by the semiconductor element can be efficiently dissipated to the outside. However, since the carbon-carbon composite has a direction in which the thermal conductivity is increased only in the fiber direction, the recent high density and high integration in the package for housing the semiconductor element has been greatly advanced, and a large amount of the carbon-carbon composite during operation has been activated. When a semiconductor element that emits heat is accommodated, the heat generated when the semiconductor element operates is efficiently transferred from the semiconductor element to the base body.
The transfer of heat from the substrate to the outside becomes a rule, and it is not possible to completely dissipate the heat through the substrate to the outside.
The semiconductor element has a drawback in that it is heated to a high temperature due to the heat generated by the element itself, causing thermal damage to the semiconductor element or causing a variation in characteristics and making it impossible to operate stably.

【０００７】また前記炭素−炭素複合体から成る基体
は、炭素繊維を炭素で結合させた際基体内部に空隙が生
じてしまい該空隙の存在により基体自身の気密性が確実
に保たれず、該基体を用いて作製される半導体素子収納
用パッケージの半導体素子を収納する空所の気密封止が
不完全となり、半導体素子を安定かつ正常に作動させる
ことが困難となると言う欠点も有していた。In addition, in the substrate composed of the carbon-carbon composite, when carbon fibers are bonded with carbon, voids are formed inside the substrate, and the presence of the voids does not ensure the airtightness of the substrate itself. There is also a drawback that the airtight sealing of the space for housing the semiconductor element of the package for housing the semiconductor element manufactured using the base becomes incomplete, and it becomes difficult to operate the semiconductor element stably and normally. .

【０００８】本発明は上記欠点に鑑み案出されたもの
で、その目的は内部に高速駆動を行う半導体素子を収容
することができ、かつ収容する半導体素子を長期間にわ
たり正常、かつ安定に作動させることができる半導体素
子収納用パッケージを提供することにある。The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to accommodate therein a semiconductor element which is driven at high speed, and to operate the accommodated semiconductor element normally and stably for a long period of time. Another object of the present invention is to provide a package for accommodating semiconductor elements.

【０００９】[0009]

【課題を解決するための手段】本発明の半導体素子収納
用パッケージは、上面に半導体素子が載置される載置部
を有する基体と、前記基体上に半導体素子載置部を囲繞
するようにして取着される枠状絶縁体と、前記枠状絶縁
体上に取着され、枠状絶縁体の内側を気密に封止する蓋
体とから成る半導体素子収納用パッケージであって、前
記基体は炭素繊維を三次元に編んだ母材に銅を含浸させ
て形成したことを特徴とするものである。A package for housing a semiconductor element of the present invention includes a base having a mounting portion on which a semiconductor element is mounted, and a semiconductor element mounting portion surrounding the base. A package for storing a semiconductor element, comprising: a frame-shaped insulator attached to the frame-shaped insulator; and a lid attached to the frame-shaped insulator to hermetically seal the inside of the frame-shaped insulator. Is characterized in that it is formed by impregnating copper into a three-dimensionally knitted carbon fiber base material.

【００１０】また本発明の半導体素子収納用パッケージ
は、前記基体と前記枠状絶縁体の熱膨張係数差が３ｐｐ
ｍ／℃以下であることを特徴とするものである。更に本
発明の半導体素子収納用パッケージは、前記基体の炭素
繊維径は１μｍ乃至１００μｍであることを特徴とする
ものである。Also, in the package for accommodating semiconductor elements of the present invention, the difference in coefficient of thermal expansion between the base body and the frame-shaped insulator is 3 pp.
It is characterized by being m / ° C. or less. Furthermore, the semiconductor element housing package of the present invention is characterized in that the carbon fiber diameter of the substrate is 1 μm to 100 μm.

【００１１】また更に本発明の半導体素子収納用パッケ
ージは、前期基体の銅にチタン、ジルコニウム、ハフニ
ウム、クロムの少なくとも１種を０．２質量乃至１０質
量％含有させたことを特徴とするものである。Furthermore, the semiconductor element accommodating package of the present invention is characterized in that the base copper is made to contain at least one of titanium, zirconium, hafnium and chromium in an amount of 0.2 to 10% by mass. is there.

【００１２】本発明の半導体素子収納用パッケージによ
れば、基体を炭素繊維を三次元に編んだ母材で形成した
ことから、基体に載置される半導体素子が多量の熱を発
したとしても、基体は約４００Ｗ／ｍ・Ｋと熱伝導率の
高い炭素繊維が３次元的に配置されているため、前記熱
を基体の半導体素子搭載平面方向に素早く広がらせると
ともに基体を介して外部に効率よく確実に放散させるこ
とが可能となる。According to the package for accommodating semiconductor elements of the present invention, since the base body is formed of the base material in which the carbon fibers are three-dimensionally knitted, even if the semiconductor element mounted on the base body emits a large amount of heat. Since the base has three-dimensionally arranged carbon fibers having a high thermal conductivity of about 400 W / m · K, the heat can be quickly spread in the plane of the base on which the semiconductor elements are mounted, and the heat can be efficiently transferred to the outside through the base. It is possible to disperse well and surely.

【００１３】また本発明の半導体素子収納用パッケージ
によれば、基体を炭素繊維を三次元に編んだ母材に銅を
含浸させて形成したことから、炭素繊維を三次元に編ん
だ母材に存在する空隙が銅により充填され、基体自身の
気密性が確実なものとなり、該基体を用いて作製される
半導体素子収納用パッケージの半導体素子を収納する空
所の気密封止が常に完全となり、半導体素子を安定かつ
正常に作動させることが可能となる。According to the package for accommodating semiconductor elements of the present invention, since the base is formed by impregnating the base material in which the carbon fiber is three-dimensionally knitted with copper, the base material in which the carbon fiber is three-dimensionally knitted is formed. The existing voids are filled with copper, the airtightness of the substrate itself is ensured, and the airtight sealing of the void for housing the semiconductor element of the semiconductor element housing package manufactured using the substrate is always complete, It is possible to operate the semiconductor element stably and normally.

【００１４】更に本発明の半導体素子収納用パッケージ
によれば、前記基体と前記枠状絶縁体の熱膨張係数差を
３ｐｐｍ／℃以下としたことから、半導体素子収納用パ
ッケージに収容した半導体素子が熱を発し、該熱が両者
に作用したとしても、両者の間に熱膨張係数の差に起因
する大きな内在応力が発生することはなく、半導体素子
収納用パッケージの気密封止をより完全なものとなし、
内部に収容する半導体素子を信頼性よく正常に作動させ
ることができる。Further, according to the package for accommodating a semiconductor element of the present invention, since the difference in thermal expansion coefficient between the base and the frame-shaped insulator is 3 ppm / ° C. or less, the semiconductor element accommodated in the package for accommodating a semiconductor element is Even if the heat is generated and the heat acts on both of them, a large internal stress due to the difference in the coefficient of thermal expansion does not occur between them, and the hermetic sealing of the package for housing a semiconductor element is more complete. And nothing,
The semiconductor element housed inside can be reliably and normally operated.

【００１５】また更に本発明の半導体素子収納用パッケ
ージによれば、前記基体の炭素繊維径を１μｍ乃至１０
０μｍとしたことから、炭素繊維を介しての熱の伝達を
確実なものとして半導体素子の作動時に発する熱を良好
に吸収するとともに大気中に良好に放散させ、半導体素
子を常に適温とし半導体素子に熱破壊が発生したり、特
性に熱劣化が発生したりするのを有効に防止することが
できる。Further, according to the package for accommodating semiconductor elements of the present invention, the carbon fiber diameter of the substrate is 1 μm to 10 μm.
Since it is set to 0 μm, the heat transfer through the carbon fiber is ensured, and the heat generated during the operation of the semiconductor element is well absorbed and is well dissipated into the atmosphere, so that the semiconductor element is always kept at an appropriate temperature and is applied to the semiconductor element. It is possible to effectively prevent the occurrence of thermal breakdown and the thermal deterioration of the characteristics.

【００１６】更にまた本発明の半導体素子収納用パッケ
ージによれば、前期基体の銅にチタン、ジルコニウム、
ハフニウム、クロムの少なくとも１種を０．２質量％乃
至１０質量％含有させたことから、炭素繊維を三次元に
編んだ母材に銅を含浸させる際、母材の炭素繊維と銅と
の濡れ性が向上し、炭素繊維を三次元に編んだ母材への
銅の充填がより強固で確実なものとなり、基体自身の気
密性をより確実なものとし、該基体を用いて作製される
半導体素子収納用パッケージの半導体素子を収納する空
所の気密封止が常に完全となり、半導体素子を安定かつ
正常に作動させることができる。Furthermore, according to the package for accommodating semiconductor elements of the present invention, copper, titanium, zirconium,
Since at least one of hafnium and chromium is contained in an amount of 0.2% by mass to 10% by mass, when the base material in which the carbon fiber is three-dimensionally knitted is impregnated with copper, the carbon fiber of the base material and the copper are wet. Of the base material woven by three-dimensionally knitting the carbon fibers to make the base material stronger and more reliable, the airtightness of the base body itself is made more reliable, and a semiconductor manufactured using the base body The airtight sealing of the space for housing the semiconductor device in the device housing package is always complete, and the semiconductor device can be operated stably and normally.

【００１７】[0017]

【発明の実施の形態】次に、本発明を添付図面に示す実
施例に基づき詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will now be described in detail with reference to the embodiments shown in the accompanying drawings.

【００１８】図１は本発明の半導体素子収納用パッケー
ジの一実施例を示す断面図であり、図１において、１は
基体、２は枠状絶縁体、３は蓋体である。この基体１と
枠状絶縁体２と蓋体３とにより内部に半導体素子４を気
密に収容する容器５が構成される。FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device of the present invention. In FIG. 1, 1 is a base, 2 is a frame-shaped insulator, and 3 is a lid. The base 1, the frame-shaped insulator 2 and the lid 3 constitute a container 5 that hermetically houses the semiconductor element 4 therein.

【００１９】前記基体１は、その上面に半導体素子４が
載置される載置部１ａを有するとともに上面外周部に該
基体１の上面に設けた半導体素子４が載置される載置部
１ａを囲繞するようにして枠状絶縁体２がロウ材やガラ
ス、樹脂等の接着剤を介して取着されている。The substrate 1 has a mounting portion 1a on which the semiconductor element 4 is mounted, and a mounting portion 1a on the outer periphery of the upper surface, on which the semiconductor element 4 provided on the upper surface of the substrate 1 is mounted. The frame-shaped insulator 2 is attached via an adhesive such as a brazing material, glass, or resin so as to surround the.

【００２０】前記基体１は、半導体素子４を支持する支
持部材として作用するとともに半導体素子４を常に適温
とする作用をなし、枠状絶縁体２に囲まれた基体１の載
置部１ａ上に半導体素子４がガラス、樹脂、ロウ材等の
接着剤を介して固定される。The base body 1 acts as a support member for supporting the semiconductor element 4 and at the same time keeps the semiconductor element 4 at an appropriate temperature, and is placed on the mounting portion 1a of the base body 1 surrounded by the frame-shaped insulator 2. The semiconductor element 4 is fixed via an adhesive such as glass, resin, or brazing material.

【００２１】なお前記基体１は炭素繊維を３次元方向に
織った母材と銅から成り、例えば特開平５−１０６１３
９に示される方法を用いてピッチ系の炭素繊維を３次元
に織り込んだものを固体のピッチあるいはコークス等の
粉末を分散させたフェノール樹脂等の熱硬化性樹脂の溶
液中に含浸させた後、これを乾燥させ、所定の圧力を加
えるとともに加熱し、これを不活性の雰囲気中、２００
０℃乃至３０００℃の高温で焼成することによって、炭
素繊維を三次元に編んだ母材を作製する。次に、前記炭
素繊維を三次元に編んだ母材に溶融した銅を、例えば１
０００℃乃至１２００℃、３０ＭＰａ乃至２００ＭＰａ
の温度・圧力下で含浸させることによって基体１を製作
する。The substrate 1 is composed of a base material obtained by weaving carbon fibers in a three-dimensional direction and copper, and is made of, for example, JP-A-5-10613.
After impregnating pitch-based carbon fibers three-dimensionally woven using the method shown in 9 into a solution of thermosetting resin such as phenol resin in which powder such as solid pitch or coke is dispersed, It is dried, heated to a specified pressure and heated to 200 ° C in an inert atmosphere.
By firing at a high temperature of 0 ° C. to 3000 ° C., a three-dimensionally knitted carbon fiber base material is produced. Next, the copper melted in the base material in which the carbon fiber is three-dimensionally knitted
000 ° C to 1200 ° C, 30 MPa to 200 MPa
Substrate 1 is manufactured by impregnation under the temperature and pressure.

【００２２】なお、前記炭素繊維を三次元に編んだ母材
を製作する際、炭素繊維を三次元に織り込んだものを固
体のピッチやコークス等の粉末を分散させたフェノール
樹脂等の熱硬化性樹脂の溶液中に含浸させた後、焼成し
て母材を製作すると、炭素繊維を三次元に編んだものを
直接焼成して母材を製作する場合に比べ、前記固体のピ
ッチやコークス等の粉末が炭素繊維間に入り込み炭素繊
維間の結合をより確実とすることから、焼成後の母材内
の空隙を大きく低減することができ、母材の熱伝導率を
高いものと成すことができる。When the base material in which the carbon fibers are three-dimensionally knitted is manufactured, a thermosetting material such as phenol resin in which powders such as solid pitch or coke are dispersed is obtained by weaving the carbon fibers in three dimensions. When the base material is manufactured by firing after impregnating it in a solution of resin, compared with the case where the base material is manufactured by directly firing a three-dimensionally knitted carbon fiber, the solid pitch, coke, etc. Since the powder enters between the carbon fibers to make the bond between the carbon fibers more reliable, the voids in the base material after firing can be greatly reduced, and the base material can have high thermal conductivity. .

【００２３】また、前記固体のピッチやコークス等の粉
末はその径が１μｍ乃至２００μｍの範囲であることが
望ましい。前記固体のピッチやコークス等の粉末の径が
１μｍ未満の場合、粉末の凝集がおこり、炭素繊維間に
均一に入り込むことができなくなり炭素繊維間の結合を
確実にすることできず焼成後の母材の強度が低下する恐
れがあり、その径が２００μｍを超える場合は固体のピ
ッチやコークス等の粉末が炭素繊維間の空隙より大きく
なり、該空隙に確実に入り込むことができなくなり炭素
繊維間の結合を確実にすることできず焼成後の母材の強
度が低下する恐れがあることから、その径は１μｍ乃至
２００μｍの範囲が好適に使用される。Further, it is desirable that the powder of the solid pitch or coke has a diameter in the range of 1 μm to 200 μm. When the diameter of the powder such as the solid pitch or coke is less than 1 μm, the powder agglomerates and cannot evenly enter between the carbon fibers, so that the bond between the carbon fibers cannot be ensured and the mother after firing is not formed. If the diameter exceeds 200 μm, the powder of solid pitch, coke, etc. becomes larger than the voids between the carbon fibers and cannot enter into the voids reliably, and the carbon fibers between Since the bond cannot be ensured and the strength of the base material after firing may decrease, the diameter thereof is preferably in the range of 1 μm to 200 μm.

【００２４】更に、前記固体のピッチやコークス等の粉
末の添加量は焼成後の母材に対し１５質量％乃至５０質
量％の範囲であることが望ましい。前記固体のピッチや
コークス等の粉末の添加量が焼成後の母材に対し１５質
量％未満の場合、粉末が少なく炭素繊維間の結合を確実
にすることができず、焼成後の母材内の空隙が多くな
り、母材の熱伝導率を高いものと成すことができない恐
れがあり、その添加量が焼成後の母材に対し５０質量％
を超えると、熱伝導率の高い炭素繊維の量が少なくな
り、前記基体１に載置される半導体素子４が多量の熱を
発した際に前記熱を前記基体１の半導体素子４搭載平面
方向に素早く広がらせることができず、その結果前記基
体１を介して外部に効率よく確実に放散させることが困
難になる恐れがあることから、その添加量は焼成後の母
材に対し１５質量％乃至５０質量％の範囲が好適に使用
される。Further, the addition amount of the powder such as solid pitch and coke is preferably in the range of 15% by mass to 50% by mass with respect to the calcined base material. When the addition amount of the powder such as solid pitch or coke is less than 15% by mass with respect to the base material after firing, the amount of the powder is too small to ensure the bonding between the carbon fibers, and the inside of the base material after firing There is a possibility that the heat conductivity of the base material cannot be made high and the amount of addition is 50% by mass relative to the base material after firing.
When it exceeds, the amount of carbon fibers having high thermal conductivity decreases, and when the semiconductor element 4 mounted on the base 1 emits a large amount of heat, the heat is applied to the semiconductor element 4 mounting plane direction of the base 1. However, since it may be difficult to efficiently and surely diffuse it to the outside through the substrate 1, the addition amount is 15% by mass with respect to the base material after firing. A range of from 50 to 50% by mass is preferably used.

【００２５】また前記基体１は三次元に編んだ母材に銅
を含浸させて形成することが重要である。前記炭素繊維
を三次元に編んだ母材に銅を含浸させたことから、母材
に存在する空隙が銅によって充填され、基体１自身の気
密性が確実なものとなり、該基体１を用いて作製される
半導体素子収納用パッケージの半導体素子４を収納する
空所の気密封止が常に完全となり、半導体素子４を安定
かつ正常に作動させることが可能となる。It is important that the substrate 1 is formed by impregnating a three-dimensionally knitted base material with copper. Since the base material in which the carbon fiber is three-dimensionally knitted is impregnated with copper, the voids existing in the base material are filled with copper, and the airtightness of the base body 1 itself is ensured. The airtight sealing of the space for housing the semiconductor element 4 of the manufactured semiconductor element housing package is always complete, and the semiconductor element 4 can be operated stably and normally.

【００２６】なお、前記基体１の銅の含浸量は枠状絶縁
体２の熱膨張係数との整合性をとるため、基体１と枠状
絶縁体２の熱膨張係数差を３ｐｐｍ／℃以下となるよう
にするとよく、基体１と枠状絶縁体２の熱膨張係数差が
３ｐｐｍ／℃を超えると半導体素子収納用パッケージに
収容した半導体素子４が熱を発し、該熱が両者に作用し
た場合、両者の間に両者の熱膨張係数の差に起因して発
生する内在応力が大きくなり、該内在応力により両者の
接合部にクラックや割れ等が発生し、半導体素子収納用
パッケージの気密封止を不完全なものとなし、内部に収
容する半導体素子４を信頼性よく正常に作動させること
ができなくなる危険性があることから両者の熱膨張係数
差は３ｐｐｍ／℃以下とするとよい。Since the amount of copper impregnated in the substrate 1 is consistent with the thermal expansion coefficient of the frame-shaped insulator 2, the difference in thermal expansion coefficient between the substrate 1 and the frame-shaped insulator 2 is 3 ppm / ° C. or less. When the difference in thermal expansion coefficient between the base 1 and the frame-shaped insulator 2 exceeds 3 ppm / ° C., the semiconductor element 4 housed in the semiconductor element housing package emits heat, and the heat acts on both. The internal stress generated between the two due to the difference in the thermal expansion coefficient between the two becomes large, and the internal stress causes cracks or breaks in the joint between the two, and the hermetic sealing of the package for housing the semiconductor element is performed. Therefore, it is preferable that the difference in thermal expansion coefficient between the two is 3 ppm / ° C. or less because there is a risk that the semiconductor element 4 housed inside cannot be operated normally reliably and normally.

【００２７】前記基体１と枠状絶縁体２の熱膨張係数差
を３ｐｐｍ／℃以下となすには、基体１の母材への銅の
含浸量を適宜調整することによって行われる。詳細は後
述の枠状絶縁体２の説明時に述べる。The difference in the coefficient of thermal expansion between the base 1 and the frame-shaped insulator 2 is set to 3 ppm / ° C. or less by appropriately adjusting the amount of copper impregnated into the base material of the base 1. Details will be described when the frame-shaped insulator 2 is described later.

【００２８】更に前記基体１の炭素繊維はその径を１μ
ｍ乃至１００μｍとすると、炭素繊維を介しての熱の伝
達をより確実なものとして半導体素子の作動時に発する
熱を良好に吸収するとともに大気中に良好に放散させ、
半導体素子４を常に適温とし半導体素子４に熱破壊が発
生したり、特性に熱劣化が発生したりする危険性をより
効果的に防止することができる。Further, the carbon fiber of the substrate 1 has a diameter of 1 μm.
If it is m to 100 μm, the heat transfer through the carbon fiber is more reliable, and the heat generated during the operation of the semiconductor element is well absorbed and is well dissipated in the atmosphere,
It is possible to more effectively prevent the risk that the semiconductor element 4 is always kept at an appropriate temperature and the semiconductor element 4 is thermally destroyed or the characteristics are thermally deteriorated.

【００２９】なお、前記基体１の炭素繊維の径は１μｍ
未満となると炭素繊維の強度が弱く三次元構造に織る
際、炭素繊維が断線をおこしやすく、その結果、炭素繊
維を良好に三次元構造に織ることができなくなる恐れが
あり、その径が１００μｍ以上となると、炭素繊維を三
次元に編む際、炭素繊維がたわみにくくなり、その結
果、炭素繊維を三次元構造に織ることが困難となる恐れ
があることから、炭素繊維の径は１μｍ乃至１００μｍ
の範囲が好適に使用される。The diameter of the carbon fiber of the substrate 1 is 1 μm.
When it is less than 100%, the strength of the carbon fiber is weak and the carbon fiber is liable to be broken when woven into a three-dimensional structure, and as a result, the carbon fiber may not be woven into a good three-dimensional structure, and the diameter thereof is 100 μm or more. Therefore, when the carbon fiber is knitted in three dimensions, the carbon fiber is less likely to bend, and as a result, it may be difficult to weave the carbon fiber into a three-dimensional structure. Therefore, the diameter of the carbon fiber is 1 μm to 100 μm.
The range of is preferably used.

【００３０】また更に、三次元に編んだ母材に銅を含浸
させて形成した前記基体１の銅に含有されるチタン、ジ
ルコニウム、ハフニウム、クロムの少なくとも１種を銅
量に対して０．２質量％乃至１０質量％含有すると、炭
素繊維を三次元に編んだ母材に銅を含浸させて基体１を
製作する際、チタン、ジルコニウム、ハフニウム、クロ
ム等は銅の活性を向上させることから、炭素繊維と銅と
の濡れ性が向上し、炭素繊維を三次元に編んだ母材へ充
填された銅の炭素繊維への接着をより強固で確実なもの
となし、基体１自身の気密性がより確実なものとなるこ
とから、該基体を用いて作製される半導体素子収納用パ
ッケージの半導体素子を収納する空所の気密封止がより
完全となり、半導体素子を安定かつ正常に作動させるこ
とができる。Furthermore, at least one of titanium, zirconium, hafnium, and chromium contained in the copper of the substrate 1 formed by impregnating a three-dimensionally knitted base material with copper is 0.2 with respect to the amount of copper. When contained in an amount of 10% by mass to 10% by mass, titanium, zirconium, hafnium, chromium, etc. improve the activity of copper when the base material produced by three-dimensionally knitting carbon fibers is impregnated with copper and the substrate 1 is manufactured. The wettability between the carbon fiber and the copper is improved, and the adhesion of the copper filled in the base material obtained by three-dimensionally knitting the carbon fiber to the carbon fiber is made firmer and more reliable, and the airtightness of the substrate 1 itself is improved. Since it becomes more reliable, the airtight sealing of the space for housing the semiconductor element of the semiconductor element housing package manufactured using the base becomes more complete, and the semiconductor element can be operated stably and normally. it can.

【００３１】なお、前記基体１の銅に含有されるチタ
ン、ジルコニウム、ハフニウム、クロムの少なくとも１
種はその量が銅に対し０．２質量％未満となると炭素繊
維を三次元に編んだ母材の炭素繊維と銅との濡れ性を充
分に活性させることができなくなり基体１自身の気密性
が低下する恐れがあり、その量が銅に対し１０質量％を
超えると熱伝導率の低いチタン、ジルコニウム、ハフニ
ウム、クロム等が銅中に多く存在することとなり銅の熱
伝導率が低下し半導体素子４から発生する熱を基体１に
効率良く伝達し難くなる恐れがあることから、前記基体
１の銅に含有されるチタン、ジルコニウム、ハフニウ
ム、クロムの少なくとも１種はその量が銅に対し０．２
質量％乃至１０質量％の範囲がより好適に使用される。At least one of titanium, zirconium, hafnium and chromium contained in the copper of the substrate 1 is used.
When the amount of the seeds is less than 0.2% by mass relative to copper, the wettability between the carbon fibers of the matrix, which is a three-dimensionally knitted carbon fiber, and the copper cannot be sufficiently activated, and the airtightness of the substrate 1 itself is lost. When the amount exceeds 10% by mass relative to copper, titanium, zirconium, hafnium, chromium, etc., which have low thermal conductivity, are present in the copper in a large amount, and the thermal conductivity of copper decreases, resulting in a semiconductor. Since it may be difficult to efficiently transfer the heat generated from the element 4 to the substrate 1, the amount of at least one of titanium, zirconium, hafnium, and chromium contained in the copper of the substrate 1 is 0 relative to copper. .2
The range of 10% by mass to 10% by mass is more preferably used.

【００３２】前記基体１の上面外周部には該基体１の上
面に設けた半導体素子４が載置される載置部１ａを囲繞
するようにして枠状絶縁体２がロウ材やガラス、樹脂等
の接着剤を介して取着されており、基体１と枠状絶縁体
２とで半導体素子４を収容するための空所が内部に形成
される。The frame-shaped insulator 2 surrounds the mounting portion 1a on the upper surface of the base 1 on which the semiconductor element 4 mounted on the upper surface of the base 1 is mounted. The base 1 and the frame-shaped insulator 2 form a space for accommodating the semiconductor element 4 therein.

【００３３】前記基体１に取着される枠状絶縁体２は酸
化アルミニウム質焼結体、窒化アルミニウム質焼結体、
窒化珪素質焼結体等の絶縁性セラミックス焼結体から形
成され、例えば、酸化アルミニウム質焼結体からなる場
合には、酸化アルミニウム、酸化珪素、酸化マグネシウ
ム、酸化カルシウム等の原料粉末に適当な有機バイン
ダ、溶剤、可塑剤、分散材等を添加混合して泥漿物を作
るとともに該泥漿物をドクターブレード法やカレンダー
ロール法を採用することによってグリーンシート（生シ
ート）となし、しかる後、前記グリーンシートに適当な
打ち抜き加工を施すとともにこれを複数枚積層し、約１
６００℃の温度で焼成することによって製作され、例え
ば窒化アルミニウム質焼結体からなる場合には、窒化ア
ルミニウム・酸化エルビウムまたは熱処理により酸化物
に変換可能なエルビニウム等を原料粉末に適当な有機バ
インダ・溶剤・可塑剤・分散材等を添加混合して泥漿物
を作るとともに該泥漿物をドクターブレード法やカレン
ダーロール法を採用することによってグリーンシート
（生シート）となし、しかる後、前記グリーンシートに
適当な打ち抜き加工を施すとともにこれを複数枚積層
し、窒素を含む非酸化性雰囲気中で約１６５０から１９
００℃の温度で焼成することによって製作され、例えば
窒化珪素質焼結体からなる場合には、窒化珪素・酸化ア
ルミニウム・酸化マグネシウム・酸化イットリウム等の
原料粉末に適当な有機バインダ・可塑剤・溶剤を添加混
合して泥漿状となすとともに、この泥漿物に従来周知の
ドクターブレード法やカレンダーロール法を採用するこ
とによってセラミックグリーンシート（セラミック生シ
ート）を形成し、次にこのセラミックグリーンシートに
適当な打ち抜き加工を施して所定形状となすとともに、
必要に応じて複数枚を積層して成形体となし、しかる
後、これを窒素雰囲気等の非酸化性雰囲気中にて１６０
０℃乃至２０００℃の温度で焼成することによって製作
される。The frame-shaped insulator 2 attached to the base 1 is an aluminum oxide sintered body, an aluminum nitride sintered body,
When it is formed of an insulating ceramics sintered body such as a silicon nitride sintered body, and is made of, for example, an aluminum oxide sintered body, it is suitable as a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, or the like. An organic binder, a solvent, a plasticizer, a dispersant, etc. are added and mixed to form a sludge, and the sludge is made into a green sheet (raw sheet) by adopting a doctor blade method or a calendar roll method. Appropriate punching processing is applied to the green sheet and multiple sheets are laminated,
When it is manufactured by firing at a temperature of 600 ° C., for example, when it is made of an aluminum nitride sintered body, aluminum nitride, erbium oxide, erbium that can be converted into an oxide by heat treatment, or the like is used as an appropriate organic binder. A solvent, a plasticizer, a dispersant, etc. are added and mixed to form a sludge, and the sludge is made into a green sheet (raw sheet) by adopting a doctor blade method or a calendar roll method. Appropriate punching is performed and a plurality of these are laminated, and about 1650 to 19 in a non-oxidizing atmosphere containing nitrogen.
Produced by firing at a temperature of 00 ° C., for example, in the case of a silicon nitride sintered body, an organic binder, a plasticizer, and a solvent suitable for raw material powders of silicon nitride, aluminum oxide, magnesium oxide, yttrium oxide, etc. Is added and mixed to form a slurry, and a ceramic green sheet (ceramic green sheet) is formed by applying the well-known doctor blade method or calendar roll method to this slurry, and then suitable for this ceramic green sheet. While punching it into a predetermined shape,
If necessary, a plurality of sheets may be laminated to form a molded body, and thereafter, the molded body may be molded in a non-oxidizing atmosphere such as a nitrogen atmosphere 160
It is manufactured by firing at a temperature of 0 ° C to 2000 ° C.

【００３４】前記枠状絶縁体２が、熱膨張係数が約７ｐ
ｐｍ／℃である酸化アルミニウム質焼結体から成る場
合、前記基体１への銅の含浸量を１０質量％乃至７０質
量％の範囲とすると、酸化アルミニウム質焼結体からな
る枠状絶縁体２と基体１との熱膨張差を３ｐｐｍ／℃と
することができる。The frame-shaped insulator 2 has a thermal expansion coefficient of about 7 p.
In the case of an aluminum oxide sintered body of pm / ° C., if the amount of copper impregnated into the base 1 is in the range of 10% by mass to 70% by mass, the frame-shaped insulator 2 made of the aluminum oxide sintered body 2 The difference in thermal expansion between the substrate 1 and the substrate 1 can be 3 ppm / ° C.

【００３５】前記酸化アルミニウム質焼結体から成る基
体１への銅の含浸量が１０質量％未満の場合は、炭素繊
維を三次元に編んだ母材に存在する空隙への銅の充填が
不十分となり、基体１自身の気密性が完全とならなくな
る恐れがあり、その結果前記基体１を用いて作製される
半導体素子収納用パッケージの半導体素子４を収納する
空所の気密封止が不完全となり半導体素子４を安定かつ
正常に作動させることできなくなる危険性があり、また
その含浸量が７０質量％を超えた場合は、基体１の熱膨
張係数が１０ｐｐｍ／℃を超えて酸化アルミニウム質焼
結体からなる枠状絶縁体２との熱膨張率差が３ｐｐｍ／
℃より大きくなることから、枠状絶縁体２が酸化アルミ
ニウム質焼結体からなる場合は前記基体１への銅の含浸
量は１０質量％乃至７０質量％の範囲が好適に使用され
る。When the amount of copper impregnated into the substrate 1 made of the aluminum oxide sintered body is less than 10% by mass, it is not possible to fill the voids existing in the base material in which the carbon fibers are three-dimensionally knitted with copper. There is a possibility that the airtightness of the base 1 itself will not be perfect, and as a result, the airtight sealing of the space for housing the semiconductor element 4 of the semiconductor element storage package manufactured using the base 1 is incomplete. There is a risk that the semiconductor element 4 cannot operate stably and normally, and when the impregnated amount exceeds 70 mass%, the thermal expansion coefficient of the substrate 1 exceeds 10 ppm / ° C. The difference in coefficient of thermal expansion from the frame-shaped insulator 2 made of a bonded body is 3 ppm /
When the frame-shaped insulator 2 is made of an aluminum oxide sintered body, the amount of copper impregnated into the substrate 1 is preferably 10% by mass to 70% by mass.

【００３６】また前記枠状絶縁体２が、熱膨張係数が約
４．５ｐｐｍ／℃である窒化アルミニウム質焼結体から
成る場合、前記基体１への銅の含浸量を１０質量％乃至
５０質量％の範囲とすると、窒化アルミニウム質焼結体
からなる枠状絶縁体２と基体１との熱膨張差を３ｐｐｍ
／℃とすることができる。When the frame-shaped insulator 2 is made of an aluminum nitride sintered body having a thermal expansion coefficient of about 4.5 ppm / ° C., the base 1 is impregnated with copper in an amount of 10% by mass to 50% by mass. %, The difference in thermal expansion between the frame-shaped insulator 2 made of an aluminum nitride sintered body and the substrate 1 is 3 ppm.
/ ° C.

【００３７】前記窒化アルミニウム質焼結体から成る基
体１への銅の含浸量が１０質量％未満の場合は、炭素繊
維を三次元に編んだ母材に存在する空隙への銅の充填が
不十分となり、基体１自身の気密性が完全とならなくな
る恐れがあり、その結果前記基体１を用いて作製される
半導体素子収納用パッケージの半導体素子４を収納する
空所の気密封止が不完全となり半導体素子４を安定かつ
正常に作動させることできなくなる危険性があり、また
その含浸量が５０質量％を超えた場合は、基体１の熱膨
張率が７．５ｐｐｍ／℃以上となり、窒化アルミニウム
質焼結体との熱膨張率差が３ｐｐｍ／℃より大きくなる
ことから、枠状絶縁体２が窒化アルミニウム質焼結体か
らなる場合は前記基体１への銅の含浸量は１０質量％乃
至５０質量％の範囲が好適に使用される。When the amount of copper impregnated into the substrate 1 made of the aluminum nitride sintered body is less than 10% by mass, the voids existing in the matrix formed by three-dimensionally knitting carbon fibers are not filled with copper. There is a possibility that the airtightness of the base 1 itself will not be perfect, and as a result, the airtight sealing of the space for housing the semiconductor element 4 of the semiconductor element storage package manufactured using the base 1 is incomplete. There is a risk that the semiconductor element 4 cannot operate stably and normally, and when the impregnated amount exceeds 50 mass%, the thermal expansion coefficient of the substrate 1 becomes 7.5 ppm / ° C. or more, and aluminum nitride Since the difference in coefficient of thermal expansion from the quality sintered body is larger than 3 ppm / ° C., when the frame-shaped insulator 2 is made of the aluminum nitride sintered body, the amount of copper impregnated into the substrate 1 is 10% by mass to 50% by mass It is preferably used.

【００３８】更に前記枠状絶縁体２が、熱膨張係数が約
４ｐｐｍ／℃である窒化珪素質焼結体から成る場合、前
記基体１への銅の含浸量を１０質量％乃至４５質量％の
範囲とすると、窒化珪素焼結体からなる枠状絶縁体２と
基体１との熱膨張差を３ｐｐｍ／℃とすることができ
る。Further, when the frame-shaped insulator 2 is made of a silicon nitride sintered material having a thermal expansion coefficient of about 4 ppm / ° C., the amount of copper impregnated into the substrate 1 is 10% by mass to 45% by mass. Within the range, the thermal expansion difference between the frame-shaped insulator 2 made of a silicon nitride sintered body and the substrate 1 can be 3 ppm / ° C.

【００３９】前記窒化珪素質焼結体から成る基体１への
銅の含浸量が１０質量％未満の場合は、炭素繊維を三次
元に編んだ母材に存在する空隙への銅の充填が不十分と
なり、基体１自身の気密性が完全とならなくなる恐れが
あり、その結果前記基体１を用いて作製される半導体素
子収納用パッケージの半導体素子４を収納する空所の気
密封止が不完全となり半導体素子４を安定かつ正常に作
動させることできなくなる危険性があり、またその含浸
量が４５質量％を超えた場合は、基体１の熱膨張率が７
ｐｐｍ／℃以上となり、窒化珪素質焼結体との熱膨張率
差が３ｐｐｍ／℃より大きくなることから、枠状絶縁体
２が窒化珪素質焼結体からなる場合は前記基体１への銅
の含浸量は１０質量％乃至４５質量％の範囲が好適に使
用される。When the amount of copper impregnated into the substrate 1 made of the silicon nitride sintered material is less than 10% by mass, it is not possible to fill the voids existing in the base material in which the carbon fibers are three-dimensionally knitted with copper. There is a possibility that the airtightness of the base 1 itself will not be perfect, and as a result, the airtight sealing of the space for housing the semiconductor element 4 of the semiconductor element storage package manufactured using the base 1 is incomplete. There is a risk that the semiconductor element 4 cannot be operated stably and normally, and when the impregnated amount exceeds 45% by mass, the coefficient of thermal expansion of the substrate 1 is 7%.
When the frame-shaped insulator 2 is made of a silicon nitride-based sintered body, copper is added to the base body 1 because the content is more than ppm / ° C and the difference in coefficient of thermal expansion from the silicon-nitride-based sintered body is larger than 3 ppm / ° C. The impregnated amount is preferably in the range of 10% by mass to 45% by mass.

【００４０】また前記枠状絶縁体２はその内周部から上
面にかけて導出する複数の配線層６が被着形成されてお
り、枠状絶縁体２の内周部に露出する配線層６の一端に
は半導体素子４の各電極がボンディングワイヤ７を介し
て電気的に接続され、また枠状絶縁体２の上面に導出さ
れた部位には外部電気回路と接続される外部リードピン
８が銀ロウ等のロウ材を介してロウ付け取着されてい
る。A plurality of wiring layers 6 extending from the inner peripheral portion to the upper surface of the frame-shaped insulator 2 are adhered and formed, and one end of the wiring layer 6 exposed at the inner peripheral portion of the frame-shaped insulator 2 is attached. The electrodes of the semiconductor element 4 are electrically connected to each other via the bonding wires 7, and the external lead pins 8 connected to an external electric circuit are connected to an external electric circuit at a portion led out to the upper surface of the frame-shaped insulator 2. It is attached by brazing through the brazing material.

【００４１】前記配線層６は半導体素子４の各電極を外
部電気回路に接続する際の導電路として作用し、銅、
銀、金等の金属粉末により形成されている。The wiring layer 6 acts as a conductive path when connecting each electrode of the semiconductor element 4 to an external electric circuit, and copper,
It is formed of a metal powder such as silver or gold.

【００４２】前記配線層６はタングステン・モリブデン
・マンガン・銅・銀・ニッケル・パラジウム・金等の金
属粉末に適当な有機バインダー、溶剤等を添加混合して
得られた金属ペーストを枠状絶縁体２となるグリーンシ
ートに予め従来周知のスクリーン印刷法等の印刷法を用
いることにより所定パターンに印刷塗布しておくことに
よって枠状絶縁体２の内周部から上面にかけて被着形成
される。The wiring layer 6 is a frame-shaped insulator made of a metal paste obtained by adding and mixing an appropriate organic binder, a solvent, etc. to a metal powder of tungsten, molybdenum, manganese, copper, silver, nickel, palladium, gold or the like. The green sheet to be 2 is preliminarily printed and applied in a predetermined pattern by using a conventionally known printing method such as a screen printing method, so that the green insulator 2 is adhered and formed from the inner peripheral portion to the upper surface of the frame-shaped insulator 2.

【００４３】なお、前記配線層６は、その露出表面に耐
蝕性に優れる金属をメッキ法により１μｍ乃至２０μｍ
の厚みに被着させておくと、配線層６の酸化腐蝕を有効
に防止することができるとともに配線層６とボンディン
グワイヤ７との接続及び配線層６への外部リードピン８
の取着を強固となすことができる。従って、前記配線層
６は銅や銀からなる場合、配線層６の酸化腐蝕を防止
し、配線層６とボンディングワイヤ７及び外部リードピ
ン８との取着を強固とするには配線層６の露出表面に金
等の耐蝕性に優れる金属を１μｍ乃至２０μｍの厚みに
被着させておくことが好ましい。The wiring layer 6 is formed by plating the exposed surface with a metal having excellent corrosion resistance in a range of 1 μm to 20 μm.
The thickness of the wiring layer 6 can effectively prevent the oxidation and corrosion of the wiring layer 6, and the connection between the wiring layer 6 and the bonding wire 7 and the external lead pin 8 to the wiring layer 6.
Can be firmly attached. Therefore, when the wiring layer 6 is made of copper or silver, the wiring layer 6 is exposed in order to prevent oxidative corrosion of the wiring layer 6 and to firmly attach the wiring layer 6 to the bonding wires 7 and the external lead pins 8. It is preferable to deposit a metal such as gold having excellent corrosion resistance in a thickness of 1 μm to 20 μm on the surface.

【００４４】また前記枠状絶縁体２に被着した配線層６
にロウ付けされる外部リードピン８は鉄−ニッケル−コ
バルト合金や鉄−ニッケル合金等の金属材料から成り、
半導体素子４の各電極を外部電気回路に電気的に接続す
る作用をなす。The wiring layer 6 attached to the frame-shaped insulator 2
The external lead pin 8 brazed to is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy,
It serves to electrically connect the respective electrodes of the semiconductor element 4 to an external electric circuit.

【００４５】前記外部リードピン８は、例えば、鉄−ニ
ッケル−コバルト合金等の金属から成るインゴット
（塊）に圧延加工法や打ち抜き加工法等、従来周知の金
属加工法を施すことによって所定形状に形成される。The external lead pin 8 is formed in a predetermined shape by subjecting an ingot (lump) made of a metal such as iron-nickel-cobalt alloy to a conventionally known metal working method such as a rolling working method or a punching working method. To be done.

【００４６】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能である。The present invention is not limited to the above-mentioned embodiments, but various modifications can be made without departing from the gist of the present invention.

【００４７】[0047]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、基体を炭素繊維を三次元に編んだ母材で形成し
たことから、基体に載置される半導体素子が多量の熱を
発したとしても、基体は約４００Ｗ／ｍ・Ｋと熱伝導率
の高い炭素繊維が３次元的に配置されているため、前記
熱を基体の半導体素子搭載平面方向に素早く広がらせる
とともに基体を介して外部に効率よく確実に放散させる
ことが可能となる。According to the package for housing a semiconductor element of the present invention, since the base body is formed of the base material in which carbon fibers are three-dimensionally woven, the semiconductor element mounted on the base body generates a large amount of heat. Also, since the carbon fiber having a high thermal conductivity of about 400 W / m · K is three-dimensionally arranged on the substrate, the heat can be quickly spread in the semiconductor element mounting plane direction of the substrate and externally transmitted through the substrate. It is possible to efficiently and surely disperse.

【００４８】また本発明の半導体素子収納用パッケージ
によれば、基体を炭素繊維を三次元に編んだ母材に銅を
含浸させて形成したことから、炭素繊維を三次元に編ん
だ母材に存在する空隙が銅により充填され、基体自身の
気密性が確実なものとなり、該基体を用いて作製される
半導体素子収納用パッケージの半導体素子を収納する空
所の気密封止が常に完全となり、半導体素子を安定かつ
正常に作動させることが可能となる。Further, according to the package for accommodating semiconductor elements of the present invention, the base is formed by impregnating the base material in which the carbon fibers are three-dimensionally knitted with copper, so that the base material in which the carbon fibers are three-dimensionally knitted is formed. The existing voids are filled with copper, the airtightness of the substrate itself is ensured, and the airtight sealing of the void for housing the semiconductor element of the semiconductor element housing package manufactured using the substrate is always complete, It is possible to operate the semiconductor element stably and normally.

【００４９】更に本発明の半導体素子収納用パッケージ
によれば、前記基体と前記枠状絶縁体の熱膨張係数差を
３ｐｐｍ／℃以下としたことから、半導体素子収納用パ
ッケージに収容した半導体素子が熱を発し、該熱が両者
に作用したとしても、両者の間に熱膨張係数の差に起因
する大きな内在応力が発生することはなく、半導体素子
収納用パッケージの気密封止をより完全なものとなし、
内部に収容する半導体素子を信頼性よく正常に作動させ
ることができる。Further, according to the semiconductor element housing package of the present invention, the difference in thermal expansion coefficient between the substrate and the frame-shaped insulator is 3 ppm / ° C. or less, so that the semiconductor element housed in the semiconductor element housing package is Even if the heat is generated and the heat acts on both of them, a large internal stress due to the difference in the coefficient of thermal expansion does not occur between them, and the hermetic sealing of the package for housing a semiconductor element is more complete. And nothing,
The semiconductor element housed inside can be reliably and normally operated.

【００５０】また更に本発明の半導体素子収納用パッケ
ージによれば、前記基体の炭素繊維径を１μｍ乃至１０
０μｍとしたことから、炭素繊維を介しての熱の伝達を
確実なものとして半導体素子の作動時に発する熱を良好
に吸収するとともに大気中に良好に放散させ、半導体素
子を常に適温とし半導体素子に熱破壊が発生したり、特
性に熱劣化が発生したりするのを有効に防止することが
できる。Furthermore, according to the package for accommodating semiconductor elements of the present invention, the carbon fiber diameter of the substrate is 1 μm to 10 μm.
Since it is set to 0 μm, the heat transfer through the carbon fiber is ensured, and the heat generated during the operation of the semiconductor element is well absorbed and is well dissipated into the atmosphere, so that the semiconductor element is always kept at an appropriate temperature and is applied to the semiconductor element. It is possible to effectively prevent the occurrence of thermal breakdown and the thermal deterioration of the characteristics.

【００５１】更にまた本発明の半導体素子収納用パッケ
ージによれば、前期基体の銅にチタン、ジルコニウム、
ハフニウム、クロムの少なくとも１種を０．２質量％乃
至１０質量％含有させたことから、炭素繊維を三次元に
編んだ母材に銅を含浸させる際、母材の炭素繊維と銅と
の濡れ性が向上し、炭素繊維を三次元に編んだ母材への
銅の充填がより強固で確実なものとなり、基体自身の気
密性をより確実なものとし、該基体を用いて作製される
半導体素子収納用パッケージの半導体素子を収納する空
所の気密封止が常に完全となり、半導体素子を安定かつ
正常に作動させることができる。Furthermore, according to the package for accommodating semiconductor elements of the present invention, the base copper is titanium, zirconium,
Since at least one of hafnium and chromium is contained in an amount of 0.2% by mass to 10% by mass, when the base material in which the carbon fiber is three-dimensionally knitted is impregnated with copper, the carbon fiber of the base material and the copper are wet. Of the base material woven by three-dimensionally knitting the carbon fibers to make the base material stronger and more reliable, the airtightness of the base body itself is made more reliable, and a semiconductor manufactured using the base body The airtight sealing of the space for housing the semiconductor device in the device housing package is always complete, and the semiconductor device can be operated stably and normally.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package of the present invention.

【符号の説明】[Explanation of symbols]

１・・・・・基体 １ａ・・・・載置部 ２・・・・・枠状絶縁体 ３・・・・・蓋体 ４・・・・・半導体素子 ５・・・・・容器 ６・・・・・配線層 ７・・・・・ボンディングワイヤ ８・・・・・外部リードピン 1 ... Base 1a ... ・ Mounting part 2 ... Frame-shaped insulator 3 ... Lid 4 ... Semiconductor element 5 ... Container 6 ... Wiring layer 7 ... Bonding wire 8: External lead pin

Claims (4)

【特許請求の範囲】[Claims] 【請求項１】上面に半導体素子が載置される載置部を有
する基体と、前記基体上に半導体素子載置部を囲繞する
ようにして取着される枠状絶縁体と、前記枠状絶縁体上
に取着され、枠状絶縁体の内側を気密に封止する蓋体と
から成る半導体素子収納用パッケージであって、前記基
体は炭素繊維を三次元に編んだ母材に銅を含浸させて形
成したことを特徴とする半導体素子収納用パッケージ。1. A base having an upper surface on which a semiconductor element is mounted, a frame-shaped insulator attached to the base so as to surround the semiconductor element mounting portion, and the frame. A package for storing a semiconductor device, comprising a lid body attached to an insulator and hermetically sealing the inside of a frame-like insulator, wherein the base body is a three-dimensionally woven carbon fiber base material made of copper. A package for housing a semiconductor element, which is formed by impregnation. 【請求項２】前記基体と前記枠状絶縁体の熱膨張係数差
が３ｐｐｍ／℃以下であることを特徴とする請求項１記
載の半導体素子収納用パッケージ。2. The package for housing a semiconductor element according to claim 1, wherein a difference in thermal expansion coefficient between the substrate and the frame-shaped insulator is 3 ppm / ° C. or less. 【請求項３】前記基体の炭素繊維径は１μｍ乃至１００
μｍであることを特徴とする請求項１に記載の半導体素
子収納用パッケージ。3. The carbon fiber diameter of the substrate is 1 μm to 100 μm.
The package for storing a semiconductor element according to claim 1, wherein the package is μm. 【請求項４】前期基体の銅にチタン、ジルコニウム、ハ
フニウム、クロムの少なくとも１種を０．２質量％乃至
１０質量％含有させたことを特徴とする請求項１に記載
の半導体素子収納用パッケージ。4. A package for accommodating a semiconductor device according to claim 1, wherein at least one of titanium, zirconium, hafnium and chromium is contained in the base copper of 0.2% by mass to 10% by mass. .
JP2002076235A 2002-03-19 2002-03-19 Package for housing semiconductor element Pending JP2003273266A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002076235A JP2003273266A (en) 2002-03-19 2002-03-19 Package for housing semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002076235A JP2003273266A (en) 2002-03-19 2002-03-19 Package for housing semiconductor element

Publications (1)

Publication Number Publication Date
JP2003273266A true JP2003273266A (en) 2003-09-26

Family

ID=29205071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002076235A Pending JP2003273266A (en) 2002-03-19 2002-03-19 Package for housing semiconductor element

Country Status (1)

Country Link
JP (1) JP2003273266A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101070905B1 (en) 2004-08-21 2011-10-06 삼성테크윈 주식회사 substrate parent material for semiconductor package and unit substrate manufactured from the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101070905B1 (en) 2004-08-21 2011-10-06 삼성테크윈 주식회사 substrate parent material for semiconductor package and unit substrate manufactured from the same

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