JP2003208127A - Display device - Google Patents
Display deviceInfo
- Publication number
- JP2003208127A JP2003208127A JP2002302579A JP2002302579A JP2003208127A JP 2003208127 A JP2003208127 A JP 2003208127A JP 2002302579 A JP2002302579 A JP 2002302579A JP 2002302579 A JP2002302579 A JP 2002302579A JP 2003208127 A JP2003208127 A JP 2003208127A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- optical element
- display device
- current
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
- G09G2310/0256—Control of polarity reversal in general, other than for liquid crystal displays with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
Landscapes
- Electroluminescent Light Sources (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は表示装置に関し、特
にアクティブマトリックス型表示装置の表示品位を改善
する技術に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly to a technique for improving the display quality of an active matrix display device.
【０００２】[0002]
【従来の技術】ノート型パーソナルコンピュータや携帯
端末の普及が急激に進んでいる。現在、これらの表示装
置に主に使用されているのが液晶ディスプレイであり、
次世代平面表示パネルとして期待されているのが有機Ｅ
Ｌ（Electro Luminescence）ディスプレイである。これ
らディスプレイの表示方法として中心に位置するのがア
クティブマトリックス駆動方式である。この方式を用い
たディスプレイは、アクティブマトリックス型ディスプ
レイと呼ばれ、画素は縦横に多数配置されマトリックス
形状を示し、各画素にはスイッチング素子が配置され
る。映像データはスイッチング素子によって画素毎に順
次書き込まれる。2. Description of the Related Art The spread of notebook personal computers and portable terminals has been rapidly increasing. Currently, liquid crystal displays are mainly used for these display devices.
Organic E is expected as a next-generation flat display panel
It is an L (Electro Luminescence) display. The active matrix drive system is central to the display method of these displays. A display using this method is called an active matrix type display, and a large number of pixels are arranged vertically and horizontally to show a matrix shape, and a switching element is arranged in each pixel. Video data is sequentially written for each pixel by the switching element.
【０００３】有機ＥＬディスプレイの研究開発は草創期
にあり、様々な画素回路が提案されている。そのような
回路の一例として、図９をもとに簡単に説明する（特許
文献１参照）。Research and development of organic EL displays are in their infancy, and various pixel circuits have been proposed. An example of such a circuit will be briefly described with reference to FIG. 9 (see Patent Document 1).
【０００４】この回路は、２個のｎチャネルトランジス
タである第１、２のトランジスタＴｒ１１、Ｔｒ１２
と、光学素子である有機発光ダイオードＯＬＥＤと、保
持容量ＳＣ１１と、走査線ＳＬと、電源供給線Ｖｄｄ
と、輝度データを入力するデータ線ＤＬを備える。This circuit includes first and second transistors Tr11 and Tr12 which are two n-channel transistors.
An organic light emitting diode OLED which is an optical element, a storage capacitor SC11, a scanning line SL, and a power supply line Vdd.
And a data line DL for inputting luminance data.
【０００５】この回路の動作は、有機発光ダイオードＯ
ＬＥＤの輝度データの書込のために、走査線ＳＬがハイ
になり、第１のＴｒ１１がオンとなり、データ線ＤＬに
入力された輝度データが第２のトランジスタＴｒ１２お
よび保持容量ＳＣ１１に設定される。発光のタイミング
となり走査線ＳＬがローとなることで第１のトランジス
タＴｒ１１がオフとなり、第２のトランジスタＴｒ１２
のゲート電圧は維持され設定された輝度データで発光す
る。The operation of this circuit is as follows:
In order to write the luminance data of the LED, the scanning line SL becomes high, the first Tr11 is turned on, and the luminance data input to the data line DL is set in the second transistor Tr12 and the storage capacitor SC11. . When the scanning line SL becomes low at the timing of light emission, the first transistor Tr11 is turned off, and the second transistor Tr12 is turned off.
The gate voltage of is maintained and light is emitted with the set brightness data.
【０００６】[0006]
【特許文献１】特開平１１-２１９１４６号公報[Patent Document 1] Japanese Patent Laid-Open No. 11-219146
【０００７】[0007]
【発明が解決しようとする課題】光学素子の輝度データ
が大きい場合、輝度データの書き換えで、小さな輝度デ
ータを設定しようとしても、前の大きな輝度データに対
応する電荷が光学素子から抜けずに残ってしまい、正確
な輝度データの設定ができず残像現象が見られることが
ある。特に、動きの速い動画を表示する際に非常に見に
くい画像となる。When the brightness data of the optical element is large, even if an attempt is made to set a small brightness data by rewriting the brightness data, charges corresponding to the previous large brightness data remain without being removed from the optical element. In some cases, the afterimage phenomenon cannot be seen because the luminance data cannot be set accurately. In particular, the image becomes very difficult to see when displaying a moving image.
【０００８】本発明はこうした状況に鑑みなされたもの
であり、その目的は前述の残像現象を低減する新たな回
路を提案するものである。また、別の目的は、表示装置
の消費電力の削減を実現することにある。また別の目的
は、光学素子の劣化の進行を抑制する新たな回路を提案
することにある。The present invention has been made in view of such circumstances, and an object thereof is to propose a new circuit for reducing the above-mentioned afterimage phenomenon. Another object is to reduce the power consumption of the display device. Another object is to propose a new circuit that suppresses the progress of deterioration of the optical element.
【０００９】[0009]
【課題を解決するための手段】本発明のある態様は表示
装置に関する。この装置は、光学素子と並列に電流バイ
パス素子を設け、光学素子に輝度データを設定する動作
に応じて電流バイパス素子を制御して光学素子の両端に
生じた電圧を初期化する。また、電流バイパス素子がオ
ンするときに、光学素子へ電流を供給する経路を遮断す
るスイッチを設けてもよい。One aspect of the present invention relates to a display device. This apparatus includes a current bypass element in parallel with the optical element, and controls the current bypass element according to the operation of setting the brightness data in the optical element to initialize the voltage generated across the optical element. In addition, a switch may be provided to shut off the path for supplying a current to the optical element when the current bypass element is turned on.
【００１０】輝度データを設定するためのデータ更新指
示信号と、電流バイパス素子を制御するための信号を共
通化し、光学素子の両端に生じた電圧を初期化すると同
時に輝度データを設定してもよい。ここで、データ更新
指示信号とは、一般に走査信号であり、走査線に入力さ
れる。また、輝度データを設定するためのデータ更新指
示信号と、電流バイパス素子を制御するための信号を別
々に設け、光学素子の両端に生じた電圧の初期化のタイ
ミングを設定可能としてもよい。つまり、走査線とは別
の配線を用意し、電流バイパス素子と光学素子へ電流を
供給するスイッチを制御する。これにより、走査のタイ
ミングに拘束されず光学素子の両端に生じた電圧を初期
化できる。The data update instruction signal for setting the brightness data and the signal for controlling the current bypass element may be made common to initialize the voltage generated at both ends of the optical element and simultaneously set the brightness data. . Here, the data update instruction signal is generally a scanning signal and is input to the scanning line. Further, a data update instruction signal for setting the brightness data and a signal for controlling the current bypass element may be separately provided so that the timing of initializing the voltage generated at both ends of the optical element can be set. That is, a wiring different from the scanning line is prepared to control the current bypass element and the switch for supplying the current to the optical element. As a result, the voltage generated at both ends of the optical element can be initialized without being restricted by the scanning timing.
【００１１】アクティブマトリックス型表示装置を想定
した場合、一般に一画素は光学素子、駆動回路、データ
線、走査線、および電源供給線から構成される。また、
電源供給線から駆動回路、光学素子、接地電位と直列に
接続される経路が形成され、光学素子に所望の値の電流
が流される。ここで、光学素子のアノードから接地電位
にスイッチング素子を含むバイパスを設ける。また、駆
動回路と電源供給線の間、または駆動回路と光学素子の
間にも、電源供給線から光学素子への電源供給を遮断す
るスイッチング素子を設ける。Assuming an active matrix type display device, one pixel is generally composed of an optical element, a driving circuit, a data line, a scanning line and a power supply line. Also,
A path connected in series with the drive circuit, the optical element, and the ground potential is formed from the power supply line, and a current having a desired value is supplied to the optical element. Here, a bypass including a switching element is provided from the anode of the optical element to the ground potential. Further, a switching element for cutting off the power supply from the power supply line to the optical element is provided between the drive circuit and the power supply line or between the drive circuit and the optical element.
【００１２】バイパスに設けたスイッチング素子をオン
すると、光学素子のアノードは接地電位に短絡され、接
地電位と同電位となる。また同時に、電源供給線と駆動
回路の間に設けたスイッチング素子をオフすることで、
電源供給線から接地電位に流れる貫通電流を抑える。When the switching element provided in the bypass is turned on, the anode of the optical element is short-circuited to the ground potential and has the same potential as the ground potential. At the same time, by turning off the switching element provided between the power supply line and the drive circuit,
The through current that flows from the power supply line to the ground potential is suppressed.
【００１３】また、光学素子の両端に生じた電圧を初期
化する際に、光学素子の両端に、光学素子を発光させる
際に印加すべき電圧を正電圧とした場合の逆電圧を印加
してもよい。つまり、光学素子を発光させる際の逆バイ
アス印加状態としてもよい。When the voltage generated at both ends of the optical element is initialized, a reverse voltage is applied to both ends of the optical element when the voltage to be applied when the optical element emits light is a positive voltage. Good. That is, a reverse bias application state may be applied when the optical element is caused to emit light.
【００１４】ここで、光学素子として、有機発光ダイオ
ード（Organic Light Emitting Diode）が想定できるが
これに限る趣旨ではない。また、電流バイパス素子やス
イッチング素子として、ＭＯＳ（Metal Oxide Semicond
uctor ）トランジスタや薄膜トランジスタ（ＴＦＴ：Th
in Film Transistor）が想定できるが、これに限る趣旨
ではない。また、「輝度データ」とは駆動用トランジス
タに設定される輝度情報に関するデータであって、光学
素子が放つ光強度とは区別する。Here, an organic light emitting diode can be assumed as the optical element, but the invention is not limited to this. Moreover, as a current bypass element and a switching element, a MOS (Metal Oxide Semicond
uctor) transistor and thin film transistor (TFT: Th)
in Film Transistor), but not limited to this. The "luminance data" is data relating to the luminance information set in the driving transistor, and is distinguished from the light intensity emitted by the optical element.
【００１５】本発明の別の態様も表示装置に関する。こ
の装置は、電流の入り口に当たる第１の端子と、前記電
流の出口に当たる第２の端子を有する光学素子と、その
光学素子に流すべき電流の変更に際し、所定の期間、前
記第１の端子の側から電荷を能動的に放電する初期化素
子とを備える。ここで、初期化素子とは、光学素子に並
列に設けられたスイッチング素子であって、このスイッ
チング素子がオンすると、光学素子のアノードの電荷が
接地電位にこのスイッチング素子を経由して引き抜かれ
る。Another aspect of the present invention also relates to a display device. This apparatus has an optical element having a first terminal that is an entrance of a current and a second terminal that is an exit of the current, and a change of the current to be passed through the optical element, for a predetermined period, the first terminal And an initialization element for actively discharging electric charges from the side. Here, the initialization element is a switching element provided in parallel with the optical element, and when the switching element is turned on, the charge of the anode of the optical element is drawn to the ground potential via the switching element.
【００１６】本発明のさらに別の態様も表示装置に関す
る。この装置は、電流の入り口に当たる第１の端子と電
流の出口に当たる第２の端子とを有する光学素子と、そ
の光学素子に流すべき電流の変更に際し、所定の期間、
第１の端子の側に蓄電する初期化素子とを備える。ま
た、所定期間に初期化素子は第２の端子を第１の端子よ
り高電位となるよう動作してもよい。Yet another aspect of the present invention also relates to a display device. This apparatus has an optical element having a first terminal which is an entrance of an electric current and a second terminal which is an exit of an electric current, and a predetermined period when changing an electric current to be passed through the optical element,
An initialization element that stores electricity on the side of the first terminal. In addition, the initialization element may operate such that the second terminal has a higher potential than the first terminal during a predetermined period.
【００１７】なお、以上の構成要素の任意の組合せや組
み替えもまた、本発明の態様として有効である。It should be noted that any combination or rearrangement of the above components is also effective as an aspect of the present invention.
【００１８】[0018]
【発明の実施の形態】以下の実施の形態では、表示装置
としてアクティブマトリックス型有機ＥＬディスプレイ
を想定する。実施の形態では、前述の残像現象を低減す
る新しい回路を提案する。このために、光学素子のアノ
ードから接地電位まで並列にスイッチング素子を含むバ
イパスを設け、所定のタイミングでそのスイッチング素
子をオンオフすることで光学素子の電荷を接地電位に逃
がし、光学素子の輝度データを初期化する。BEST MODE FOR CARRYING OUT THE INVENTION In the following embodiments, an active matrix type organic EL display is assumed as a display device. The embodiment proposes a new circuit that reduces the above-mentioned afterimage phenomenon. For this reason, a bypass including a switching element is provided in parallel from the anode of the optical element to the ground potential, and the switching element is turned on / off at a predetermined timing to release the electric charge of the optical element to the ground potential, and the brightness data of the optical element initialize.
【００１９】実施の形態１：図１は、実施の形態１に係
る表示装置の一画素の回路を示す。この画素は、光学素
子である有機発光ダイオードＯＬＥＤと、駆動回路１０
と、第１、２の保持容量ＳＣ１、ＳＣ２と、スイッチン
グ素子として機能する第３、４のトランジスタＴｒ３、
Ｔｒ４を備える。駆動回路１０はさらに第１、２のトラ
ンジスタＴｒ１、Ｔｒ２を備える。First Embodiment FIG. 1 shows a circuit of one pixel of the display device according to the first embodiment. This pixel includes an organic light emitting diode OLED, which is an optical element, and a driving circuit 10.
, First and second storage capacitors SC1 and SC2, and third and fourth transistors Tr3 functioning as switching elements,
Equipped with Tr4. The drive circuit 10 further includes first and second transistors Tr1 and Tr2.
【００２０】また、輝度データが入力されるデータ線Ｄ
Ｌと、有機発光ダイオードＯＬＥＤに流す電流を供給す
る電源供給線Ｖｄｄと、輝度データの更新の信号が入力
される走査線ＳＬを備える。データ線ＤＬ、電源供給線
Ｖｄｄ、および走査線ＳＬは他の画素と共有する。The data line D to which the brightness data is input
L, a power supply line Vdd for supplying a current to the organic light emitting diode OLED, and a scanning line SL to which a signal for updating the brightness data is input. The data line DL, the power supply line Vdd, and the scanning line SL are shared with other pixels.
【００２１】また、第１、２、４のトランジスタＴｒ
１、Ｔｒ２、Ｔｒ４はｎチャネルトランジスタであり、
第３のトランジスタＴｒ３はｐチャネルトランジスタで
ある。In addition, the first, second and fourth transistors Tr
1, Tr2, Tr4 are n-channel transistors,
The third transistor Tr3 is a p-channel transistor.
【００２２】第１、３、４のトランジスタＴｒ１、Ｔｒ
３、Ｔｒ４のゲート電極は走査線ＳＬに接続される。第
１のトランジスタＴｒ１のドレイン電極（またはソース
電極）はデータ線ＤＬに、第１のトランジスタＴｒ１の
ソース電極（またはドレイン電極）と第２のトランジス
タＴｒ２のゲート電極は第２の保持容量ＳＣ２の一方の
電極に接続される。第２のトランジスタＴｒ２のソース
電極と有機発光ダイオードＯＬＥＤのアノードと、第２
の保持容量ＳＣ２のもう一方の電極は第４のトランジス
タＴｒ４のドレイン電極（またはソース電極）に接続さ
れる。有機発光ダイオードＯＬＥＤのカソードと第４の
トランジスタＴｒ４のソース電極（またはドレイン電
極）はそれぞれ接地電位に接続される。第２のトランジ
スタＴｒ２のドレイン電極と第１の保持容量ＳＣ１の一
方の電極は第３のトランジスタＴｒ３のドレイン電極
（またはソース電極）に接続される。第１の保持容量Ｓ
Ｃ１のもう一方の電極は接地電位に接続される。第３の
トランジスタＴｒ３のソース電極（またはドレイン電
極）は電源供給線Ｖｄｄに接続される。First, third and fourth transistors Tr1 and Tr
Gate electrodes of 3 and Tr4 are connected to the scanning line SL. The drain electrode (or source electrode) of the first transistor Tr1 is on the data line DL, and the source electrode (or drain electrode) of the first transistor Tr1 and the gate electrode of the second transistor Tr2 are one of the second storage capacitors SC2. Connected to the electrode. A source electrode of the second transistor Tr2 and an anode of the organic light emitting diode OLED;
The other electrode of the storage capacitor SC2 is connected to the drain electrode (or source electrode) of the fourth transistor Tr4. The cathode of the organic light emitting diode OLED and the source electrode (or drain electrode) of the fourth transistor Tr4 are connected to the ground potential. The drain electrode of the second transistor Tr2 and one electrode of the first storage capacitor SC1 are connected to the drain electrode (or source electrode) of the third transistor Tr3. First storage capacity S
The other electrode of C1 is connected to ground potential. The source electrode (or drain electrode) of the third transistor Tr3 is connected to the power supply line Vdd.
【００２３】したがって、電源供給線Ｖｄｄから接地電
位へ、第３、２のトランジスタＴｒ３、Ｔｒ２、有機発
光ダイオードＯＬＥＤがこの順で直列に接続され主経路
を形成する。また、有機発光ダイオードＯＬＥＤのアノ
ードから第４のトランジスタＴｒ４を含むバイパスが形
成される。Therefore, the third and second transistors Tr3 and Tr2 and the organic light emitting diode OLED are serially connected in this order from the power supply line Vdd to the ground potential to form a main path. Further, a bypass including the fourth transistor Tr4 is formed from the anode of the organic light emitting diode OLED.
【００２４】この回路による動作を説明する。輝度デー
タの書込のために、走査線ＳＬがハイになり第１のトラ
ンジスタＴｒ１がオンすると、第２のトランジスタＴｒ
２のゲート電極および第２の保持容量ＳＣ２に有機発光
ダイオードＯＬＥＤの輝度データに対応した電位が設定
される。同時に、第４のトランジスタＴｒ４がオンとな
り有機発光ダイオードＯＬＥＤのアノードの電荷が第４
のトランジスタＴｒ４を経由して接地電位に引き抜かれ
る。また同時に、第３のトランジスタＴｒ３がオフとな
るので、電源供給線Ｖｄｄからの貫通電流の発生を防
ぐ。これにより、有機発光ダイオードＯＬＥＤのアノー
ドは接地電位と同電位となる。The operation of this circuit will be described. When the scanning line SL goes high to turn on the first transistor Tr1 for writing the brightness data, the second transistor Tr1 is turned on.
A potential corresponding to the luminance data of the organic light emitting diode OLED is set to the second gate electrode and the second storage capacitor SC2. At the same time, the fourth transistor Tr4 is turned on and the charge of the anode of the organic light emitting diode OLED becomes the fourth
Is pulled out to the ground potential via the transistor Tr4. At the same time, since the third transistor Tr3 is turned off, generation of a through current from the power supply line Vdd is prevented. As a result, the anode of the organic light emitting diode OLED becomes the same potential as the ground potential.
【００２５】続いて、発光のタイミングになると、走査
線ＳＬはローとなるので、第１、４のトランジスタＴｒ
１、Ｔｒ４はオフし、第３のトランジスタＴｒ３はオン
する。これにより第２のトランジスタＴｒ２に設定され
た輝度データに応じた電流が電源供給線Ｖｄｄから有機
発光ダイオードＯＬＥＤに流れる。Then, at the timing of light emission, the scanning line SL becomes low, so that the first and fourth transistors Tr.
1, Tr4 is turned off, and the third transistor Tr3 is turned on. As a result, a current corresponding to the brightness data set in the second transistor Tr2 flows from the power supply line Vdd to the organic light emitting diode OLED.
【００２６】実施の形態１によると、輝度データの書込
の際に、光学素子の輝度データが初期化されるので、大
きい輝度データから小さい輝度データへ書き換える際に
見られた残像現象を低減できる。また、その際、電源供
給線から駆動回路への電流の供給が遮断されるため消費
電流の低減が実現される。According to the first embodiment, since the brightness data of the optical element is initialized at the time of writing the brightness data, it is possible to reduce the afterimage phenomenon which is seen when the large brightness data is rewritten to the small brightness data. . Further, at that time, the current supply from the power supply line to the drive circuit is cut off, so that the consumption current is reduced.
【００２７】実施の形態２：図２は、実施の形態２に係
る表示装置の一画素の回路を示す。この画素は、光学素
子である有機発光ダイオードＯＬＥＤと、駆動回路１０
と、第１、２の保持容量ＳＣ１、ＳＣ２とスイッチング
素子として機能する第３、４のトランジスタＴｒ３、Ｔ
ｒ４と、データ線ＤＬと、電源供給線Ｖｄｄと、第１、
２の走査線ＳＬ１、ＳＬ２を備える。駆動回路１０はさ
らに第１、２、５、６のトランジスタＴｒ１、Ｔｒ２、
Ｔｒ５、Ｔｒ６を備える。第１、４のトランジスタＴｒ
１、Ｔｒ４はｎチャネルトランジスタで、第２、３、
５、６のトランジスタＴｒ２、Ｔｒ３、Ｔｒ５，Ｔｒ６
はｐチャネルトランジスタである。Second Embodiment: FIG. 2 shows a pixel circuit of a display device according to a second embodiment. This pixel includes an organic light emitting diode OLED, which is an optical element, and a driving circuit 10.
And the first and second storage capacitors SC1 and SC2 and the third and fourth transistors Tr3 and T functioning as switching elements.
r4, the data line DL, the power supply line Vdd, the first,
Two scanning lines SL1 and SL2 are provided. The drive circuit 10 further includes first, second, fifth and sixth transistors Tr1, Tr2,
It includes Tr5 and Tr6. First and fourth transistors Tr
1, Tr4 is an n-channel transistor, and the second, third,
Transistors Tr2, Tr3, Tr5, Tr6 of 5 and 6
Is a p-channel transistor.
【００２８】第１、３、４のトランジスタＴｒ１、Ｔｒ
３、Ｔｒ４のゲート電極は走査線ＳＬ１に、第６のトラ
ンジスタＴｒ６のゲート電極は走査線ＳＬ２に接続され
る。第１のトランジスタＴｒ１のドレイン電極（または
ソース電極）はデータ線ＤＬに接続される。第１のトラ
ンジスタＴｒ１のソース電極（またはドレイン電極）と
第５のトランジスタＴｒ５のドレイン電極はトランジス
タＴｒ６のドレイン電極（またはソース電極）に接続さ
れる。第２、５のトランジスタＴｒ２、Ｔｒ５のゲート
電極とトランジスタＴｒ６のソース電極（またはドレイ
ン電極）は第２の保持容量ＳＣ２の一方の電極に接続さ
れる。第２、５のトランジスタＴｒ２、Ｔｒ５のソース
電極と、第３のトランジスタＴｒ３のドレイン電極（ま
たはソース電極）と第２の保持容量ＳＣ２のもう一方の
電極は第１の保持容量ＳＣ１の一方の電極に接続され
る。第３のトランジスタＴｒ３のソース電極（またはド
レイン電極）は電源供給線Ｖｄｄに、第１の保持容量Ｓ
Ｃ１のもう一方の電極は接地電位に接続される。第２ト
ランジスタＴｒ２のドレイン電極および第４トランジス
タＴｒ４のドレイン電極（またはソース電極）は、有機
発光ダイオードＯＬＥＤのアノードに接続される。有機
発光ダイオードＯＬＥＤのカソードと第４のトランジス
タＴｒ４のソース電極（またはドレイン電極）は接地電
位に接続される。First, third and fourth transistors Tr1 and Tr
3, the gate electrode of Tr4 is connected to the scanning line SL1, and the gate electrode of the sixth transistor Tr6 is connected to the scanning line SL2. The drain electrode (or source electrode) of the first transistor Tr1 is connected to the data line DL. The source electrode (or drain electrode) of the first transistor Tr1 and the drain electrode of the fifth transistor Tr5 are connected to the drain electrode (or source electrode) of the transistor Tr6. The gate electrodes of the second and fifth transistors Tr2 and Tr5 and the source electrode (or drain electrode) of the transistor Tr6 are connected to one electrode of the second storage capacitor SC2. The source electrodes of the second and fifth transistors Tr2 and Tr5, the drain electrode (or source electrode) of the third transistor Tr3, and the other electrode of the second storage capacitor SC2 are one electrode of the first storage capacitor SC1. Connected to. The source electrode (or drain electrode) of the third transistor Tr3 is connected to the power supply line Vdd with the first storage capacitor S
The other electrode of C1 is connected to ground potential. The drain electrode of the second transistor Tr2 and the drain electrode (or source electrode) of the fourth transistor Tr4 are connected to the anode of the organic light emitting diode OLED. The cathode of the organic light emitting diode OLED and the source electrode (or drain electrode) of the fourth transistor Tr4 are connected to the ground potential.
【００２９】この回路の動作を説明する。輝度データ書
込のため第１の走査線ＳＬ１がハイ、第２の走査線ＳＬ
２がローになると、第１、４、６のトランジスタＴｒ
１、Ｔｒ４、Ｔｒ６がオン、第３のトランジスタＴｒ３
がオフになる。第５のトランジスタＴｒ５のゲート電極
とドレイン電極は短絡され、第５のトランジスタＴｒ５
は不飽和領域で作動し、第５のトランジスタＴｒ５のゲ
ート電極と第２のトランジスタＴｒ２のゲート電極は同
電位になる。これにより、第２のトランジスタＴｒ２に
輝度データが設定される。このとき、第３のトランジス
タＴｒ３のオフにより電源供給線Ｖｄｄからの経路が遮
断され、第４のトランジスタＴｒ４がオンになっている
ので、有機発光ダイオードＯＬＥＤのアノードの電荷は
第４のトランジスタＴｒ４を経由して接地電位に引き抜
かれ、有機発光ダイオードＯＬＥＤのアノードの電位は
接地電位まで下がる。The operation of this circuit will be described. The first scanning line SL1 is high for writing the luminance data, and the second scanning line SL is
When 2 goes low, the first, fourth, and sixth transistors Tr
1, Tr4, Tr6 are on, and the third transistor Tr3
Turns off. The gate electrode and the drain electrode of the fifth transistor Tr5 are short-circuited, and the fifth transistor Tr5
Operates in the unsaturated region, and the gate electrode of the fifth transistor Tr5 and the gate electrode of the second transistor Tr2 have the same potential. As a result, the brightness data is set in the second transistor Tr2. At this time, since the path from the power supply line Vdd is cut off by turning off the third transistor Tr3 and the fourth transistor Tr4 is turned on, the charge of the anode of the organic light emitting diode OLED is set to the fourth transistor Tr4. It is pulled out to the ground potential via and the potential of the anode of the organic light emitting diode OLED drops to the ground potential.
【００３０】発光のタイミングになり、第１の走査線Ｓ
Ｌ１がロー、第２の走査線ＳＬ２がハイとなり第１、
４、６のトランジスタＴｒ１、Ｔｒ４、Ｔｒ６がオフ、
第３のトランジスタＴｒ３がオンとなる。これにより、
第２のトランジスタＴｒ２に設定された輝度データに応
じた電流が有機発光ダイオードＯＬＥＤに流れる。At the timing of light emission, the first scanning line S
L1 is low, the second scanning line SL2 is high, and
Transistors Tr1, Tr4, Tr6 of 4 and 6 are off,
The third transistor Tr3 is turned on. This allows
A current corresponding to the brightness data set in the second transistor Tr2 flows through the organic light emitting diode OLED.
【００３１】実施の形態２によると、実施の形態１同様
の効果が得られる。According to the second embodiment, the same effect as that of the first embodiment can be obtained.
【００３２】実施の形態３：図３、図４は実施の形態３
に係る表示装置の一画素の回路を示す。実施の形態１、
２ではスイッチング素子として機能する第３のトランジ
スタＴｒ３が電源供給線Ｖｄｄと駆動回路１０の間に設
けられたが、実施の形態３では駆動回路１０と有機発光
ダイオードＯＬＥＤの間に設ける。従って、図３に示す
回路は、実施の形態１の図１に示した回路の第３のトラ
ンジスタＴｒ３と第２のトランジスタＴｒ２の接続順序
を入れ替えた回路であり、同様に図４に示す回路は、実
施の形態２の図２に示した回路の第３のトランジスタＴ
ｒ３と第２のトランジスタＴｒ２の接続順序を入れ替え
た回路である。Third Embodiment: FIGS. 3 and 4 show a third embodiment.
2 shows a circuit of one pixel of the display device according to. Embodiment 1,
In the second example, the third transistor Tr3 that functions as a switching element is provided between the power supply line Vdd and the drive circuit 10, but in the third embodiment, it is provided between the drive circuit 10 and the organic light emitting diode OLED. Therefore, the circuit illustrated in FIG. 3 is a circuit in which the connection order of the third transistor Tr3 and the second transistor Tr2 in the circuit illustrated in FIG. 1 of Embodiment 1 is switched, and similarly the circuit illustrated in FIG. The third transistor T of the circuit shown in FIG. 2 of the second embodiment
This is a circuit in which the connection order of r3 and the second transistor Tr2 is exchanged.
【００３３】これら回路の動作はそれぞれ実施の形態１
および２の回路の動作と同様なので省略する。また、得
られる効果も同様である。ただし、実施の形態１および
２では、第３のトランジスタＴｒ３をオフにした際に、
輝度データにあたえる影響、つまり第２のトランジスタ
Ｔｒ２のゲート電極に与える影響を抑えるために第１の
保持容量ＳＣ１を設けた。実施の形態３では、第３のト
ランジスタＴｒ３を第２のトランジスタＴｒ２と有機発
光ダイオードＯＬＥＤの間に設けたことで、第３のトラ
ンジスタＴｒ３がオフとなった場合でも第２のトランジ
スタＴｒ２のゲート電極にあたえる影響を取り除くこと
ができる。The operation of these circuits is the same as in the first embodiment.
Since the operation is the same as that of the circuits of 2 and 2, the description thereof is omitted. Further, the same effect can be obtained. However, in the first and second embodiments, when the third transistor Tr3 is turned off,
The first storage capacitor SC1 is provided to suppress the influence given to the luminance data, that is, the influence given to the gate electrode of the second transistor Tr2. In the third embodiment, since the third transistor Tr3 is provided between the second transistor Tr2 and the organic light emitting diode OLED, the gate electrode of the second transistor Tr2 is turned off even when the third transistor Tr3 is turned off. You can eliminate the effect of giving.
【００３４】以上、本発明を実施の形態をもとに説明し
た。この実施の形態は例示であり、それら各構成要素や
各処理プロセスの組合せにいろいろな変形例が可能なこ
と、またそうした変形例も本発明の範囲であることは当
業者に理解されるところである。そうした変形例を挙げ
る。The present invention has been described above based on the embodiments. It should be understood by those skilled in the art that this embodiment is an exemplification, and that various modifications can be made to the combinations of the respective constituent elements and the respective processing processes, and that such modifications are within the scope of the present invention. . An example of such a modification will be given.
【００３５】実施の形態では、駆動回路として図１から
図４に示す駆動回路１０を想定したが、これに限る趣旨
ではない。この駆動回路は多数存在するので、本発明が
適用される回路を図５および図６に示すように一般化し
て示すことができる。図５の回路は実施の形態１、２を
一般化した回路であり、図６の回路は実施の形態３を一
般化した回路である。In the embodiment, the drive circuit 10 shown in FIGS. 1 to 4 is assumed as the drive circuit, but the present invention is not limited to this. Since there are many such drive circuits, the circuit to which the present invention is applied can be generalized as shown in FIGS. The circuit of FIG. 5 is a circuit that generalizes the first and second embodiments, and the circuit of FIG. 6 is a circuit that generalizes the third embodiment.
【００３６】実施の形態では、第３、４のトランジスタ
Ｔｒ３、Ｔｒ４のオンオフを同一画素の駆動回路に繋が
る走査線ＳＬを用いて行ったが、時間的に１走査前の走
査線ＳＬに繋いでもよい。こうすることで、書込データ
への走査線ＳＬの動作によるカップリングノイズを低減
できる。またさらに、第３、４のトランジスタＴｒ３、
Ｔｒ４のオンオフを行うために専用の配線を別途設けて
もよい。図７、図８に示した回路は、それぞれ図５、図
６に示した一般化した回路を上述のごとく第３、４のト
ランジスタＴｒ３、Ｔｒ４のオンオフを行う制御線ＣＳ
Ｌを設けた回路である。これにより、走査線ＳＬにかか
る時間的制約がなくなり、任意の時間に画素の発光を制
御できる。すなわち、制御線ＣＳＬの制御によって、発
光時間を調整し、ホワイトバランスと輝度とを調整でき
る。In the embodiment, the third and fourth transistors Tr3 and Tr4 are turned on / off using the scanning line SL connected to the drive circuit of the same pixel, but even if they are connected to the scanning line SL one scan before in time. Good. By doing so, the coupling noise due to the operation of the scanning line SL to the write data can be reduced. Furthermore, the third and fourth transistors Tr3,
A dedicated wiring may be separately provided to turn on / off Tr4. The circuits shown in FIGS. 7 and 8 are the control lines CS for turning on / off the third and fourth transistors Tr3 and Tr4 as described above by using the generalized circuits shown in FIGS. 5 and 6, respectively.
This is a circuit provided with L. As a result, there is no time restriction on the scanning line SL, and the light emission of the pixel can be controlled at any time. That is, by controlling the control line CSL, the light emission time can be adjusted, and the white balance and the brightness can be adjusted.
【００３７】実施の形態では、バイパスを流れる電流の
逃がし口、つまり、第４のトランジスタＴｒ４のソース
電極は接地電位に接続されたがこれに限る趣旨ではな
い。例えば、これを有機発光ダイオードＯＬＥＤの閾値
電圧と等しくしてもよい。こうすると、有機発光ダイオ
ードＯＬＥＤの発光の応答性がよくなる。In the embodiment, the escape port for the current flowing through the bypass, that is, the source electrode of the fourth transistor Tr4 is connected to the ground potential, but the present invention is not limited to this. For example, this may be equal to the threshold voltage of the organic light emitting diode OLED. This improves the light emission response of the organic light emitting diode OLED.
【００３８】実施の形態では、有機発光ダイオードＯＬ
ＥＤに対してバイパスを形成した第４のトランジスタＴ
ｒ４のソース電極は接地電位に接続され、有機発光ダイ
オードＯＬＥＤのカソードと同電位に設定されたがこれ
に限る趣旨ではない。そのほかに例えば、第４のトラン
ジスタＴｒ４のソース電極は、有機発光ダイオードＯＬ
ＥＤのカソードより低い電位に接続されてもよい。その
ような画素回路を図１０および１１に例示する。In the embodiment, the organic light emitting diode OL is used.
Fourth transistor T bypassed to ED
The source electrode of r4 is connected to the ground potential and is set to the same potential as the cathode of the organic light emitting diode OLED, but the invention is not limited to this. Besides, for example, the source electrode of the fourth transistor Tr4 may be the organic light emitting diode OL.
It may be connected to a lower potential than the cathode of the ED. Such a pixel circuit is illustrated in FIGS. 10 and 11.
【００３９】図１０は、図７に示した画素の回路におい
て接地電位に接続されていた第４のトランジスタＴｒ４
のソース電極を有機発光ダイオードＯＬＥＤのカソード
が接続される接地電位より低い負電位Ｖｅｅに接続した
回路である。同様に、図１１は、図８に示した画素回路
において、接地電位に接続されていた第４のトランジス
タＴｒ４のソース電極を有機発光ダイオードＯＬＥＤの
カソードが接続される接地電位より低い負電位Ｖｅｅに
接続する回路である。これらの画素回路において、制御
線ＣＳＬがハイになると、第３のトランジスタＴｒ３は
オフとなり、第４のトランジスタＴｒ４がオンとなる。
このとき有機発光ダイオードＯＬＥＤのアノードの電位
は、第４のトランジスタＴｒ４のソース電極は負電位Ｖ
ｅｅとなる。有機発光ダイオードＯＬＥＤのカソードは
接地電位であり、アノードより高電位となっているた
め、有機発光ダイオードＯＬＥＤは発光期間の逆バイア
ス印加状態となる。FIG. 10 shows a fourth transistor Tr4 connected to the ground potential in the pixel circuit shown in FIG.
Is a circuit in which the source electrode of is connected to a negative potential Vee lower than the ground potential to which the cathode of the organic light emitting diode OLED is connected. Similarly, in FIG. 11, in the pixel circuit shown in FIG. 8, the source electrode of the fourth transistor Tr4 connected to the ground potential is set to a negative potential Vee lower than the ground potential to which the cathode of the organic light emitting diode OLED is connected. It is a circuit to connect. In these pixel circuits, when the control line CSL becomes high, the third transistor Tr3 turns off and the fourth transistor Tr4 turns on.
At this time, the potential of the anode of the organic light emitting diode OLED is the negative potential V of the source electrode of the fourth transistor Tr4.
It becomes ee. Since the cathode of the organic light emitting diode OLED is at the ground potential and has a higher potential than the anode, the organic light emitting diode OLED is in the reverse bias applied state during the light emitting period.
【００４０】このように有機発光ダイオードＯＬＥＤを
逆バイアス印加状態とすることで、有機発光ダイオード
ＯＬＥＤのアノードに残留している電荷を引き抜き、残
像現象を抑制できると同時に、有機発光ダイオードＯＬ
ＥＤを構成する有機膜の特性回復をできる。一般的な課
題として、有機発光ダイオードＯＬＥＤは、液晶を利用
した光学素子などと比較して長期使用による有機膜の劣
化つまり輝度低下が顕著であるという課題がある。この
ように、有機発光ダイオードＯＬＥＤをその輝度データ
の更新期間に逆バイアス印加状態とすることで表示品位
の低下を防ぎつつ有機膜の劣化を回復できる。By thus applying the reverse bias to the organic light emitting diode OLED, the electric charge remaining in the anode of the organic light emitting diode OLED can be extracted and the afterimage phenomenon can be suppressed, and at the same time, the organic light emitting diode OL can be suppressed.
The characteristics of the organic film that constitutes the ED can be recovered. As a general problem, the organic light-emitting diode OLED has a problem that deterioration of an organic film, that is, a decrease in brightness due to long-term use is remarkable as compared with an optical element using a liquid crystal. As described above, the deterioration of the organic film can be recovered while preventing the deterioration of the display quality by setting the organic light emitting diode OLED in the reverse bias applied state during the update period of the brightness data.
【００４１】ここでは、初期化素子である第３、４のト
ランジスタＴｒ３、Ｔｒ４を走査線ＳＬとは別の制御線
ＣＳＬによりオンオフ制御したがこれに限る趣旨ではな
く、走査線ＳＬによって第３、４のトランジスタＴｒ
３、Ｔｒ４をオンオフ制御してもよい。例えば、図５、
図６に示すような第４のトランジスタＴｒ４が走査線Ｓ
Ｌにより制御される回路においても、第４のトランジス
タＴｒ４のソース電極の電位を有機発光ダイオードＯＬ
ＥＤのカソードの電位より低い負電位Ｖｅｅに接続して
もよい。Here, the third and fourth transistors Tr3 and Tr4, which are the initialization elements, are on / off controlled by the control line CSL different from the scanning line SL, but the invention is not limited to this. 4 transistor Tr
On / off control of 3 and Tr4 may be performed. For example, in FIG.
The fourth transistor Tr4 as shown in FIG.
Also in the circuit controlled by L, the potential of the source electrode of the fourth transistor Tr4 is set to the organic light emitting diode OL.
You may connect to the negative electric potential Vee lower than the electric potential of the cathode of ED.
【００４２】一般に有機発光ダイオードＯＬＥＤの積層
構造は、図１２に示すようにガラス基板１００などの絶
縁基板上に、アノード層１１０、正孔輸送層１２０、有
機ＥＬ層１３０、カソード層１４０が順に積層されてい
る。有機発光ダイオードＯＬＥＤの積層構造は、図１２
に示した構造に限らず図１３に示すように、ガラス基板
１００などの絶縁基板上に、カソード層１４０、有機Ｅ
Ｌ層１３０、正孔輸送層１２０、アノード層１１０が順
に積層された構造であってもよい。有機発光ダイオード
ＯＬＥＤの積層構造が図１２に示した構造である場合、
有機発光ダイオードＯＬＥＤのカソードが固定電位であ
る接地電位に接続されたが、図１３に示す構造である場
合、有機発光ダイオードＯＬＥＤのアノードが固定電位
に接続される。このような積層構造を有する有機発光ダ
イオードＯＬＥＤに好適な画素回路を図１４および１５
に例示する。Generally, in the laminated structure of the organic light emitting diode OLED, as shown in FIG. 12, an anode layer 110, a hole transport layer 120, an organic EL layer 130, and a cathode layer 140 are laminated in order on an insulating substrate such as a glass substrate 100. Has been done. The laminated structure of the organic light emitting diode OLED is shown in FIG.
Not only the structure shown in FIG. 13 but also as shown in FIG.
The L layer 130, the hole transport layer 120, and the anode layer 110 may be sequentially stacked. When the laminated structure of the organic light emitting diode OLED is the structure shown in FIG. 12,
Although the cathode of the organic light emitting diode OLED is connected to the ground potential which is a fixed potential, in the case of the structure shown in FIG. 13, the anode of the organic light emitting diode OLED is connected to the fixed potential. A pixel circuit suitable for an organic light emitting diode OLED having such a laminated structure is shown in FIGS.
For example.
【００４３】図１４は、図１０に示した画素回路におい
て、有機発光ダイオードＯＬＥＤのアノードとカソード
を入れ替え、アノードを正電位かつ固定電位である電源
電位Ｖｆｆに接続する。また第４のトランジスタＴｒ４
の負電位Ｖｅｅに接続されていた電極は、電源電位Ｖｆ
ｆより高い電位である正電位Ｖｇｇに接続される。電源
供給線Ｖｄｄに接続されていた第３のトランジスタＴｒ
３の電極は、接地電位となっている低電位線Ｖｈｈに接
続される。FIG. 14 shows that in the pixel circuit shown in FIG. 10, the anode and cathode of the organic light emitting diode OLED are replaced with each other, and the anode is connected to the power supply potential Vff which is a positive potential and a fixed potential. In addition, the fourth transistor Tr4
Of the electrode connected to the negative potential Vee of
It is connected to a positive potential Vgg which is a potential higher than f. Third transistor Tr connected to the power supply line Vdd
The electrode of 3 is connected to the low potential line Vhh which is at the ground potential.
【００４４】また、第３のトランジスタＴｒ３は、ｐチ
ャネルトランジスタからｎチャネルトランジスタへ、第
４のトランジスタＴｒ４はｎチャネルトランジスタから
ｐチャネルトランジスタへ変更する。有機発光ダイオー
ドＯＬＥＤの発光期間には、電流は電源電位Ｖｆｆか
ら、有機発光ダイオードＯＬＥＤ、駆動回路１０、第３
のトランジスタＴｒ３を経て接地電位である低電位線Ｖ
ｈｈに流れる。このとき、制御線ＣＳＬをハイとするこ
とで、第３のトランジスタＴｒ３をオン、第４のトラン
ジスタＴｒ４をオフとする。有機発光ダイオードＯＬＥ
Ｄの輝度データの更新期間に制御線ＣＳＬをローとする
と、第３のトランジスタＴｒ３はオフとなり、第４のト
ランジスタＴｒ４がオンとなるので、有機発光ダイオー
ドＯＬＥＤのカソードの電位は、電源電位Ｖｆｆより高
電位である正電位Ｖｇｇとなり、有機発光ダイオードＯ
ＬＥＤは逆バイアス印加状態となる。Further, the third transistor Tr3 is changed from a p-channel transistor to an n-channel transistor, and the fourth transistor Tr4 is changed from an n-channel transistor to a p-channel transistor. During the light emitting period of the organic light emitting diode OLED, the current is changed from the power supply potential Vff to the organic light emitting diode OLED, the driving circuit 10, the third
Low potential line V which is ground potential through the transistor Tr3 of
It flows to hh. At this time, the control line CSL is set to high to turn on the third transistor Tr3 and turn off the fourth transistor Tr4. Organic light emitting diode OLE
When the control line CSL is set low during the update period of the brightness data of D, the third transistor Tr3 is turned off and the fourth transistor Tr4 is turned on. It becomes a high positive potential Vgg, and the organic light emitting diode O
The LED is in a reverse bias applied state.
【００４５】図１５は、図１１に示した画素回路におい
て、有機発光ダイオードＯＬＥＤのアノードとカソード
を入れ替え、アノードを固定電位である接地電位に接続
する。図１１で駆動回路１０が接続されていた正電位で
ある電源供給線Ｖｄｄを負電位である負電位線Ｖｉｉと
する。また、第４のトランジスタＴｒ４の負電位Ｖｅｅ
に接続されていた電極は、接地電位より高電位である正
電位Ｖｇｇに接続される。有機発光ダイオードＯＬＥＤ
の輝度データの更新期間に、制御線ＣＳＬをハイとする
と、第４のトランジスタＴｒ４がオンとなり第３のトラ
ンジスタＴｒ３がオフとなる。このとき、有機発光ダイ
オードＯＬＥＤのカソードの電位はアノードの電位であ
る電源電位Ｖｆｆより高い正電位Ｖｇｇとなるので有機
発光ダイオードＯＬＥＤは逆バイアス印加状態となる。FIG. 15 shows that in the pixel circuit shown in FIG. 11, the organic light emitting diode OLED has its anode and cathode replaced with each other, and the anode is connected to a ground potential which is a fixed potential. In FIG. 11, the power supply line Vdd having a positive potential to which the drive circuit 10 is connected is referred to as a negative potential line Vii having a negative potential. In addition, the negative potential Vee of the fourth transistor Tr4
The electrode connected to is connected to the positive potential Vgg, which is higher than the ground potential. Organic light emitting diode OLED
When the control line CSL is set to high during the update period of the luminance data, the fourth transistor Tr4 is turned on and the third transistor Tr3 is turned off. At this time, the potential of the cathode of the organic light emitting diode OLED becomes a positive potential Vgg higher than the power source potential Vff which is the potential of the anode, and thus the organic light emitting diode OLED is in the reverse bias applied state.
【００４６】図１４、図１５で示した画素回路では、第
３、４のトランジスタＴｒ３、Ｔｒ４を制御線ＣＳＬに
よりオンオフ制御したがこれに限る趣旨ではなく、走査
線ＳＬによりオンオフ制御する構成としてもよい。その
場合、駆動回路１０に輝度データが設定されるときに、
第３のトランジスタＴｒ３がオフかつ第４のトランジス
タＴｒ４がオンとなる型のトランジスタとすればよい。In the pixel circuit shown in FIGS. 14 and 15, the third and fourth transistors Tr3 and Tr4 are ON / OFF controlled by the control line CSL, but the invention is not limited to this. The ON / OFF control may be performed by the scanning line SL. Good. In that case, when the brightness data is set in the drive circuit 10,
A transistor in which the third transistor Tr3 is off and the fourth transistor Tr4 is on may be used.
【００４７】[0047]
【発明の効果】本発明によれば、残像現象の低減、また
は消費電力の削減が実現できる。また別の観点では、有
機発光ダイオードＯＬＥＤの劣化の進行を抑制できる。According to the present invention, the afterimage phenomenon can be reduced or the power consumption can be reduced. From another point of view, the progress of deterioration of the organic light emitting diode OLED can be suppressed.
【図１】 実施の形態１に係る画素の回路を示した図で
ある。FIG. 1 is a diagram showing a pixel circuit according to a first embodiment.
【図２】 実施の形態２に係る画素の回路を示した図で
ある。FIG. 2 is a diagram showing a pixel circuit according to a second exemplary embodiment.
【図３】 実施の形態３に係る画素の回路を示した図で
ある。FIG. 3 is a diagram showing a pixel circuit according to a third embodiment.
【図４】 実施の形態３に係る画素の回路を示した図で
ある。FIG. 4 is a diagram showing a pixel circuit according to a third embodiment.
【図５】 実施の形態１、２に係る画素の回路を一般化
して示した図である。FIG. 5 is a diagram showing a generalized circuit of a pixel according to the first and second embodiments.
【図６】 実施の形態３に係る画素の回路を一般化して
示した図である。FIG. 6 is a diagram showing a generalized circuit of a pixel according to a third embodiment.
【図７】 変形例の画素の回路を一般化して示した図で
ある。FIG. 7 is a diagram showing a generalized circuit of a pixel of a modified example.
【図８】 変形例の画素の回路を一般化して示した図で
ある。FIG. 8 is a diagram showing a generalized circuit of a pixel of a modified example.
【図９】 従来技術の画素の回路を示した図である。FIG. 9 is a diagram showing a circuit of a pixel of the related art.
【図１０】 変形例の画素の回路を一般化して示した図
である。FIG. 10 is a diagram showing a generalized circuit of a pixel of a modified example.
【図１１】 変形例の画素の回路を一般化して示した図
である。FIG. 11 is a diagram showing a generalized circuit of a pixel of a modified example.
【図１２】 一般的な有機発光ダイオードの積層構造を
示した図である。FIG. 12 is a view showing a laminated structure of a general organic light emitting diode.
【図１３】 一般的な有機発光ダイオードの積層構造と
は逆の積層構造を示した図である。FIG. 13 is a view showing a laminated structure opposite to that of a general organic light emitting diode.
【図１４】 変形例の画素の回路を一般化して示した図
である。FIG. 14 is a diagram showing a generalized circuit of a pixel of a modified example.
【図１５】 変形例の画素の回路を一般化して示した図
である。FIG. 15 is a diagram showing a generalized circuit of a pixel of a modified example.
１０ 駆動回路、 ＯＬＥＤ 有機発光ダイオード、
ＳＣ１ 第１の保持容量、 ＳＣ２ 第２の保持容量、
ＳＬ 走査線、 ＣＳＬ 制御線、 Ｔｒ１第１のト
ランジスタ、 Ｔｒ２ 第２のトランジスタ、 Ｔｒ３
第３のトランジスタ、 Ｔｒ４ 第４のトランジス
タ、 Ｔｒ５ 第５のトランジスタ、Ｔｒ６ 第６のト
ランジスタ、 Ｖｄｄ 電源供給線、 Ｖｅｅ 負電
位、 Ｖｆｆ 電源電位、 Ｖｇｇ 正電位、 Ｖｈｈ
低電位線、 Ｖｉｉ 負電位線。10 Driving circuit, OLED Organic light emitting diode,
SC1 first holding capacity, SC2 second holding capacity,
SL scan line, CSL control line, Tr1 first transistor, Tr2 second transistor, Tr3
Third transistor, Tr4 fourth transistor, Tr5 fifth transistor, Tr6 sixth transistor, Vdd power supply line, Vee negative potential, Vff power supply potential, Vgg positive potential, Vhh
Low potential line, Vii negative potential line.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｂ 33/14 Ｈ０５Ｂ 33/14 Ａ ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI theme code (reference) H05B 33/14 H05B 33/14 A
Claims (8)
け、光学素子に輝度データを設定する動作に応じて電流
バイパス素子を制御して、光学素子の両端に生じた電圧
を初期化することを特徴とする表示装置。1. A current bypass element is provided in parallel with an optical element, and the current bypass element is controlled according to an operation of setting brightness data in the optical element to initialize a voltage generated across the optical element. Characteristic display device.
学素子へ電流を供給する経路を遮断するスイッチを設け
たことを特徴とする請求項１に記載の表示装置。2. The display device according to claim 1, further comprising a switch for interrupting a path for supplying a current to the optical element when the current bypass element is turned on.
指示信号と、電流バイパス素子を制御するための信号を
共通化し、光学素子の両端に生じた電圧を初期化すると
同時に、輝度データを設定することを特徴とする請求項
１または２に記載の表示装置。3. A data update instruction signal for setting the brightness data and a signal for controlling the current bypass element are made common to initialize the voltage generated at both ends of the optical element and at the same time set the brightness data. The display device according to claim 1, wherein the display device is a display device.
指示信号と、電流バイパス素子を制御するための信号を
別々に設け、光学素子の両端に生じた電圧の初期化のタ
イミングを設定可能とすることを特徴とする請求項１ま
たは２に記載の表示装置。4. A data update instruction signal for setting the brightness data and a signal for controlling the current bypass element are separately provided so that the timing of initializing the voltage generated at both ends of the optical element can be set. The display device according to claim 1, wherein the display device is a display device.
電流の出口に当たる第２の端子とを有する光学素子と、
その光学素子に流すべき電流の変更に際し、所定の期
間、前記第１の端子の側から電荷を能動的に放電する初
期化素子とを備えることを特徴とする表示装置。5. An optical element having a first terminal corresponding to an entrance of a current and a second terminal corresponding to an exit of the current,
A display device, comprising: an initialization element which actively discharges electric charges from the side of the first terminal for a predetermined period when changing a current to be passed through the optical element.
電流の出口に当たる第２の端子とを有する光学素子と、
その光学素子に流すべき電流の変更に際し、所定の期
間、前記第１の端子の側に蓄電する初期化素子とを備え
ることを特徴とする表示装置。6. An optical element having a first terminal corresponding to an entrance of a current and a second terminal corresponding to an exit of the current,
A display device comprising: an initialization element that stores electricity on the side of the first terminal for a predetermined period when changing a current to be passed through the optical element.
第２の端子を前記第１の端子より高電位となるよう動作
することを特徴とする請求項５または６のいずれかに記
載の表示装置。7. The initialization device operates so that the second terminal has a higher potential than the first terminal during the predetermined period. Display device.
する際に、前記光学素子の両端に、前記光学素子を発光
させる際に印加すべき電圧を正電圧とした場合の逆電圧
を印加することを特徴とする請求項１から４のいずれか
に記載の表示装置。8. When the voltage generated at both ends of the optical element is initialized, a reverse voltage is applied to both ends of the optical element when a positive voltage is a voltage to be applied when the optical element emits light. The display device according to claim 1, wherein the display device is applied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002302579A JP2003208127A (en) | 2001-11-09 | 2002-10-17 | Display device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001-344662 | 2001-11-09 | ||
| JP2001344662 | 2001-11-09 | ||
| JP2002302579A JP2003208127A (en) | 2001-11-09 | 2002-10-17 | Display device |
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| Publication Number | Publication Date |
|---|---|
| JP2003208127A true JP2003208127A (en) | 2003-07-25 |
Family
ID=27667050
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002302579A Pending JP2003208127A (en) | 2001-11-09 | 2002-10-17 | Display device |
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| JP2021060608A (en) * | 2001-11-13 | 2021-04-15 | 株式会社半導体エネルギー研究所 | Display device |
| US8508443B2 (en) | 2001-11-13 | 2013-08-13 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for driving the same |
| JP2020187364A (en) * | 2001-11-13 | 2020-11-19 | 株式会社半導体エネルギー研究所 | Light-emitting device |
| JP2009163268A (en) * | 2001-11-13 | 2009-07-23 | Semiconductor Energy Lab Co Ltd | Driving method of display device |
| JP4485119B2 (en) * | 2001-11-13 | 2010-06-16 | 株式会社半導体エネルギー研究所 | Display device |
| US10128280B2 (en) | 2001-11-13 | 2018-11-13 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for driving the same |
| US8330681B2 (en) | 2002-02-28 | 2012-12-11 | Semiconductor Energy Laboratory Co, Ltd. | Light emitting device and method of driving the light emitting device |
| US10019935B2 (en) | 2002-02-28 | 2018-07-10 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US9454933B2 (en) | 2002-02-28 | 2016-09-27 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US8659517B2 (en) | 2002-02-28 | 2014-02-25 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US10373550B2 (en) | 2002-02-28 | 2019-08-06 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US7450093B2 (en) | 2002-02-28 | 2008-11-11 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US8988324B2 (en) | 2002-02-28 | 2015-03-24 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| JP2003255895A (en) * | 2002-02-28 | 2003-09-10 | Semiconductor Energy Lab Co Ltd | Light emitting device and its driving method |
| US8207916B2 (en) | 2002-02-28 | 2012-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US10672329B2 (en) | 2002-02-28 | 2020-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| US9697772B2 (en) | 2002-02-28 | 2017-07-04 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of driving the light emitting device |
| JP2005534990A (en) * | 2002-08-06 | 2005-11-17 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Electroluminescent display device with pixel with NMOS transistor |
| JP2004109718A (en) * | 2002-09-20 | 2004-04-08 | Hitachi Ltd | Image display device |
| JP2008020923A (en) * | 2003-05-19 | 2008-01-31 | Seiko Epson Corp | Electro-optical apparatus and method of driving electro-optical apparatus |
| US8643573B2 (en) | 2003-05-19 | 2014-02-04 | Seiko Epson Corporation | Electro-optical apparatus and method of driving the electro-optical apparatus |
| US7274345B2 (en) | 2003-05-19 | 2007-09-25 | Seiko Epson Corporation | Electro-optical device and driving device thereof |
| US8130176B2 (en) | 2003-05-19 | 2012-03-06 | Seiko Epson Corporation | Electro-optical apparatus and method of driving the electro-optical apparatus |
| US8188943B2 (en) | 2003-05-19 | 2012-05-29 | Seiko Epson Corporation | Electro-optical apparatus and method of driving the electro-optical apparatus |
| US8754833B2 (en) | 2003-05-23 | 2014-06-17 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US8760373B2 (en) | 2003-05-23 | 2014-06-24 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US8149185B2 (en) | 2003-05-23 | 2012-04-03 | Sony Corporation | Pixel circuit, display unit, and pixel circuit drive method |
| US9947270B2 (en) | 2003-05-23 | 2018-04-17 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US10475383B2 (en) | 2003-05-23 | 2019-11-12 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US8988326B2 (en) | 2003-05-23 | 2015-03-24 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US9666130B2 (en) | 2003-05-23 | 2017-05-30 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US9984625B2 (en) | 2003-05-23 | 2018-05-29 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| US8723761B2 (en) | 2003-05-23 | 2014-05-13 | Sony Corporation | Pixel circuit, display device, and method of driving pixel circuit |
| JP2004361640A (en) * | 2003-06-04 | 2004-12-24 | Sony Corp | Pixel circuit, display device, and driving method for pixel circuit |
| US7417607B2 (en) | 2003-08-21 | 2008-08-26 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
| JP2005092200A (en) * | 2003-09-12 | 2005-04-07 | Au Optronics Corp | Display pixel circuit and its driving method |
| JP2005140827A (en) * | 2003-11-04 | 2005-06-02 | Tohoku Pioneer Corp | Apparatus for driving light emitting display panel |
| JP2005202372A (en) * | 2003-12-19 | 2005-07-28 | Semiconductor Energy Lab Co Ltd | Display device and driving method therefor |
| US8902137B2 (en) | 2003-12-25 | 2014-12-02 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting device with first and second gate signal lines and electronic equipment using the same |
| JP2005208604A (en) * | 2003-12-25 | 2005-08-04 | Semiconductor Energy Lab Co Ltd | Light-emitting device and electronic equipment using the same |
| JP2005189383A (en) * | 2003-12-25 | 2005-07-14 | Sony Corp | Display device, and method for driving display device |
| JP2005189387A (en) * | 2003-12-25 | 2005-07-14 | Sony Corp | Display device, and method for driving display device |
| JP4561096B2 (en) * | 2003-12-26 | 2010-10-13 | ソニー株式会社 | Display device |
| JP2005189673A (en) * | 2003-12-26 | 2005-07-14 | Sony Corp | Display device |
| JP2005215102A (en) * | 2004-01-28 | 2005-08-11 | Sony Corp | Pixel circuit, display apparatus, and driving method for same |
| JP2006003716A (en) * | 2004-06-18 | 2006-01-05 | Seiko Epson Corp | Electronic circuit, its controlling method, electro-optic device, and electronic appliance |
| JP2022070278A (en) * | 2004-09-16 | 2022-05-12 | 株式会社半導体エネルギー研究所 | Display device |
| KR101280579B1 (en) | 2004-09-16 | 2013-07-02 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device and driving method of the same |
| JP2022163027A (en) * | 2004-09-16 | 2022-10-25 | 株式会社半導体エネルギー研究所 | Display device |
| JP2006113564A (en) * | 2004-09-16 | 2006-04-27 | Semiconductor Energy Lab Co Ltd | Display device and driving method of the same |
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| US9577008B2 (en) | 2004-09-16 | 2017-02-21 | Semiconductor Energy Laboratory Co., Ltd. | Display device and driving method of the same |
| KR101187398B1 (en) | 2004-09-16 | 2012-10-02 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device and driving method of the same |
| US8044895B2 (en) | 2004-09-16 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Display device and driving method of the same |
| JP7021377B2 (en) | 2004-09-16 | 2022-02-16 | 株式会社半導体エネルギー研究所 | Display device |
| JP2012150479A (en) * | 2004-09-16 | 2012-08-09 | Semiconductor Energy Lab Co Ltd | Display device |
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| JP7166480B2 (en) | 2004-09-16 | 2022-11-07 | 株式会社半導体エネルギー研究所 | Display device |
| US8614699B2 (en) | 2004-09-16 | 2013-12-24 | Semiconductor Energy Laboratory Co., Ltd. | Display device and driving method of the same |
| JP2021067953A (en) * | 2004-09-16 | 2021-04-30 | 株式会社半導体エネルギー研究所 | Display device |
| JP2006119180A (en) * | 2004-10-19 | 2006-05-11 | Seiko Epson Corp | Electro-optic device, driving method therefor, and electronic equipment |
| JP2022031721A (en) * | 2005-12-02 | 2022-02-22 | 株式会社半導体エネルギー研究所 | Semiconductor device |
| JP2007322795A (en) * | 2006-06-01 | 2007-12-13 | Nippon Hoso Kyokai <Nhk> | Light emitting diode driving circuit and display device using same |
| JP2008052241A (en) * | 2006-08-24 | 2008-03-06 | Samsung Sdi Co Ltd | Pixel and organic light emitting display device |
| JP2008090276A (en) * | 2006-09-05 | 2008-04-17 | Canon Inc | Light emitting display device |
| JP5257075B2 (en) * | 2007-06-15 | 2013-08-07 | パナソニック株式会社 | Image display device |
| US8169385B2 (en) | 2007-06-15 | 2012-05-01 | Panasonic Corporation | Image display device |
| US8314755B2 (en) | 2007-06-15 | 2012-11-20 | Panasonic Corporation | Image display device |
| WO2008152793A1 (en) * | 2007-06-15 | 2008-12-18 | Panasonic Corporation | Image display device |
| JP2010014746A (en) * | 2008-06-30 | 2010-01-21 | Sony Corp | Display device, method of driving the same, and electronic apparatus |
| US8077126B2 (en) | 2008-09-29 | 2011-12-13 | Samsung Electronics Co., Ltd. | Display device and driving method thereof |
| US8248331B2 (en) | 2008-10-07 | 2012-08-21 | Panasonic Corporation | Image display device and method of controlling the same |
| US8018404B2 (en) | 2008-10-07 | 2011-09-13 | Panasonic Corporation | Image display device and method of controlling the same |
| US8749454B2 (en) | 2008-10-07 | 2014-06-10 | Panasonic Corporation | Image display device and method of controlling the same |
| JP4719821B2 (en) * | 2008-10-07 | 2011-07-06 | パナソニック株式会社 | Image display device and control method thereof |
| US8436793B2 (en) | 2009-04-01 | 2013-05-07 | Seiko Epson Corporation | Light emitting apparatus, electronic equipment and method of driving pixel circuit |
| US9100998B2 (en) | 2009-04-01 | 2015-08-04 | Seiko Epson Corporation | Light emitting apparatus, electronic equipment and method of driving pixel circuit that suppress light emission |
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| JP2013088611A (en) * | 2011-10-18 | 2013-05-13 | Seiko Epson Corp | Electro-optic device, electro-optic device driving method and electronic apparatus |
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| US9230477B2 (en) | 2011-10-18 | 2016-01-05 | Seiko Epson Corporation | Electro-optical device, driving method of electro-optical device and electronic apparatus |
| JP2013088610A (en) * | 2011-10-18 | 2013-05-13 | Seiko Epson Corp | Electro-optic device, electro-optic device driving method and electronic apparatus |
| JP2013161084A (en) * | 2012-02-07 | 2013-08-19 | Samsung Display Co Ltd | Pixel and organic light emitting display using the same |
| US9728134B2 (en) | 2012-02-07 | 2017-08-08 | Samsung Display Co., Ltd. | Pixel and organic light emitting diode display having a bypass transistor for passing a portion of a driving current |
| US10600365B2 (en) | 2012-02-07 | 2020-03-24 | Samsung Display Co., Ltd. | Pixel and organic light emitting diode display having a bypass transistor for passing a portion of a driving current |
| JP2020160472A (en) * | 2013-09-13 | 2020-10-01 | 株式会社半導体エネルギー研究所 | Light-emitting device |
| JP2016212445A (en) * | 2016-09-07 | 2016-12-15 | セイコーエプソン株式会社 | Electro-optic device |
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