JP2003204138A - Manufacturing method for printed wiring board - Google Patents

Manufacturing method for printed wiring board

Info

Publication number
JP2003204138A
JP2003204138A JP2002002478A JP2002002478A JP2003204138A JP 2003204138 A JP2003204138 A JP 2003204138A JP 2002002478 A JP2002002478 A JP 2002002478A JP 2002002478 A JP2002002478 A JP 2002002478A JP 2003204138 A JP2003204138 A JP 2003204138A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
manufacturing
copper
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002002478A
Other languages
Japanese (ja)
Inventor
Kenji Takai
健次 高井
Naoyuki Urasaki
直之 浦崎
Toyoki Ito
豊樹 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2002002478A priority Critical patent/JP2003204138A/en
Publication of JP2003204138A publication Critical patent/JP2003204138A/en
Pending legal-status Critical Current

Links

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture a printed wiring board with high wiring density by peeling off a resist without giving a damage on resin. <P>SOLUTION: A manufacturing method for the printed wiring board has at least a process wherein a photoresist layer is formed on a board or on a material of the board having a copper foil of 1 to 5 μm thickness on an outmost layer of insulating resin, a conductive circuit is formed by pattern copper plating after exposure and development, and the photoresist layer is peeled off by an oxidizer. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はプリント配線板の製
造方法に関する。
TECHNICAL FIELD The present invention relates to a method for manufacturing a printed wiring board.

【0002】[0002]

【従来の技術】近年、電子機器の小型、軽量、高速化の
要求が高まり、プリント配線板の高密度化が進んでい
る。従来の、銅をエッチングする事で作製するプリント
配線板は、サイドエッチングの影響で配線の微細化には
限界があり、基板の高密度化には限界があった。そこで
近年は電気めっきによるセミアディティブ法によるプリ
ント配線板の製造方法が注目されている。このセミアデ
ィティブ法は、特開平11−186716にあるように絶縁樹脂
上に1μm程度の厚みの薄付け無電解銅めっきを給電層
として設け、その上にフォトレジスト層を形成し、露光
現像後、電気めっきで回路形成し、レジストを除去した
後、余計な給電層をエッチング除去する事でプリント配
線板を製造する方法である。先のフォトレジスト層の形
成はドライフィルムフォトレジストをラミネートする
か、液状フォトレジストを塗布する方法があるが、作業
性の面から通常ドライフィルムフォトレジストが使われ
る。ドライフィルムフォトレジストの除去には通常水酸
化ナトリウムや水酸化カリウムを含んだアルカリ水溶液
が用いられる。プリント配線板の高密度化に対応し、ド
ライフィルムフォトレジストにもファイン化の要求が大
きくなってきており、30μm厚みのドライフィルムフ
ォトレジストでもライン/スペースで20/20μm以
下の解像が可能となってきた。
2. Description of the Related Art In recent years, there has been an increasing demand for smaller, lighter and faster electronic equipment, and the density of printed wiring boards has been increasing. In the conventional printed wiring board produced by etching copper, there is a limit to the miniaturization of wiring due to the influence of side etching, and there is a limitation to increase the density of the substrate. Therefore, in recent years, attention has been paid to a method for manufacturing a printed wiring board by a semi-additive method by electroplating. According to this semi-additive method, as disclosed in JP-A-11-186716, thin electroless copper plating having a thickness of about 1 μm is provided as a power feeding layer on an insulating resin, a photoresist layer is formed thereon, and after exposure and development, This is a method of manufacturing a printed wiring board by forming a circuit by electroplating, removing the resist, and then removing the unnecessary power supply layer by etching. For forming the photoresist layer, there is a method of laminating a dry film photoresist or applying a liquid photoresist, but the dry film photoresist is usually used from the viewpoint of workability. To remove the dry film photoresist, an alkaline aqueous solution containing sodium hydroxide or potassium hydroxide is usually used. In response to the higher density of printed wiring boards, there is an increasing demand for finer dry film photoresists, and even with dry film photoresists with a thickness of 30 μm, resolution of 20/20 μm or less in line / space is possible. It's coming.

【0003】[0003]

【発明が解決しようとする課題】ところが、プリント配
線板のライン/スペースが微細になるにつれて、フォト
レジスト層が剥離できなくなる場合がある。特にフォト
レジストが台形の形状をしている場合や電気めっきがオ
ーバーハングしている場合、電気めっきにこぶがある場
合は、導体回路がフォトレジスト層を抑えつける形状に
なるため、剥離が難しい。従来は剥離液中のイオン濃度
を調整し、剥離片を小さくする事で対応してきたが、配
線の微細化によりこの方法では対応できない場合が増え
てきた。また給電層の厚みが薄い場合、レジスト剥離液
に強酸化剤を用いると樹脂に損傷を与える恐れがある。
本発明は樹脂に損傷を与えることなくレジストを剥離
し、配線密度の高いプリント配線板を作製することを目
的とするものである。
However, as the lines / spaces of the printed wiring board become finer, the photoresist layer may become unable to be peeled off. In particular, if the photoresist has a trapezoidal shape, if the electroplating is overhanging, or if there is a bump in the electroplating, the conductor circuit has a shape that holds down the photoresist layer, and peeling is difficult. Conventionally, this has been dealt with by adjusting the ion concentration in the stripping solution and making the stripping piece smaller, but due to the miniaturization of wiring, there are increasing cases where this method is not possible. If the power supply layer is thin, the resin may be damaged if a strong oxidizer is used in the resist stripping solution.
An object of the present invention is to remove a resist without damaging a resin to produce a printed wiring board having a high wiring density.

【0004】[0004]

【課題を解決するための手段】本発明は以下のことを特
徴とする。 (1)最外層の絶縁樹脂上に1〜5μm厚の銅箔を有す
る基板もしくは基板材料上にフォトレジスト層を形成
し、露光、現像後、パターン銅めっきにより導体回路を
形成し、酸化剤によってフォトレジスト層を剥離する工
程を少なくとも有することを特徴とするプリント配線板
の製造方法。 (2)絶縁樹脂上に1〜5μm厚の銅箔を有する基板も
しくは基板材料上に層間接続のための貫通穴若しくは止
まり穴を形成し、無電解銅めっき後、フォトレジスト層
を形成し、露光、現像後、パターン銅めっきにより導体
回路を形成し、酸化剤によってフォトレジスト層を剥離
する工程を少なくとも有することを特徴とするプリント
配線板の製造方法。 (3)前記酸化剤が、過マンガン酸塩を含む事を特徴と
する(1)〜(2)に記載のプリント配線板の製造方法。 (4)前記酸化剤が過マンガン酸ナトリウム若しくは過
マンガン酸カリウムであることを特徴とする(3)に記
載のプリント配線板の製造方法。 (5)前記酸化剤のpHが10以上であることを特徴とす
る(3)〜(4)に記載のプリント配線板の製造方法。
The present invention is characterized by the following. (1) A photoresist layer is formed on a substrate or substrate material having a copper foil with a thickness of 1 to 5 μm on the outermost insulating resin, and after exposure and development, a conductor circuit is formed by pattern copper plating and by an oxidizing agent. A method for manufacturing a printed wiring board, comprising at least a step of peeling off a photoresist layer. (2) A through hole or blind hole for interlayer connection is formed on a substrate or substrate material having a copper foil with a thickness of 1 to 5 μm on an insulating resin, and after electroless copper plating, a photoresist layer is formed and exposed. A method for manufacturing a printed wiring board, comprising at least a step of forming a conductor circuit by pattern copper plating after development and peeling the photoresist layer with an oxidizing agent. (3) The method for producing a printed wiring board according to (1) or (2), wherein the oxidizing agent contains permanganate. (4) The method for producing a printed wiring board according to (3), wherein the oxidizing agent is sodium permanganate or potassium permanganate. (5) The method for producing a printed wiring board according to (3) to (4), wherein the pH of the oxidizing agent is 10 or more.

【0005】[0005]

【発明の実施の形態】DETAILED DESCRIPTION OF THE INVENTION

【発明の実施の形態】本発明によるエッチング液の実施
の形態を、図1を用いて説明する。(a)まず、内層基
板の表面に内層銅パターンを形成した配線基板を作製す
る。この内層基板への銅パターンの形成は、銅張積層板
をエッチングして行なうサブトラクティブ法が一般的で
ある。図1(a)では両面板であるが、この内層基板は多層
板でもよい。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an etching solution according to the present invention will be described with reference to FIG. (A) First, a wiring board having an inner layer copper pattern formed on the surface of the inner layer board is manufactured. The subtractive method is generally used to form the copper pattern on the inner layer substrate by etching the copper clad laminate. Although it is a double-sided plate in FIG. 1 (a), this inner layer substrate may be a multi-layered plate.

【0006】次に内層基板の表面の内層銅パターンを粗
面化し、この銅パターンの上に形成される層間樹脂絶縁
層との密着性を向上させる必要がある。具体的には内層
銅パターンの上に針状の無電解めっきを形成する方法や
内層銅パターンを酸化(黒化)―還元処理する方法、内
層銅パターンをエッチングする方法等がある。
Next, it is necessary to roughen the inner layer copper pattern on the surface of the inner layer substrate to improve the adhesion to the interlayer resin insulation layer formed on this copper pattern. Specifically, there are a method of forming needle-shaped electroless plating on the inner layer copper pattern, a method of oxidizing (blackening) -reducing the inner layer copper pattern, a method of etching the inner layer copper pattern, and the like.

【0007】次に前記(a)で作製した配線基板の上
に、図1(b)に示す様に銅箔付層間絶縁樹脂をラミネー
トとする。層間絶縁樹脂としてはエポキシ系樹脂やポリ
イミド系樹脂を主成分として含むものであり、他にもア
クリル樹脂、ポリイミド樹脂、ベンゾシクロブテン樹
脂、フッ素樹脂、シアネート樹脂、PPE等や、その含有
物でもよい。銅箔付層間絶縁樹脂をラミネートとするか
わりにプリプレグを介して厚み5μm以下の銅箔を積層
してもよい。層間樹脂絶縁層の厚みは10から100μ
m程度、望ましくは20から60μmがよく、銅箔の厚
みは1から5μmが好適である。銅箔の厚みが1μm以
下であると後の酸化剤におけるレジストの剥離時に樹脂
を損傷する恐れがあり、銅箔の厚みが5μm以上である
と後の回路形成性に支障をきたす。
Next, as shown in FIG. 1 (b), an interlayer insulating resin with copper foil is laminated on the wiring board prepared in (a) above. The interlayer insulating resin contains an epoxy-based resin or a polyimide-based resin as a main component, and may be an acrylic resin, a polyimide resin, a benzocyclobutene resin, a fluororesin, a cyanate resin, PPE, or the like, or a component thereof. . Instead of laminating the interlayer insulating resin with copper foil, a copper foil having a thickness of 5 μm or less may be laminated via a prepreg. The thickness of the interlayer resin insulation layer is 10 to 100μ
m, preferably 20 to 60 μm, and the thickness of the copper foil is preferably 1 to 5 μm. If the thickness of the copper foil is 1 μm or less, the resin may be damaged when the resist is later stripped by the oxidizing agent, and if the thickness of the copper foil is 5 μm or more, the subsequent circuit formability is impaired.

【0008】次いで図1(c)に示す様に銅箔の上から
層間樹脂絶縁層にIVHを形成する。IVHを形成する方法と
しては、レーザーを用いるのが好適である。ここで用い
ることが出来るレーザーとしては、CO2やCO、エキシマ
等の気体レーザーやYAG等の固体レーザーがある。CO2レ
ーザーは容易に大出力を得られる事からφ50μm以上の
IVHの加工に適している。φ50μm以下の微細なIVHを加
工する場合は、より短波長で集光性のよいYAGレーザー
が適している。
Then, as shown in FIG. 1C, IVH is formed on the interlayer resin insulation layer from above the copper foil. A laser is suitable as a method for forming the IVH. Lasers that can be used here include gas lasers such as CO2, CO, and excimers, and solid-state lasers such as YAG. A CO2 laser can easily obtain a large output, so
Suitable for IVH processing. When processing a fine IVH of φ50 μm or less, a YAG laser having a shorter wavelength and good condensing property is suitable.

【0009】次いで過マンガン酸塩、クロム酸塩、クロ
ム酸のような酸化剤を用いてIVH内部の樹脂残さの除去
を行う。
Next, the resin residue inside the IVH is removed by using an oxidizing agent such as permanganate, chromate or chromic acid.

【0010】次いで銅箔上及びIVH内部に触媒核を付与
する。触媒核の付与には、貴金属イオンやパラジウムコ
ロイドを使用する。特にパラジウムコロイドを使用する
のが好ましい。
Next, a catalyst nucleus is provided on the copper foil and inside the IVH. Noble metal ions or palladium colloids are used to provide the catalyst nuclei. It is particularly preferable to use palladium colloid.

【0011】次に図1(d)に示すように、触媒核を付
与した銅箔上及びIVH内部に薄付けの無電解めっき層を
形成する。この無電解めっきには、CUST2000(日立
化成工業株式会社製、商品名)やCUST201(日立化成
工業株式会社製、商品名)等の市販の無電解銅めっきが
使用できる。これらの無電解銅めっきは硫酸銅、ホルマ
リン、錯化剤、水酸化ナトリウムを主成分とする。めっ
きの厚さは次の電気めっきが行うことができる厚さであ
ればよく、0.1〜1μm程度で十分である。
Next, as shown in FIG. 1 (d), a thin electroless plating layer is formed on the copper foil provided with the catalyst nuclei and inside the IVH. Commercially available electroless copper plating such as CUST2000 (manufactured by Hitachi Chemical Co., Ltd., trade name) and CUST201 (manufactured by Hitachi Chemical Co., Ltd., trade name) can be used for the electroless plating. These electroless copper platings contain copper sulfate, formalin, a complexing agent, and sodium hydroxide as main components. It suffices that the thickness of plating be such that the next electroplating can be performed, and about 0.1 to 1 μm is sufficient.

【0012】次に図1(e)に示すように無電解めっき
を行った上にめっきレジストを形成する。めっきレジス
トの厚さは、その後めっきする導体の厚さと同程度かよ
り厚い膜厚にするのが好適である。めっきレジストに使
用できる樹脂には、PMER P−LA900PM(東京応化株式会
社製、商品名)のような液状レジストや、HW−425(日
立化成工業株式会社、商品名)、RY−3025(日立化成工
業株式会社、商品名)等のドライフィルムがあるが、作
業性の面からドライフィルムを用いるのが好ましい。ビ
アホール上と導体回路となるべき個所はめっきレジスト
を形成しない。尚レジストの現像には通常炭酸ナトリウ
ム水溶液を用いる。
Next, as shown in FIG. 1 (e), electroless plating is performed and a plating resist is formed. The thickness of the plating resist is preferably the same as or thicker than the thickness of the conductor to be plated thereafter. Resins that can be used for plating resists include liquid resists such as PMER P-LA900PM (trade name, manufactured by Tokyo Ohka Co., Ltd.), HW-425 (trade name, Hitachi Chemical Co., Ltd.), RY-3025 (Hitachi Chemical Co., Ltd.). Although there are dry films manufactured by Kogyo Co., Ltd., etc., it is preferable to use dry films from the viewpoint of workability. No plating resist is formed on the via holes and the portions to be conductor circuits. An aqueous solution of sodium carbonate is usually used for developing the resist.

【0013】次に図1(f)に示すように電気めっきに
より回路パターンを形成する。電気めっきには、通常プ
リント配線板で使用される硫酸銅電気めっきやピロリン
酸電気めっきが使用できる。めっきの厚さは、回路導体
として使用できればよく、1〜100μmの範囲である
事が好ましく、5〜50μmの範囲である事がより好ま
しい。
Next, as shown in FIG. 1F, a circuit pattern is formed by electroplating. For the electroplating, copper sulfate electroplating or pyrophosphoric acid electroplating which is usually used in printed wiring boards can be used. The thickness of the plating is sufficient if it can be used as a circuit conductor, and it is preferably in the range of 1 to 100 μm, more preferably in the range of 5 to 50 μm.

【0014】次にアルカリ性の過マンガン酸塩溶液、若
しくは酸性のクロム酸水溶液等の酸化剤でフォトレジス
ト層をエッチング除去する。フォトレジスト層がアルカ
リ現像タイプであれば、アルカリ性の過マンガン酸塩溶
液を用いるのがより効果的であり、その後酸による中和
処理を行なうのがさらに好適である。過マンガン酸塩は
過マンガン酸ナトリウム若しくは過マンガン酸カリウム
を用いるのが安価で好ましく、10〜200g/Lの水溶液の
形で用いる。尚、過マンガン酸塩は再生処理にコストが
かかるので、通常のアルカリ性水溶液でレジスト除去を
行った後に残ったレジストをアルカリ過マンガン酸塩で
処理することも出来る。pHが低いと樹脂の溶解速度が
低下するので剥離液のpHは10以上が好適である。
Next, the photoresist layer is removed by etching with an oxidizing agent such as an alkaline permanganate solution or an acidic chromic acid aqueous solution. If the photoresist layer is of the alkali development type, it is more effective to use an alkaline permanganate solution, and it is more preferable to carry out an acid neutralization treatment thereafter. It is inexpensive and preferable to use sodium permanganate or potassium permanganate as the permanganate, and it is used in the form of an aqueous solution of 10 to 200 g / L. Incidentally, since permanganate is expensive to regenerate, it is possible to treat the resist remaining after removing the resist with an ordinary alkaline aqueous solution with alkali permanganate. If the pH is low, the dissolution rate of the resin will decrease, so the pH of the stripping solution is preferably 10 or more.

【0015】最後に給電層をエッチング除去する事で導
体回路間の絶縁性を確保する。エッチング液は硫酸、過
酸化水素水の混合水溶液やペルオキソ二硫酸アンモニウ
ム水溶液等の様に銅がエッチングできるものであれば特
に限定しない。
Finally, the power supply layer is removed by etching to ensure insulation between the conductor circuits. The etching solution is not particularly limited as long as it can etch copper, such as a mixed aqueous solution of sulfuric acid and hydrogen peroxide solution or an aqueous solution of ammonium peroxodisulfate.

【0016】[0016]

【実施例】実施例1 図1(a)に示すように、絶縁基材に、厚さ18μmの
銅箔を両面に貼り合わせた厚さ0.2mmのガラス布基
材エポキシ銅張積層板であるMCL−E−679(日立
化成工業株式会社製、商品名)を用い、その不要な箇所
の銅箔をエッチング除去し、スルーホールを形成して、
内層導体回路1を形成し、内層回路板2を作製した。そ
の内層回路板2の内層導体回路1の処理を、MEC etch
BOND CZ−8100(メック株式会社製、商品
名)を用い、液温35℃、スプレー圧0.15MPの条
件で、スプレー噴霧処理し、銅表面を粗面化して、粗さ
3μm程度の凹凸を作り、MEC etch BOND CL
−8300(メック株式会社製、商品名)を用いて、液
温25℃、浸漬時間20秒間の条件で浸漬して、銅表面
に防錆処理を行なった。図1(b)に示すように、内層
回路板2の両面に、3μm銅箔に接着剤を塗布したMCF−
7000LX(日立化成工業株式会社製、商品名)を、170
℃30kgf/cm2の条件で60分加熱加圧ラミネートし、
厚さ40μmの絶縁層5を形成した。図1(c)に示すよ
うに、銅箔上から炭酸ガスインパクトレーザー穴あけ機
L−500(住友重機械工業株式会社製、商品名)によ
り、直径80μmの非貫通穴6をあけ、過マンガン酸カ
リウム65g/リットルと水酸化ナトリウム40g/リ
ットルの混合水溶液に、液温70℃で20分間浸漬し、
スミアの除去を行なった。その後、パラジウム溶液であ
るHS−202B(日立化成工業株式会社製、商品名)
に、25℃で15分間浸漬し、触媒を付与した後、CU
ST−201(日立化成工業株式会社製、商品名)を使
用し、液温25℃、30分の条件で無電解銅めっきを行
ない、図1(d)に示すように厚さ0.3μmの無電解
銅めっき層7を形成した。図1(e)に示すように、ドラ
イフィルムフォトレジストであるRY−3025(日立
化成工業株式会社製、商品名)を、無電解めっき層7の
表面にラミネートし、電解銅めっきを行なう箇所をマス
クしたフォトマスクを介して紫外線を露光し、現像して
めっきレジスト8を形成した。図1(f)に示すよう
に、硫酸銅浴を用いて、液温25℃、電流密度1.0A
/dm2の条件で、電解銅めっきを20μmほど行な
い、回路導体幅/回路導体間隔(L/S)=45/3
5、35/25、25/15μmとなるようにパターン
電気めっき9を形成した。次に図1(g)に示すよう
に、アルカリ-アミン系レジスト剥離液であるHTO(ニチ
ゴー・モートン株式会社製、商品名)に40℃で10分
浸漬し、ドライフィルムフォトレジストの除去を行った
後に、アルカリ過マンガン酸水溶液であるMLB−49
5(メルテックス株式会社製、商品名)に70℃で10
分浸漬し、ドライフィルムフォトレジストの除去を再び
行ない、引き続き酸性溶媒であるMLB−790(メル
テックス株式会社製、商品名)に70℃で5分浸漬し、
中和処理を行なった後、H2SO420g/L、H22
0g/Lの組成のエッチング液を用いてパターン部以外
の銅をエッチング除去し、図2に示すような回路導体幅
/回路導体間隔(L/S)=40/40、30/30、
20/20μmの仕上がりのくし型評価パターンを作製
した。 実施例2 レジスト剥離液であるHTO(ニチゴー・モートン株式会
社製、商品名)の処理を行わず、直ちにアルカリ過マン
ガン酸水溶液であるMLB−495(メルテックス株式
会社製、商品名)に70℃で15分浸漬した以外は実施
例1と同様に基板を作製した。 実施例3 MLB−495(メルテックス株式会社製、商品名)の
代わりに過マンガン酸カリウム65g/リットルと水酸
化ナトリウム40g/リットルの混合水溶液を用いた以
外は実施例1と同様に基板を作製した。
Example 1 As shown in FIG. 1 (a), a glass cloth base material epoxy copper clad laminate having a thickness of 0.2 mm in which a copper foil having a thickness of 18 μm was bonded to both sides of an insulating base material was used. A certain MCL-E-679 (manufactured by Hitachi Chemical Co., Ltd., trade name) is used to remove the copper foil at unnecessary portions by etching to form through holes,
The inner layer conductor circuit 1 was formed, and the inner layer circuit board 2 was produced. The inner layer conductor circuit 1 of the inner layer circuit board 2 is processed by MEC etch.
BOND CZ-8100 (manufactured by Mec Co., Ltd., trade name) is used under the conditions of a liquid temperature of 35 ° C. and a spray pressure of 0.15 MP to carry out spray atomization to roughen the copper surface to form irregularities of about 3 μm. Make, MEC etch BOND CL
Using -8300 (trade name, manufactured by Mec Co., Ltd.), the copper surface was immersed in a liquid temperature of 25 ° C. for an immersion time of 20 seconds to perform rust prevention treatment. As shown in Fig. 1 (b), MCF- with 3 μm copper foil coated with adhesive on both sides of the inner circuit board 2
7000LX (Hitachi Chemical Co., Ltd., trade name)
Heat and pressure laminate for 60 minutes under the condition of ℃ 30kgf / cm2,
An insulating layer 5 having a thickness of 40 μm was formed. As shown in FIG. 1 (c), a non-through hole 6 having a diameter of 80 μm was drilled from a copper foil with a carbon dioxide gas impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.) to give permanganate. Immerse in a mixed aqueous solution of potassium 65 g / liter and sodium hydroxide 40 g / liter at a liquid temperature of 70 ° C. for 20 minutes,
The smear was removed. After that, HS-202B which is a palladium solution (Hitachi Chemical Co., Ltd., trade name)
After immersing in CU at 25 ° C for 15 minutes to apply a catalyst, CU
Using ST-201 (manufactured by Hitachi Chemical Co., Ltd., trade name), electroless copper plating was performed at a liquid temperature of 25 ° C. for 30 minutes and a thickness of 0.3 μm as shown in FIG. 1 (d). An electroless copper plating layer 7 was formed. As shown in FIG. 1 (e), a dry film photoresist RY-3025 (manufactured by Hitachi Chemical Co., Ltd., trade name) is laminated on the surface of the electroless plating layer 7, and electrolytic copper plating is performed at a location. Ultraviolet light was exposed through a masked photomask and developed to form a plating resist 8. As shown in FIG. 1 (f), using a copper sulfate bath, the liquid temperature was 25 ° C. and the current density was 1.0 A.
Electrolytic copper plating of about 20 μm under the condition of / dm 2 , circuit conductor width / circuit conductor interval (L / S) = 45/3
The pattern electroplating 9 was formed to have a thickness of 5, 35/25, 25/15 μm. Next, as shown in FIG. 1 (g), the dry film photoresist was removed by immersing it in HTO (trade name, manufactured by Nichigo Morton Co., Ltd.), which is an alkali-amine resist stripping solution, at 40 ° C. for 10 minutes. MLB-49, which is an aqueous alkaline permanganate solution after
5 (product name, manufactured by Meltex Co., Ltd.) at 70 ° C for 10
After dipping for 5 minutes, the dry film photoresist is removed again, followed by dipping in MLB-790 (manufactured by Meltex Co., Ltd.) which is an acidic solvent at 70 ° C. for 5 minutes,
After neutralization, H 2 SO 4 20 g / L, H 2 O 2 1
Copper other than the pattern portion is removed by etching using an etching solution having a composition of 0 g / L, and circuit conductor width / circuit conductor spacing (L / S) = 40/40, 30/30 as shown in FIG.
A comb type evaluation pattern having a finish of 20/20 μm was prepared. Example 2 Immediately without treating with HTO (Nichigo Morton Co., Ltd., trade name) which is a resist stripping solution, 70 ° C. was added to MLB-495 (Meltex Co., Ltd. trade name), which was an alkaline permanganate aqueous solution. A substrate was prepared in the same manner as in Example 1 except that the substrate was soaked for 15 minutes. Example 3 A substrate was prepared in the same manner as in Example 1 except that a mixed aqueous solution of potassium permanganate 65 g / liter and sodium hydroxide 40 g / liter was used in place of MLB-495 (trade name, manufactured by Meltex Co., Ltd.). did.

【0017】[0017]

【比較例】比較例1 ドライフィルムフォトレジストの除去について、水酸化
ナトリウム水溶液3%に40℃で10分浸漬した以外は
実施例1と同様に基板を作成した。 比較例2 ドライフィルムフォトレジストの除去について、水酸化
カリウム水溶液3%に40℃で10分浸漬した以外は実
施例1と同様に基板を作成した。 比較例3 アルカリ-アミン系レジスト剥離液であるHTO(ニチゴー
・モートン株式会社製、商品名)のみでドライフィルム
フォトレジストの除去を行った以外は実施例1と同様に
基板を作成した。
Comparative Example Comparative Example 1 A substrate was prepared in the same manner as in Example 1 except that the dry film photoresist was removed by immersing it in 3% aqueous sodium hydroxide solution at 40 ° C. for 10 minutes. Comparative Example 2 A substrate was prepared in the same manner as in Example 1 except that the dry film photoresist was removed by immersing it in 3% aqueous potassium hydroxide solution at 40 ° C. for 10 minutes. Comparative Example 3 A substrate was prepared in the same manner as in Example 1 except that the dry film photoresist was removed only with HTO (trade name, manufactured by Nichigo Morton Co., Ltd.), which is an alkali-amine resist stripping solution.

【0018】実施例1〜3から比較例1〜3で作成した基
板の不良率を表に示す。尚、いずれの基板も酸化剤によ
る樹脂の劣化は見られなかった。2図の櫛型の中で一箇
所でもレジスト剥離残りによる短絡のあったサンプルを
不良とし、櫛型20個中の不良率で結果を示す。
Tables show the defect rates of the substrates prepared in Examples 1 to 3 and Comparative Examples 1 to 3. No deterioration of the resin due to the oxidizing agent was observed in any of the substrates. A sample having a short circuit due to residual resist peeling even at one place in the comb shape of FIG. 2 is regarded as defective, and the result is shown by the defective rate in 20 comb shapes.

【0019】表から分かる通り、本発明により作製した
プリント配線板はレジストの剥離残りによる短絡不良が
なかった。評価結果を表1に示す。
As can be seen from the table, the printed wiring board produced according to the present invention did not have a short circuit defect due to the residual resist peeling. The evaluation results are shown in Table 1.

【0020】[0020]

【表1】 [Table 1]

【0021】以上に説明した通り、本発明により、樹脂
を痛めずにレジストの剥離残りによる短絡不良がなく配
線密度の高いプリント配線板を作製する事が出来る。
As described above, according to the present invention, it is possible to produce a printed wiring board having a high wiring density without damaging the resin and causing no short circuit failure due to residual resist peeling.

【0022】[0022]

【図面の簡単な説明】[Brief description of drawings]

【図1】 回路パターン[Figure 1] Circuit pattern

【図2】 評価パターン[Figure 2] Evaluation pattern

【符号の説明】[Explanation of symbols]

1 内層導体回路 2 内層回路板 3 スルーホール 4 銅箔 5 絶縁層 6 IVH 7 無電解銅めっき 8 ドライフィルムフォトレジスト 9 パターン電気めっき 1 Inner layer conductor circuit 2 Inner layer circuit board 3 through hole 4 copper foil 5 insulating layer 6 IVH 7 Electroless copper plating 8 Dry film photoresist 9 pattern electroplating

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E317 AA24 BB01 BB12 CC32 CC33 CC51 CD15 CD18 CD25 GG16 5E339 AB02 AC01 AD03 AD05 AE01 BC02 BD02 BD06 BD08 BE11 CC01 CD01 CE12 CE15 CF15 CG04 FF02 GG02 5E343 AA02 AA07 AA12 BB16 BB24 BB67 BB71 CC46 CC62 DD33 DD43 DD75 EE17 ER18 GG20   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5E317 AA24 BB01 BB12 CC32 CC33                       CC51 CD15 CD18 CD25 GG16                 5E339 AB02 AC01 AD03 AD05 AE01                       BC02 BD02 BD06 BD08 BE11                       CC01 CD01 CE12 CE15 CF15                       CG04 FF02 GG02                 5E343 AA02 AA07 AA12 BB16 BB24                       BB67 BB71 CC46 CC62 DD33                       DD43 DD75 EE17 ER18 GG20

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】最外層の絶縁樹脂上に1〜5μm厚の銅箔
を有する基板もしくは基板材料上にフォトレジスト層を
形成し、露光、現像後、パターン銅めっきにより導体回
路を形成し、酸化剤によってフォトレジスト層を剥離す
る工程を少なくとも有することを特徴とするプリント配
線板の製造方法。
1. A photoresist layer is formed on a substrate or substrate material having a copper foil with a thickness of 1 to 5 μm on the outermost insulating resin, and after exposure and development, a conductor circuit is formed by pattern copper plating and oxidation. A method for manufacturing a printed wiring board, which comprises at least a step of peeling a photoresist layer with an agent.
【請求項2】絶縁樹脂上に1〜5μm厚の銅箔を有する
基板もしくは基板材料上に層間接続のための貫通穴若し
くは止まり穴を形成し、無電解銅めっき後、フォトレジ
スト層を形成し、露光、現像後、パターン銅めっきによ
り導体回路を形成し、酸化剤によってフォトレジスト層
を剥離する工程を少なくとも有することを特徴とするプ
リント配線板の製造方法。
2. A through hole or a blind hole for interlayer connection is formed on a substrate or substrate material having a copper foil with a thickness of 1 to 5 μm on an insulating resin, and a photoresist layer is formed after electroless copper plating. A method for producing a printed wiring board, which comprises at least a step of forming a conductor circuit by pattern copper plating after exposure and development, and peeling the photoresist layer with an oxidizing agent.
【請求項3】前記酸化剤が、過マンガン酸塩を含む事を
特徴とする請求項1〜2に記載のプリント配線板の製造
方法。
3. The method for manufacturing a printed wiring board according to claim 1, wherein the oxidizing agent contains permanganate.
【請求項4】前記酸化剤が過マンガン酸ナトリウム若し
くは過マンガン酸カリウムであることを特徴とする請求
項3に記載のプリント配線板の製造方法。
4. The method for manufacturing a printed wiring board according to claim 3, wherein the oxidizing agent is sodium permanganate or potassium permanganate.
【請求項5】前記酸化剤のpHが10以上であることを
特徴とする請求項3〜4に記載のプリント配線板の製造
方法。
5. The method for manufacturing a printed wiring board according to claim 3, wherein the oxidizing agent has a pH of 10 or more.
JP2002002478A 2002-01-09 2002-01-09 Manufacturing method for printed wiring board Pending JP2003204138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002002478A JP2003204138A (en) 2002-01-09 2002-01-09 Manufacturing method for printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002002478A JP2003204138A (en) 2002-01-09 2002-01-09 Manufacturing method for printed wiring board

Publications (1)

Publication Number Publication Date
JP2003204138A true JP2003204138A (en) 2003-07-18

Family

ID=27642321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002002478A Pending JP2003204138A (en) 2002-01-09 2002-01-09 Manufacturing method for printed wiring board

Country Status (1)

Country Link
JP (1) JP2003204138A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100807487B1 (en) 2006-08-22 2008-02-25 삼성전기주식회사 Method of fabricating printed circuit board
JP2009117438A (en) * 2007-11-02 2009-05-28 Shinko Electric Ind Co Ltd Method of forming wiring pattern and method of manufacturing wiring substrate
JP2017041475A (en) * 2015-08-17 2017-02-23 凸版印刷株式会社 Wiring board, multilayer wiring board and wiring board manufacturing method
JP2019515138A (en) * 2016-05-04 2019-06-06 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツングAtotech Deutschland GmbH Method for depositing a metal or metal alloy on a substrate surface comprising activation of the substrate surface
CN110430697A (en) * 2019-08-29 2019-11-08 江苏上达电子有限公司 A kind of production method of novel multi-layer fine-line plate
CN110708875A (en) * 2019-10-08 2020-01-17 星河电路(福建)有限公司 Method for manufacturing large-current power supply type printed circuit board produced by resin filling addition method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100807487B1 (en) 2006-08-22 2008-02-25 삼성전기주식회사 Method of fabricating printed circuit board
JP2009117438A (en) * 2007-11-02 2009-05-28 Shinko Electric Ind Co Ltd Method of forming wiring pattern and method of manufacturing wiring substrate
JP2017041475A (en) * 2015-08-17 2017-02-23 凸版印刷株式会社 Wiring board, multilayer wiring board and wiring board manufacturing method
JP2019515138A (en) * 2016-05-04 2019-06-06 アトテツク・ドイチユラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツングAtotech Deutschland GmbH Method for depositing a metal or metal alloy on a substrate surface comprising activation of the substrate surface
CN110430697A (en) * 2019-08-29 2019-11-08 江苏上达电子有限公司 A kind of production method of novel multi-layer fine-line plate
CN110430697B (en) * 2019-08-29 2021-07-13 江苏上达电子有限公司 Manufacturing method of novel multi-layer fine circuit board
CN110708875A (en) * 2019-10-08 2020-01-17 星河电路(福建)有限公司 Method for manufacturing large-current power supply type printed circuit board produced by resin filling addition method

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