JP2003142509A - Semiconductor device and its manufacturing method - Google Patents
Semiconductor device and its manufacturing methodInfo
- Publication number
- JP2003142509A JP2003142509A JP2001349264A JP2001349264A JP2003142509A JP 2003142509 A JP2003142509 A JP 2003142509A JP 2001349264 A JP2001349264 A JP 2001349264A JP 2001349264 A JP2001349264 A JP 2001349264A JP 2003142509 A JP2003142509 A JP 2003142509A
- Authority
- JP
- Japan
- Prior art keywords
- conductive plate
- plate member
- manufacturing
- semiconductor chip
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、例えばＢＧＡ（ボ
ール・グリッド・アレイ）あるいはＣＳＰ（チップ・サ
イズ・パッケージ）のような、格子状にエリア配列され
た接続端子を備えるエリアアレイパッケージと称される
半導体装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is called an area array package having connection terminals arranged in a grid-like area, such as BGA (ball grid array) or CSP (chip size package). The present invention relates to a semiconductor device and a manufacturing method thereof.
【０００２】[0002]
【従来の技術】集積回路が組み込まれかつ該集積回路の
ための複数の接続部が設けられた半導体チップを封止す
ることにより形成される半導体装置の一つに、エリアア
レイパッケージと称される半導体装置がある。このエリ
アアレイパッケージでは、その接続端子は、格子状にエ
リア配列されている。エリアアレイパッケージの製造方
法として、例えば特開２０００−２５２３８８公報、特
開２０００−２５２３８９公報及び特開２０００−２５
２３９０公報に記載された方法がある。これら従来技術
によれば、半導体チップを樹脂部材により封止するため
の鋳型に、金属箔を配置した後、樹脂材料が前記鋳型に
加圧して注入される。この樹脂材料の成型時、樹脂材料
の圧力を利用して、前記金属箔には前記鋳型に沿った凹
所または凸部が形成される。所定の凹所または凸部に
は、前記半導体チップに設けられた複数の接続部がボン
ディングワイヤを介して接続される。前記樹脂材料の硬
化により形成された樹脂部材の底面から露出する前記金
属箔は、高圧ジェット水あるいはレーザ光を用いて多数
の分離エリアに分断され、これにより、各凹所または凸
部で、それぞれの半田ボールのような端子部材が接続さ
れる格子状に配列された多数の電極部材が構成される。
前記金属箔により形成された各分離エリアすなわち電極
部材には、それぞれの端子部材が固定される。2. Description of the Related Art One of semiconductor devices formed by sealing a semiconductor chip in which an integrated circuit is incorporated and a plurality of connecting portions for the integrated circuit is provided is called an area array package. There is a semiconductor device. In this area array package, the connection terminals are area-arranged in a grid pattern. As a method of manufacturing an area array package, for example, Japanese Patent Laid-Open Nos. 2000-252388, 2000-252389, and 2000-25.
There is a method described in 2390 publication. According to these conventional techniques, a metal foil is placed in a mold for sealing a semiconductor chip with a resin member, and then a resin material is injected under pressure into the mold. At the time of molding the resin material, a recess or a protrusion along the mold is formed on the metal foil by utilizing the pressure of the resin material. A plurality of connection portions provided on the semiconductor chip are connected to the predetermined recesses or protrusions via bonding wires. The metal foil exposed from the bottom surface of the resin member formed by curing the resin material is divided into a large number of separation areas by using high-pressure jet water or laser light, whereby at each recess or protrusion, respectively. A large number of electrode members arranged in a grid pattern to which terminal members such as solder balls are connected.
A terminal member is fixed to each separation area, that is, an electrode member formed of the metal foil.
【０００３】[0003]
【発明が解決しようとする課題】ところで、前記した従
来技術によれば、樹脂部材の底面から露出する前記金属
箔が、前記したジェット水あるいはレーザ光を用いた切
断加工により、多数の片に分断され、この各片で、各端
子部材のための格子状に配列された電極部材が構成され
ることから、前記切断加工の際に、前記金属箔の切断に
連続して前記樹脂部材を切断する恐れがあることから、
該樹脂部材内の前記半導体チップあるいは該チップの接
続部から伸びる前記ワイヤに損傷を与える恐れがある。By the way, according to the above-mentioned prior art, the metal foil exposed from the bottom surface of the resin member is divided into a large number of pieces by the cutting process using the above-mentioned jet water or laser light. Since each of the pieces constitutes an electrode member arranged in a grid for each terminal member, the resin member is cut continuously from the cutting of the metal foil during the cutting process. Because of fear
There is a risk of damaging the semiconductor chip in the resin member or the wire extending from the connecting portion of the chip.
【０００４】従って、本発明の目的は、樹脂封止された
半導体チップあるいはボンディングワイヤ等の各部材に
損傷を与えることなくエリアアレイパッケージ（area a
rraypackage）を形成する製造方法を提供することにあ
る。さらに、本発明の他の目的は、本発明に係る前記製
造方法を利用して半導体チップの放熱性が従来に比較し
て高められたエリアアレイパッケージを提供することに
ある。本発明のさらに他の目的は、樹脂封止された半導
体チップあるいはボンディングワイヤ等の各部材に損傷
を与える恐れを低減し得る、エリアアレイパッケージの
製造方法を提供することにある。本発明のさらに他の目
的は、本発明に係る前記製造方法を利用して新規なエリ
アアレイパッケージを提供することにある。Therefore, an object of the present invention is to provide an area array package (area a) without damaging each member such as a resin-sealed semiconductor chip or a bonding wire.
It is to provide a manufacturing method for forming a rray package). Further, another object of the present invention is to provide an area array package in which the heat dissipation of a semiconductor chip is improved by using the manufacturing method according to the present invention as compared with the conventional one. Still another object of the present invention is to provide a method for manufacturing an area array package that can reduce the risk of damaging each member such as a resin-sealed semiconductor chip or a bonding wire. Still another object of the present invention is to provide a new area array package using the manufacturing method according to the present invention.
【０００５】[0005]
【課題を解決するための手段】本発明は、以上の点を解
決するために、次の構成を採用する。本発明に係る半導
体装置の第１の製造方法は、集積回路が組み込まれかつ
該集積回路のための複数の接続部が設けられた半導体チ
ップと、該半導体チップを封入する樹脂部材と、該樹脂
部材の底面に露出して配置され、対応する前記接続部に
それぞれが電気的に接続された複数の電極部材と、該電
極部材の露出面に接続される端子部材とを備える半導体
装置の製造方法であって、前記電極部材のための導電性
板部材の一方の面に、各電極部材のための領域を区画す
べく、格子状に配列された複数の溝を形成すること、前
記導電性板部材の前記溝が形成された面上に前記半導体
チップを配置しかつ該半導体チップの前記各接続部と該
接続部に対応する前記領域とを電気的に接続すること、
前記チップを封じ込めるべく前記導電性板部材の前記一
方の面を樹脂部材で覆うこと、前記導電性板部材の他方
の面を前記溝に達するまで研磨することにより、前記各
領域を電気的に分離し、分離された各領域で前記各電極
部材を形成すること、各電極部材に前記端子部材を結合
することを含むことを特徴とする。The present invention adopts the following constitution in order to solve the above points. A first method for manufacturing a semiconductor device according to the present invention includes a semiconductor chip in which an integrated circuit is incorporated and a plurality of connecting portions for the integrated circuit are provided, a resin member encapsulating the semiconductor chip, and the resin. A method of manufacturing a semiconductor device, comprising: a plurality of electrode members that are exposed on a bottom surface of a member and are electrically connected to corresponding connection portions, respectively; and a terminal member that is connected to an exposed surface of the electrode member. And forming a plurality of grooves arranged in a grid pattern on one surface of the conductive plate member for the electrode member so as to partition a region for each electrode member, the conductive plate Arranging the semiconductor chip on a surface of the member on which the groove is formed and electrically connecting each of the connection portions of the semiconductor chip and the region corresponding to the connection portion,
Each of the regions is electrically separated by covering the one surface of the conductive plate member with a resin member to contain the chip and polishing the other surface of the conductive plate member until the groove is reached. And forming each of the electrode members in each of the separated regions, and connecting the terminal member to each of the electrode members.
【０００６】本発明に係る第１の前記製造方法では、半
導体チップおよびボンディングワイヤを導電性板部材上
に配置するに先立ち、該導電性板部材の前記半導体チッ
プを配置する一方の面に、前記各電極部材のための格子
状に配列された複数の溝が形成され、前記導電性板部材
上に前記半導体チップおよび前記ボンディングワイヤが
樹脂部材で封止された後、前記樹脂部材の底面に露出す
る前記導電性板部材の他方の面が前記溝に達する深さま
で研磨される。これにより、前記導電性板部材が溝で区
切られる区画ごとに、各電極部材が形成される。In the first manufacturing method according to the present invention, prior to disposing the semiconductor chip and the bonding wire on the conductive plate member, one surface of the conductive plate member on which the semiconductor chip is arranged is A plurality of grooves arranged in a grid pattern for each electrode member are formed, and after the semiconductor chip and the bonding wires are sealed with a resin member on the conductive plate member, exposed on the bottom surface of the resin member. The other surface of the conductive plate member is polished to a depth reaching the groove. As a result, each electrode member is formed in each section where the conductive plate member is divided by the groove.
【０００７】前記導電性板部材の研磨では、該導電性板
部材の前記他方の面のほぼ全域に施される研磨で前記溝
が露出したことを確認した後、この研磨を停止すること
により、研磨が前記樹脂部材に至ることを確実に防止す
ることができることから、この研磨により前記樹脂部材
内の前記半導体チップおよび前記ボンディングワイヤが
損傷を受けることはない。In the polishing of the conductive plate member, after confirming that the groove is exposed by polishing performed on almost the entire other surface of the conductive plate member, the polishing is stopped, Since it is possible to reliably prevent the polishing from reaching the resin member, the semiconductor chip and the bonding wire in the resin member are not damaged by this polishing.
【０００８】従って、本発明に係る研磨を用いた前記第
１の製造方法によれば、高圧ジェット水あるいはレーザ
光を用いた切断装置を用いることなく、半導体装置の製
造で通常用いられる研磨装置を用い、しかも樹脂部材内
の前記半導体チップおよび前記ボンディングワイヤに損
傷を与えることなく、比較的容易に前記各電極部材を形
成することができる。また、本発明に係る前記第１の製
造方法によれば、前記各電極部材が研磨により形成され
ることから、前記樹脂部材の成型時の熱により前記導電
性板部材の前記他方の面に成長した酸化膜が前記した研
磨作業で除去される。従って、各電極部材への端子部材
の半田付けでは、電極部材の研磨面に前記端子部材が固
着されることから、端子部材の半田付けに先立つ電極部
材の酸化膜の除去作業が不要となる。Therefore, according to the first manufacturing method using polishing according to the present invention, a polishing apparatus normally used for manufacturing semiconductor devices can be used without using a cutting device using high-pressure jet water or laser light. It is possible to form each of the electrode members relatively easily without using the semiconductor chip and the bonding wire in the resin member. Further, according to the first manufacturing method of the present invention, since each of the electrode members is formed by polishing, it grows on the other surface of the conductive plate member due to heat during molding of the resin member. The oxide film formed is removed by the polishing operation described above. Therefore, when the terminal member is soldered to each electrode member, since the terminal member is fixed to the polished surface of the electrode member, the work of removing the oxide film of the electrode member prior to the soldering of the terminal member becomes unnecessary.
【０００９】また、前記第１の製造方法により形成され
る前記半導体装置は、集積回路が組み込まれかつ該集積
回路のための複数の接続部が設けられた半導体チップ
と、該半導体チップを封入する樹脂部材と、該樹脂部材
の底面に露出して配置され、対応する前記接続部にそれ
ぞれが電気的に接続された複数の電極部材と、該電極部
材の露出面に接続される端子部材とを備える半導体装置
であって、前記半導体チップの直下に前記電極部材が格
子状に配列されていることを特徴とする。前記端子部材
は、その一部が、前記半導体チップと電気的に接続され
ない電極部材にダミーとして形成することができる。In the semiconductor device formed by the first manufacturing method, a semiconductor chip in which an integrated circuit is incorporated and a plurality of connecting portions for the integrated circuit are provided, and the semiconductor chip is sealed. A resin member, a plurality of electrode members that are exposed on the bottom surface of the resin member and are electrically connected to the corresponding connecting portions, and a terminal member that is connected to the exposed surface of the electrode member. A semiconductor device comprising: the electrode member arranged in a grid just below the semiconductor chip. A part of the terminal member may be formed as a dummy on an electrode member that is not electrically connected to the semiconductor chip.
【００１０】前記各溝の深さは、ほぼ同じ深さに形成す
ることができる。前記各溝は、切削加工により形成する
ことができる。The depth of each groove can be formed to be substantially the same. Each of the grooves can be formed by cutting.
【００１１】前記導電性板部材の研磨は、機械研磨で行
うことができ、この機械研磨に代えて、化学機械研磨で
行うことができる。The polishing of the conductive plate member can be performed by mechanical polishing, and chemical mechanical polishing can be performed instead of this mechanical polishing.
【００１２】さらに、前記導電性板部材の前記一方の面
に、前記格子状に配列される複数の溝の深さ以下の深さ
寸法を有し前記半導体チップを受け入れる凹所を形成す
ることができ、前記導電性板部材の他方の面の研磨で前
記凹所内の前記半導体チップが露出するまで前記研磨を
行うことができる。Further, a recess for receiving the semiconductor chip may be formed on the one surface of the conductive plate member, the recess having a depth dimension equal to or less than the depth of the plurality of grooves arranged in the grid pattern. It is possible to polish the other surface of the conductive plate member until the semiconductor chip in the recess is exposed.
【００１３】本発明に係る前記第１の製造方法によれ
ば、前記樹脂部材の前記底面で前記半導体チップを雰囲
気に露出させることができることから、前記半導体チッ
プから発生する熱を雰囲気に直接的に放出させることが
できる。According to the first manufacturing method of the present invention, since the semiconductor chip can be exposed to the atmosphere on the bottom surface of the resin member, the heat generated from the semiconductor chip is directly exposed to the atmosphere. Can be released.
【００１４】前記凹所は、前記導電性板部材のほぼ中央
部に形成され、前記接続端子は、前記導電性板部材の研
磨後において前記樹脂部材の底面で露出する前記半導体
チップを取り巻いて配置することができる。前記凹所
は、エッチングにより形成することができる。The recess is formed substantially in the center of the conductive plate member, and the connection terminal is arranged around the semiconductor chip exposed on the bottom surface of the resin member after polishing the conductive plate member. can do. The recess can be formed by etching.
【００１５】本発明に係る第２の製造方法は、導電性板
部材の第１の面に溝を形成し、前記溝により互いに区画
される複数の領域を形成する工程と、前記導電性板部材
の前記第１の面上に半導体チップを搭載し、前記半導体
チップ表面に形成された電極と互いに前記溝により区画
されたそれぞれの前記複数の領域とを電気的に接続する
工程と、前記導電性板部材の前記第１の面と、前記半導
体チップとを樹脂封止する工程と、前記導電性板部材を
前記第１の面の反対側の第２の面から前記樹脂が露出す
るまで研磨する工程とを含むことを特徴とする。A second manufacturing method according to the present invention comprises the step of forming a groove on the first surface of the conductive plate member and forming a plurality of regions partitioned from each other by the groove, and the conductive plate member. Mounting a semiconductor chip on the first surface, and electrically connecting the electrodes formed on the surface of the semiconductor chip to the plurality of regions partitioned by the grooves from each other; A step of resin-sealing the first surface of the plate member and the semiconductor chip; and polishing the conductive plate member from the second surface opposite to the first surface until the resin is exposed. And a process.
【００１６】前記溝は、第１の方向に互いに平行に延在
する複数の第１の溝と、前記第１の方向と実質的に直交
する第２の方向に互いに平行に延在する複数の第２の溝
とを含むことを特徴とする。前記溝の深さは、前記導電
性板部材の厚さの１／２以上に形成することができる。
端子部材は、研磨された前記導電性板部材の表面に形成
することができる。The grooves include a plurality of first grooves extending parallel to each other in a first direction and a plurality of grooves extending parallel to each other in a second direction substantially orthogonal to the first direction. And a second groove. The depth of the groove may be ½ or more of the thickness of the conductive plate member.
The terminal member may be formed on the polished surface of the conductive plate member.
【００１７】本発明に係る第３の製造方法は、集積回路
が組み込まれかつ該集積回路のための複数の接続部が設
けられた半導体チップと、該半導体チップを封入する樹
脂部材と、該樹脂部材の底面に露出して配置され、対応
する前記接続部にそれぞれが電気的に接続され、その露
出面に端子部分が設けられる複数の電極部材とを備える
半導体装置の製造方法であって、前記電極部材のための
導電性板部材上に所定の間隔をおいて相互に平行に伸長
しかつ前記導電性板部材の一方の面から他方の面へ貫通
する複数のスリットを形成すること、その後、前記導電
性板部材の前記一方の面上の所定の位置に前記半導体チ
ップを配置し、かつ該半導体チップの前記各接続部と該
接続部に対応する前記導電性板部材の前記スリット間の
部位とを電気的に接続すること、前記チップを封じ込め
るべく前記導電性板部材の前記一方の面を樹脂部材で覆
うこと、前記導電性板部材の前記スリット間の前記各部
位を前記スリットの伸長方向へ分断することにより、分
断された各領域で前記各電極部材を形成することを含む
ことを特徴とする。A third manufacturing method according to the present invention is a semiconductor chip in which an integrated circuit is incorporated and a plurality of connecting portions for the integrated circuit are provided, a resin member encapsulating the semiconductor chip, and the resin. A method for manufacturing a semiconductor device, comprising: a plurality of electrode members that are arranged to be exposed on a bottom surface of a member, are electrically connected to corresponding connection portions, and have a terminal portion provided on an exposed surface thereof. Forming a plurality of slits extending in parallel to each other at a predetermined distance on the conductive plate member for the electrode member and penetrating from one surface of the conductive plate member to the other surface, and thereafter, The semiconductor chip is arranged at a predetermined position on the one surface of the conductive plate member, and a portion between the respective connecting portions of the semiconductor chip and the slits of the conductive plate member corresponding to the connecting portion. And electrically Continuing, by covering the one surface of the conductive plate member with a resin member to contain the chip, by dividing each portion between the slits of the conductive plate member in the extending direction of the slit And forming each of the electrode members in each of the divided regions.
【００１８】本発明に係る前記第３の製造方法では、半
導体チップおよびボンディングワイヤを導電性板部材の
一方の面上に配置するに先立ち、各電極部材のための前
記導電性板部材上に所定の間隔をおいて相互に平行に伸
長し、かつ前記導電性板部材の前記一方の面から他方の
面へ貫通する複数のスリットが形成され、前記導電性板
部材上に前記半導体チップおよび前記ボンディングワイ
ヤが前記樹脂部材で封止された後、前記導電性板部材の
スリット間の領域が前記スリットの伸長方向に分断され
る。これにより、それぞれに分離された前記導電性板部
材の各領域で各電極部材が形成される。In the third manufacturing method according to the present invention, prior to disposing the semiconductor chip and the bonding wire on one surface of the conductive plate member, a predetermined number is provided on the conductive plate member for each electrode member. A plurality of slits extending parallel to each other at intervals and penetrating from the one surface to the other surface of the conductive plate member, the semiconductor chip and the bonding on the conductive plate member. After the wire is sealed with the resin member, the region between the slits of the conductive plate member is divided in the extending direction of the slit. As a result, each electrode member is formed in each region of the conductive plate member that is separated from each other.
【００１９】前記各電極部材のため前記各領域は、前記
したとおり、前記導電性板部材上での前記した樹脂封止
に先立って前記導電性板部材に形成される複数の前記ス
リットと、該各スリット間を分断する前記した樹脂封止
後の分断工程とにより、区画され、これにより前記各電
極部材が形成される。従って、例えば前記導電性板部材
の縦方向に前記スリットを形成しておくことにより、前
記した樹脂封止工程後に、例えば横方向への従来と同様
な切断加工を施すことにより、前記各電極部材を形成す
ることができる。これにより、前記導電性板部材の前記
した縦方向に沿った切断に従来のような切断加工を施す
必要がないことから、前記各電極部材を形成するための
加工工程で、その切断加工によって樹脂封止された前記
半導体チップおよび前記ボンディングワイヤ等が損傷を
受ける確率が半値に低減される。As described above, each region for each electrode member has a plurality of slits formed in the conductive plate member prior to the resin sealing on the conductive plate member. It is divided by the dividing step after the resin sealing, which divides the slits from each other, whereby the electrode members are formed. Therefore, for example, by forming the slits in the vertical direction of the conductive plate member, for example, by performing the same cutting process in the lateral direction as in the conventional method after the resin sealing step, the electrode members are formed. Can be formed. Accordingly, since it is not necessary to perform a conventional cutting process for cutting the conductive plate member along the above-mentioned vertical direction, in the processing process for forming each of the electrode members, the resin is cut by the cutting process. The probability that the sealed semiconductor chip, the bonding wire, and the like will be damaged is reduced to half.
【００２０】従って、本発明に係る前記第３の製造方法
によれば、樹脂封止された前記半導体チップおよび前記
ボンディングワイヤに損傷を与える恐れが従来と比較し
て低減される。Therefore, according to the third manufacturing method of the present invention, the risk of damaging the resin-sealed semiconductor chip and the bonding wire is reduced as compared with the conventional case.
【００２１】前記スリットは、エッチングにより形成す
ることができる。前記スリットは、打抜きプレス加工に
より形成することができる。前記各電極部材を形成する
ための前記した分断は、切削加工により行うことができ
る。前記各電極部材を形成するための前記した分断は、
穿孔により行うことができる。前記した穿孔は、ドリル
またはレーザーを用いて行うことができる。The slits can be formed by etching. The slit can be formed by punching press processing. The above-mentioned division for forming each of the electrode members can be performed by cutting. The above-mentioned division for forming each of the electrode members,
It can be done by perforation. The above-mentioned perforation can be performed using a drill or a laser.
【００２２】前記各スリットの幅寸法は、前記導電性板
部材の板厚方向に沿って前記一方の面から前記他方の面
に向けて漸増させることができる。前記スリットのそれ
ぞれに、該各スリットの伸長方向へ所定の間隔をおいて
それぞれが隣り合う前記スリットに向けて互いに相近づ
く方向へ伸長する伸長部を形成することができる。対向
する各伸長部は、それらの伸長端が相互に間隔をおくよ
うに伸長する。前記各スリットのうちの互いに隣り合う
１対のスリットの向かい合う縁部に、それらの互いに対
応する位置で前記縁部に沿って所定の間隔をおいて形成
される複数の直線部分と、該各直線部分間で該直線部分
に連続する凹状曲線部分とを形成することができる。The width dimension of each slit can be gradually increased from the one surface to the other surface along the plate thickness direction of the conductive plate member. Each of the slits may be formed with an extension portion that extends in a direction in which the slits are adjacent to each other at a predetermined interval in the extension direction of the slits so as to extend toward each other. Each opposing extension extends so that its extension ends are spaced from each other. A plurality of straight line portions formed at predetermined positions along the edge portions at mutually facing positions of a pair of mutually adjacent slits of the respective slits; A concave curved portion continuous with the straight portion can be formed between the portions.
【００２３】前記導電性板部材の前記他方の面に、該導
電性板部材への前記半導体チップの配置に先立ち、前記
したスリット間に、該スリットと平行に伸長する凹溝を
形成し、前記した分断による前記電極部材の形成後、前
記端子部分を形成するための端子部材を前記各凹溝の部
分に結合することができる。前記凹溝は、プレス加工に
より前記導電性板部材に形成される変形部であって前記
スリットに沿って伸長する変形部により形成することが
でき、この場合、前記凹溝は前記導電性板部材の前記他
方の面に規定される凹面で構成される。前記凹溝の幅寸
法は、該溝の底面からの距離の増大に伴い増大させるこ
とができる。前記変形部により、前記導電性板部材の前
記一方の面に、前記凹溝に対応した凸面を形成すること
ができる。On the other surface of the conductive plate member, prior to the arrangement of the semiconductor chip on the conductive plate member, a groove extending parallel to the slit is formed between the slits. After the formation of the electrode member by the above-mentioned division, a terminal member for forming the terminal portion can be coupled to each of the concave groove portions. The groove may be a deformed portion formed on the conductive plate member by press working and extending along the slit, and in this case, the groove may be the conductive plate member. It is composed of a concave surface defined on the other surface. The width dimension of the groove can be increased as the distance from the bottom surface of the groove increases. By the deforming portion, a convex surface corresponding to the concave groove can be formed on the one surface of the conductive plate member.
【００２４】前記導電性板部材には、該導電性板部材へ
の前記半導体チップの配置に先立ち、プレス加工によ
り、前記したスリット間に該スリットと平行に伸長する
変形部を形成することができる。この変形部は、前記他
方の面に凸面を規定する。前記凸面は、その頂部へ向け
てその幅寸法を漸減させる台形の断面形状とすることが
できる。Before the disposition of the semiconductor chip on the conductive plate member, a deformed portion extending between the slits and extending in parallel with the slits can be formed on the conductive plate member by press working. . The deforming portion defines a convex surface on the other surface. The convex surface may have a trapezoidal cross-sectional shape whose width dimension is gradually reduced toward its top.
【００２５】[0025]
【発明の実施の形態】以下、本発明を図示の実施の形態
について説明する。
〈具体例１〉図１（ａ）〜図１（ｃ）は、本発明に係る
半導体装置１０の製造工程を示す。図１（ａ）〜図１
（ｃ）は、例えばＢＧＡのような格子状にエリア配列さ
れる接続端子を備える前記半導体装置１０の製造工程が
示されている。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below with reference to the illustrated embodiments. <Specific Example 1> FIGS. 1A to 1C show a manufacturing process of a semiconductor device 10 according to the present invention. 1A to 1
(C) shows a manufacturing process of the semiconductor device 10 including connection terminals arranged in a lattice pattern such as BGA.
【００２６】図１（ａ）に示されているように、例えば
３００μｍの厚さ寸法を有する銅を主成分とする合金、
または鉄とニッケルとで形成される４２合金のような導
電性板部材１１の一方の面上に配置された半導体チップ
１２と、該半導体チップ１２の接続部１３から伸びるボ
ンディングワイヤ１４とが、従来よく知られたトランス
ファ成型などの方法により形成される樹脂部材１５によ
り封止されている。半導体チップ１２は、従来よく知ら
れているように、集積回路が組み込まれた半導体結晶基
板からなり、前記結晶基板には、前記集積回路のための
入出力端子となる接続部１３が設けられ、前記ボンディ
ングワイヤ１４の各一端は、対応する接続端部に接続さ
れている。As shown in FIG. 1A, an alloy containing copper as a main component, for example, having a thickness dimension of 300 μm,
Alternatively, a semiconductor chip 12 arranged on one surface of a conductive plate member 11 such as a 42 alloy formed of iron and nickel and a bonding wire 14 extending from a connecting portion 13 of the semiconductor chip 12 are conventionally used. It is sealed by a resin member 15 formed by a well-known method such as transfer molding. As is well known in the art, the semiconductor chip 12 is composed of a semiconductor crystal substrate in which an integrated circuit is incorporated, and the crystal substrate is provided with a connecting portion 13 serving as an input / output terminal for the integrated circuit. Each one end of the bonding wire 14 is connected to a corresponding connection end.
【００２７】前記導電性板部材１１の前記一方の面に
は、図２に示されているように、例えばソーカットのよ
うな切削手段を用いて複数の溝１６が、格子状に伸びる
ように、所定の深さ寸法で形成されている。前記溝１６
により、格子状にエリア配列される電極部材のための各
エリア１７ａが区画されている。前記溝１６は、所定の
方向に互いに平行に形成する第１の溝と、前記第１の溝
に直交する第２の溝とにより形成されている。前記溝１
６の深さ寸法は、前記導電性板部材１１の厚さ寸法の１
／２以上とすることが望ましく、図示の例では、前記各
溝１６は、ほぼ均等な深さ寸法を有し例えば２００μｍ
の深さ寸法で形成されている。前記溝１６は、前記した
ソーカットを用いた切削加工に代えて、例えばエッチン
グのような手段を用いて適宜形成することができる。As shown in FIG. 2, a plurality of grooves 16 are formed on the one surface of the conductive plate member 11 using a cutting means such as saw cut so as to extend in a lattice pattern. It is formed with a predetermined depth dimension. The groove 16
Thus, each area 17a for the electrode members arranged in a grid pattern is partitioned. The groove 16 is formed by a first groove formed in parallel to each other in a predetermined direction and a second groove orthogonal to the first groove. The groove 1
The depth dimension of 6 is 1 of the thickness dimension of the conductive plate member 11.
/ 2 or more, and in the illustrated example, each of the grooves 16 has a substantially uniform depth dimension, for example, 200 μm.
Is formed with a depth dimension of. The groove 16 can be appropriately formed by using, for example, a method such as etching, instead of the cutting process using saw cutting described above.
【００２８】図３に示されているように、前記溝１６に
より、格子状に配列されたエリア１７ａの中央部には、
前記半導体チップ１２が配置されかつ固定されている。
各エリア１７ａのうち、前記中央部に位置するエリア１
７ａの周辺に配置されるエリアであって、前記半導体チ
ップ１２の接続部１３に対応するエリア１７ａには、前
記接続部１３から伸びる前記ボンディングワイヤ１４の
先端が接続されている。As shown in FIG. 3, due to the grooves 16, the central portions of the areas 17a arranged in a grid pattern are
The semiconductor chip 12 is arranged and fixed.
Area 1 located in the central part of each area 17a
The tip of the bonding wire 14 extending from the connecting portion 13 is connected to an area 17a which is arranged around the peripheral portion 7a and corresponds to the connecting portion 13 of the semiconductor chip 12.
【００２９】図１（ａ）に示したように前記導電性板部
材１１上で前記半導体チップ１２およびボンディングワ
イヤ１４を前記樹脂部材１５で封止した後、図１（ｂ）
に示されているように、前記導電性板部材１１の前記樹
脂部材１５から露出した他方の面が例えば研磨される。
この研磨により、前記樹脂部材１５の成型時の熱で前記
導電性板部材１１の前記他方の面に成長した酸化膜が除
去される。前記導電性板部材１１は、前記樹脂部材１５
の底面から露出する前記導電性板部材１１の他方の面か
ら、格子状に配列される複数の溝が露出するまで、例え
ば機械研磨または化学機械研磨などにより、図示の例で
は、１００μｍの厚さ寸法分が研磨される。これによ
り、前記導電性板部材１１に形成された前記電極部材の
ためのエリア１７ａは電気的に分離されて、各電極部材
１７が形成される。As shown in FIG. 1A, after the semiconductor chip 12 and the bonding wire 14 are sealed with the resin member 15 on the conductive plate member 11, the semiconductor chip 12 and the bonding wire 14 are sealed.
As shown in FIG. 3, the other surface of the conductive plate member 11 exposed from the resin member 15 is polished, for example.
By this polishing, the oxide film grown on the other surface of the conductive plate member 11 due to the heat when the resin member 15 is molded is removed. The conductive plate member 11 has the resin member 15
From the other surface of the conductive plate member 11 exposed from the bottom surface of the conductive plate member 11 to a plurality of grooves arranged in a grid pattern by, for example, mechanical polishing or chemical mechanical polishing. The size is ground. As a result, the areas 17a for the electrode members formed on the conductive plate member 11 are electrically separated to form the electrode members 17.
【００３０】前記研磨は、前記導電性板部材１１の格子
状に配列した複数の溝が露出したことを確認した後、停
止する。すなわち、前記した研磨は、前記樹脂部材１５
に達するまで２００μｍの深さ寸法の余裕を残して停止
する。この研磨の停止により、前記樹脂部材１５に研磨
が至ることを確実に防止することができることから、前
記樹脂部材１５に覆われる前記半導体チップ１２および
前記ボンディングワイヤ１４は、損傷を受けることはな
い。The polishing is stopped after confirming that a plurality of grooves arranged in a grid pattern on the conductive plate member 11 are exposed. That is, the above-mentioned polishing is performed by the resin member 15
Stop until there is a margin of depth of 200 μm. By stopping the polishing, it is possible to reliably prevent the resin member 15 from being polished, so that the semiconductor chip 12 and the bonding wire 14 covered with the resin member 15 are not damaged.
【００３１】前記導電性板部材１１の他方の面から前記
溝に達する深さまで研磨することに代えて、例えばソー
カットのような切削装置を用いて前記各電極部材１７を
形成することが考えられる。すなわち、前記導電性板部
材１１の一方の面に形成した前記溝１６に対応する部位
から、前記溝１６に達するまで新たな溝を形成すること
により、各電極部材１７を形成することができる。しか
しながら、切削位置が前記一方の面に形成した溝の位置
からずれると、切削により半導体チップ１２およびボン
ディングワイヤ１４に損傷を与える恐れがある。Instead of polishing from the other surface of the conductive plate member 11 to the depth reaching the groove, it is possible to form each of the electrode members 17 by using a cutting device such as saw cutting. That is, each electrode member 17 can be formed by forming a new groove from a portion corresponding to the groove 16 formed on one surface of the conductive plate member 11 until reaching the groove 16. However, if the cutting position deviates from the position of the groove formed on the one surface, the cutting may damage the semiconductor chip 12 and the bonding wire 14.
【００３２】これに対し、本発明に係る前記研磨手段に
よれば、前記導電性板部材１１の他方の面がほぼ均等に
研磨されて、前記溝１６の露出が確認されて研磨が終了
されることにより、ほぼ溝の深さ寸法の余裕を残して前
記各電極部材のためのエリア１７ａが電気的に分離され
て各電極部材１７が形成される。従って、本発明では、
前記樹脂部材１５に覆われる前記半導体チップ１２およ
び前記ボンディングワイヤ１４は、損傷を与えることな
く、各電極部材１７が形成される。On the other hand, according to the polishing means of the present invention, the other surface of the conductive plate member 11 is polished substantially evenly, the exposure of the groove 16 is confirmed, and the polishing is completed. As a result, the areas 17a for the electrode members are electrically separated from each other, leaving a margin for the depth of the groove, so that the electrode members 17 are formed. Therefore, in the present invention,
The electrode members 17 are formed on the semiconductor chip 12 and the bonding wires 14 covered with the resin member 15 without damaging them.
【００３３】前記各電極部材１７の形成後、図１（ｃ）
に示されているように、従来よく知られている半田スク
リーン印刷などの方法により、前記各電極部材１７の形
成時に研磨を受けた接合面１７ｂに、端子部材として例
えば半田ペーストからなる結合層１８が形成される。必
要に応じて、前記半導体チップ１２と電気的に接合され
ない前記電極部材１７に、前記端子部材１８がダミーと
して形成される。After forming each of the electrode members 17, as shown in FIG.
As shown in FIG. 1, a bonding layer 18 made of, for example, a solder paste is used as a terminal member on the bonding surface 17b that has been polished when the electrode members 17 are formed by a well-known method such as solder screen printing. Is formed. If necessary, the terminal member 18 is formed as a dummy on the electrode member 17 that is not electrically joined to the semiconductor chip 12.
【００３４】前記端子部材が形成される前記電極部材の
接合面１７ｂは、前記したように、前記各電極部材１７
が形成される際の研磨により、前記樹脂部材１５の形成
時の熱で成長した酸化膜が事前に除去されることから、
酸化膜を除去する工程を必要とすることなく、前記端子
部材１８は、前記電極部材の接合面１７ｂに結合するこ
とができる。また、必要に応じて、図４に示されている
ように、前記結合層１８に代えて、例えば導電性を示す
樹脂または半田などからなる球状のボール１９が、従来
よく知られたフラックスを用いて前記電極部材１７の接
合面１７ｂに結合される。As described above, the joint surface 17b of the electrode member on which the terminal member is formed is the same as the electrode member 17 described above.
Since the oxide film grown by the heat at the time of forming the resin member 15 is removed in advance by polishing when the resin member 15 is formed,
The terminal member 18 can be bonded to the bonding surface 17b of the electrode member without requiring the step of removing the oxide film. If necessary, as shown in FIG. 4, instead of the bonding layer 18, a spherical ball 19 made of, for example, a conductive resin or solder is formed by using a well-known flux. And is joined to the joint surface 17b of the electrode member 17.
【００３５】本発明に係る前記した製造方法によれば、
前記導電性板部材１１の一方の面に複数の溝１６で前記
各電極部材のためのエリア１７ａが形成された後、前記
一方の面上に前記半導体チップ１２および前記ボンディ
ングワイヤ１４が配置されて、前記樹脂部材１５により
封止された後、前記樹脂部材１５の底面に露出する前記
導電性板部材１１の他方の面が、該面から溝が露出する
まで研磨される。前記した研磨により、前記樹脂部材１
５に達することなく、前記導電性板部材１１に形成され
た前記各電極部材のためのエリア１７ａは電気的に分離
されて、前記各電極部材１７が形成されることから、前
記樹脂部材１５に覆われた前記半導体チップ１２および
前記ボンディングワイヤ１４に損傷を与えることなく前
記各電極部材１７が形成されて、該電極部材１７の接合
面１７ｂに前記端子部材１８または１９が結合される前
記半導体装置１０を形成することができる。According to the above-mentioned manufacturing method of the present invention,
Areas 17a for the electrode members are formed by a plurality of grooves 16 on one surface of the conductive plate member 11, and then the semiconductor chip 12 and the bonding wire 14 are arranged on the one surface. After being sealed with the resin member 15, the other surface of the conductive plate member 11 exposed on the bottom surface of the resin member 15 is polished until the groove is exposed from the surface. By the above-mentioned polishing, the resin member 1
5, the area 17a for each electrode member formed on the conductive plate member 11 is electrically separated and each electrode member 17 is formed. The semiconductor device in which the electrode members 17 are formed without damaging the covered semiconductor chip 12 and the bonding wires 14, and the terminal members 18 or 19 are coupled to the joint surface 17b of the electrode members 17. 10 can be formed.
【００３６】更に、本発明に係る前記した製造方法によ
れば、前記電極部材１７の接合面１７ｂは、前記各電極
部材１７が形成される際の研磨により、前記樹脂部材１
５の形成時の熱で成長した酸化膜が予め除去されること
から、酸化膜を除去するための格別な工程を必要とする
ことなく前記接合面１７ｂに前記端子部材が結合される
前記半導体装置１０を形成することができる。Furthermore, according to the above-described manufacturing method of the present invention, the bonding surface 17b of the electrode member 17 is polished by the electrode member 17 when the resin member 1 is formed.
Since the oxide film grown by the heat at the time of forming 5 is removed in advance, the semiconductor device in which the terminal member is bonded to the bonding surface 17b without requiring a special step for removing the oxide film. 10 can be formed.
【００３７】〈具体例２〉図１（ａ）〜図１（ｃ）に示
した具体例１では、樹脂部材１５に覆われる半導体チッ
プ１２の底面に各電極部材１７が形成される半導体装置
１０の製造方法の例を示した。次に、図５（ａ）〜図５
（ｃ）に示すように、前記樹脂部材１５により覆われる
前記半導体チップ１２の底面が雰囲気に露出される半導
体装置１０の他の製造方法を示す。<Specific Example 2> In the specific example 1 shown in FIGS. 1A to 1C, the semiconductor device 10 in which the electrode members 17 are formed on the bottom surface of the semiconductor chip 12 covered with the resin member 15. The example of the manufacturing method of was shown. Next, FIG. 5A to FIG.
Another method of manufacturing the semiconductor device 10 in which the bottom surface of the semiconductor chip 12 covered with the resin member 15 is exposed to the atmosphere as shown in FIG.
【００３８】前記半導体チップ１２が配置される前記導
電性板部材１１の一方の面の所定の位置に凹所が形成さ
れること、前記導電性板部材１１の他方の面から前記凹
所内の前記半導体チップ１２が露出するまで研磨される
こと以外は、具体例１とほぼ同じである。図５（ａ）に
示されているように、前記したと同様に前記導電性板部
材１１の一方の面上に配置された半導体チップ１２と、
該半導体チップ１２の端子部材１３から伸びるボンディ
ングワイヤ１４とが、樹脂部材１５により封止されてい
る。A recess is formed at a predetermined position on one surface of the conductive plate member 11 on which the semiconductor chip 12 is arranged, and the recess in the recess is formed from the other surface of the conductive plate member 11. The procedure is substantially the same as in Example 1 except that the semiconductor chip 12 is polished until it is exposed. As shown in FIG. 5A, the semiconductor chip 12 arranged on one surface of the conductive plate member 11 as described above,
A bonding wire 14 extending from the terminal member 13 of the semiconductor chip 12 is sealed with a resin member 15.
【００３９】前記導電性板部材１１の前記一方の面に
は、図６に示されているように、格子状に形成される複
数の溝１６により、各電極部材のためのエリア１７ａが
形成されるが、前記導電性板部材１１のほぼ中央に位置
する部位には、前記半導体チップ１２を受け入れる凹所
２００が、従来よく知られているエッチングなどの方法
により、前記複数の溝１６とほぼ同じ深さ寸法になるよ
うに形成される。As shown in FIG. 6, an area 17a for each electrode member is formed on the one surface of the conductive plate member 11 by a plurality of grooves 16 formed in a grid pattern, as shown in FIG. However, a recess 200 for receiving the semiconductor chip 12 is formed at a position substantially in the center of the conductive plate member 11 and is substantially the same as the plurality of grooves 16 by a well-known method such as etching. It is formed to have a depth dimension.
【００４０】前記複数の溝１６および凹所２００が形成
された前記導電性板部材の一方の面には、図７に示され
ているように、前記凹所２００内に前記半導体チップ１
２が、配置されかつ固定され、前記した具体例１と同様
に前記接続部１３は、対応する前記各電極部材のための
エリア１７ａにボンディングワイヤ１４を介して接続さ
れる。As shown in FIG. 7, on one surface of the conductive plate member on which the plurality of grooves 16 and the recess 200 are formed, the semiconductor chip 1 is formed in the recess 200.
2 are arranged and fixed, and the connection portion 13 is connected to the corresponding area 17a for each electrode member via the bonding wire 14 as in the case of the above-described specific example 1.
【００４１】図５（ａ）に示したように前記導電性板部
材１１上で前記半導体チップ１２および前記ボンディン
グワイヤ１４が前記樹脂部材１５で封止された後、図５
（ｂ）に示されているように、前記した具体例１と同様
に、前記樹脂部材１５から露出した前記導電性板部材１
１の他方の面は、該面から前記複数の溝１６が露出する
まで研磨される。これにより、溝とほぼ同じ深さレベル
に底面を一致させて配置された前記半導体チップ１２
は、雰囲気に露出されて、更に、前記導電性板部材１１
に形成された前記電極部材のためのエリア１７ａは電気
的に分離されて各電極部材１７が形成される。After the semiconductor chip 12 and the bonding wire 14 are sealed with the resin member 15 on the conductive plate member 11 as shown in FIG.
As shown in (b), the conductive plate member 1 exposed from the resin member 15 is the same as in the specific example 1 described above.
The other surface of 1 is polished until the plurality of grooves 16 are exposed from the surface. As a result, the semiconductor chip 12 is arranged with the bottom surface aligned at substantially the same depth level as the groove.
Is exposed to the atmosphere, and further, the conductive plate member 11 is
The area 17a for the electrode members formed in the above is electrically separated to form each electrode member 17.
【００４２】前記各電極部材１７を形成するための前記
した研磨は、前記した具体例１と同様に、溝が露出した
ことを確認した後、停止される。従って、具体例１にお
けると同様に、前記した研磨が前記樹脂部材１５に至る
ことを確実に防止されることから、前記樹脂部材１５に
覆われる前記半導体チップ１２および前記ボンディング
ワイヤ１４に損傷を与えることなく前記各電極部材１７
を形成することができる。更に、前記したと同様に、こ
の研磨により、前記樹脂部材１５の成型時の熱による前
記導電性板部材１１の他方の面に成長した酸化膜が除去
されることから、具体例１におけると同様に、端子部材
１８または１９の半田結合に適した接合面１７ｂを形成
することができる。The above-mentioned polishing for forming each electrode member 17 is stopped after confirming that the groove is exposed, as in the case of the above-described first specific example. Therefore, as in the first specific example, the polishing is surely prevented from reaching the resin member 15, so that the semiconductor chip 12 and the bonding wire 14 covered with the resin member 15 are damaged. Without the electrode members 17
Can be formed. Further, similarly to the above, since the polishing removes the oxide film grown on the other surface of the conductive plate member 11 due to the heat at the time of molding the resin member 15, the same as in Specific Example 1 In addition, a joint surface 17b suitable for soldering the terminal member 18 or 19 can be formed.
【００４３】前記各電極部材１７が形成された後、図５
（ｃ）に示されているように、前記電極部材１７の研磨
を受けた接合面１７ｂに端子部材として結合層１８が形
成される。前記各電極部材１７が形成される際の研磨に
より、酸化膜が除去されて、半田の溶融に適する接合面
１７ｂが形成されることから、酸化膜を除去するための
格別な工程を必要とすることなく、前記接合面１７ｂに
前記端子部材を結合することができる。また、必要に応
じて、図８に示されているように、前記結合層１８など
の端子部材に代えて、例えば導電性を示す樹脂または半
田などの球状のボール１９が、従来よく知られた方法に
より、前記各電極部材１７の接合面１７ｂに結合され
る。After the respective electrode members 17 are formed, as shown in FIG.
As shown in (c), the bonding layer 18 is formed as a terminal member on the polished bonding surface 17b of the electrode member 17. The oxide film is removed by polishing when the electrode members 17 are formed, and the bonding surface 17b suitable for melting the solder is formed. Therefore, a special step for removing the oxide film is required. The terminal member can be joined to the joint surface 17b without the need. In addition, as shown in FIG. 8, a spherical ball 19 made of, for example, a conductive resin or solder, which is electrically conductive, is well known in the art, instead of the terminal member such as the coupling layer 18, as shown in FIG. By the method, it is combined with the joint surface 17b of each electrode member 17.
【００４４】前記した具体例２では、前記導電性板部材
の一方の面に形成する前記溝１６の深さ寸法と、前記半
導体チップ１２を配置する凹所２００の深さ寸法とをほ
ぼ同じ深さ寸法に形成して、前記各電極部材１７を形成
する方法を述べた。これに代えて、前記凹所の深さ寸法
を前記複数の溝１６の深さ寸法よりも小さくすることが
できる。その際の研磨作業では、前記した溝１６が露出
した後、引き続く研磨作業により、前記凹所２００が露
出する。この凹所２００の露出により、該凹所内で半導
体チップ１２の底面が露出していることを確認した後、
研磨が停止される。この研磨の停止では、前記凹所２０
０の深さ寸法よりも深い溝１６の存在により、既に各電
極部材１７が電気的に分離されていることから、前記し
たと同様に前記樹脂部材１５内の各部材１２および１４
に損傷を与えることなく前記各電極部材１７を形成する
ことができる。In the specific example 2 described above, the depth dimension of the groove 16 formed on one surface of the conductive plate member and the depth dimension of the recess 200 in which the semiconductor chip 12 is disposed are substantially the same. A method of forming each electrode member 17 by forming the electrode member 17 in the dimension is described. Alternatively, the depth dimension of the recess may be smaller than the depth dimension of the plurality of grooves 16. In the polishing operation at that time, after the groove 16 is exposed, the recess 200 is exposed by the subsequent polishing operation. After confirming that the bottom surface of the semiconductor chip 12 is exposed in the recess due to the exposure of the recess 200,
Polishing is stopped. When the polishing is stopped, the recess 20
Since the electrode members 17 are already electrically separated by the existence of the groove 16 deeper than the depth dimension of 0, the members 12 and 14 in the resin member 15 are similar to the above, as described above.
The electrode members 17 can be formed without damaging the electrode members 17.
【００４５】従って、本発明に係る具体例２の製造方法
によれば、具体例１におけると同様な研磨により、前記
電極部材１７が形成されることから、前記樹脂部材１５
に覆われた前記半導体チップ１２および前記ボンディン
グワイヤ１４に損傷を与えることなく格子状にエリア配
列される前記各電極部材１７に端子部材１８または１９
が結合された接続端子を備える前記半導体装置１０を形
成することができる。Therefore, according to the manufacturing method of Example 2 of the present invention, the electrode member 17 is formed by the same polishing as in Example 1, so that the resin member 15 is formed.
The semiconductor chip 12 and the bonding wire 14 covered with the electrodes are connected to the electrode members 17 arranged in a grid pattern without damaging the terminal members 18 or 19
It is possible to form the semiconductor device 10 including a connection terminal to which the above are coupled.
【００４６】また、前記各電極部材１７が形成される際
の研磨により、前記電極部材１７の接合面１７ｂは、前
記樹脂部材１５の形成時の熱で成長した酸化膜が予め除
去されることから、酸化膜を除去するための格別な工程
を必要とすることなく前記接合面１７ｂに前記端子部材
が結合される前記半導体装置１０を形成することができ
る。更に、前記した製造方法により形成される前記半導
体装置１０は、樹脂部材に覆われる前記半導体チップ１
２の底面が雰囲気に露出されることから、前記半導体チ
ップが発生する熱を直接的に雰囲気に放出することがで
きる。Further, since the bonding surface 17b of the electrode member 17 is previously removed with the oxide film grown by the heat at the time of forming the resin member 15 by polishing when the electrode members 17 are formed. It is possible to form the semiconductor device 10 in which the terminal member is coupled to the joint surface 17b without requiring a special process for removing the oxide film. Further, the semiconductor device 10 formed by the above-described manufacturing method has the semiconductor chip 1 covered with a resin member.
Since the bottom surface of 2 is exposed to the atmosphere, the heat generated by the semiconductor chip can be directly released to the atmosphere.
【００４７】〈具体例３〉図９〜図１３は、本発明に係
る具体例３の製造工程を示す。具体例３の方法では、導
電性板部材に例えば縦および横の二方向に溝を形成した
前記した具体例１および具体例２とは異なり、導電性板
部材１１に互いに平行に一方向に伸長する複数のスリッ
ト２０が形成される。<Embodiment 3> FIGS. 9 to 13 show manufacturing steps of Embodiment 3 according to the present invention. In the method of Specific Example 3, unlike the specific example 1 and the specific example 2 in which the grooves are formed in the conductive plate member in two directions, for example, in the vertical and horizontal directions, the conductive plate member 11 is extended in one direction in parallel with each other. A plurality of slits 20 are formed.
【００４８】図９に示されているように、例えば１００
μｍの厚さ寸法を有する前記導電性板部材１１に、例え
ば該板部材１１の縦方向に沿って、所定の間隔をおいて
相互に平行に伸長するスリット２０が形成される。各ス
リット２０は、前記導電性板部材の一方の面から他方の
面に貫通する。スリット２０は、例えばソーカットのよ
うな切削加工、打抜きプレス加工およびエッチングなど
により形成することができる。具体例３に示す例では、
各スリット２０の縁部は、後述する図１３に示されてい
るように、直立縁部である。As shown in FIG. 9, for example, 100
The conductive plate member 11 having a thickness of μm is provided with slits 20 extending in parallel with each other at a predetermined interval along the longitudinal direction of the plate member 11, for example. Each slit 20 penetrates from one surface of the conductive plate member to the other surface. The slit 20 can be formed by, for example, cutting such as saw cutting, punching press working, etching and the like. In the example shown in specific example 3,
The edge of each slit 20 is an upright edge, as shown in FIG. 13 described later.
【００４９】図１０に示されているように、前記スリッ
ト２０が形成された前記導電性板部材１１の一方の面上
の所定位置である中央部に、前記したと同様な各接続部
１３が設けられた半導体チップ１２が配置され、かつ従
来よく知られた方法により固定される。前記各接続部１
３は、該接続部１３に対応する前記導電性板部材１１の
前記スリット間の各部位にボンディングワイヤ１４を介
して電気的に接続される。As shown in FIG. 10, in the central portion which is a predetermined position on one surface of the conductive plate member 11 in which the slit 20 is formed, the respective connecting portions 13 similar to those described above are provided. The provided semiconductor chip 12 is arranged and fixed by a conventionally well-known method. Each connection part 1
3 is electrically connected to each part between the slits of the conductive plate member 11 corresponding to the connecting portion 13 via a bonding wire 14.
【００５０】図１１に示されているように、前記したと
同様に前記導電性板部材１１の一方の面上に配置された
前記半導体チップ１２と、該チップ１２の前記各端子部
材１３から伸びるボンディングワイヤ１４とが樹脂部材
１５により封止される。As shown in FIG. 11, the semiconductor chip 12 arranged on one surface of the conductive plate member 11 and the respective terminal members 13 of the chip 12 are extended as described above. The bonding wire 14 and the resin member 15 are sealed.
【００５１】前記樹脂部材１５による封止後、前記導電
性板部材１１の他方の面には、図１２に示されているよ
うに、前記導電性板部材１１の横方向すなわちスリット
２０を横切る方向に沿って、例えばソーカットなどの切
削手段により複数の分断溝２１が相互に平行に形成され
る。各分断溝２１は、前記導電性板部材の前記一方の面
に達することにより、前記導電性板部材１１の前記スリ
ット２０間の前記した各部位を前記スリット２０の伸長
方向に分断する。前記導電性板部材１１の縦方向に沿っ
て形成された複数の前記スリット２０と、前記導電性板
部材の横方向に沿って形成された複数の前記分断溝２１
との共同により、前記スリット２０および前記分断溝２
１により囲まれた前記導電性板部材１１の各領域で各電
極部材１７が形成される。After sealing with the resin member 15, the other surface of the conductive plate member 11 is, as shown in FIG. 12, a lateral direction of the conductive plate member 11, that is, a direction crossing the slit 20. A plurality of dividing grooves 21 are formed in parallel with each other by cutting means such as saw cutting. Each of the dividing grooves 21 reaches the one surface of the conductive plate member, and thereby divides each of the portions between the slits 20 of the conductive plate member 11 in the extending direction of the slit 20. The plurality of slits 20 formed along the vertical direction of the conductive plate member 11 and the plurality of dividing grooves 21 formed along the horizontal direction of the conductive plate member 11.
In cooperation with the slit 20 and the dividing groove 2
Each electrode member 17 is formed in each region of the conductive plate member 11 surrounded by 1.
【００５２】各電極部材１７には、図１３に示されてい
るように、例えば導電性を示す樹脂または半田などから
なる結合層１８が従来よく知られた方法により、前記電
極部材１７の接合面１７ｂに結合される。As shown in FIG. 13, a bonding layer 18 made of, for example, a conductive resin or solder is attached to each electrode member 17 by a well-known method. 17b.
【００５３】前記した具体例３の製造方法では、前記し
た樹脂封止に先立ち、前記スリット２０が前記導電性板
部材１１に該部材の縦方向に沿って形成されることによ
り、前記樹脂封止後に、前記導電性板部材１１から各電
極部材１７を形成するために、従来のような前記導電性
板部材の縦方向および横方向に沿って分断加工を行う必
要が無い。すなわち、前記した樹脂封止後、前記導電性
板部材１１に該部材の横方向に沿って分断加工を行うこ
とにより、前記導電性板部材１１が前記各電極部材１７
に分断される。In the manufacturing method of the above-mentioned concrete example 3, prior to the resin sealing, the slit 20 is formed in the conductive plate member 11 along the longitudinal direction of the member, so that the resin sealing is performed. After that, in order to form each electrode member 17 from the conductive plate member 11, it is not necessary to perform a cutting process along the vertical direction and the horizontal direction of the conductive plate member as in the conventional case. That is, after the above-mentioned resin sealing, the conductive plate member 11 is divided along the lateral direction of the member, so that the conductive plate member 11 is separated from each of the electrode members 17.
Divided into.
【００５４】前記分断のための溝２１は、前記したソー
カットを用いた切削加工に代えて、例えばエッチング、
後述するドリル穿孔のような他の手段を用いて適宜形成
することができる。The groove 21 for dividing is, for example, etched, instead of the cutting process using saw cut described above.
It can be appropriately formed by using other means such as drilling described later.
【００５５】前記各電極部材１７の形成後、前記樹脂部
材１５の底面から露出する前記各電極部材１７の接合面
１７ｂに結合層１８を設けることに代えて、図１４に示
されているように、端子部分として球状のボール１９を
形成することができる。After forming each electrode member 17, instead of providing the bonding layer 18 on the joint surface 17b of each electrode member 17 exposed from the bottom surface of the resin member 15, as shown in FIG. A spherical ball 19 can be formed as the terminal portion.
【００５６】本発明に係る具体例３の製造方法によれ
ば、前記した樹脂封止に先立って前記導電性板部材１１
に該部材の縦方向に沿って前記した複数のスリット２０
が形成される。前記した樹脂封止後に、前記導電性板部
材１１に該部材の横方向に沿って前記した複数の分断の
ための溝２１が形成されることにより、前記スリット２
０および前記分断のための溝２１で囲まれた前記導電性
板部材１１の各領域で各電極部材１７が形成される。そ
のため、前記樹脂部材１５で前記半導体チップ１２およ
び前記ボンディングワイヤ１４などの各部材を封止後
に、前記導電性板部材１１の縦方向および横方向に分断
加工を施す従来技術に比較して、封止された前記各部材
が、分断加工により損傷を受ける確率を半値に低減する
ことができることから、それらが分断加工により損傷を
受ける恐れが低減される。According to the manufacturing method of Example 3 of the present invention, the conductive plate member 11 is formed prior to the resin sealing described above.
The plurality of slits 20 along the longitudinal direction of the member.
Is formed. After the resin sealing, the slits 2 are formed in the conductive plate member 11 by forming the plurality of dividing grooves 21 in the lateral direction of the member.
Each electrode member 17 is formed in each region of the conductive plate member 11 surrounded by 0 and the groove 21 for dividing. Therefore, as compared with the conventional technique in which the semiconductor chip 12 and the bonding wires 14 are sealed with the resin member 15 and then the conductive plate member 11 is divided in the vertical direction and the horizontal direction, sealing is performed. Since the probability that each of the stopped members is damaged by the cutting process can be reduced to half, the risk that they will be damaged by the cutting process is reduced.
【００５７】〈具体例４〉図１５〜図１８は、本発明に
係る具体例４の製造工程を示す。具体例４は、前記スリ
ット２０の形成工程以外の工程は具体例３と同じであ
る。<Fourth Embodiment> FIGS. 15 to 18 show a manufacturing process of a fourth embodiment according to the present invention. The specific example 4 is the same as the specific example 3 except for the step of forming the slit 20.
【００５８】図１５に示されているように、例えば１０
０μｍの厚さ寸法を有する導電性板部材１１に、例えば
該板部材１１の縦方向に沿って、所定の間隔をおいて相
互に平行に伸長するスリット２２が形成される。前記各
スリット２２は、具体例３におけると同様に、半導体チ
ップ１２が配置される前記導電性板部材１１の一方の面
から他方の面に貫通する。しかしながら、具体例４で
は、図１６に示されているように、前記導電性板部材１
１に形成される前記スリット２２の幅寸法は、前記導電
性板部材１１の板厚方向に沿って前記導電性板部材１１
の前記一方の面から前記他方の面に漸増するように形成
される。前記スリット２２は、例えばエッチングおよび
前記スリット２２の縁部を前記した形状に形成するため
のブレードを用いる切削加工により形成することができ
る。As shown in FIG. 15, for example, 10
On the conductive plate member 11 having a thickness of 0 μm, for example, slits 22 are formed along the longitudinal direction of the plate member 11 and extend in parallel to each other at a predetermined interval. Each slit 22 penetrates from one surface of the conductive plate member 11 on which the semiconductor chip 12 is arranged to the other surface, as in the third specific example. However, in Specific Example 4, as shown in FIG. 16, the conductive plate member 1
The width dimension of the slit 22 formed in 1 is the conductive plate member 11 along the plate thickness direction of the conductive plate member 11.
Is gradually increased from the one surface to the other surface. The slit 22 can be formed by, for example, etching and cutting using a blade for forming the edge portion of the slit 22 into the shape described above.
【００５９】図示しないが、図１０に示されたと同様
に、前記スリット２２の小幅開口が開放する前記導電性
板部材１１の前記一方の面上の所定位置である中央部
に、前記したと同様な各接続部１３が設けられた半導体
チップ１２が配置され、かつ従来よく知られた方法によ
り固定される。前記各接続部１３は、該接続部１３に対
応する前記導電性板部材１１の前記スリット間の各部位
にボンディングワイヤ１４を介して電気的に接続され
る。Although not shown, as in the case shown in FIG. 10, in the central portion which is a predetermined position on the one surface of the conductive plate member 11 where the narrow opening of the slit 22 opens, the same as above. The semiconductor chip 12 provided with the respective connecting portions 13 is arranged and fixed by a well-known method. The respective connecting portions 13 are electrically connected to respective portions between the slits of the conductive plate member 11 corresponding to the connecting portions 13 via bonding wires 14.
【００６０】さらに、図示しないが、図１１に示された
と同様に、前記導電性板部材１１の一方の面上に配置さ
れた前記半導体チップ１２と、該チップ１２の前記各端
子部材１３から伸びるボンディングワイヤ１４とが樹脂
部材１５により封止される。後述する図１７に示されて
いるように、前記スリット２２の縁部の形状に合わせて
前記スリット２２に前記樹脂部材１５が封止される。Further, although not shown, similarly to the case shown in FIG. 11, the semiconductor chip 12 arranged on one surface of the conductive plate member 11 and the respective terminal members 13 of the chip 12 are extended. The bonding wire 14 and the resin member 15 are sealed. As shown in FIG. 17 described later, the resin member 15 is sealed in the slit 22 according to the shape of the edge of the slit 22.
【００６１】前記樹脂部材１５による封止後、前記導電
性板部材１１の他方の面には、図１２に示されたと同様
に、前記導電性板部材１１の横方向すなわちスリット２
２を横切る方向に沿って、例えばソーカットなどの切削
手段により前記したと同様な複数の分断溝２１が相互に
平行に形成される。各分断溝２１は、前記導電部材の前
記一方の面に達することにより、前記導電性板部材１１
の前記スリット２２間の前記した各部位を前記スリット
２２の伸長方向に分断する。前記導電性板部材１１の縦
方向に沿って形成された複数の前記スリット２２と、前
記導電性板部材の横方向に沿って形成された複数の前記
分断溝２１との共同により、前記スリット２２および前
記分断溝２１により囲まれた前記導電性板部材１１の各
領域で、図１７に示すように、各電極部材１７が形成さ
れる。After sealing with the resin member 15, on the other surface of the conductive plate member 11, as in the case shown in FIG.
A plurality of dividing grooves 21 similar to those described above are formed in parallel with each other along a direction traversing 2 by cutting means such as saw cutting. Each of the dividing grooves 21 reaches the one surface of the conductive member, so that the conductive plate member 11
The above-mentioned respective portions between the slits 22 are divided in the extension direction of the slits 22. The slits 22 are formed in cooperation with the plurality of slits 22 formed along the vertical direction of the conductive plate member 11 and the plurality of dividing grooves 21 formed along the horizontal direction of the conductive plate member 11. Also, in each region of the conductive plate member 11 surrounded by the dividing groove 21, each electrode member 17 is formed as shown in FIG.
【００６２】各電極部材１７の形成後、前記樹脂部材１
５の底面から露出する前記各電極部材１７の接合面１７
ｂには、具体例３で説明したと同様な結合層１８が形成
される。After forming each electrode member 17, the resin member 1 is formed.
5, the joint surface 17 of each electrode member 17 exposed from the bottom surface
On b, the bonding layer 18 similar to that described in the third specific example is formed.
【００６３】具体例４では、図１７に示されているよう
に、前記各溝２２は、前記電極部材１７の一方の面から
他方の面へ前記電極部材１７の板厚方向に沿って漸減す
ることから、各溝２２の縁部で構成される前記各電極部
材１７の両縁部は、ボンディングワイヤ１４と接続され
る前記電極部材１７の一方の面から他方の面へ相離れる
方向への傾斜を与えられる。従って、各電極部材１７
は、図１７に示される横断面で見て、逆台形の断面形状
を与えられる。その結果、前記スリット２２の間を封止
する樹脂部材１５は、前記電極部材１７の前記一方の面
から前記他方の面へ前記電極部材１７の板厚方向に沿っ
て漸増するように形成される。その結果、前記樹脂部材
１５は、前記各電極部材１７の前記縁部を埋め込むべく
これに合致するように、その断面が、図１７で見て、前
記電極部材１７の前記一方の面から前記他方の面へ向け
て前記電極部材１７の板厚方向に沿って漸増する台形状
を有するように、形成される。In Concrete Example 4, as shown in FIG. 17, each groove 22 is gradually reduced from one surface of the electrode member 17 to the other surface along the plate thickness direction of the electrode member 17. Therefore, both edge portions of each electrode member 17 formed by the edge portions of each groove 22 are inclined in a direction away from one surface of the electrode member 17 connected to the bonding wire 14 to the other surface. Is given. Therefore, each electrode member 17
Is given an inverted trapezoidal cross-sectional shape when viewed in the cross-section shown in FIG. As a result, the resin member 15 that seals between the slits 22 is formed so as to gradually increase from the one surface of the electrode member 17 to the other surface along the plate thickness direction of the electrode member 17. . As a result, the resin member 15 has a cross-section as seen from FIG. To have a trapezoidal shape that gradually increases in the plate thickness direction of the electrode member 17.
【００６４】前記した具体例４の製造方法では、具体例
３に示した例におけると同様に、前記樹脂封止後に、前
記導電性板部材１１から各電極部材１７を形成するため
に、従来のような前記導電性板部材の縦方向および横方
向に沿って分断加工を行う必要が無く、前記した樹脂封
止後、前記導電性板部材１１に該部材の横方向に沿って
分断加工を行うことにより、前記導電性板部材１１を前
記各電極部材１７に分断することができる。In the manufacturing method of the above-mentioned specific example 4, as in the example shown in the specific example 3, in order to form each electrode member 17 from the conductive plate member 11 after the resin sealing, the conventional method is used. It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction, and the conductive plate member 11 is cut along the horizontal direction of the member after the resin sealing as described above. As a result, the conductive plate member 11 can be divided into the electrode members 17.
【００６５】さらに、前記スリット２２の間に封止され
た樹脂部材１５は、前記したスリット２２の形状に合致
するように前記導電性板部材１１の前記他方の面から前
記一方の面へ前記導電性板部材１１の板厚方向に沿って
漸減する台形状に形成され、前記樹脂部材１５が各電極
部材１７の縁部を覆い込むように形成されている。この
ことから、前記樹脂部材１５は、前記各電極部材１７の
前記樹脂部材１５からの剥離を防止する作用をなす。従
って、前記各電極部材１７を前記樹脂部材１５に確実に
結合させることができる。Further, the resin member 15 sealed between the slits 22 is electrically conductive from the other surface of the conductive plate member 11 to the one surface so as to match the shape of the slits 22. The resin member 15 is formed in a trapezoidal shape that gradually decreases along the plate thickness direction of the flexible plate member 11, and the resin member 15 is formed so as to cover the edge portion of each electrode member 17. Therefore, the resin member 15 serves to prevent the electrode members 17 from being separated from the resin member 15. Therefore, each of the electrode members 17 can be reliably coupled to the resin member 15.
【００６６】前記各電極部材１７の形成後、前記樹脂部
材１５の底面から露出する前記各電極部材１７の接合面
１７ｂに結合層１８を設けることに代えて、図１８に示
されているように、端子部分として前記したと同様なボ
ール１９を前記電極部材１７の接合面１７ｂに結合する
ことができる。After forming the electrode members 17, instead of providing the bonding layer 18 on the bonding surface 17b of the electrode members 17 exposed from the bottom surface of the resin member 15, as shown in FIG. A ball 19 similar to the one described above can be coupled to the joint surface 17b of the electrode member 17 as the terminal portion.
【００６７】〈具体例５〉図１９〜図２１は、本発明に
係る具体例５の製造工程を示す。具体例５は、前記スリ
ット２０の形成工程以外の工程は具体例３と同じであ
る。<Fifth Embodiment> FIGS. 19 to 21 show a manufacturing process of a fifth embodiment according to the present invention. The specific example 5 is the same as the specific example 3 except for the step of forming the slit 20.
【００６８】図１９に示されているように、例えば１０
０μｍの厚さ寸法を有する導電性板部材１１に、例えば
該板部材１１の縦方向に沿って、所定の間隔をおいて相
互に平行に伸長するスリット２３が形成される。前記各
スリット２３は、具体例３におけると同様に、前記板部
材１１の厚さ方向に沿った垂直な縁部を有し、半導体チ
ップ１２が配置される前記導電性板部材１１の一方の面
から他方の面に貫通する。As shown in FIG. 19, for example, 10
The conductive plate member 11 having a thickness of 0 μm is provided with slits 23 extending in parallel with each other at a predetermined interval along the longitudinal direction of the plate member 11, for example. Each of the slits 23 has a vertical edge portion along the thickness direction of the plate member 11 as in the third specific example, and one surface of the conductive plate member 11 on which the semiconductor chip 12 is arranged. To the other side.
【００６９】具体例５では、前記複数のスリット２３
は、該スリット２３の伸長方向へ所定の間隔をおいてそ
れぞれが隣り合う前記スリット２３に向けて互いに相近
づく方向へ伸長する伸長部２３ａを有しており、前記伸
長部２３ａの伸長端は、相互に所定の間隔をおくように
形成される。前記した各スリット２３は、例えばフォト
リソおよびエッチング技術を用いて一括的に形成され
る。前記スリット２３の形成のための前記したフォトリ
ソおよびエッチング技術を用いることにより、前記した
具体例と同様な電極部材１７を規定するためのスリット
２３を、前記導電性板部材１１上の縦方向および横方向
に、所定の高精度でもって、形成することができる。In Example 5, the plurality of slits 23
Has an extension portion 23a that extends in a direction toward each other at a predetermined distance in the extension direction of the slit 23 toward the adjacent slits 23, and the extension end of the extension portion 23a is They are formed so as to be spaced apart from each other by a predetermined distance. The slits 23 described above are collectively formed by using, for example, photolithography and etching techniques. By using the photolithography and etching techniques described above for forming the slits 23, the slits 23 for defining the electrode member 17 similar to the above-described specific example are formed in the vertical and horizontal directions on the conductive plate member 11. Can be formed in a predetermined direction with a high precision.
【００７０】前記スリット２３の形成は、前記したエッ
チングに代えて、前記エッチングと同様に高精度での加
工を可能とする打抜きプレスにより形成することができ
る。The slits 23 can be formed by a punching press which can be processed with high precision as in the case of the etching, instead of the above-mentioned etching.
【００７１】図２０に示されているように、各スリット
２３間には、該スリット２３とそれらの伸長部２３ａと
により、全体に矩形の領域２４が規定される。前記導電
性板部材１１の中央部には、前記したと同様な半導体チ
ップ１２が配置され、その各接続部１３と、所定の前記
各矩形領域２４とがボンディングワイヤ１４を介して電
気的に接続される。As shown in FIG. 20, a rectangular area 24 is defined between the slits 23 by the slits 23 and their extending portions 23a. A semiconductor chip 12 similar to the one described above is arranged in the central portion of the conductive plate member 11, and each connection portion 13 thereof and each predetermined rectangular area 24 are electrically connected via a bonding wire 14. To be done.
【００７２】その後、図示しないが、前記導電性板部材
１１上に配置された前記半導体チップ１２と、該チップ
１２の前記各接続部１３から伸びるボンディングワイヤ
１４とが、図１１に示されたと同様な樹脂部材１５によ
り封止される。Thereafter, although not shown, the semiconductor chip 12 arranged on the conductive plate member 11 and the bonding wires 14 extending from the respective connection portions 13 of the chip 12 are the same as those shown in FIG. It is sealed by the resin member 15.
【００７３】樹脂部材１５による前記した封止後、前記
導電性板部材１１の裏面である前記他方の面には、図１
２に示されたと同様に、前記導電性板部材１１のスリッ
ト２３の前記した伸長部２３ａに沿って、例えばソーカ
ットなどの切削手段により前記したと同様な複数の分断
溝２１が相互に平行に形成される。各分断溝２１は、前
記導電部材の前記一方の面に達することにより、前記導
電性板部材１１の前記スリット２３間の前記した各領域
２４を前記スリット２３の伸長方向に分断する。これに
より、分断された前記導電性板部材１１の各領域２４で
各電極部材１７が形成される。前記分断溝２１に代え
て、図２１に示されているように、前記した複数のスリ
ット２３の互いに向かい合う伸長部２３ａの伸長端間を
取り除くための分断孔２５を形成することができる。前
記分断孔２５は、例えばドリルまたはレーザーを用いた
穿孔手段により形成される。After the above-mentioned sealing with the resin member 15, the other surface which is the back surface of the conductive plate member 11 has a structure shown in FIG.
2, a plurality of dividing grooves 21 similar to those described above are formed in parallel with each other by a cutting means such as saw cut along the above-mentioned extending portion 23a of the slit 23 of the conductive plate member 11. To be done. When each dividing groove 21 reaches the one surface of the conductive member, each dividing groove 21 divides each of the regions 24 between the slits 23 of the conductive plate member 11 in the extension direction of the slit 23. As a result, each electrode member 17 is formed in each region 24 of the conductive plate member 11 that has been divided. Instead of the dividing groove 21, as shown in FIG. 21, it is possible to form a dividing hole 25 for removing between the extending ends of the extending portions 23a of the plurality of slits 23 facing each other. The dividing hole 25 is formed by a punching means using a drill or a laser, for example.
【００７４】各電極部材１７の形成後、前記樹脂部材１
５の底面から露出する前記各電極部材１７の接合面１７
ｂには、具体例３で説明したと同様な結合層１８または
ボール１９が形成される。After forming each electrode member 17, the resin member 1 is formed.
5, the joint surface 17 of each electrode member 17 exposed from the bottom surface
On b, the bonding layer 18 or the ball 19 similar to that described in the third specific example is formed.
【００７５】前記した具体例５の製造方法では、具体例
３に示した例におけると同様に、前記樹脂封止後に、前
記導電性板部材１１から各電極部材１７を形成するため
に、従来のような前記導電性板部材の縦方向および横方
向に沿って分断加工を行う必要が無く、前記した樹脂封
止後、前記導電性板部材１１に該部材の横方向に沿って
分断加工を行うことにより、前記導電性板部材１１から
前記各電極部材１７を形成することができる。In the manufacturing method of the above-mentioned concrete example 5, as in the case of the concrete example 3, in order to form each electrode member 17 from the conductive plate member 11 after the resin sealing, the conventional method is used. It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction, and the conductive plate member 11 is cut along the horizontal direction of the member after the resin sealing as described above. As a result, the electrode members 17 can be formed from the conductive plate member 11.
【００７６】さらに、前記各電極部材１７のための各領
域２４の縦方向寸法および横方向寸法が各スリット２３
およびそれぞれの伸長部２３ａによって規定され、基本
的に、前記した切断手段あるいは穿孔手段の加工精度に
依存しないことから、前記スリット２３の形成精度で決
まる高精度でもって各電極部材１７を形成することがで
きる。Furthermore, the vertical dimension and the horizontal dimension of each region 24 for each electrode member 17 are defined by each slit 23.
And the respective extension portions 23a, and basically does not depend on the processing accuracy of the above-mentioned cutting means or punching means, so that each electrode member 17 is formed with high accuracy determined by the formation accuracy of the slit 23. You can
【００７７】前記スリット２３の前記伸長部２３ａを含
む縁部を、前記した垂直縁部に代えて、具体例４に示し
たと同様な傾斜縁部とすることができる。The edge portion including the extended portion 23a of the slit 23 may be replaced with the vertical edge portion described above and may be an inclined edge portion similar to that shown in the fourth specific example.
【００７８】〈具体例６〉図２２および図２３は、本発
明に係る具体例６の製造工程を示す。具体例６は、前記
スリット２３の形成工程以外の工程は具体例５と同じで
ある。<Sixth Embodiment> FIGS. 22 and 23 show a manufacturing process of a sixth embodiment according to the present invention. The specific example 6 is the same as the specific example 5 except for the step of forming the slit 23.
【００７９】図２２に示されているように、例えば１０
０μｍの厚さ寸法を有する導電性板部材１１に、例えば
該板部材１１の縦方向に沿って、所定の間隔をおいて相
互に平行に伸長するスリット２６が形成される。前記各
スリット２６は、具体例５におけると同様に、半導体チ
ップ１２が配置される前記導電性板部材１１の一方の面
から他方の面に貫通する。As shown in FIG. 22, for example, 10
On the conductive plate member 11 having a thickness of 0 μm, for example, slits 26 are formed along the longitudinal direction of the plate member 11 and extend in parallel to each other at a predetermined interval. Each slit 26 penetrates from one surface of the conductive plate member 11 on which the semiconductor chip 12 is arranged to the other surface, as in the fifth specific example.
【００８０】具体例５の前記伸長部を有したスリット２
３とは異なり、具体例６では、前記複数のスリット２６
の互いに隣り合う１対のスリットの向かい合う縁部は、
互いに対応する位置に前記縁部に沿って所定の間隔をお
いて形成される複数の直線部分２６ａと、該各直線部分
間で該直線部分２６ａに連続する凹状曲線部分２６ｂと
を有するように形成される。前記したスリット２６の互
いに向かい合う凹状曲線部分２６ｂにより、ほぼ円形の
各領域２７が前記導電性板部材１１の全体に整列して規
定される。Slit 2 having the extended portion of Example 5
Unlike Example 3, in Example 6, the plurality of slits 26
The facing edges of a pair of slits adjacent to each other are
Formed to have a plurality of straight line portions 26a formed at predetermined positions along the edge portion at positions corresponding to each other, and a concave curved portion 26b continuous to the straight line portion 26a between the straight line portions 26a. To be done. By the concave curved portions 26b of the slit 26 facing each other, substantially circular regions 27 are defined in alignment with the entire conductive plate member 11.
【００８１】前記した各スリット２６は、具体例５にお
けると同様に、例えばフォトリソおよびエッチング技術
を用いて一括的に形成される。前記スリット２６の形成
のための前記したフォトリソおよびエッチング技術を用
いることにより、前記円形の領域２７を規定するための
スリット２６を、所定の高精度でもって、形成すること
ができる。The respective slits 26 described above are collectively formed by using, for example, a photolithography and etching technique, as in the fifth embodiment. By using the above-described photolithography and etching technique for forming the slit 26, the slit 26 for defining the circular region 27 can be formed with a predetermined high precision.
【００８２】前記スリット２６の形成は、前記したエッ
チングに代えて、前記エッチングと同様に高精度での加
工を可能とする打抜きプレスにより形成することができ
る。The slits 26 can be formed by a punching press which can be processed with high precision as in the case of the etching, instead of the above-mentioned etching.
【００８３】図２３に示されているように、全体に円形
の領域２７が規定される前記導電性板部材１１の中央部
には、前記したと同様な半導体チップ１２が配置され、
その各接続部１３と、所定の前記各円形領域とがボンデ
ィングワイヤ１４を介して電気的に接続される。As shown in FIG. 23, a semiconductor chip 12 similar to that described above is arranged in the central portion of the conductive plate member 11 in which a circular area 27 is defined as a whole.
Each of the connecting portions 13 and each of the predetermined circular regions are electrically connected via a bonding wire 14.
【００８４】その後、図示しないが、前記導電性板部材
１１上に配置された前記半導体チップ１２と、該チップ
１２の前記各接続部１３から伸びるボンディングワイヤ
１４とが、前記したと同様な樹脂部材１５により封止さ
れる。更に、樹脂部材１５による前記した封止後、例え
ばソーカットなどの切削手段により、前記したと同様な
複数の分断溝２１が、相互に平行に前記導電性板部材１
１に形成された前記直線部分２６ａで形成される。この
分断溝２１により、前記したと同様に、分断された前記
導電性板部材１１の各領域２７で円形の各電極部材１７
が形成される。前記分断溝２１に代えて、具体例５にお
けると同様に分断孔２５を形成することができる。Thereafter, although not shown, the semiconductor chip 12 arranged on the conductive plate member 11 and the bonding wires 14 extending from the respective connection portions 13 of the chip 12 are made of the same resin material as described above. It is sealed by 15. Further, after the above-mentioned sealing with the resin member 15, a plurality of cutting grooves 21 similar to the above-mentioned dividing grooves 21 are parallel to each other by a cutting means such as saw cutting.
It is formed by the straight portion 26a formed in 1. By this dividing groove 21, similarly to the above, each circular electrode member 17 in each region 27 of the conductive plate member 11 that has been divided.
Is formed. Instead of the dividing groove 21, the dividing hole 25 can be formed as in the fifth specific example.
【００８５】各電極部材１７の形成後、前記樹脂部材１
５の底面から露出する円形の前記各電極部材１７の接合
面には、端子部分として図示しないが前記したと同様な
結合層１８またはボール１９が形成される。前記電極部
材１７の接合面は円形であることから、その円形の形状
を利用して、丸みを帯びた結合層１８を前記接合面に容
易に形成することができる。前記結合層１８に代えて、
前記接合面に球状のボール１９を結合する際にも、前記
接合面の円形の形状を利用することでボール１９の溶融
を容易に制御することができることから、前記ボール１
９を前記接合面に容易に結合することができる。After forming each electrode member 17, the resin member 1 is formed.
On the joint surface of each of the circular electrode members 17 exposed from the bottom surface of the electrode 5, a coupling layer 18 or a ball 19 similar to that described above is formed as a terminal portion, although not shown. Since the joint surface of the electrode member 17 is circular, the rounded bonding layer 18 can be easily formed on the joint surface by utilizing the circular shape. Instead of the bonding layer 18,
Even when the spherical balls 19 are joined to the joining surface, the melting of the balls 19 can be easily controlled by utilizing the circular shape of the joining surface.
9 can be easily bonded to the joint surface.
【００８６】前記した具体例６の製造方法では、前記し
た具体例におけると同様に、前記樹脂封止後に、前記導
電性板部材１１から各電極部材１７を形成するために、
従来のような前記導電性板部材の縦方向および横方向に
沿って分断加工を行う必要が無く、前記した樹脂封止
後、前記導電性板部材１１に該部材の横方向に沿って分
断加工を行うことにより、前記導電性板部材１１から前
記各電極部材１７を形成することができる。In the manufacturing method of the above-mentioned specific example 6, as in the above-described specific example, in order to form each electrode member 17 from the conductive plate member 11 after the resin sealing,
It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction as in the prior art, and the conductive plate member 11 is divided along the horizontal direction of the member after the resin sealing as described above. By performing the above, each of the electrode members 17 can be formed from the conductive plate member 11.
【００８７】さらに、前記各電極部材１７のための各領
域２７が各スリット２６によって規定され、基本的に、
前記した切断手段あるいは穿孔手段の加工精度に依存し
ないことから、前記スリット２６の形成精度で決まる高
精度でもって各電極部材１７を形成することができる。Further, each area 27 for each electrode member 17 is defined by each slit 26, and basically,
Since it does not depend on the processing accuracy of the above-mentioned cutting means or punching means, each electrode member 17 can be formed with high accuracy determined by the forming accuracy of the slit 26.
【００８８】さらに、丸みを帯びた結合層および球状の
ボールなどの端子部分は、前記電極部材１７の円形の接
合面に、円形の形状を利用して容易に形成することがで
きることから、前記端子部分の寸法の精度を高めること
ができる。Furthermore, since the terminal portions such as the rounded bonding layer and the spherical balls can be easily formed on the circular joint surface of the electrode member 17 by utilizing the circular shape, the terminal portions can be easily formed. The dimensional accuracy of the part can be improved.
【００８９】〈具体例７〉図２４から図２６は、本発明
に係る具体例７の製造工程を示す。具体例７では、導電
性板部材１１に、スリット２０に加えて、該スリット間
にこれに沿う凹溝２８が形成される。<Seventh Embodiment> FIGS. 24 to 26 show a manufacturing process of a seventh embodiment according to the present invention. In Concrete Example 7, in addition to the slits 20, the recesses 28 extending along the slits 20 are formed in the conductive plate member 11 along the slits 20.
【００９０】図２４に示されているように、互いに対向
する一対の垂直な直線縁部により規定される直線状のス
リット２０が、例えば１００μｍの厚さ寸法を有する導
電性板部材１１に、前記したと同様な方法で、例えば該
板部材１１の縦方向に沿って、所定の間隔をおいて相互
に平行に伸長するように形成される。前記各スリット２
０は、前記した各スリットにおけると同様に、半導体チ
ップ１２が配置される前記導電性板部材１１の一方の面
から他方の面に貫通する。さらに、前記導電性板部材１
１の前記他方の面には、前記したスリット２０間に、該
スリット２０と平行に伸長する凹溝２８が形成される。As shown in FIG. 24, a linear slit 20 defined by a pair of vertical straight edge portions facing each other is formed in the conductive plate member 11 having a thickness of 100 μm, for example. In the same manner as described above, for example, the plate members 11 are formed so as to extend in parallel with each other at predetermined intervals along the longitudinal direction. Each slit 2
Similarly to the slits, 0 penetrates from one surface of the conductive plate member 11 on which the semiconductor chip 12 is arranged to the other surface thereof. Further, the conductive plate member 1
On the other surface of 1, a groove 28 extending parallel to the slit 20 is formed between the slits 20.
【００９１】前記各凹溝２８は、図２５に示されている
ように、所定の幅寸法および所定の深さ寸法で規定され
る矩形横断面形状を有する。前記凹溝２８は、例えば切
削加工およびエッチングなどにより形成することがで
き、また、スリット２０の形成と同時に形成することが
望ましい。As shown in FIG. 25, each groove 28 has a rectangular cross-sectional shape defined by a predetermined width dimension and a predetermined depth dimension. The groove 28 can be formed by, for example, cutting and etching, and is preferably formed at the same time when the slit 20 is formed.
【００９２】その後、前記導電性板部材１１の中央部に
は、図２６に示されているように、前記したと同様な半
導体チップ１２が配置され、その各接続部１３と、所定
の前記各領域とがボンディングワイヤ１４を介して電気
的に接続された後、前記したと同様な樹脂部材１５によ
り封止される。更に、樹脂部材１５による前記した封止
後、前記したと同様な例えばソーカットなどの切削手段
により、前記したと同様な複数の分断溝２１が、相互に
平行に、前記導電性板部材１１の前記凹溝２８が形成さ
れた面に形成される。この分断溝２１により、前記した
と同様に、分断された前記導電性板部材１１の各領域で
各電極部材１７が形成される。この各電極部材１７にお
ける前記樹脂部材１５の底面から露出する接合面には、
前記した凹溝２８が露出する。Then, as shown in FIG. 26, in the central portion of the conductive plate member 11, the semiconductor chip 12 similar to that described above is arranged, each connecting portion 13 and each of the predetermined ones. After being electrically connected to the region via the bonding wire 14, the region is sealed with the resin member 15 similar to that described above. Furthermore, after the above-mentioned sealing with the resin member 15, a plurality of cutting grooves 21 similar to the above-mentioned cutting grooves 21 of the conductive plate member 11 are parallel to each other by a cutting means such as saw cutting similar to the above-mentioned. It is formed on the surface on which the groove 28 is formed. By the dividing groove 21, each electrode member 17 is formed in each divided region of the conductive plate member 11, as described above. The bonding surface of each electrode member 17 exposed from the bottom surface of the resin member 15 is
The groove 28 described above is exposed.
【００９３】各電極部材１７の形成後、図２６に示され
ているように、前記凹溝２８を有する前記接合面には、
端子部分として前記したと同様なボール１９が結合され
る。電極部材１７の前記接合面には前記凹溝２８が形成
され、前記したボール１９を結合する際に、前記ボール
１９が凹溝２８により保持されることから、前記接合面
に接続される前記ボール１９の位置決めを容易とするこ
とができる。また、前記ボール１９の一部が凹溝２８内
に収容されることからボール１９および前記電極部材１
７の接合面積を増やすことができ、これにより両者を強
固に結合することができる。After forming each electrode member 17, as shown in FIG. 26, the joint surface having the groove 28 is
A ball 19 similar to that described above is coupled as the terminal portion. The recessed groove 28 is formed on the joint surface of the electrode member 17, and the ball 19 is held by the recessed groove 28 when the ball 19 is joined, so that the ball connected to the joint surface is formed. The positioning of 19 can be facilitated. In addition, since the ball 19 is partially housed in the groove 28, the ball 19 and the electrode member 1
The joint area of 7 can be increased, and thereby both can be firmly bonded.
【００９４】前記凹溝２８は、前記した形状に代えて、
前記他方の面に開放するＶ字溝のような所望の断面形状
を有する溝を適用することができる。Instead of the above-mentioned shape, the groove 28 is
A groove having a desired cross-sectional shape such as an open V-shaped groove can be applied to the other surface.
【００９５】前記した具体例６の製造方法では、前記し
た具体例におけると同様に、前記樹脂封止後に、前記導
電性板部材１１から各電極部材１７を形成するために、
従来のような前記導電性板部材の縦方向および横方向に
沿って分断加工を行う必要が無く、前記した樹脂封止
後、前記導電性板部材１１に該部材の横方向に沿って分
断加工を行うことにより、前記導電性板部材１１から前
記各電極部材１７を形成することができる。In the manufacturing method of the above-mentioned concrete example 6, in the same manner as in the above-mentioned concrete example, in order to form each electrode member 17 from the conductive plate member 11 after the resin sealing,
It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction as in the prior art, and the conductive plate member 11 is divided along the horizontal direction of the member after the resin sealing as described above. By performing the above, each of the electrode members 17 can be formed from the conductive plate member 11.
【００９６】また、具体例７では、前記電極部材１７の
前記ボール１９が結合される接合面に、前記した凹溝が
形成される。これにより、前記ボール１９を前記電極部
材１７に結合する際に、前記接合面の前記凹溝２８を利
用してボール１９の正確な位置決めが容易となることか
ら、端子部分１９の配置精度を高めることができる。さ
らに、前記ボール１９と前記電極部材１７の凹溝２８と
の接する面積が増えることから、前記電極部材１７に前
記ボール１９を確実に結合することができる。Further, in the specific example 7, the above-mentioned concave groove is formed on the joint surface of the electrode member 17 to which the ball 19 is joined. Accordingly, when the ball 19 is coupled to the electrode member 17, the positioning of the ball 19 can be facilitated by utilizing the recessed groove 28 of the joint surface, thereby improving the accuracy of the arrangement of the terminal portion 19. be able to. Furthermore, since the area of contact between the ball 19 and the concave groove 28 of the electrode member 17 increases, the ball 19 can be reliably coupled to the electrode member 17.
【００９７】〈具体例８〉図２７〜図２９は、本発明に
係る具体例８の製造工程を示す。前記導電性板部材１１
に形成されるスリット２０間の前記凹溝２８をプレス加
工により形成することができる。プレス加工は、前記導
電性板部材１１のスリット２０間のそれぞれに、該スリ
ットに沿って連続して伸長する変形部２９を形成する。
前記変形部は、前記導電性板部材１１の前記一方の面に
凸面３０を規定し、前記他方の面に、前記凸面３０に対
応する凹面２８を規定する。この凹面２８が前記した凹
溝として利用される。従って、前記凹溝２８をプレス加
工で形成することにより、図２７に示されているよう
に、前記導電性板部材１１の前記他方の面に、具体例７
で説明したと同様な凹溝２８を形成すると共に、前記導
電性板部材１１の前記一方の面に、前記凹溝２８に対応
して相互に平行に伸長する凸面３０が同時的に形成され
る。<Embodiment 8> FIGS. 27 to 29 show the manufacturing steps of Embodiment 8 according to the present invention. The conductive plate member 11
The concave groove 28 between the slits 20 formed in the above can be formed by pressing. The press working forms, in each of the slits 20 of the conductive plate member 11, a deformed portion 29 that continuously extends along the slits.
The deforming portion defines a convex surface 30 on the one surface of the conductive plate member 11, and defines a concave surface 28 corresponding to the convex surface 30 on the other surface. This concave surface 28 is used as the above-mentioned concave groove. Therefore, by forming the concave groove 28 by press working, as shown in FIG. 27, in the other surface of the conductive plate member 11, the specific example 7 is formed.
The concave groove 28 similar to that described in 1. is formed, and at the same time, the convex surface 30 corresponding to the concave groove 28 and extending in parallel to each other is formed on the one surface of the conductive plate member 11. .
【００９８】図２８に示されているように、前記変形部
２９により前記導電性板部材１１の前記一方の面に規定
される凸面３０は、断面で見てその頂部へ向けて幅寸法
を漸減する台形形状を有し、前記他方の面に規定される
凹部すなわち凹溝２８は、前記凸面３０に対応した傾斜
側面を有する。前記各変形部２９は、プレス加工により
一括的に形成することができ、また、前記スリット２０
の形成と同時に形成することが望ましい。As shown in FIG. 28, the convex surface 30 defined by the deforming portion 29 on the one surface of the conductive plate member 11 has a width dimension gradually reduced toward the top when viewed in cross section. The concave portion, that is, the concave groove 28 defined in the other surface has a trapezoidal shape, and has an inclined side surface corresponding to the convex surface 30. The deformed portions 29 can be collectively formed by pressing, and the slits 20 can be formed.
It is desirable to form at the same time as the formation of.
【００９９】その後、前記導電性板部材１１の前記凸面
３０が形成された面の中央部には、図２９に示されてい
るように、前記したと同様な半導体チップ１２が配置さ
れ、その各接続部１３と、所定の前記各領域とがボンデ
ィングワイヤ１４を介して電気的に接続された後、前記
したと同様な樹脂部材１５により封止される。前記導電
性板部材１１の前記一方の面には、前記した凸面３０が
形成されていることから、前記樹脂部材１５は、前記凸
面３０の形状に沿って形成される。従って、前記した凸
面３０の形状により、前記導電性板部材１１の前記一方
の面に突出した寸法に応じて、前記樹脂部材１５と前記
凸面３０とが接する面積を増やすことができる。Thereafter, as shown in FIG. 29, semiconductor chips 12 similar to those described above are arranged in the central portion of the surface of the conductive plate member 11 on which the convex surface 30 is formed, and each of them is arranged. After the connection portion 13 and each of the predetermined regions are electrically connected via the bonding wire 14, the connection portion 13 is sealed with the same resin member 15 as described above. Since the convex surface 30 is formed on the one surface of the conductive plate member 11, the resin member 15 is formed along the shape of the convex surface 30. Therefore, due to the shape of the convex surface 30 described above, the area where the resin member 15 and the convex surface 30 are in contact with each other can be increased in accordance with the size of the projection on the one surface of the conductive plate member 11.
【０１００】更に、樹脂部材１５による前記した封止
後、前記したと同様な例えばソーカットなどの切削手段
により、前記したと同様な複数の分断溝２１が、相互に
平行に、前記導電性板部材１１の前記他方の面に形成さ
れる。この分断溝２１により、前記したと同様に、分断
された前記導電性板部材１１の各領域で各電極部材１７
が形成される。この各電極部材１７における前記樹脂部
材１５の底面から露出する接合面には、プレス加工によ
り形成される前記凹溝２８が露出する。Further, after the above-mentioned sealing with the resin member 15, a plurality of cutting grooves 21 similar to those described above are formed in parallel with each other by cutting means such as saw cutting similar to those described above so as to be parallel to each other. 11 is formed on the other surface. By the dividing groove 21, each electrode member 17 is formed in each divided region of the conductive plate member 11 in the same manner as described above.
Is formed. The concave groove 28 formed by press working is exposed at the joint surface of each electrode member 17 exposed from the bottom surface of the resin member 15.
【０１０１】各電極部材１７の形成後、図２９に示され
ているように、前記凹溝２８を有する前記接合面には、
端子部分として前記したと同様なボール１９が結合され
る。電極部材１７の前記接合面には前記凹溝２８が形成
され、前記したボール１９を結合する際に、前記ボール
１９が凹溝２８により保持されることから、前記接合面
に接続される前記ボール１９の位置決めを容易とするこ
とができる。また、前記ボール１９の一部が凹溝２８内
に収容されることからボール１９および前記電極部材１
７の接合面積を増やすことができ、これにより両者を強
固に結合することができる。After forming each electrode member 17, as shown in FIG. 29, the joint surface having the groove 28 is
A ball 19 similar to that described above is coupled as the terminal portion. The recessed groove 28 is formed on the joint surface of the electrode member 17, and the ball 19 is held by the recessed groove 28 when the ball 19 is joined, so that the ball connected to the joint surface is formed. The positioning of 19 can be facilitated. In addition, since the ball 19 is partially housed in the groove 28, the ball 19 and the electrode member 1
The joint area of 7 can be increased, and thereby both can be firmly bonded.
【０１０２】前記した具体例８の製造方法では、前記し
た具体例におけると同様に、前記樹脂封止後に、前記導
電性板部材１１から各電極部材１７を形成するために、
従来のような前記導電性板部材の縦方向および横方向に
沿って分断加工を行う必要が無く、前記した樹脂封止
後、前記導電性板部材１１に該部材の横方向に沿って分
断加工を行うことにより、前記導電性板部材１１から前
記各電極部材１７を形成することができる。In the manufacturing method of the specific example 8, as in the specific example, in order to form the electrode members 17 from the conductive plate member 11 after the resin sealing,
It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction as in the prior art, and the conductive plate member 11 is divided along the horizontal direction of the member after the resin sealing as described above. By performing the above, each of the electrode members 17 can be formed from the conductive plate member 11.
【０１０３】更に、前記電極部材１７の前記ボール１９
が結合される接合面に、前記した凹溝２８がプレス加工
により形成される。これにより、前記ボール１９を前記
電極部材１７に結合する際に、前記接合面の前記凹溝２
８を利用して前記ボール１９の正確な位置決めが容易と
なることから、端子部分１９の配置精度を高めることが
できる。さらに、前記ボール１９と前記電極部材１７の
凹溝２８との接する面積が増えることから、前記電極部
材１７に前記ボール１９を確実に結合することができ
る。Further, the ball 19 of the electrode member 17
The above-mentioned concave groove 28 is formed by press working on the joint surface to which is joined. Thereby, when the ball 19 is coupled to the electrode member 17, the concave groove 2 on the joint surface is formed.
Since the accurate positioning of the ball 19 can be facilitated by using 8, the arrangement accuracy of the terminal portion 19 can be improved. Furthermore, since the area of contact between the ball 19 and the concave groove 28 of the electrode member 17 increases, the ball 19 can be reliably coupled to the electrode member 17.
【０１０４】更に、具体例８では、前記凹溝２８が前記
導電性板部材１１の前記他方の面に形成される際に、前
記凹溝２８に対応した前記凸面３０が前記導電性板部材
１１の前記一方の面に形成される。この凸面３０が形成
された前記導電性板部材１１と、前記樹脂部材１５とが
接する面積は、前記一方の面に突出した前記凸面３０の
突出量に応じて増えることから、前記樹脂部材１５と前
記導電性板部材１１とを確実に結合することができる。Furthermore, in Example 8, when the concave groove 28 is formed on the other surface of the conductive plate member 11, the convex surface 30 corresponding to the concave groove 28 is formed on the conductive plate member 11. Is formed on the one surface. The area of contact between the resin member 15 and the conductive plate member 11 on which the convex surface 30 is formed increases in accordance with the protrusion amount of the convex surface 30 protruding on the one surface. The conductive plate member 11 can be reliably coupled.
【０１０５】〈具体例９〉図３０〜図３２は、本発明に
係る具体例９の製造工程を示す。具体例９は、前記変形
部２９の形成工程以外の工程は、具体例８と同じであ
る。<Ninth Embodiment> FIGS. 30 to 32 show a manufacturing process of a ninth embodiment according to the present invention. The specific example 9 is the same as the specific example 8 except for the step of forming the deforming portion 29.
【０１０６】図３０に示されているように、前記導電性
板部材１１の前記スリット２０間のそれぞれに、該スリ
ットに沿って連続して伸長する変形部３１がプレス加工
により形成される。具体例８の前記変形部２９は、前記
導電性板部材１１の前記一方の面に前記凸面３０を規定
したが、これに代えて具体例９の前記変形部３１は、前
記導電性板部材１１の前記他方の面に凸面３２を規定
し、前記凸面３２に対応する凹面３３を前記一方の面に
規定する。As shown in FIG. 30, each of the slits 20 of the conductive plate member 11 is formed with a deforming portion 31 which extends continuously along the slits by press working. Although the deforming portion 29 of the specific example 8 defines the convex surface 30 on the one surface of the conductive plate member 11, the deforming portion 31 of the specific example 9 is replaced by the deformable portion 31 of the conductive plate member 11. The convex surface 32 is defined on the other surface, and the concave surface 33 corresponding to the convex surface 32 is defined on the one surface.
【０１０７】図３１に示されているように、前記導電性
板部材１１の前記他方の面に、前記した凸面３０と同様
な台形形状の凸面３２が前記スリット２０間に相互に平
行に形成され、同時的に前記凸面３２に対応した形状の
凹面３３が前記一方の面に形成される。As shown in FIG. 31, a trapezoidal convex surface 32 similar to the convex surface 30 is formed on the other surface of the conductive plate member 11 in parallel with each other between the slits 20. At the same time, a concave surface 33 having a shape corresponding to the convex surface 32 is formed on the one surface.
【０１０８】その後、前記導電性板部材１１の前記凹面
３３が形成された面の中央部には、図３２に示されてい
るように、前記したと同様な半導体チップ１２が配置さ
れ、その各接続部１３と、所定の前記各領域とがボンデ
ィングワイヤ１４を介して電気的に接続された後、前記
したと同様な樹脂部材１５により封止される。Thereafter, as shown in FIG. 32, the same semiconductor chip 12 as described above is arranged in the center of the surface of the conductive plate member 11 on which the concave surface 33 is formed, and each of them is arranged. After the connection portion 13 and each of the predetermined regions are electrically connected via the bonding wire 14, the connection portion 13 is sealed with the same resin member 15 as described above.
【０１０９】前記導電性板部材１１の一方の面には、前
記した凹面３３が形成されていることから、前記樹脂部
材１５は、前記凹面３３の形状に沿って形成される。従
って、前記した凹面３３の形状により、前記導電性板部
材１１の前記一方の面に突出した寸法に応じて、前記樹
脂部材１５と前記凹面３３とが接する面積を増やすこと
ができる。Since the concave surface 33 is formed on one surface of the conductive plate member 11, the resin member 15 is formed along the shape of the concave surface 33. Therefore, due to the shape of the concave surface 33, the area where the resin member 15 and the concave surface 33 are in contact with each other can be increased in accordance with the size of the conductive plate member 11 protruding to the one surface.
【０１１０】更に、樹脂部材１５による前記した封止
後、前記したと同様な例えばソーカットなどの切削手段
により、前記したと同様な複数の分断溝２１が、相互に
平行に、前記導電性板部材１１の前記他方の面に形成さ
れる。この分断溝２１により、前記したと同様に、分断
された前記導電性板部材１１の各領域で各電極部材１７
が形成される。前記樹脂部材１５の底面から露出する前
記各電極部材１７の接合面には、プレス加工により形成
される前記凸面３２が端子部分として露出することか
ら、前記各接合面に端子部分としての前記結合層１８ま
たは前記半田ボール１９を形成する必要がない。Further, after the above-mentioned sealing with the resin member 15, a plurality of cutting grooves 21 similar to the above-mentioned dividing grooves 21 are formed in parallel with each other by a cutting means such as saw cutting similar to the above-mentioned one. 11 is formed on the other surface. By the dividing groove 21, each electrode member 17 is formed in each divided region of the conductive plate member 11 in the same manner as described above.
Is formed. Since the convex surface 32 formed by press working is exposed as a terminal portion on the joint surface of each electrode member 17 exposed from the bottom surface of the resin member 15, the bonding layer as a terminal portion is formed on each joint surface. It is not necessary to form 18 or the solder balls 19.
【０１１１】前記した具体例８の製造方法では、前記し
た具体例におけると同様に、前記樹脂封止後に、前記導
電性板部材１１から各電極部材１７を形成するために、
従来のような前記導電性板部材の縦方向および横方向に
沿って分断加工を行う必要が無く、前記した樹脂封止
後、前記導電性板部材１１に該部材の横方向に沿って分
断加工を行うことにより、前記導電性板部材１１から前
記各電極部材１７を形成することができる。In the manufacturing method of the specific example 8, the electrode members 17 are formed from the conductive plate member 11 after the resin sealing in the same manner as in the specific example described above.
It is not necessary to divide the conductive plate member along the vertical direction and the horizontal direction as in the prior art, and the conductive plate member 11 is divided along the horizontal direction of the member after the resin sealing as described above. By performing the above, each of the electrode members 17 can be formed from the conductive plate member 11.
【０１１２】更に、前記凸面３２が前記導電性板部材１
１の前記他方の面に形成される際に、前記凸面３２に対
応した前記凹面３３が前記導電性板部材１１の前記一方
の面に形成される。この前記凹面３３が形成された前記
導電性板部材１１と、前記樹脂部材１５とが接する面積
は、前記一方の面に凹む前記凹面３３の寸法に応じて増
えることから、前記樹脂部材１５と前記導電性板部材１
１とを確実に結合することができる。Furthermore, the convex surface 32 is the conductive plate member 1
When it is formed on the other surface of No. 1, the concave surface 33 corresponding to the convex surface 32 is formed on the one surface of the conductive plate member 11. The area of contact between the conductive plate member 11 having the concave surface 33 and the resin member 15 increases according to the size of the concave surface 33 recessed in the one surface. Conductive plate member 1
It is possible to surely combine 1 and 1.
【０１１３】更に、具体例９では、前記したプレス加工
および前記切断加工により、前記凸面３２を端子部分と
して形成する。従って、前記電極部材１７の前記接合面
に端子部分として前記結合層１８または前記半田ボール
１９を形成する必要がないことから、前記接続面に前記
端子部分を接続する際に起こり得る接続不良の恐れを無
くすことができる。Furthermore, in Example 9, the convex surface 32 is formed as a terminal portion by the press processing and the cutting processing described above. Therefore, since it is not necessary to form the bonding layer 18 or the solder ball 19 as a terminal portion on the joint surface of the electrode member 17, there is a risk of connection failure that may occur when connecting the terminal portion to the connection surface. Can be eliminated.
【０１１４】[0114]
【発明の効果】本発明に係る製造方法では、前記したよ
うに、半導体チップおよびボンディングワイヤが配置さ
れる導電性板部材の一方の面に、各電極部材のための格
子状に配列された複数の溝が形成され、前記導電性板部
材および該導電性板部材上の前記各部材が樹脂部材で封
止された後、前記樹脂部材の底面に露出する前記導電性
板部材の他方の面が該面から溝が露出するまで研磨され
ることにより、前記樹脂部材内の前記半導体チップおよ
びボンディングワイヤに損傷を与えることなく、各電極
部材が形成される。従って、本発明によれば、前記各電
極部材が形成される際、前記樹脂部材内の各部材の損傷
による不良品の発生を防ぐことができ、生産性の向上を
図ることができる。As described above, in the manufacturing method according to the present invention, a plurality of electrodes arranged in a grid pattern for each electrode member are provided on one surface of the conductive plate member on which the semiconductor chip and the bonding wires are arranged. Groove is formed, and after the conductive plate member and each member on the conductive plate member are sealed with a resin member, the other surface of the conductive plate member exposed at the bottom surface of the resin member is By polishing until the groove is exposed from the surface, each electrode member is formed without damaging the semiconductor chip and the bonding wire in the resin member. Therefore, according to the present invention, when each electrode member is formed, it is possible to prevent the generation of defective products due to damage to each member in the resin member, and it is possible to improve productivity.
【０１１５】更に、本発明に係る前記製造方法によれ
ば、研磨作業で各電極部材を形成することにより、端子
部材の半田付けに先立つ電極部材の酸化膜の除去作業を
省くことができることから、半導体装置の生産性の向上
を得ることができる。更に、本発明に係る前記製造方法
によれば、前記した半導体装置を比較的容易に製造する
ことができる。Further, according to the manufacturing method of the present invention, since each electrode member is formed by the polishing work, the work of removing the oxide film of the electrode member prior to the soldering of the terminal member can be omitted. The productivity of the semiconductor device can be improved. Furthermore, according to the manufacturing method of the present invention, the semiconductor device described above can be manufactured relatively easily.
【０１１６】また、本発明に係る前記製造方法によれ
ば、前記したように、前記導電性板部材に、該部材に形
成される前記溝の深さ寸法以下の深さ寸法を有する凹所
を形成し、該凹所内に前記半導体チップを配置すること
により、該半導体チップの底面を前記樹脂部材から雰囲
気に露出させた半導体装置を形成することができる。従
って、本発明に係る前記半導体装置によれば、前記半導
体チップから発生する熱を雰囲気に直接的に放出するこ
とができ、これにより熱エネルギーによる電気的な特性
の変化を抑制することができる。Further, according to the manufacturing method of the present invention, as described above, the conductive plate member is provided with the recess having a depth dimension equal to or less than the depth dimension of the groove formed in the member. By forming and arranging the semiconductor chip in the recess, it is possible to form a semiconductor device in which the bottom surface of the semiconductor chip is exposed to the atmosphere from the resin member. Therefore, according to the semiconductor device of the present invention, the heat generated from the semiconductor chip can be directly radiated to the atmosphere, and thus the change in the electrical characteristics due to the thermal energy can be suppressed.
【０１１７】本発明に係る他の製造方法によれば、前記
したように、半導体チップおよびボンディングワイヤの
各部材を導電性板部材の一方の面上に配置するに先立
ち、複数のスリットが形成され、該スリットが形成され
た前記導電性板部材上に前記半導体チップおよび前記ボ
ンディングワイヤが樹脂部材で封止された後、前記導電
性板部材のスリット間の領域が前記スリットの伸長方向
に分断されることにより、分断された前記導電性板部材
の各領域で各電極部材が形成されることから、従来のよ
うな前記導電性板部材に該部材の例えば縦方向および横
方向への二度の切断加工を施す必要が無く、前記スリッ
トを横切る方向に沿っての一度の切断工程のみでよい。
これにより、前記各電極部材を形成するための加工工程
で、その切断加工によって樹脂封止された前記半導体チ
ップおよび前記ボンディングワイヤ等が損傷を受ける確
率が半値に低減される。従って、本発明によれば、前記
各電極部材が形成される際、前記樹脂部材内の各部材の
損傷による不良品の発生を低減することができ、生産性
の向上を図ることができる。According to another manufacturing method of the present invention, as described above, a plurality of slits are formed prior to disposing each member of the semiconductor chip and the bonding wire on one surface of the conductive plate member. After the semiconductor chip and the bonding wire are sealed with a resin member on the conductive plate member on which the slits are formed, a region between the slits of the conductive plate member is divided in the extension direction of the slits. As a result, since each electrode member is formed in each region of the divided conductive plate member, the conductive plate member as in the prior art is provided with the member twice, for example, in the vertical direction and the horizontal direction. It is not necessary to perform a cutting process, and only one cutting step is required along the direction crossing the slit.
As a result, the probability that the resin-sealed semiconductor chip, the bonding wire, and the like will be damaged by the cutting process in the processing step for forming the electrode members is reduced to half. Therefore, according to the present invention, when each electrode member is formed, it is possible to reduce the occurrence of defective products due to damage to each member in the resin member, and it is possible to improve productivity.
【図１】図１（ａ）〜図１（ｃ）は、本発明に係る具体
例１の半導体装置の製造方法を示す断面図である。FIG. 1A to FIG. 1C are cross-sectional views showing a method for manufacturing a semiconductor device according to specific example 1 of the present invention.
【図２】図１（ａ）に示された本発明に係る導電性板部
材を示す平面図である。FIG. 2 is a plan view showing a conductive plate member according to the present invention shown in FIG.
【図３】図１（ａ）に示された本発明に係る導電性板部
材、半導体チップおよびボンディングワイヤとの関係を
示す平面図である。FIG. 3 is a plan view showing the relationship between the conductive plate member, the semiconductor chip and the bonding wire according to the present invention shown in FIG. 1 (a).
【図４】図１（ｃ）の結合層に代わり、球状のボールが
形成された半導体装置を示す断面図である。FIG. 4 is a cross-sectional view showing a semiconductor device in which spherical balls are formed instead of the bonding layer of FIG. 1 (c).
【図５】図５（ａ）〜図５（ｃ）は、本発明に係る具体
例２の半導体装置の製造方法を示す断面図である。5 (a) to 5 (c) are cross-sectional views showing a method for manufacturing a semiconductor device of specific example 2 according to the present invention.
【図６】図５（ａ）に示された導電性板部材を示す図２
と同様な平面図である。FIG. 6 is a view showing the conductive plate member shown in FIG. 5 (a).
It is a top view similar to.
【図７】図５（ａ）に示された導電性板部材、半導体チ
ップおよびボンディングワイヤとの関係を示す図３と同
様な平面図である。7 is a plan view similar to FIG. 3, showing the relationship between the conductive plate member, the semiconductor chip, and the bonding wire shown in FIG. 5 (a).
【図８】図５（ｃ）の結合層に代わり、球状のボールが
形成された半導体装置を示す断面図である。8 is a cross-sectional view showing a semiconductor device in which spherical balls are formed instead of the bonding layer of FIG. 5 (c).
【図９】本発明に係る具体例３の導電性板部材を示す平
面図である。FIG. 9 is a plan view showing a conductive plate member of specific example 3 according to the present invention.
【図１０】本発明に係る具体例３の導電性板部材、半導
体チップおよびボンディングワイヤとの関係を前記導電
性板部材の一方の面から見た平面図である。FIG. 10 is a plan view of a relationship between a conductive plate member, a semiconductor chip and a bonding wire of Specific Example 3 according to the present invention as seen from one surface of the conductive plate member.
【図１１】本発明に係る具体例３の導電性板部材をその
一方の面から見た平面図である。FIG. 11 is a plan view of a conductive plate member of specific example 3 according to the present invention as viewed from one surface thereof.
【図１２】本発明に係る具体例３の導電性板部材をその
他方の面から見た平面図である。FIG. 12 is a plan view of a conductive plate member of specific example 3 according to the present invention viewed from the other side.
【図１３】本発明に係る具体例３の半導体装置の製造方
法を示す断面図である。FIG. 13 is a sectional view showing the method for manufacturing the semiconductor device of the third specific example according to the present invention.
【図１４】図１３の結合層に代わり、球状のボールが形
成された本発明に係る具体例３の半導体装置の他の例を
示す断面図である。14 is a cross-sectional view showing another example of the semiconductor device of specific example 3 according to the present invention in which spherical balls are formed instead of the bonding layer of FIG.
【図１５】本発明に係る具体例４の導電性板部材をその
一方の面から見た平面図である。FIG. 15 is a plan view of a conductive plate member of specific example 4 according to the present invention viewed from one surface thereof.
【図１６】本発明に係る具体例４の導電性板部材の横断
面図である。FIG. 16 is a cross-sectional view of a conductive plate member of specific example 4 according to the present invention.
【図１７】本発明に係る具体例４の半導体装置の製造方
法を示す断面図である。FIG. 17 is a cross-sectional view showing the method for manufacturing the semiconductor device of specific example 4 according to the present invention.
【図１８】図１７の結合層に代わり、球状のボールが形
成された本発明に係る具体例４の半導体装置の他の例を
示す断面図である。FIG. 18 is a cross-sectional view showing another example of the semiconductor device of Example 4 according to the present invention in which spherical balls are formed instead of the bonding layer of FIG. 17.
【図１９】本発明に係る具体例５の導電性板部材を示す
平面図である。FIG. 19 is a plan view showing a conductive plate member of specific example 5 according to the present invention.
【図２０】本発明に係る具体例５の導電性板部材、半導
体チップおよびボンディングワイヤとの関係を前記導電
性板部材の一方の面から見た平面図である。FIG. 20 is a plan view of a relationship between a conductive plate member, a semiconductor chip, and a bonding wire of Specific Example 5 according to the present invention, as seen from one surface of the conductive plate member.
【図２１】本発明に係る具体例５の導電性板部材をその
他方の面から見た平面図である。FIG. 21 is a plan view of a conductive plate member of specific example 5 according to the present invention as viewed from the other side.
【図２２】本発明に係る具体例６の導電性板部材を示す
平面図である。FIG. 22 is a plan view showing a conductive plate member of specific example 6 according to the present invention.
【図２３】本発明に係る具体例６の導電性板部材、半導
体チップおよびボンディングワイヤとの関係を示す平面
図である。FIG. 23 is a plan view showing the relationship between a conductive plate member, a semiconductor chip and a bonding wire of Example 6 according to the present invention.
【図２４】本発明に係る具体例７の導電性板部材をその
導電性板部材の他方の面から見た平面図である。FIG. 24 is a plan view of a conductive plate member of specific example 7 according to the present invention as viewed from the other surface of the conductive plate member.
【図２５】本発明に係る具体例７の導電性板部材の横断
面図である。FIG. 25 is a cross-sectional view of a conductive plate member of specific example 7 according to the present invention.
【図２６】本発明に係る具体例７の半導体装置の製造方
法を示す断面図である。FIG. 26 is a cross-sectional view showing the method for manufacturing the semiconductor device of Example 7 according to the present invention.
【図２７】本発明に係る具体例８の導電性板部材をその
一方の面から見た平面図である。FIG. 27 is a plan view of the conductive plate member according to specific example 8 of the present invention as viewed from one side thereof.
【図２８】本発明に係る具体例８の導電性板部材の横断
面図である。FIG. 28 is a transverse cross-sectional view of a conductive plate member of specific example 8 according to the present invention.
【図２９】本発明に係る具体例８の半導体装置の製造方
法を示す断面図である。FIG. 29 is a cross-sectional view showing the method of manufacturing the semiconductor device of Example 8 according to the present invention.
【図３０】本発明に係る具体例９の導電性板部材を該導
電性板部材の一方の面から見た平面図である。FIG. 30 is a plan view of a conductive plate member according to specific example 9 of the present invention as seen from one surface of the conductive plate member.
【図３１】本発明に係る具体例９の導電性板部材の横断
面図である。FIG. 31 is a transverse cross-sectional view of a conductive plate member of specific example 9 according to the present invention.
【図３２】本発明に係る具体例９の半導体装置の製造方
法を示す断面図である。FIG. 32 is a cross-sectional view showing the method of manufacturing the semiconductor device of Example 9 according to the present invention.
１０ 半導体装置 １１ 導電性板部材 １２ 半導体チップ １３ 接続部 １４ ボンディングワイヤ １５ 樹脂部材 １６ 溝 １７ 電極部材 １７ａ 電極部材のためのエリア １７ｂ 電極部材の接合面 １８ 結合層 １９ ボール ２００ 凹所 10 Semiconductor device 11 Conductive plate member 12 semiconductor chips 13 Connection 14 Bonding wire 15 Resin material 16 grooves 17 Electrode member 17a Area for electrode member 17b Bonding surface of electrode member 18 Bonding layer 19 balls 200 recess
Claims (30)
ための複数の接続部が設けられた半導体チップと、該半
導体チップを封入する樹脂部材と、該樹脂部材の底面に
露出して配置され、対応する前記接続部にそれぞれが電
気的に接続された複数の電極部材と、該電極部材の露出
面に接続される端子部材とを備える半導体装置の製造方
法であって、前記電極部材のための導電性板部材の一方
の面に、各電極部材のための領域を区画すべく、格子状
に配列される複数の溝を形成すること、前記導電性板部
材の前記溝が形成された面上に前記半導体チップを配置
しかつ該半導体チップの前記各接続部と該接続部に対応
する前記領域とを電気的に接続すること、前記チップを
封じ込めるべく前記導電性板部材の前記一方の面を樹脂
部材で覆うこと、前記導電性板部材の他方の面を前記溝
に達するまで研磨することにより、前記各領域を電気的
に分離し、分離された各領域で前記各電極部材を形成す
ること、各電極部材に前記端子部材を結合することを含
む半導体装置の製造方法。1. A semiconductor chip in which an integrated circuit is incorporated and provided with a plurality of connecting portions for the integrated circuit, a resin member for encapsulating the semiconductor chip, and an exposed bottom surface of the resin member. A method for manufacturing a semiconductor device, comprising: a plurality of electrode members each electrically connected to the corresponding connection portion; and a terminal member connected to an exposed surface of the electrode member, Forming a plurality of grooves arranged in a grid pattern on one surface of the conductive plate member in order to define a region for each electrode member, and the surface of the conductive plate member on which the groove is formed. Arranging the semiconductor chip thereon and electrically connecting each of the connection parts of the semiconductor chip to the region corresponding to the connection part, and the one surface of the conductive plate member for enclosing the chip. To cover the By polishing the other surface of the conductive plate member until it reaches the groove, the respective regions are electrically separated, and the respective electrode members are formed in the respective separated regions. A method of manufacturing a semiconductor device, the method including coupling a terminal member.
請求項１記載の製造方法。2. The manufacturing method according to claim 1, wherein the depths of the grooves are substantially the same.
請求項１記載の製造方法。3. The manufacturing method according to claim 1, wherein the grooves are formed by cutting.
ある請求項１記載の製造方法。4. The manufacturing method according to claim 1, wherein the polishing of the conductive plate member is mechanical polishing.
磨である請求項１記載の製造方法。5. The manufacturing method according to claim 1, wherein the polishing of the conductive plate member is chemical mechanical polishing.
面に、格子状に配列される複数の溝の深さ以下の深さ寸
法を有し前記半導体チップを受け入れる凹所を形成する
ことを含み、前記導電性板部材の他方の面の研磨で前記
凹所内の前記半導体チップが露出するまで前記研磨を行
うことを特徴とする請求項１記載の製造方法。6. A recess having a depth dimension equal to or less than a depth of a plurality of grooves arranged in a lattice and receiving the semiconductor chip is formed on the one surface of the conductive plate member. 2. The method according to claim 1, further comprising: polishing the other surface of the conductive plate member until the semiconductor chip in the recess is exposed.
央部に形成され、前記接続端子は、前記導電性板部材の
研磨後において前記樹脂部材の底面で露出する前記半導
体チップを取り巻いて配置される請求項６記載の製造方
法。7. The recess is formed substantially in the center of the conductive plate member, and the connection terminal surrounds the semiconductor chip exposed on the bottom surface of the resin member after polishing the conductive plate member. 7. The manufacturing method according to claim 6, wherein the manufacturing method is arranged.
る請求項６記載の製造方法。8. The manufacturing method according to claim 6, wherein the recess is formed by etching.
ための複数の接続部が設けられた半導体チップと、該半
導体チップを封入する樹脂部材と、該樹脂部材の底面に
露出して配置され、対応する前記接続部にそれぞれが電
気的に接続された複数の電極部材と、該電極部材の露出
面に接続される端子部材とを備える半導体装置であっ
て、前記半導体チップの直下に前記電極部材が格子状に
配列されていることを特徴とする半導体装置。9. A semiconductor chip in which an integrated circuit is incorporated and provided with a plurality of connection portions for the integrated circuit, a resin member encapsulating the semiconductor chip, and an exposed surface of a bottom surface of the resin member. A semiconductor device comprising a plurality of electrode members each electrically connected to the corresponding connection portion, and a terminal member connected to an exposed surface of the electrode member, wherein the electrode is provided immediately below the semiconductor chip. A semiconductor device, wherein the members are arranged in a grid pattern.
導体チップと電気的に接続されない電極部材にダミーと
して形成される前記請求項９記載の半導体装置。10. The semiconductor device according to claim 9, wherein a part of the terminal member is formed as a dummy on an electrode member that is not electrically connected to the semiconductor chip.
し、前記溝により互いに区画される複数の領域を形成す
る工程と、前記導電性板部材の前記第１の面上に半導体
チップを搭載し、前記半導体チップ表面に形成された電
極と互いに前記溝により区画されたそれぞれの前記複数
の領域とを電気的に接続する工程と、前記導電性板部材
の前記第１の面と、前記半導体チップとを樹脂封止する
工程と、前記導電性板部材を前記第１の面の反対側の第
２の面から前記樹脂が露出するまで研磨する工程とを含
むことを特徴とする半導体装置の製造方法。11. A step of forming a groove on a first surface of a conductive plate member to form a plurality of regions separated from each other by the groove, and a semiconductor on the first surface of the conductive plate member. Mounting a chip, electrically connecting the electrodes formed on the surface of the semiconductor chip and the plurality of regions partitioned by the grooves, and the first surface of the conductive plate member. And a step of sealing the semiconductor chip with a resin, and a step of polishing the conductive plate member from a second surface opposite to the first surface until the resin is exposed. Manufacturing method of semiconductor device.
造方法において、前記溝は、第１の方向に互いに平行に
延在する複数の第１の溝と、前記第１の方向と実質的に
直交する第２の方向に互いに平行に延在する複数の第２
の溝とを含むことを特徴とする半導体装置の製造方法。12. The method of manufacturing a semiconductor device according to claim 11, wherein the groove includes a plurality of first grooves extending in parallel to each other in a first direction, and substantially the first groove. A plurality of second extending parallel to each other in a second direction orthogonal to each other
And a groove of the semiconductor device.
造方法において、前記溝の深さは、前記導電性板部材の
厚さの１／２以上であることを特徴とする半導体装置の
製造方法。13. The method of manufacturing a semiconductor device according to claim 11, wherein the depth of the groove is ½ or more of the thickness of the conductive plate member. .
造方法において、研磨された前記導電性板部材の表面に
端子部材を形成する工程をさらに含むこと導体装置の製
造方法。14. The method of manufacturing a semiconductor device according to claim 11, further comprising the step of forming a terminal member on the surface of the polished conductive plate member.
のための複数の接続部が設けられた半導体チップと、該
半導体チップを封入する樹脂部材と、該樹脂部材の底面
に露出して配置され、対応する前記接続部にそれぞれが
電気的に接続され、その露出面に端子部分が設けられる
複数の電極部材とを備える半導体装置の製造方法であっ
て、前記電極部材のための導電性板部材上に所定の間隔
をおいて相互に平行に伸長しかつ前記導電性板部材の一
方の面から他方の面へ貫通する複数のスリットを形成す
ること、その後、前記導電性板部材の前記一方の面上の
所定の位置に前記半導体チップを配置し、かつ該半導体
チップの前記各接続部と該接続部に対応する前記導電性
板部材の前記スリット間の部位とを電気的に接続するこ
と、前記チップを封じ込めるべく前記導電性板部材の前
記一方の面を樹脂部材で覆うこと、前記導電性板部材の
前記スリット間の前記各部位を前記スリットの伸長方向
へ分断することにより、分断された各領域で前記各電極
部材を形成することを含む半導体装置の製造方法。15. A semiconductor chip in which an integrated circuit is incorporated and provided with a plurality of connecting portions for the integrated circuit, a resin member for encapsulating the semiconductor chip, and an exposed bottom surface of the resin member. And a plurality of electrode members each of which is electrically connected to the corresponding connection portion and has a terminal portion provided on an exposed surface thereof, the method being a conductive plate member for the electrode member. Forming a plurality of slits extending parallel to each other at a predetermined interval and penetrating from one surface of the conductive plate member to the other surface, and then forming one of the one of the conductive plate members. Arranging the semiconductor chip at a predetermined position on the surface, and electrically connecting each of the connecting portions of the semiconductor chip and a portion between the slits of the conductive plate member corresponding to the connecting portion, Seal the chip By covering the one surface of the conductive plate member with a resin member so as to be contained, by dividing each part between the slits of the conductive plate member in the extension direction of the slit, each divided region A method of manufacturing a semiconductor device, comprising forming each of the electrode members.
成される前記請求項１５記載の製造方法。16. The manufacturing method according to claim 15, wherein the slit is formed by etching.
より形成される前記請求項１５記載の製造方法。17. The manufacturing method according to claim 15, wherein the slit is formed by punching press working.
した分断は、切削加工により行われる前記請求項１５記
載の製造方法。18. The manufacturing method according to claim 15, wherein the dividing for forming each of the electrode members is performed by cutting.
した分断は、穿孔により行われる前記請求項１５記載の
製造方法。19. The manufacturing method according to claim 15, wherein the dividing for forming each of the electrode members is performed by perforation.
ーを用いて行われる前記請求項１９記載の製造方法。20. The manufacturing method according to claim 19, wherein the perforation is performed using a drill or a laser.
性板部材の板厚方向に沿って前記一方の面から前記他方
の面に向けて漸増する請求項１５記載の製造方法。21. The manufacturing method according to claim 15, wherein the width dimension of each slit is gradually increased from the one surface toward the other surface along the plate thickness direction of the conductive plate member.
伸長方向へ所定の間隔をおいてそれぞれが隣り合う前記
スリットに向けて互いに相近づく方向へ伸長する伸長部
であってその伸長端が相互に間隔をおく伸長部を有する
ことを特徴とする請求項１５記載の製造方法。22. The plurality of slits are extension parts that extend at a predetermined interval in the extension direction of the slits in a direction toward each other toward the adjacent slits, and the extension ends thereof are mutually adjacent. The manufacturing method according to claim 15, further comprising extending portions that are spaced apart from each other.
り合う１対のスリットの向かい合う縁部は、互いに対応
する位置に前記縁部に沿って所定の間隔をおいて形成さ
れる複数の直線部分と、該各直線部分間で該直線部分に
連続する凹状曲線部分とを有することを特徴とする請求
項１５記載の製造方法。23. The edge portions of a pair of slits adjacent to each other among the plurality of slits have a plurality of straight line portions formed at predetermined positions along the edge portion at positions corresponding to each other. 16. The manufacturing method according to claim 15, further comprising a concave curved portion that is continuous with the straight line portion between the straight line portions.
は、該導電性部材への前記半導体チップの配置に先立
ち、前記したスリット間に、該スリットと平行に伸長す
る凹溝が形成され、前記した分断による前記電極部材の
形成後、前記端子部分を形成するための端子部材が前記
各凹溝の部分に結合される請求項１５記載の製造方法。24. On the other surface of the conductive plate member, a concave groove extending parallel to the slit is formed between the slits prior to the arrangement of the semiconductor chip on the conductive member. 16. The manufacturing method according to claim 15, wherein a terminal member for forming the terminal portion is coupled to each of the recessed groove portions after the electrode member is formed by the dividing.
れる請求項２４記載の製造方法。25. The manufacturing method according to claim 24, wherein the groove is formed by etching.
電性板部材に形成される変形部であって前記スリットに
沿って伸長する変形部によって前記導電性板部材の前記
他方の面に規定される凹面である請求項２４記載の製造
方法。26. The groove is defined on the other surface of the conductive plate member by a deformed part formed on the conductive plate member by press working and extending along the slit. The manufacturing method according to claim 24, which is a concave surface.
の距離の増大に伴い増大する請求項２４記載の製造方
法。27. The manufacturing method according to claim 24, wherein the width dimension of the concave groove increases as the distance from the bottom surface of the groove increases.
の前記一方の面には、前記凹溝に対応した凸面が形成さ
れる請求項２６記載の製造方法。28. The manufacturing method according to claim 26, wherein a convex surface corresponding to the concave groove is formed on the one surface of the conductive plate member by the deforming portion.
材への前記半導体チップの配置に先立ち、プレス加工に
より、前記したスリット間に該スリットと平行に伸長す
る変形部が形成され、該変形部により前記他方の面へ突
出する凸面が規定される請求項１５記載の製造方法。29. The conductive plate member is formed with a deformable portion extending between the slits in parallel with the slits by press working prior to disposing the semiconductor chip on the conductive plate member. The manufacturing method according to claim 15, wherein a convex surface protruding to the other surface is defined by the deformable portion.
寸法を漸減させる台形の断面形状を有する請求項２９記
載の製造方法。30. The manufacturing method according to claim 29, wherein the convex surface has a trapezoidal cross-sectional shape in which the width dimension thereof is gradually reduced toward the top thereof.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001349264A JP3650970B2 (en) | 2001-08-21 | 2001-11-14 | Manufacturing method of semiconductor device |
| US10/291,537 US7001798B2 (en) | 2001-11-14 | 2002-11-12 | Method of manufacturing semiconductor device |
| US11/222,911 US7443012B2 (en) | 2001-11-14 | 2005-09-12 | Semiconductor device |
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|---|---|---|---|
| JP2001-249906 | 2001-08-21 | ||
| JP2001249906 | 2001-08-21 | ||
| JP2001349264A JP3650970B2 (en) | 2001-08-21 | 2001-11-14 | Manufacturing method of semiconductor device |
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| Publication Number | Publication Date |
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- 2001-11-14 JP JP2001349264A patent/JP3650970B2/en not_active Expired - Fee Related
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| WO2010150365A1 (en) * | 2009-06-24 | 2010-12-29 | アオイ電子株式会社 | Semiconductor device and method for manufacturing semiconductor device |
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