JP2003031652A - Semiconductor device and its manufacturing method - Google Patents
Semiconductor device and its manufacturing methodInfo
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- JP2003031652A JP2003031652A JP2001218363A JP2001218363A JP2003031652A JP 2003031652 A JP2003031652 A JP 2003031652A JP 2001218363 A JP2001218363 A JP 2001218363A JP 2001218363 A JP2001218363 A JP 2001218363A JP 2003031652 A JP2003031652 A JP 2003031652A
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- insulating film
- film
- water
- semiconductor device
- layer
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置および
その製造方法に関し、詳しくは有機絶縁膜への水分の透
過を抑えた半導体装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device in which moisture permeation to an organic insulating film is suppressed and a manufacturing method thereof.
【０００２】[0002]
【従来の技術】近年、ＬＳＩの微細化にともない、銅配
線と低誘電率絶縁膜とを組み合わせた構造が必須となっ
ている。このなかでも、低誘電率膜として有機膜を使っ
た構造が試みられている。これは、例えば、Proceeding
s of the IEEE 2000 International Technology Confer
ence p.270-272 党Copper Dual Damascene Interconnec
ts with Very Low-k Dielectrics Targeting for 130nm
Node媒に詳細に開示されている。この文献の中で記述
される絶縁膜は、同文献のp.271-Figure 1(D)に示され
ているように、すなわち、図９に示すように、ビアホー
ル１１１が形成されるビア層１０１にＳｉＯ2 膜を用
い、その上に配線溝１３１が形成される配線層１２１が
形成され、この配線層１２１は、有機絶縁膜である低誘
電率膜１２３とＳｉＯ2 膜１２５とを積層して形成され
ている。2. Description of the Related Art In recent years, with the miniaturization of LSIs, a structure in which copper wiring and a low dielectric constant insulating film are combined has become essential. Among them, a structure using an organic film as a low dielectric constant film has been tried. This is, for example, Proceeding
s of the IEEE 2000 International Technology Confer
ence p.270-272 Party Copper Dual Damascene Interconnec
ts with Very Low-k Dielectrics Targeting for 130nm
It is disclosed in detail in the Node medium. The insulating film described in this document has a via layer 101 in which a via hole 111 is formed as shown in p.271-Figure 1 (D) of the document, that is, as shown in FIG. A SiO 2 film is used for the wiring layer 121, and a wiring layer 121 in which a wiring groove 131 is formed is formed on the SiO 2 film. Has been formed.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、ビア層
が吸湿性を持つＳｉＯ2 膜で形成されているため、この
ＳｉＯ2 膜からの水の脱ガスによって、上層の有機絶縁
膜が吸湿を起こす。有機膜は一般に吸湿により加水分解
を起こして変質する。この変質によって有機絶縁膜の耐
熱性が劣化する。However, since the via layer is formed of a hygroscopic SiO 2 film, degassing of water from this SiO 2 film causes the upper organic insulating film to absorb moisture. Generally, an organic film is hydrolyzed by moisture absorption and deteriorates. This alteration deteriorates the heat resistance of the organic insulating film.
【０００４】[0004]
【課題を解決するための手段】本発明は、上記課題を解
決するためになされた半導体装置およびその製造方法で
ある。SUMMARY OF THE INVENTION The present invention is a semiconductor device and a method of manufacturing the same which are made to solve the above problems.
【０００５】本発明の半導体装置は、無機絶縁膜上に有
機絶縁膜を積層した絶縁膜構造を有する半導体装置であ
って、前記絶縁膜構造は、吸湿性を有する第１の絶縁膜
と、前記第１の絶縁膜上に形成された上層への水の透過
を減少させる第２の絶縁膜と、前記第２の絶縁膜上に形
成された有機絶縁膜とを有するものである。A semiconductor device of the present invention is a semiconductor device having an insulating film structure in which an organic insulating film is laminated on an inorganic insulating film, wherein the insulating film structure comprises a first insulating film having a hygroscopic property, and It has a second insulating film formed on the first insulating film to reduce the permeation of water to the upper layer, and an organic insulating film formed on the second insulating film.
【０００６】上記半導体装置では、吸湿性を有する第１
の絶縁膜上に、上層への水の透過を減少させる第２の絶
縁膜を介して有機絶縁膜が形成されている絶縁膜構造と
なっていることから、第１の絶縁膜が吸水性を有するＳ
ｉＯ2 膜で形成されていても、第２の絶縁膜が上層への
水の透過を抑えるため、第１の絶縁膜より上層の有機絶
縁膜に水が到達しない。そのため、水による有機絶縁膜
の変質を防ぐことができる。In the above semiconductor device, the first hygroscopic
Since the organic insulating film is formed on the above insulating film via the second insulating film that reduces the permeation of water to the upper layer, the first insulating film absorbs water. Have S
Even if it is formed of the iO 2 film, the second insulating film suppresses the permeation of water to the upper layer, so that the water does not reach the organic insulating film above the first insulating film. Therefore, the deterioration of the organic insulating film due to water can be prevented.
【０００７】本発明の半導体装置の製造方法は、無機絶
縁膜上に有機絶縁膜を積層して絶縁膜構造を形成する半
導体装置の製造方法において、前記絶縁膜構造は、吸湿
性を有する第１の絶縁膜を形成する工程と、前記第１の
絶縁膜上に上層への水の透過を減少させる第２の絶縁膜
を形成する工程と、前記第２の絶縁膜上に有機絶縁膜を
形成する工程とを備えている。A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which an organic insulating film is laminated on an inorganic insulating film to form an insulating film structure, wherein the insulating film structure has a hygroscopic property. Forming an insulating film, forming a second insulating film on the first insulating film to reduce water permeation to an upper layer, and forming an organic insulating film on the second insulating film. And the process of doing.
【０００８】上記半導体装置の製造方法では、吸湿性を
有する第１の絶縁膜上に、上層への水の透過を減少させ
る第２の絶縁膜を介して有機絶縁膜を形成することか
ら、第１の絶縁膜が吸水性を有するＳｉＯ2 膜で形成し
ても、第２の絶縁膜が上層への水の透過を抑えるため、
第１の絶縁膜より上層の有機絶縁膜に水が到達しない。
そのため、水による有機絶縁膜の変質が防止される。In the above method of manufacturing a semiconductor device, the organic insulating film is formed on the first insulating film having hygroscopicity via the second insulating film that reduces water permeation to the upper layer. Even if the first insulating film is formed of a water-absorbing SiO 2 film, the second insulating film suppresses the permeation of water to the upper layer.
Water does not reach the organic insulating film above the first insulating film.
Therefore, alteration of the organic insulating film due to water is prevented.
【０００９】[0009]
【発明の実施の形態】本発明の半導体装置に係る一実施
の形態を、図１の概略構成断面図によって説明する。BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a semiconductor device of the present invention will be described with reference to the schematic cross-sectional view of FIG.
【００１０】図１に示すように、基体１１上には無機絶
縁膜からなる第１の絶縁膜１２が形成されている。この
第１の絶縁膜１２は、例えば無機材料である酸化シリコ
ン膜からなり、接続孔（例えばビアコンタクト）が形成
される接続層となる。上記酸化シリコン膜は吸湿性を有
することが知られている。この第１の絶縁膜１２上に
は、上層への水の透過を減少させる第２の絶縁膜１３が
形成されている。この第２の絶縁膜１３は、例えば窒化
シリコン膜からなり、例えば１０ｎｍ〜１００ｎｍの膜
厚からなる。上記第２の絶縁膜１３上には有機絶縁膜１
４が形成されている。上記第２の絶縁膜１３および上記
有機絶縁膜１４で配線が形成される配線層を構成してい
る。As shown in FIG. 1, a first insulating film 12 made of an inorganic insulating film is formed on a substrate 11. The first insulating film 12 is made of, for example, a silicon oxide film which is an inorganic material, and serves as a connection layer in which a connection hole (for example, a via contact) is formed. It is known that the silicon oxide film has hygroscopicity. A second insulating film 13 that reduces the permeation of water to the upper layer is formed on the first insulating film 12. The second insulating film 13 is made of, for example, a silicon nitride film and has a film thickness of, for example, 10 nm to 100 nm. The organic insulating film 1 is formed on the second insulating film 13.
4 are formed. The second insulating film 13 and the organic insulating film 14 form a wiring layer in which wiring is formed.
【００１１】上記有機絶縁膜１４は、ポリアリールエー
テルのようなアリールエーテル系樹脂、芳香族ポリマ
ー、ポリイミド、フッ素添加ポリイミド、フッ素樹脂お
よびベンゾシクロブテンのうちの一つもしくはこれらの
うちの複数を用いた積層体で形成することができる。上
記アリールエーテル系樹脂としては、例えばアライドシ
グナル社製のＦＬＡＲＥ、ダウケミカル社製のＳｉＬ
Ｋ、シューマッカー社製のＶＥ等が知られている。ここ
ではＳｉＬＫを用いた。The organic insulating film 14 is made of one or more of an aryl ether resin such as polyaryl ether, an aromatic polymer, a polyimide, a fluorinated polyimide, a fluororesin and benzocyclobutene. It can be formed of a laminated body. Examples of the aryl ether resin include FLARE manufactured by Allied Signal Co., and SiL manufactured by Dow Chemical Co.
K, VE manufactured by Shoe Macker Company, etc. are known. Here, SiLK was used.
【００１２】上記第１の絶縁膜１２には接続孔（例えば
ビアホール）１５が形成され、上記第２の絶縁膜１３お
よび上記有機絶縁膜１４には配線溝１６が形成されてい
る。上記配線溝１６および接続孔１５の内面にはバリア
メタル層２１が形成され、そのバリアメタル層２１を介
して上記接続孔１５の内部には導電体からなるプラグ２
２が形成され、上記配線溝１６の内部には上記バリアメ
タル層２１を介して導電体からなるもので上記プラグ２
２に接続する配線２３が形成されている。上記プラグ２
２および上記配線２３は一体に形成されたものであって
も、別体に形成されたものであっても良く、例えば銅の
ような金属材料からなる。A connection hole (for example, a via hole) 15 is formed in the first insulating film 12, and a wiring groove 16 is formed in the second insulating film 13 and the organic insulating film 14. A barrier metal layer 21 is formed on the inner surfaces of the wiring groove 16 and the connection hole 15, and the plug 2 made of a conductor is provided inside the connection hole 15 via the barrier metal layer 21.
2 is formed and is made of a conductor inside the wiring groove 16 via the barrier metal layer 21.
The wiring 23 connected to 2 is formed. Above plug 2
2 and the wiring 23 may be integrally formed or separately formed, and are made of a metal material such as copper.
【００１３】上記半導体装置では、吸湿性を有する第１
の絶縁膜１２上に、上層への水の透過を減少させる第２
の絶縁膜１３を介して有機絶縁膜１４が形成されている
絶縁膜構造となっていることから、第１の絶縁膜１２が
吸水性を有するＳｉＯ2 膜で形成されていても、第２の
絶縁膜１３が上層への水の透過を抑えるため、第１の絶
縁膜１２より上層の有機絶縁膜１４に水が到達しない。
そのため、水による有機絶縁膜１４の変質を防ぐことが
できる。In the above semiconductor device, the first hygroscopic
On the insulating film 12 of the second to reduce the permeation of water to the upper layer
Since the organic insulating film 14 is formed with the organic insulating film 14 interposed therebetween, even if the first insulating film 12 is formed of a water-absorbing SiO 2 film, Since the insulating film 13 suppresses the permeation of water to the upper layer, the water does not reach the organic insulating film 14 above the first insulating film 12.
Therefore, alteration of the organic insulating film 14 due to water can be prevented.
【００１４】次に、図２に示すような試料１〜５を用意
し、水分の透過を調べた。Next, samples 1 to 5 as shown in FIG. 2 were prepared, and the permeation of water was examined.
【００１５】図２の（１）に示すように、試料１は、厚
さが３００ｎｍの熱酸化膜３１上に厚さが４００ｎｍの
プラズマ酸化シリコン（ｐ−ＳｉＯ）膜３２を形成した
ものである。As shown in (1) of FIG. 2, the sample 1 is one in which a plasma silicon oxide (p-SiO) film 32 having a thickness of 400 nm is formed on a thermal oxide film 31 having a thickness of 300 nm. .
【００１６】図２の（２）に示すように、試料２は、厚
さが３００ｎｍの熱酸化膜３１上に厚さが４００ｎｍの
プラズマ酸化シリコン（ｐ−ＳｉＯ）膜３２を形成し、
さらに厚さが２５０ｎｍの有機絶縁膜（例えばＳｉＬＫ
を用いた）３４を形成したものである。As shown in FIG. 2 (2), in the sample 2, a plasma silicon oxide (p-SiO) film 32 having a thickness of 400 nm is formed on a thermal oxide film 31 having a thickness of 300 nm,
Further, an organic insulating film having a thickness of 250 nm (for example, SiLK
Is formed).
【００１７】図２の（３）に示すように、試料３は、厚
さが３００ｎｍの熱酸化膜３１上に厚さが４００ｎｍの
プラズマ酸化シリコン（ｐ−ＳｉＯ）膜３２を形成し、
さらに厚さが３０ｎｍのプラズマ窒化シリコン（ｐ−Ｓ
ｉＮ）膜３３を形成したものである。As shown in FIG. 2 (3), in the sample 3, a plasma silicon oxide (p-SiO) film 32 having a thickness of 400 nm is formed on a thermal oxide film 31 having a thickness of 300 nm,
Furthermore, plasma silicon nitride (p-S
The iN) film 33 is formed.
【００１８】図２の（４）に示すように、試料４は、厚
さが３００ｎｍの熱酸化膜３１上に厚さが４００ｎｍの
プラズマ酸化シリコン（ｐ−ＳｉＯ）膜３２、厚さが２
５０ｎｍの有機絶縁膜３４（例えばＳｉＬＫ膜）、厚さ
が３００ｎｍのプラズマ酸化シリコン（ｐ−ＳｉＯ）膜
３５を順に積層形成したもので、プラズマ酸化シリコン
膜３５と有機絶縁膜３４とに溝３６を形成したものであ
る。As shown in (4) of FIG. 2, the sample 4 has a plasma silicon oxide (p-SiO) film 32 of 400 nm thick and a thermal oxide film 31 of 300 nm thick, and a thickness of 2 nm.
A 50 nm organic insulating film 34 (for example, a SiLK film) and a 300 nm-thick plasma silicon oxide (p-SiO) film 35 are laminated in this order. A groove 36 is formed in the plasma silicon oxide film 35 and the organic insulating film 34. It was formed.
【００１９】図２の（５）に示すように、試料５は、厚
さが３００ｎｍの熱酸化膜３１上に厚さが４００ｎｍの
プラズマ酸化シリコン（ｐ−ＳｉＯ）膜３２、厚さが３
０ｎｍのプラズマ窒化シリコン（ｐ−ＳｉＮ）膜３３、
厚さが２５０ｎｍの有機絶縁膜（例えばＳｉＬＫを用い
た）３４、厚さが３００ｎｍのプラズマ酸化シリコン
（ｐ−ＳｉＯ）膜３５を順に積層形成したもので、プラ
ズマ酸化シリコン膜３５と有機絶縁膜３４とに溝３６を
形成したものである。As shown in FIG. 2 (5), the sample 5 has a plasma oxide silicon (p-SiO) film 32 having a thickness of 400 nm and a thickness of 3 having a thickness of 3 on the thermal oxide film 31 having a thickness of 300 nm.
0 nm plasma silicon nitride (p-SiN) film 33,
A 250 nm-thick organic insulating film (using SiLK, for example) 34 and a 300 nm-thick plasma silicon oxide (p-SiO) film 35 are laminated in this order, and the plasma silicon oxide film 35 and the organic insulating film 34 are formed. A groove 36 is formed in the groove.
【００２０】次に、上記試料１〜５についてＴＤＳ（Th
ermal Decomposition Spectroscopy）によりデータを取
得した。その結果を図３〜図７によって説明する。各図
において、縦軸はイオン電流を表し、横軸は測定温度を
表す。また各図ではMass. No.＝１８の水の脱ガスに注
目する。Next, the TDS (Th
ermal Decomposition Spectroscopy). The results will be described with reference to FIGS. In each figure, the vertical axis represents the ion current and the horizontal axis represents the measured temperature. Also, in each figure, pay attention to the degassing of water with Mass. No. = 18.
【００２１】試料１は、図３に示すように、Mass. No.
＝１８のピークが大きくでており、プラズマ酸化シリコ
ン膜３２が吸水していることがわかる。Sample 1, as shown in FIG.
A large peak at = 18 indicates that the plasma silicon oxide film 32 is absorbing water.
【００２２】試料２は、図４に示すように、Mass. No.
＝１８のピークが上記試料１よりも大きくでており、有
機絶縁膜３４のＳｉＬＫ膜が変質していることがわか
る。Sample 2, as shown in FIG.
The peak of = 18 is larger than that of the sample 1 and it can be seen that the SiLK film of the organic insulating film 34 is degenerated.
【００２３】試料３は、図５に示すように、Mass. No.
＝１８のピークが上記試料１よりも小さくなっており、
プラズマ窒化シリコン膜３３によりプラズマ酸化シリコ
ン膜３２の脱ガスが抑制されていることがわかる。Sample 3, as shown in FIG.
= 18 peak is smaller than the above sample 1,
It can be seen that the degassing of the plasma silicon oxide film 32 is suppressed by the plasma silicon nitride film 33.
【００２４】試料４は図６に示すように、試料５は図７
に示すように、試料４より試料５のほうが、Mass. No.
＝１８のピークが小さくなっている。このことから、プ
ラズマ窒化シリコン膜３３によって上層の有機絶縁膜
（例えばＳｉＬＫ膜）３４の変質が抑えられ、試料５は
良好な絶縁膜構造となっていることがわかる。Sample 4 is shown in FIG. 6 and sample 5 is shown in FIG.
As shown in, the sample 5 has a larger mass than the sample 4.
The peak at = 18 is small. From this, it is understood that the plasma silicon nitride film 33 suppresses the alteration of the upper organic insulating film (for example, the SiLK film) 34, and the sample 5 has a good insulating film structure.
【００２５】上記実施の形態では、水の透過を抑える第
２の絶縁膜１３として窒化シリコンを用いたが、その代
わりに窒化酸化シリコン（ＳｉＯＮ）、窒化炭化シリコ
ン（ＳｉＣＮ）、炭化シリコン（ＳｉＣ）等の水の透過
を抑える膜を用いることができる。In the above embodiment, silicon nitride is used as the second insulating film 13 that suppresses the permeation of water, but silicon nitride oxide (SiON), silicon nitride carbide (SiCN), silicon carbide (SiC) is used instead. A membrane that suppresses the permeation of water can be used.
【００２６】また上記実施の形態では、第１の絶縁膜１
２として吸湿性を持つ酸化シリコン（ＳｉＯ2 ）を用い
たが、本発明では吸湿性を有する全ての膜が対象とな
る。このような吸湿性を有する膜の一例としては、フッ
素含む酸化シリコン（ＳｉＯＦ）、炭素を含む酸化シリ
コン（ＳｉＯＣ）、リンシリケートガラス（ＰＳＧ）、
ホウ素リンシリケートガラス（ＢＰＳＧ）、ＳＯＧ（Sp
in on glass）等がある。In the above embodiment, the first insulating film 1 is used.
Although silicon oxide (SiO 2 ) having a hygroscopic property was used as 2 , the present invention is applicable to all films having a hygroscopic property. Examples of such a film having hygroscopicity include silicon oxide containing fluorine (SiOF), silicon oxide containing carbon (SiOC), phosphosilicate glass (PSG),
Boron phosphorus silicate glass (BPSG), SOG (Sp
in on glass) etc.
【００２７】次に、本発明の半導体装置の製造方法に係
る一実施の形態を、図８の概略構成断面図によって説明
する。ここでは、一例として、上記説明した本発明の構
成を取り入れた絶縁膜構造に対して２層ハードマスク法
を用いて溝配線を形成する方法について説明する。Next, one embodiment of the method for manufacturing a semiconductor device of the present invention will be described with reference to the schematic cross-sectional view of FIG. Here, as an example, a method of forming a groove wiring by using a two-layer hard mask method for an insulating film structure incorporating the above-described configuration of the present invention will be described.
【００２８】図８の（１）に示すように、基体１１上
に、バリア層５１、接続孔が形成される接続層となる第
１の絶縁膜１２、上層への水の透過を防止する第２の絶
縁膜１３、および配線が形成される配線層となる有機絶
縁膜１４を順に積層形成する。As shown in (1) of FIG. 8, a barrier layer 51, a first insulating film 12 serving as a connection layer in which a connection hole is formed, and a first layer for preventing water from permeating to the upper layer are formed on the substrate 11. The second insulating film 13 and the organic insulating film 14 to be the wiring layer on which the wiring is formed are sequentially laminated.
【００２９】上記バリア層５１は、一例として厚さが５
０ｎｍの窒化シリコン(ＳｉＮ)膜で形成する。上記第１
の絶縁膜１２は、一例として厚さが５００ｎｍのＳｉＯ
2 膜で形成する。上記第２の絶縁膜１３は、一例として
厚さが３０ｎｍの窒化シリコン（ＳｉＮ）膜で形成す
る。上記有機絶縁膜１４は、一例として厚さが４００ｎ
ｍのポリアリールエーテル系樹脂（例えばＳｉＬＫ）膜
で形成する。The barrier layer 51 has a thickness of 5 as an example.
It is formed of a 0 nm silicon nitride (SiN) film. First above
The insulating film 12 of is, for example, SiO 2 with a thickness of 500 nm.
Formed with two films. The second insulating film 13 is formed of, for example, a silicon nitride (SiN) film having a thickness of 30 nm. The organic insulating film 14 has a thickness of 400 n, for example.
m polyaryl ether resin (for example, SiLK) film.
【００３０】上記有機絶縁膜１４は、ポリアリールエー
テルの他に、アリールエーテル系樹脂、芳香族ポリマ
ー、ポリイミド、フッ素添加ポリイミド、フッ素樹脂お
よびベンゾシクロブテンのうちの一つもしくはこれらの
うちの複数を用いた積層体で形成することができる。The organic insulating film 14 contains one or more of an aryl ether resin, an aromatic polymer, a polyimide, a fluorinated polyimide, a fluororesin, and benzocyclobutene, in addition to the polyaryl ether. It can be formed from the laminated body used.
【００３１】次いで、上記有機絶縁膜１４上に第１のハ
ードマスク層５２を、例えば２００ｎｍの厚さの酸化シ
リコン膜で形成する。さらに、第２のハードマスク層５
３を、例えば２００ｎｍの厚さの窒化シリコン膜で形成
する。次いで、第２のハードマスク層５３上にレジスト
膜（図示せず）を形成し、リソグラフィー技術によって
配線溝パターンをレジスト膜に形成する。そして、この
レジストパターンをマスクに用いて第２のハードマスク
層５３のエッチングを行い、第２のハードマスク層５３
に配線溝パターン５４を形成する。その後、上記レジス
ト膜を除去する。Next, a first hard mask layer 52 is formed on the organic insulating film 14 with a silicon oxide film having a thickness of 200 nm, for example. In addition, the second hard mask layer 5
3 is formed of a silicon nitride film having a thickness of 200 nm, for example. Next, a resist film (not shown) is formed on the second hard mask layer 53, and a wiring groove pattern is formed in the resist film by a lithography technique. Then, the second hard mask layer 53 is etched by using this resist pattern as a mask, and the second hard mask layer 53 is etched.
A wiring groove pattern 54 is formed on the. Then, the resist film is removed.
【００３２】次いで、図８の（２）に示すように、上記
第２のハードマスク層５３上および配線溝パターン５４
上にレジスト膜７１を形成し、リソグラフィー技術によ
ってレジスト膜７１に接続孔パターン７２を形成する。Next, as shown in FIG. 8B, the second hard mask layer 53 and the wiring groove pattern 54 are formed.
A resist film 71 is formed thereon, and a contact hole pattern 72 is formed in the resist film 71 by a lithographic technique.
【００３３】そして、図８の（３）に示すように、上記
接続孔パターン７２を形成した上記レジスト膜７１をマ
スクに用いて、第１のハードマスク層５２のエッチング
を行い、第１のハードマスク層５２に接続孔パターン５
５を延長形成する。Then, as shown in FIG. 8C, the first hard mask layer 52 is etched by using the resist film 71 having the connection hole pattern 72 as a mask to etch the first hard mask layer 52. Connection hole pattern 5 on the mask layer 52
5 is extended.
【００３４】次に、図８の（４）に示すように、上記第
１、第２のハードマスク５２、５３を用いて上記有機絶
縁膜１４のエッチングを行い、上記接続孔パターン７２
を延長形成する。このエッチングでは上記レジスト膜７
１〔図８の（４）参照〕も同時にエッチングされて除去
される。Next, as shown in (4) of FIG. 8, the organic insulating film 14 is etched using the first and second hard masks 52 and 53 to form the connection hole pattern 72.
To form an extension. In this etching, the resist film 7
1 (see (4) in FIG. 8) is also etched and removed at the same time.
【００３５】次に、図８の（５）に示すように、第１の
ハードマスクをマスクとして第２の絶縁膜１３をエッチ
ングした後、上記第２のハードマスク５３を用いて第１
のハードマスク層５２をエッチングし、配線溝パターン
５４を延長形成する。そのとき、上記有機絶縁膜１４が
マスクとなって、第１の絶縁膜１２に接続孔パターン５
５を転写した接続孔１５を形成する。このエッチングで
は、第２の絶縁膜である窒化シリコンをエッチングする
が、その膜厚は３０ｎｍであるため、窒化シリコンから
なる第２のハードマスク層５３は１００ｎｍ以上の厚さ
が残る。そのため、第２のハードマスク層５３は第１の
ハードマスク５２のエッチング時にマスクとして十分に
機能する。Next, as shown in FIG. 8 (5), after the second insulating film 13 is etched by using the first hard mask as a mask, the first hard mask 53 is used to perform the first etching.
The hard mask layer 52 is etched to form a wiring groove pattern 54 as an extension. At that time, the organic insulating film 14 serves as a mask to form the connection hole pattern 5 in the first insulating film 12.
The connection hole 15 to which 5 is transferred is formed. In this etching, silicon nitride, which is the second insulating film, is etched. Since the film thickness is 30 nm, the second hard mask layer 53 made of silicon nitride remains with a thickness of 100 nm or more. Therefore, the second hard mask layer 53 sufficiently functions as a mask when etching the first hard mask 52.
【００３６】次に、図８の（６）に示すように、上記第
２、第１のハードマスク５３、５２を用いて上記有機絶
縁膜１４をエッチングし、配線溝１６を形成する。Next, as shown in (6) of FIG. 8, the organic insulating film 14 is etched using the second and first hard masks 53 and 52 to form the wiring groove 16.
【００３７】次いで、図８の（７）に示すように、窒化
シリコンのエッチングを行い、接続孔１５底部のバリア
層５１をエッチングして、接続孔１５を基体１１に到達
させる。このエッチングでは、オーバエッチングを行う
ため、窒化シリコンからなる第２のハードマスク層５３
〔図８の（６）参照〕および配線溝１６内に露出する第
２の絶縁膜１３もエッチングによって除去される。その
後、図示はしないが、第１のハードマスク層５２をエッ
チングして除去してもよい。ここでは、第１のハードマ
スク層５２を除去しない場合を説明する。Then, as shown in FIG. 8 (7), the silicon nitride is etched to etch the barrier layer 51 at the bottom of the contact hole 15 so that the contact hole 15 reaches the base 11. Since this etching is over-etching, the second hard mask layer 53 made of silicon nitride is used.
[See (6) in FIG. 8] and the second insulating film 13 exposed in the wiring groove 16 are also removed by etching. Thereafter, although not shown, the first hard mask layer 52 may be removed by etching. Here, the case where the first hard mask layer 52 is not removed will be described.
【００３８】次に、図８の（８）に示すように、上記配
線溝１６および接続孔１５の内面にバリア層２１を、例
えば窒化タンタル（ＴａＮ）を３０ｎｍの厚さに堆積し
て形成する。このバリア層２１は第１のハードマスク５
２上にも形成される。Next, as shown in FIG. 8 (8), a barrier layer 21 is formed on the inner surfaces of the wiring groove 16 and the contact hole 15 by depositing, for example, tantalum nitride (TaN) to a thickness of 30 nm. . This barrier layer 21 is the first hard mask 5
It is also formed on 2.
【００３９】次いで、バリア層２１の表面に銅シード層
を例えば１００ｎｍの厚さに形成した後、銅めっきによ
り銅を例えば１．００μｍの厚さに堆積して銅膜２５を
形成する。この成膜により、上記配線溝１６および接続
孔１５は銅により埋め込まれる。その後、第１のハード
マスク５２上の余剰な銅膜２５を、例えば化学的機械研
磨によって除去する。Next, a copper seed layer is formed to a thickness of 100 nm on the surface of the barrier layer 21, and then copper is deposited to a thickness of 1.00 μm by copper plating to form a copper film 25. By this film formation, the wiring groove 16 and the connection hole 15 are filled with copper. After that, the excess copper film 25 on the first hard mask 52 is removed by, for example, chemical mechanical polishing.
【００４０】その結果、図８の（９）に示すように、配
線溝１６および接続孔１５の内部は銅により埋め込まれ
ることから、配線溝１６には銅からなる配線２３が形成
され、接続孔１５には基体１１と上記溝配線２３に接続
するもので銅からなるプラグ２２が形成される。As a result, as shown in (9) of FIG. 8, since the inside of the wiring groove 16 and the connection hole 15 is filled with copper, the wiring 23 made of copper is formed in the wiring groove 16 and the connection hole is formed. A plug 22 made of copper is formed on 15 to connect to the base 11 and the groove wiring 23.
【００４１】上記実施の形態では、一例として、上記第
１の絶縁膜１２にはＳｉＯ2 〔ノンドープトシリケート
ガラス（ＮＳＧ）〕を用い、上記第２の絶縁膜１３には
窒化シリコン（ＳｉＮ）を用い、上記有機絶縁膜１４に
はポリアリールエーテル系樹脂（例えばＳｉＬＫ）を用
い、上記第１のハードマスク層５２にはＳｉＯ2 （ＮＳ
Ｇ）を用い、上記第２のハードマスク層５３には窒化シ
リコン（ＳｉＮ）を用いた。In the above-mentioned embodiment, as an example, SiO 2 [non-doped silicate glass (NSG)] is used for the first insulating film 12, and silicon nitride (SiN) is used for the second insulating film 13. Polyaryl ether resin (eg, SiLK) is used for the organic insulating film 14, and SiO 2 (NS) is used for the first hard mask layer 52.
G) and silicon nitride (SiN) was used for the second hard mask layer 53.
【００４２】各層の材質については、接続層となる第１
の絶縁膜１２では、ＮＳＧ以外にＰＳＧ、ＢＰＳＧ、比
誘電率が３．５程度のＦＳＧ（フッ素シリケートガラ
ス）なども用いることができる。また、有機絶縁膜１４
は酸化シリコンに比べて誘電率が低いため、配線の寄生
容量が減少して信号遅延を低減させることができるた
め、高性能半導体装置への適用が検討されているもので
ある。Regarding the material of each layer, the first layer to be the connection layer is used.
In addition to NSG, PSG, BPSG, FSG (fluorine silicate glass) having a relative dielectric constant of about 3.5 can be used for the insulating film 12 of FIG. In addition, the organic insulating film 14
Since the dielectric constant is lower than that of silicon oxide, the parasitic capacitance of the wiring can be reduced and the signal delay can be reduced. Therefore, its application to a high-performance semiconductor device is under study.
【００４３】各層の材料の組み合わせは、上記説明した
ような２層ハードマスク法を適用することができるもの
であれば、上記例に限らない。The combination of materials for each layer is not limited to the above example as long as the two-layer hard mask method described above can be applied.
【００４４】なお、酸化シリコン、窒化シリコンの成膜
には、一例としてシラン系ガスを用いた平行平板型プラ
ズマＣＶＤ装置を用いた。有機絶縁膜の成膜には、一例
として回転塗布装置を用いた。リソグラフィーの露光装
置には、一例としてＮＡ＝０．６０のＫｒＦ露光装置を
用いた。窒化シリコンのエッチングには、エッチングガ
スにトリフルオロメタン（ＣＨＦ3 ）と酸素（Ｏ2 ）と
アルゴン（Ａｒ）とを用いた平行平板型プラズマエッチ
ング装置を用いた。For the film formation of silicon oxide and silicon nitride, a parallel plate type plasma CVD apparatus using a silane-based gas was used as an example. A spin coater was used as an example for forming the organic insulating film. As an exposure apparatus for lithography, for example, a KrF exposure apparatus with NA = 0.60 was used. A parallel plate type plasma etching apparatus using trifluoromethane (CHF 3 ), oxygen (O 2) and argon (Ar) as etching gas was used for etching silicon nitride.
【００４５】上記実施の形態では、水の透過を防止する
第２の絶縁膜１３として、窒化シリコンを用いたが、水
を透過しない全ての膜、例えば各種無機膜、有機膜、金
属酸化物等を用いることができ、例えば、ビスマス・ス
トロンチウム・タンタレート（ＢＳＴ）、チタン酸ジル
コン酸鉛（ＰＺＴ）、酸化アルミニウム（Ａｌ
2 Ｏ3）、酸化タンタル（Ｔａ2 Ｏ5 ）等を用いること
ができる。In the above-mentioned embodiment, silicon nitride is used as the second insulating film 13 for preventing permeation of water, but any film that does not permeate water, for example, various inorganic films, organic films, metal oxides, etc. For example, bismuth strontium tantalate (BST), lead zirconate titanate (PZT), aluminum oxide (Al
2 O 3 ) and tantalum oxide (Ta 2 O 5 ) can be used.
【００４６】上記材料のエッチングは、一例として、Ｂ
ＳＴ、ＰＺＴは塩素とアルゴンとの混合ガスを用い、酸
化アルミニウムは三塩化ホウ素（ＢＣｌ3 ）と塩素（Ｃ
ｌ2）とアルゴン（Ａｒ）との混合ガスを用い、酸化タ
ンタルはサルファーヘキサフルオライド（ＳＦ6 ）と酸
素（Ｏ2 ）との混合ガスを用いることによってエッチン
グが可能である。これらエッチングを行うエッチング装
置としては、高密度プラズマエッチング装置として、例
えば誘導結合プラズマ（ＩＣＰ:Inductively Coupled P
lasma）エッチング装置、電子サイクロトロン共鳴（Ｅ
ＣＲ:Electron Cyclotron Resonance）プラズマエッチ
ング装置等を用いることができる。As an example, the etching of the above material is performed by using B
ST and PZT use a mixed gas of chlorine and argon, and aluminum oxide uses boron trichloride (BCl 3 ) and chlorine (C
l 2) and using a mixed gas of argon (Ar), tantalum oxide is capable etched by using a mixed gas of sulfur hexafluoride (SF 6) and oxygen (O 2). As an etching device for performing these etching, a high density plasma etching device such as an inductively coupled plasma (ICP) is used.
lasma) etching equipment, electron cyclotron resonance (E
A CR (Electron Cyclotron Resonance) plasma etching apparatus or the like can be used.
【００４７】上記半導体装置の製造方法では、吸湿性を
有する第１の絶縁膜１２上に、上層への水の透過を減少
させる第２の絶縁膜１３を介して有機絶縁膜１４を形成
することから、第１の絶縁膜１２が吸水性を有するＳｉ
Ｏ2 膜で形成しても、第２の絶縁膜１３が上層への水の
透過を抑えるため、第１の絶縁膜１２より上層の有機絶
縁膜１４に水が到達しない。そのため、水による有機絶
縁膜１４の変質が防止される。In the method of manufacturing a semiconductor device described above, the organic insulating film 14 is formed on the first insulating film 12 having a hygroscopic property, with the second insulating film 13 that reduces water permeation to the upper layer interposed therebetween. Therefore, the first insulating film 12 has a water absorbing property of Si.
Even if it is formed of an O 2 film, the second insulating film 13 suppresses the permeation of water to the upper layer, so that the water does not reach the organic insulating film 14 above the first insulating film 12. Therefore, alteration of the organic insulating film 14 due to water is prevented.
【００４８】[0048]
【発明の効果】以上、説明したように本発明の半導体装
置によれば、吸湿性を有する第１の絶縁膜上に、上層へ
の水の透過を減少させる第２の絶縁膜を介して有機絶縁
膜が形成された絶縁膜構造となっているので、第１の絶
縁膜が吸水性を有するＳｉＯ2膜で形成されていても、
第２の絶縁膜が上層への水の透過を抑えるため、第１の
絶縁膜より上層の有機絶縁膜に水が到達しない。そのた
め、水による有機絶縁膜の変質を防ぐことができ、信頼
性の高い絶縁膜構造となっている。As described above, according to the semiconductor device of the present invention, the organic film is formed on the first insulating film having a hygroscopic property through the second insulating film which reduces the permeation of water to the upper layer. Since the insulating film has an insulating film structure, even if the first insulating film is formed of a water-absorbing SiO 2 film,
Since the second insulating film suppresses the permeation of water to the upper layer, the water does not reach the organic insulating film above the first insulating film. Therefore, the deterioration of the organic insulating film due to water can be prevented, and the insulating film structure has high reliability.
【００４９】本発明の半導体装置の製造方法によれば、
吸湿性を有する第１の絶縁膜上に、上層への水の透過を
減少させる第２の絶縁膜を介して有機絶縁膜を形成する
ので、第１の絶縁膜が吸水性を有するＳｉＯ2 膜で形成
しても、第２の絶縁膜が上層への水の透過が抑えられ
て、第１の絶縁膜より上層の有機絶縁膜に水が到達しな
いようになる。そのため、水による有機絶縁膜の変質が
防止されるので、信頼性の高い絶縁膜構造を半導体装置
に適用することができる。According to the method of manufacturing a semiconductor device of the present invention,
Since the organic insulating film is formed on the first hygroscopic first insulating film via the second insulating film that reduces the permeation of water to the upper layer, the first insulating film has a water absorbing SiO 2 film. Even if it is formed, the second insulating film suppresses the permeation of water to the upper layer, and the water does not reach the organic insulating film above the first insulating film. Therefore, alteration of the organic insulating film due to water is prevented, so that a highly reliable insulating film structure can be applied to the semiconductor device.
【図１】本発明の半導体装置に係る一実施の形態を示す
概略構成断面図である。FIG. 1 is a schematic configuration cross-sectional view showing one embodiment of a semiconductor device of the present invention.
【図２】水分量を調べる試料の概略構成断面図である。FIG. 2 is a schematic cross-sectional view of the structure of a sample for examining the water content.
【図３】試料１のＴＤＳ測定における加熱温度による水
分量を示す図である。FIG. 3 is a diagram showing an amount of water depending on a heating temperature in TDS measurement of Sample 1.
【図４】試料２のＴＤＳ測定における加熱温度による水
分量を示す図である。FIG. 4 is a diagram showing an amount of water depending on a heating temperature in TDS measurement of Sample 2.
【図５】試料３のＴＤＳ測定における加熱温度による水
分量を示す図である。FIG. 5 is a diagram showing an amount of water depending on a heating temperature in TDS measurement of Sample 3.
【図６】試料４のＴＤＳ測定における加熱温度による水
分量を示す図である。FIG. 6 is a diagram showing a water content according to a heating temperature in TDS measurement of Sample 4.
【図７】試料５のＴＤＳ測定における加熱温度による水
分量を示す図である。FIG. 7 is a diagram showing an amount of water depending on a heating temperature in TDS measurement of Sample 5.
【図８】本発明の半導体装置に係る一実施の形態を示す
概略構成断面図である。FIG. 8 is a schematic structural cross-sectional view showing one embodiment of a semiconductor device of the present invention.
【図９】低誘電率膜の有機絶縁膜を備えた従来の絶縁膜
構造を示す概略構成断面図である。FIG. 9 is a schematic structural cross-sectional view showing a conventional insulating film structure including an organic insulating film having a low dielectric constant film.
１２…第１の絶縁膜、１３…第２の絶縁膜、１４…有機
絶縁膜12 ... 1st insulating film, 13 ... 2nd insulating film, 14 ... Organic insulating film
フロントページの続き Ｆターム(参考） 5F033 HH11 HH32 JJ01 JJ11 JJ32 KK01 MM02 MM12 MM13 NN06 NN07 QQ09 QQ10 QQ12 QQ28 QQ37 RR03 RR06 RR11 RR14 RR15 RR21 RR22 RR24 SS15 SS21 TT04 XX28 Continued front page F term (reference) 5F033 HH11 HH32 JJ01 JJ11 JJ32 KK01 MM02 MM12 MM13 NN06 NN07 QQ09 QQ10 QQ12 QQ28 QQ37 RR03 RR06 RR11 RR14 RR15 RR21 RR22 RR24 SS15 SS21 TT04 XX28
Claims (4)
縁膜構造を有する半導体装置において、 前記絶縁膜構造は、 吸湿性を有する第１の絶縁膜と、 前記第１の絶縁膜上に形成された上層への水の透過を減
少させる第２の絶縁膜と、 前記第２の絶縁膜上に形成された有機絶縁膜とを有する
ことを特徴とする半導体装置。1. A semiconductor device having an insulating film structure in which an organic insulating film is laminated on an inorganic insulating film, wherein the insulating film structure has a first insulating film having a hygroscopic property, and a first insulating film on the first insulating film. A semiconductor device comprising: a second insulating film that reduces water permeation to the formed upper layer; and an organic insulating film formed on the second insulating film.
接続層として用いられ、 前記有機絶縁膜は配線が形成される配線層として用いら
れていることを特徴とする請求項１記載の半導体装置。2. The first insulating film is used as a connection layer in which a connection hole is formed, and the organic insulating film is used as a wiring layer in which a wiring is formed. Semiconductor device.
縁膜構造を形成する半導体装置の製造方法において、 前記絶縁膜構造は、 吸湿性を有する第１の絶縁膜を形成する工程と、 前記第１の絶縁膜上に上層への水の透過を減少させる第
２の絶縁膜を形成する工程と、 前記第２の絶縁膜上に有機絶縁膜を形成する工程とを備
えたことを特徴とする半導体装置の製造方法。3. A method of manufacturing a semiconductor device in which an organic insulating film is laminated on an inorganic insulating film to form an insulating film structure, wherein the insulating film structure comprises a step of forming a first insulating film having a hygroscopic property. A step of forming a second insulating film on the first insulating film to reduce permeation of water to an upper layer, and a step of forming an organic insulating film on the second insulating film. A method for manufacturing a characteristic semiconductor device.
接続層として形成し、 前記有機絶縁膜は配線が形成される配線層として形成す
ることを特徴とする請求項３記載の半導体装置の製造方
法。4. The semiconductor according to claim 3, wherein the first insulating film is formed as a connection layer in which a connection hole is formed, and the organic insulating film is formed as a wiring layer in which a wiring is formed. Device manufacturing method.
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