JP2002344345A - High frequency signal receiver - Google Patents
High frequency signal receiverInfo
- Publication number
- JP2002344345A JP2002344345A JP2001142794A JP2001142794A JP2002344345A JP 2002344345 A JP2002344345 A JP 2002344345A JP 2001142794 A JP2001142794 A JP 2001142794A JP 2001142794 A JP2001142794 A JP 2001142794A JP 2002344345 A JP2002344345 A JP 2002344345A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- input
- automatic gain
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Television Receiver Circuits (AREA)
- Control Of Amplification And Gain Control (AREA)
- Superheterodyne Receivers (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、地上波デジタル放
送等を受信する高周波信号受信装置に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency signal receiving apparatus for receiving digital terrestrial broadcasting and the like.
【０００２】[0002]
【従来の技術】以下、従来の高周波信号受信装置につい
て説明する。2. Description of the Related Art A conventional high frequency signal receiving apparatus will be described below.
【０００３】従来の高周波信号受信装置は、図３に示す
ように、高周波信号が入力される入力端子１と、この入
力端子１に接続された高周波自動利得制御回路（以下、
ＲＦ−ＡＧＣ回路という）２と、このＲＦ−ＡＧＣ回路
２の出力が一方の入力に接続されるとともに、他方の入
力には局部発振回路３の出力が接続された周波数混合回
路４と、この周波数混合回路４の出力が接続された中間
周波数フィルタ５と、この中間周波数フィルタ５の出力
が接続された中間周波数自動利得制御回路（以下、ＩＦ
−ＡＧＣ回路という）６と、このＩＦ−ＡＧＣ回路６の
出力が接続されたアナログ・デジタル変換回路７と、こ
のアナログ・デジタル変換回路７の出力が接続されたデ
ジタル復調回路８と、このデジタル復調回路８の出力が
接続された出力端子９と、前記アナログ・デジタル変換
回路７の出力が接続された自動利得制御用検波回路（以
下、ＡＧＣ検波回路という）１０とを備え、このＡＧＣ
検波回路１０の出力はＩＦ−ＡＧＣ回路６の制御端子に
接続されるとともに、電圧比較器１１と比較基準電圧１
２で構成されたスイッチ回路１３を介してＲＦ−ＡＧＣ
回路２の制御端子に接続されていた。As shown in FIG. 3, a conventional high-frequency signal receiving apparatus includes an input terminal 1 to which a high-frequency signal is input, and a high-frequency automatic gain control circuit (hereinafter, referred to as an input terminal) connected to the input terminal 1.
An RF-AGC circuit 2); a frequency mixing circuit 4 having an output connected to one input of the RF-AGC circuit 2 and an output of a local oscillation circuit 3 connected to the other input; An intermediate frequency filter 5 to which the output of the mixing circuit 4 is connected, and an intermediate frequency automatic gain control circuit (hereinafter, IF) to which the output of the intermediate frequency filter 5 is connected
6, an analog-to-digital conversion circuit 7 to which the output of the IF-AGC circuit 6 is connected, a digital demodulation circuit 8 to which the output of the analog-to-digital conversion circuit 7 is connected, and this digital demodulation circuit. An output terminal 9 to which an output of a circuit 8 is connected, and an automatic gain control detection circuit (hereinafter, referred to as an AGC detection circuit) 10 to which an output of the analog / digital conversion circuit 7 is connected.
The output of the detection circuit 10 is connected to the control terminal of the IF-AGC circuit 6, and the voltage comparator 11 and the comparison reference voltage 1
RF-AGC through the switch circuit 13 composed of
It was connected to the control terminal of the circuit 2.
【０００４】以上のように構成された高周波信号受信装
置において、入力端子１に入力された高周波信号は周波
数混合回路４で中間周波数に変換され、アナログ・デジ
タル変換回路７でデジタル信号に変換され、デジタル復
調回路８で復調され出力端子９より出力されていた。そ
して、入力端子１に入力される高周波信号のレベルに従
ってアナログ・デジタル変換回路７に入力されるレベル
が一定になるように、ＡＧＣ検波回路１０によりＲＦ−
ＡＧＣ回路２とＩＦ−ＡＧＣ回路６の増幅度が制御され
ていた。In the high-frequency signal receiving apparatus configured as described above, the high-frequency signal input to the input terminal 1 is converted to an intermediate frequency by the frequency mixing circuit 4, and is converted to a digital signal by the analog / digital conversion circuit 7. The signal was demodulated by the digital demodulation circuit 8 and output from the output terminal 9. Then, the AGC detection circuit 10 sets the RF-signal so that the level input to the analog / digital conversion circuit 7 becomes constant in accordance with the level of the high-frequency signal input to the input terminal 1.
The degree of amplification of the AGC circuit 2 and the IF-AGC circuit 6 has been controlled.
【０００５】その制御電圧の詳細については図４に示す
通りである。図４において縦軸６０は利得制御電圧、横
軸６１は高周波信号の入力レベルである。１４はＲＦ−
ＡＧＣ回路２の利得制御電圧であり、１５はＩＦ−ＡＧ
Ｃ回路６の利得制御電圧であるとともにＡＧＣ検波回路
１０の出力電圧でもある。The details of the control voltage are as shown in FIG. 4, the vertical axis 60 is the gain control voltage, and the horizontal axis 61 is the input level of the high frequency signal. 14 is RF-
Reference numeral 15 denotes a gain control voltage of the AGC circuit 2, and reference numeral 15 denotes an IF-AG
It is the gain control voltage of the C circuit 6 and the output voltage of the AGC detection circuit 10.
【０００６】ここで、入力端子１に入力される高周波信
号のレベルが低く、ＡＧＣ検波回路１０の出力電圧１５
が比較電圧１２よりも低いとき、スイッチ回路１３はオ
フとして動作し、ＲＦ−ＡＧＣ回路２の利得制御電圧１
４は変化しない。Here, the level of the high-frequency signal input to the input terminal 1 is low, and the output voltage 15 of the AGC detection circuit 10 is low.
Is lower than the comparison voltage 12, the switch circuit 13 operates to be off, and the gain control voltage 1 of the RF-AGC circuit 2
4 does not change.
【０００７】高周波信号の入力レベルが高くなり、ＡＧ
Ｃ検波回路１０の出力電圧１５が比較電圧１２と同じに
なったとき、スイッチ回路１３はオンとして動作を始
め、このときの入力レベルがスレッショルド点１６であ
り、このスレッショルド点１６を境にＲＦ−ＡＧＣ回路
２の利得制御電圧１４は変化を始める。また、高周波信
号の入力レベルが高いとき、ＲＦ−ＡＧＣ回路２で主に
利得制御を行うことで周波数混合回路４への入力が過大
になるのを防ぎ、歪特性を最適に保つことができる。そ
のためＡＧＣ検波回路１０の出力電圧１５に対するＲＦ
−ＡＧＣ回路２の利得制御電圧１４の感度は高く設定
し、スレッショルド点１６を境にＩＦ−ＡＧＣ回路６の
制御電圧１５はほとんど変化しないように設定してあ
る。従ってＡＧＣ検波回路１０の出力電圧１５はスレッ
ショルド点１６を境に変化し、高周波信号の入力レベル
との関係に直線性を有していなかった。The input level of the high-frequency signal increases,
When the output voltage 15 of the C detection circuit 10 becomes the same as the comparison voltage 12, the switch circuit 13 is turned on and starts operating, and the input level at this time is a threshold point 16, and the RF- The gain control voltage 14 of the AGC circuit 2 starts to change. In addition, when the input level of the high-frequency signal is high, the RF-AGC circuit 2 mainly performs gain control to prevent the input to the frequency mixing circuit 4 from becoming excessive, and to keep the distortion characteristics optimal. Therefore, the RF voltage for the output voltage 15 of the AGC detection circuit 10 is
The sensitivity of the gain control voltage 14 of the −AGC circuit 2 is set to be high, and the control voltage 15 of the IF-AGC circuit 6 is set to hardly change at the threshold point 16. Therefore, the output voltage 15 of the AGC detection circuit 10 changes at the threshold point 16 and has no linear relationship with the input level of the high-frequency signal.
【０００８】[0008]
【発明が解決しようとする課題】しかしながら、このよ
うな従来の構成では、例えばデジタル放送を受信しよう
とする場合において、アンテナの設置に際し、最大入力
方向を見つける必要があるが、出力端子から得られた画
像を見ていただけでは、最大入力かどうかの判断が困難
である。そのため、高周波信号の入力レベルに従って変
化するＡＧＣ検波回路１０の出力制御電圧を利用して判
断するが、入力レベルを正確に判断することが困難であ
った。これは、図４に示すようにこの制御電圧と入力レ
ベルとの関係に直線性が無いことが原因であった。However, in such a conventional configuration, it is necessary to find the maximum input direction when installing an antenna, for example, when receiving digital broadcasting. It is difficult to determine whether the input is the maximum input only by looking at the image. For this reason, the determination is made using the output control voltage of the AGC detection circuit 10 that changes according to the input level of the high-frequency signal, but it has been difficult to accurately determine the input level. This is because the relationship between the control voltage and the input level is not linear as shown in FIG.
【０００９】本発明は、このような問題点を解決するも
ので、入力端子に入力される信号レベルと自動利得制御
用検波回路の出力制御電圧との関係に直線性を持たせた
高周波信号受信装置を提供することを目的としたもので
ある。The present invention solves such a problem. A high frequency signal receiving apparatus which has a linear relationship between a signal level inputted to an input terminal and an output control voltage of a detection circuit for automatic gain control. It is intended to provide a device.
【００１０】[0010]
【課題を解決するための手段】この目的を達成するため
に本発明の高周波信号受信装置は、自動利得制御用検波
回路の出力と高周波自動利得制御回路及び中間周波数自
動利得制御回路のそれぞれの制御端子との間に利得配分
制御回路を設け、この利得配分制御回路は入力端子に入
力される信号レベルと前記自動利得制御用検波回路の出
力制御電圧との関係に直線性を持たせたものである。こ
れにより入力端子に入力される信号レベルと前記自動利
得制御用検波回路の出力制御電圧との関係に直線性を持
たすことができる。In order to achieve this object, a high-frequency signal receiving apparatus according to the present invention comprises an output of an automatic gain control detection circuit and a control of each of a high-frequency automatic gain control circuit and an intermediate frequency automatic gain control circuit. A gain distribution control circuit is provided between the input and output terminals, and the gain distribution control circuit has a linear relationship between a signal level input to an input terminal and an output control voltage of the automatic gain control detection circuit. is there. Thus, the relationship between the signal level input to the input terminal and the output control voltage of the automatic gain control detection circuit can be made linear.
【００１１】[0011]
【発明の実施の形態】本発明の請求項１に記載の発明
は、高周波信号が入力される入力端子と、この入力端子
に入力された信号が供給される高周波自動利得制御回路
と、この高周波自動利得制御回路の出力が一方の入力に
接続されるとともに他方の入力には局部発振回路の出力
が接続された周波数混合回路と、この周波数混合回路の
出力が接続された中間周波数フィルタと、この中間周波
数フィルタの出力が接続される中間周波数自動利得制御
回路と、この中間周波数自動利得制御回路の出力が供給
される出力端子と、前記中間周波数自動利得制御回路の
出力が供給される自動利得制御用検波回路とを備え、前
記自動利得制御用検波回路の出力と前記高周波自動利得
制御回路及び前記中間周波数自動利得制御回路のそれぞ
れの制御端子との間に利得配分制御回路を設け、この利
得配分制御回路は前記入力端子に入力される信号レベル
と前記自動利得制御用検波回路の出力制御電圧との関係
に直線性を持たせた高周波信号受信装置であり、入力端
子に入力される信号レベルと自動利得制御用検波回路の
出力制御電圧との関係に直線性を持たすことができるた
め、その制御電圧を利用し入力信号レベルメータ等を設
けることにより、アンテナの設置に際し最適な方向を簡
単に見つけ出すことが可能となる。また、この入力信号
レベルメータを例えばデジタル放送受信装置の設営時に
行うチャンネルサーチ機能に取り入れることで、入力信
号の有無が瞬時に判断でき、放送チャンネルをすばやく
見つけ出すことが可能となる。DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention provides an input terminal to which a high-frequency signal is input, a high-frequency automatic gain control circuit to which a signal input to this input terminal is supplied, A frequency mixing circuit in which the output of the automatic gain control circuit is connected to one input and the output of the local oscillation circuit is connected to the other input; an intermediate frequency filter to which the output of the frequency mixing circuit is connected; An intermediate frequency automatic gain control circuit to which the output of the intermediate frequency filter is connected, an output terminal to which the output of the intermediate frequency automatic gain control circuit is supplied, and an automatic gain control to which the output of the intermediate frequency automatic gain control circuit is supplied Between the output of the automatic gain control detection circuit and the respective control terminals of the high frequency automatic gain control circuit and the intermediate frequency automatic gain control circuit. A gain distribution control circuit, wherein the gain distribution control circuit is a high-frequency signal receiving apparatus having a linear relationship between a signal level input to the input terminal and an output control voltage of the automatic gain control detection circuit. Since the relationship between the signal level input to the input terminal and the output control voltage of the automatic gain control detection circuit can have linearity, the antenna is provided by using the control voltage and providing an input signal level meter or the like. It is possible to easily find the optimal direction when installing the camera. In addition, by incorporating this input signal level meter into a channel search function performed, for example, when setting up a digital broadcast receiver, the presence or absence of an input signal can be instantaneously determined, and a broadcast channel can be quickly found.
【００１２】請求項２に記載の発明は、利得配分制御回
路は電圧比較器を用いた帰還回路で構成され、この電圧
比較器の一方の入力端子は中間周波数自動利得制御回路
の制御端子に接続され、前記電圧比較器の出力は高周波
自動利得制御回路の制御端子に接続された請求項１に記
載の高周波信号受信装置であり、電圧比較器を用いた帰
還回路という簡単な回路構成で、入力信号レベルと自動
利得制御用検波回路の出力制御電圧との関係に直線性を
持たすことが実現できる。また、入力信号レベルがある
一定の値を超えた動作領域において、中間周波数自動利
得制御回路の動作を止めることができる。すなわちこの
領域では高周波自動利得制御回路のみで利得の制御を行
うことができる。According to a second aspect of the present invention, the gain distribution control circuit comprises a feedback circuit using a voltage comparator, and one input terminal of the voltage comparator is connected to a control terminal of the intermediate frequency automatic gain control circuit. 2. The high-frequency signal receiving apparatus according to claim 1, wherein an output of said voltage comparator is connected to a control terminal of a high-frequency automatic gain control circuit, and has a simple circuit configuration of a feedback circuit using a voltage comparator. It is possible to realize linearity in the relationship between the signal level and the output control voltage of the detection circuit for automatic gain control. Further, the operation of the intermediate frequency automatic gain control circuit can be stopped in an operation region where the input signal level exceeds a certain value. That is, in this region, the gain can be controlled only by the high-frequency automatic gain control circuit.
【００１３】請求項３に記載の発明は、電圧比較器の一
方の入力端子は、周波数混合回路への信号入力が過大に
ならないように設定された基準電圧が接続された請求項
２に記載の高周波信号受信装置であり、周波数混合回路
への信号入力が過大にならないように設定することで歪
特性を最適に保つことができ、例えばデジタル放送受信
時における耐アナログ隣接チャンネル妨害特性で良好な
値を得る設定ができる。According to a third aspect of the present invention, the one input terminal of the voltage comparator is connected to a reference voltage set so that a signal input to the frequency mixing circuit does not become excessive. It is a high-frequency signal receiving device, which can keep the distortion characteristics optimal by setting so that the signal input to the frequency mixing circuit does not become excessive, for example, a good value in the anti-analog adjacent channel interference characteristics when receiving digital broadcasting Can be set.
【００１４】請求項４に記載の発明は、基準電圧は調整
素子を用いることで変化させることができる請求項３に
記載の高周波信号受信装置であり、調整素子により基準
電圧を変化させることでこの高周波信号受信装置を構成
しているそれぞれの回路での利得ばらつきなどを吸収さ
せることができ、大量生産時でもこの基準電圧の調整を
行うことで歪特性等が安定して最適に保つことができ
る。According to a fourth aspect of the present invention, there is provided the high-frequency signal receiving apparatus according to the third aspect, wherein the reference voltage can be changed by using an adjusting element, and the reference voltage is changed by the adjusting element. It is possible to absorb gain variations and the like in each circuit constituting the high-frequency signal receiving device, and by adjusting this reference voltage even during mass production, it is possible to stably maintain distortion characteristics and the like optimally. .
【００１５】以下、本発明の一実施の形態について、図
面を用いて説明する。図１は本発明の高周波信号受信装
置のブロック図である。An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a high-frequency signal receiving device according to the present invention.
【００１６】図１において、本実施の形態の高周波信号
受信装置は、高周波信号が入力される入力端子１７と、
この入力端子１７に接続された高周波増幅回路１８と、
この高周波増幅回路１８の出力に接続されたＲＦ−ＡＧ
Ｃ回路１９と、このＲＦ−ＡＧＣ回路１９の出力に接続
されたチューニングバンドパスフィルタ２０と、このチ
ューニングバンドパスフィルタ２０の出力が一方の入力
に接続されるとともに、他方の入力には局部発振回路２
１の出力が接続された周波数混合回路２２と、この周波
数混合回路２２の出力に接続されたローパスフィルタ２
３と、このローパスフィルタ２３の出力に接続された中
間周波数増幅回路２４と、この中間周波数増幅回路２４
の出力に接続された表面弾性波（以下、ＳＡＷという）
フィルタ２５と、このＳＡＷフィルタ２５の出力に接続
された中間周波数増幅回路２６と、この中間周波数増幅
回路２６の出力に接続されたＳＡＷフィルタ２７と、こ
のＳＡＷフィルタ２７の出力に接続されたＩＦ−ＡＧＣ
回路２８と、このＩＦ−ＡＧＣ回路２８の出力が一方の
入力に接続されるとともに、他方の入力には局部発振回
路２９の出力が接続された周波数混合回路３０と、この
周波数混合回路３０の出力に接続された増幅回路３１
と、この増幅回路３１の出力に接続されたローパスフィ
ルタ３２と、このローパスフィルタ３２の出力に接続さ
れたアナログ・デジタル変換回路３３と、このアナログ
・デジタル変換回路３３の出力に接続されたＯＦＤＭ復
調回路３４と、このＯＦＤＭ復調回路３４の出力に接続
された誤り訂正回路３５と、この誤り訂正回路３５の出
力に接続された出力端子３６と、前記局部発振回路２１
にループ接続されるとともに前記チューニングバンドパ
スフィルタ２０の制御端子に接続されたＰＬＬ回路３７
と、前記アナログ・デジタル変換回路３３の出力に接続
されたＡＧＣ検波回路３８と、このＡＧＣ検波回路３８
の出力に接続された電圧感度変換回路３９と、この電圧
感度変換回路３９の出力に接続され第１の出力４０が前
記ＩＦ−ＡＧＣ回路２８の制御端子に接続されるととも
に第２の出力４１がＲＦ−ＡＧＣ回路１９の制御端子に
接続された利得配分制御回路４２とを備えた構成となっ
ている。In FIG. 1, a high-frequency signal receiving apparatus according to the present embodiment has an input terminal 17 to which a high-frequency signal is input,
A high-frequency amplifier circuit 18 connected to the input terminal 17;
RF-AG connected to the output of this high-frequency amplifier 18
C circuit 19, a tuning bandpass filter 20 connected to the output of the RF-AGC circuit 19, and an output of the tuning bandpass filter 20 connected to one input and a local oscillation circuit connected to the other input. 2
1 and a low-pass filter 2 connected to the output of the frequency mixing circuit 22.
3, an intermediate frequency amplifying circuit 24 connected to the output of the low-pass filter 23, and an intermediate frequency amplifying circuit 24
Surface acoustic wave (hereinafter referred to as SAW) connected to the output of
A filter 25, an intermediate frequency amplifying circuit 26 connected to the output of the SAW filter 25, a SAW filter 27 connected to the output of the intermediate frequency amplifying circuit 26, and an IF-filter connected to the output of the SAW filter 27. AGC
A circuit 28, a frequency mixing circuit 30 having an output of the IF-AGC circuit 28 connected to one input and an output of a local oscillation circuit 29 connected to the other input, and an output of the frequency mixing circuit 30 Amplifier circuit 31 connected to
A low-pass filter 32 connected to the output of the amplifying circuit 31, an analog-to-digital converter 33 connected to the output of the low-pass filter 32, and an OFDM demodulator connected to the output of the analog-to-digital converter 33 A circuit 34; an error correction circuit 35 connected to the output of the OFDM demodulation circuit 34; an output terminal 36 connected to the output of the error correction circuit 35;
PLL circuit 37 connected in a loop to the control terminal of the tuning bandpass filter 20
An AGC detection circuit 38 connected to the output of the analog / digital conversion circuit 33;
And a first output 40 connected to the output of the voltage sensitivity conversion circuit 39 is connected to the control terminal of the IF-AGC circuit 28, and a second output 41 is connected to the control terminal of the IF-AGC circuit 28. The configuration includes a gain distribution control circuit 42 connected to the control terminal of the RF-AGC circuit 19.
【００１７】ここで前記利得配分制御回路４２の入力は
入力抵抗４３を介して第１の出力４０に接続されるとと
もに、スイッチ回路４４の入力に接続されている。ま
た、このスイッチ回路４４の出力は負帰還抵抗４５を介
して入力に接続されるとともに出力抵抗４６を介して第
２の出力４１に接続されている。そしてこの第２の出力
４１は電源供給抵抗４７を介して制御電圧発生用電源４
８に接続されている。また、前記スイッチ回路４４は、
この入力が反転入力端子に接続されるとともに、非反転
入力端子には比較基準電圧４９が接続された電圧比較器
５０により構成され、この電圧比較器５０の出力段はオ
ープンコレクタの回路形式をとっている。Here, an input of the gain distribution control circuit 42 is connected to a first output 40 via an input resistor 43 and to an input of a switch circuit 44. The output of the switch circuit 44 is connected to the input via a negative feedback resistor 45 and to the second output 41 via an output resistor 46. The second output 41 is connected to the control voltage generation power supply 4 via the power supply resistance 47.
8 is connected. Further, the switch circuit 44 includes:
This input is connected to an inverting input terminal, and a non-inverting input terminal is constituted by a voltage comparator 50 connected to a comparison reference voltage 49. The output stage of the voltage comparator 50 has an open collector circuit form. ing.
【００１８】また、入力抵抗４３および負帰還抵抗４５
の値は、出力抵抗４６および電源供給抵抗４７の値に対
して十分大きくしておく。The input resistor 43 and the negative feedback resistor 45
Is sufficiently larger than the values of the output resistance 46 and the power supply resistance 47.
【００１９】以上のように構成された高周波信号受信装
置について、以下にその動作を説明する。アンテナから
供給された高周波信号は入力端子１７に入力され、ＲＦ
−ＡＧＣ回路１９で利得制御された後、周波数混合回路
２２へ入力され選局される。The operation of the high-frequency signal receiving apparatus configured as described above will be described below. The high-frequency signal supplied from the antenna is input to the input terminal 17,
After the gain is controlled by the AGC circuit 19, the signal is input to the frequency mixing circuit 22 to be selected.
【００２０】選局された第１中間周波数信号はＳＡＷフ
ィルタ２５で帯域制限され、ＩＦ−ＡＧＣ回路２８で利
得制御された後、周波数混合回路３０へ入力され第２中
間周波数信号に変換される。この第２中間周波数信号は
アナログ・デジタル変換回路３３によりデジタル信号に
変換され、ＯＦＤＭ復調回路３４でデジタル復調処理さ
れて出力端子３６にトランスポートストリームとして出
力される。The selected first intermediate frequency signal is band-limited by a SAW filter 25, gain-controlled by an IF-AGC circuit 28, and then input to a frequency mixing circuit 30 to be converted into a second intermediate frequency signal. The second intermediate frequency signal is converted into a digital signal by an analog / digital conversion circuit 33, digitally demodulated by an OFDM demodulation circuit 34, and output to an output terminal 36 as a transport stream.
【００２１】一方アナログ・デジタル変換回路３３の出
力に接続されたＡＧＣ検波回路３８は、信号レベルを検
出し、その検出された制御電圧の出力は電圧感度変換回
路３９を介して利得配分制御回路４２に入力される。こ
の利得配分制御回路４２からＲＦ−ＡＧＣ回路１９およ
びＩＦ−ＡＧＣ回路２８に制御電圧を供給することでそ
れぞれの利得制御を行い、アナログ・デジタル変換回路
３３に入力される信号レベルが一定になるように動作す
る。On the other hand, an AGC detection circuit 38 connected to the output of the analog / digital conversion circuit 33 detects a signal level, and outputs the detected control voltage via a voltage sensitivity conversion circuit 39 to a gain distribution control circuit 42. Is entered. By supplying a control voltage from the gain distribution control circuit 42 to the RF-AGC circuit 19 and the IF-AGC circuit 28, the respective gains are controlled so that the signal level input to the analog / digital conversion circuit 33 becomes constant. Works.
【００２２】次にこの利得配分制御回路４２の動作の詳
細について説明する。図２は利得配分制御回路４２の入
力電圧と出力制御電圧の特性である。図２において、縦
軸６３は利得制御電圧、横軸６４は高周波信号の入力レ
ベルである。５１は利得配分制御回路４２への入力電圧
であり、５２は利得配分制御回路４２の第１の出力電圧
であり、ＩＦ−ＡＧＣ回路２８の利得制御電圧である。
５３は利得配分制御回路４２の第２の出力電圧であり、
ＲＦ−ＡＧＣ回路１９の利得制御電圧である。利得配分
制御回路４２の入力電圧５１は入力抵抗４３を介してス
イッチ回路４４に入力され、比較基準電圧４９と比較さ
れる。Next, the operation of the gain distribution control circuit 42 will be described in detail. FIG. 2 shows the characteristics of the input voltage and the output control voltage of the gain distribution control circuit 42. In FIG. 2, the vertical axis 63 is the gain control voltage, and the horizontal axis 64 is the input level of the high frequency signal. 51 is an input voltage to the gain distribution control circuit 42, 52 is a first output voltage of the gain distribution control circuit 42, and is a gain control voltage of the IF-AGC circuit 28.
53 is a second output voltage of the gain distribution control circuit 42;
This is a gain control voltage of the RF-AGC circuit 19. The input voltage 51 of the gain distribution control circuit 42 is input to the switch circuit 44 via the input resistor 43, and is compared with the comparison reference voltage 49.
【００２３】まず、入力端子１７に入力される高周波信
号のレベルが低く、スイッチ回路４４への入力電圧が比
較基準電圧４９よりも低いとき、スイッチ回路４４はオ
フとして動作するため、オープン状態となる。すなわ
ち、第１の出力電圧５２は利得配分制御回路４２の入力
電圧５１に従って変化する。第２の出力電圧５３につい
ても利得配分制御回路４２の入力電圧５１に従って変化
するが、前記抵抗値の設定にあるように、入力抵抗４３
および負帰還抵抗４５の値は出力抵抗４６および電源供
給抵抗４７の値に対して十分大きいため、その変化量は
微小であり、ほとんど変化しない。つまり、この領域で
は第１の出力４０が接続されたＩＦ−ＡＧＣ回路２８で
利得制御が行われるが、第２の出力４１が接続されたＲ
Ｆ−ＡＧＣ回路１９では利得の変化は無い。First, when the level of the high-frequency signal input to the input terminal 17 is low and the input voltage to the switch circuit 44 is lower than the comparison reference voltage 49, the switch circuit 44 operates to be turned off, so that it is opened. . That is, the first output voltage 52 changes according to the input voltage 51 of the gain distribution control circuit 42. The second output voltage 53 also changes in accordance with the input voltage 51 of the gain distribution control circuit 42.
Since the value of the negative feedback resistor 45 is sufficiently larger than the values of the output resistor 46 and the power supply resistor 47, the amount of change is very small and hardly changes. That is, in this region, the gain control is performed by the IF-AGC circuit 28 to which the first output 40 is connected, but the R-channel to which the second output 41 is connected is controlled.
In the F-AGC circuit 19, there is no change in gain.
【００２４】次に、入力端子１７に入力される高周波信
号のレベルが高くなっていき、スイッチ回路４４への入
力電圧が比較基準電圧４９と同じになったとき、スイッ
チ回路４４はオンとして動作し始め、この動作を始める
入力レベルがスレッショルド点５４である。スレッショ
ルド点５４より入力レベルが高いとき、このスイッチ回
路４４には負帰還抵抗４５により負帰還がかかり、反転
増幅回路と同じ動作をするため、電圧比較器５０の反転
入力と非反転入力の間は仮想接地の状態となり、反転入
力側であるスイッチ回路４４の入力は比較基準電圧４９
に固定される。従って、第１の出力電圧５２は比較基準
電圧４９に固定され一定となる。これに対して第２の出
力電圧５３は入力電圧５１に従って変化することとな
る。つまりこの領域では第２の出力が接続されたＲＦ−
ＡＧＣ回路１９で利得制御が行われ、第１の出力が接続
されたＩＦ−ＡＧＣ回路２８では利得の変化は無い。Next, when the level of the high-frequency signal input to the input terminal 17 increases and the input voltage to the switch circuit 44 becomes the same as the comparison reference voltage 49, the switch circuit 44 operates to turn on. First, an input level at which this operation starts is a threshold point 54. When the input level is higher than the threshold point 54, the switch circuit 44 is subjected to negative feedback by the negative feedback resistor 45 and operates in the same manner as the inverting amplifier circuit. The state is a virtual ground state, and the input of the switch circuit 44 on the inverting input side is the comparison reference voltage 49.
Fixed to Therefore, the first output voltage 52 is fixed at the comparison reference voltage 49 and becomes constant. On the other hand, the second output voltage 53 changes according to the input voltage 51. That is, in this region, the RF-to which the second output is connected is
Gain control is performed in the AGC circuit 19, and there is no change in gain in the IF-AGC circuit 28 to which the first output is connected.
【００２５】また、入力電圧５１に対する第２の出力電
圧の感度は入力抵抗４３、負帰還抵抗４５、出力抵抗４
６および電源供給抵抗４７の値で設定することができる
ため、スレッショルド点５４前後での入力電圧感度を合
わせることにより、入力端子１７に入力される信号レベ
ルと利得配分制御回路４２の入力電圧５１との関係に直
線性を持たせることができる。すなわち、入力端子１７
に入力される信号レベルとＡＧＣ検波回路３８の出力制
御電圧との関係に直線性を持たすことができる。なお、
入力抵抗４３は１００ｋΩ、負帰還抵抗４５は３３０ｋ
Ω、出力抵抗４６は６．８ｋΩ、電源供給抵抗４７は２
２ｋΩとすることで良好な特性が得られている。The sensitivity of the second output voltage to the input voltage 51 is determined by the input resistance 43, the negative feedback resistance 45, and the output resistance 4.
6 and the value of the power supply resistance 47, the input voltage sensitivity around the threshold point 54 is adjusted to match the signal level input to the input terminal 17 and the input voltage 51 of the gain distribution control circuit 42. Can have a linear relationship. That is, the input terminal 17
, And the relationship between the signal level input to the AGC and the output control voltage of the AGC detection circuit 38 can be made linear. In addition,
The input resistance 43 is 100 kΩ, and the negative feedback resistance 45 is 330 k
Ω, the output resistance 46 is 6.8 kΩ, and the power supply resistance 47 is 2
Good characteristics are obtained by setting to 2 kΩ.
【００２６】以上のように、本実施の形態によれば入力
端子１７に入力される信号レベルとＡＧＣ検波回路３８
の出力制御電圧との関係に直線性を持たすことができ
る。また、入力信号のレベルがあるスレッショルド点５
４を境にＩＦ−ＡＧＣ回路２８の動作を完全に停止させ
ることができ、周波数混合回路３０への高周波信号入力
レベルが過大にならないように設定することで歪特性等
を最適に保つことができる。As described above, according to the present embodiment, the signal level input to the input terminal 17 and the AGC detection circuit 38
Can have a linear relationship with the output control voltage. The threshold point 5 where the level of the input signal is
4, the operation of the IF-AGC circuit 28 can be completely stopped, and by setting the input level of the high-frequency signal to the frequency mixing circuit 30 not to be excessive, distortion characteristics and the like can be kept optimal. .
【００２７】なお、本発明の実施の形態では、ＡＧＣ検
波回路３８をアナログ・デジタル変換回路３３の出力に
接続したデジタル放送受信装置を用いて説明したが、こ
れは、ＡＧＣ検波回路３８をローパスフィルタ３２の出
力に接続しても同様の効果が得られる。Although the embodiment of the present invention has been described using a digital broadcast receiving apparatus in which the AGC detection circuit 38 is connected to the output of the analog-to-digital conversion circuit 33, the AGC detection circuit 38 is a low-pass filter. A similar effect can be obtained by connecting to the 32 outputs.
【００２８】また、本発明の実施の形態ではデジタル放
送受信装置を想定したが、これはアナログ放送受信装置
でも使用することができる。Further, in the embodiment of the present invention, a digital broadcast receiving apparatus is assumed, but this can be used in an analog broadcast receiving apparatus.
【００２９】[0029]
【発明の効果】以上のように本発明によれば、自動利得
制御用検波回路の出力と高周波自動利得制御回路及び中
間周波数自動利得制御回路のそれぞれの制御端子との間
に利得配分制御回路を設け、この利得配分制御回路は入
力端子に入力される信号レベルと前記自動利得制御用検
波回路の出力制御電圧との関係に直線性を持たせたもの
であるため、入力端子に入力される信号レベルと自動利
得制御用検波回路の出力制御電圧との関係に直線性を持
たすことができる。従って、その制御電圧を利用し入力
信号レベルメータ等を設けることにより、アンテナの設
置に際し最適な方向を簡単に見つけ出すことが可能とな
る。また、この入力信号レベルメータを例えばデジタル
放送受信装置の設営時に行うチャンネルサーチ機能に取
り入れることで、入力信号の有無が瞬時に判断でき、放
送チャンネルをすばやく見つけ出すことが可能となる。As described above, according to the present invention, a gain distribution control circuit is provided between the output of the automatic gain control detection circuit and the respective control terminals of the high frequency automatic gain control circuit and the intermediate frequency automatic gain control circuit. Since the gain distribution control circuit has a linear relationship between the signal level input to the input terminal and the output control voltage of the automatic gain control detection circuit, the signal input to the input terminal The relationship between the level and the output control voltage of the automatic gain control detection circuit can have linearity. Therefore, by providing an input signal level meter or the like using the control voltage, it is possible to easily find the optimum direction when installing the antenna. In addition, by incorporating this input signal level meter into a channel search function performed, for example, when setting up a digital broadcast receiver, the presence or absence of an input signal can be instantaneously determined, and a broadcast channel can be quickly found.
【図１】本発明の一実施の形態による高周波信号受信装
置のブロック図FIG. 1 is a block diagram of a high-frequency signal receiving device according to an embodiment of the present invention;
【図２】同、利得制御電圧の特性図FIG. 2 is a characteristic diagram of the same gain control voltage.
【図３】従来の高周波信号受信装置のブロック図FIG. 3 is a block diagram of a conventional high-frequency signal receiving device.
【図４】同、利得制御電圧の特性図FIG. 4 is a characteristic diagram of the same gain control voltage.
１７ 入力端子 １９ ＲＦ−ＡＧＣ回路 ２１ 局部発振回路 ２２ 周波数混合回路 ２５ ＳＡＷフィルタ ２８ ＩＦ−ＡＧＣ回路 ３６ 出力端子 ３８ ＡＧＣ検波回路 ４２ 利得配分制御回路 Reference Signs List 17 input terminal 19 RF-AGC circuit 21 local oscillation circuit 22 frequency mixing circuit 25 SAW filter 28 IF-AGC circuit 36 output terminal 38 AGC detection circuit 42 gain distribution control circuit
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０４Ｎ 5/52 Ｈ０４Ｎ 5/52 Ｆターム(参考） 5C025 AA27 DA01 5C026 BA05 BA12 BA18 5J100 JA01 KA05 LA09 LA10 LA11 QA01 SA02 5K020 AA02 BB06 DD21 DD26 EE01 EE04 5K061 AA11 BB07 CC08 CC14 CC21 CC23 CC52 CD02 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification code FI Theme coat ゛ (Reference) H04N 5/52 H04N 5/52 F term (Reference) 5C025 AA27 DA01 5C026 BA05 BA12 BA18 5J100 JA01 KA05 LA09 LA10 LA11 QA01 SA02 5K020 AA02 BB06 DD21 DD26 EE01 EE04 5K061 AA11 BB07 CC08 CC14 CC21 CC23 CC52 CD02
Claims (4)
の入力端子に入力された信号が供給される高周波自動利
得制御回路と、この高周波自動利得制御回路の出力が一
方の入力に接続されるとともに他方の入力には局部発振
回路の出力が接続された周波数混合回路と、この周波数
混合回路の出力が接続された中間周波数フィルタと、こ
の中間周波数フィルタの出力が接続される中間周波数自
動利得制御回路と、この中間周波数自動利得制御回路の
出力が供給される出力端子と、前記中間周波数自動利得
制御回路の出力が供給される自動利得制御用検波回路と
を備え、前記自動利得制御用検波回路の出力と前記高周
波自動利得制御回路及び前記中間周波数自動利得制御回
路のそれぞれの制御端子との間に利得配分制御回路を設
け、この利得配分制御回路は前記入力端子に入力される
信号レベルと前記自動利得制御用検波回路の出力制御電
圧との関係に直線性を持たせた高周波信号受信装置。1. An input terminal to which a high-frequency signal is input, a high-frequency automatic gain control circuit to which a signal input to the input terminal is supplied, and an output of the high-frequency automatic gain control circuit connected to one input. A frequency mixing circuit to which the output of the local oscillation circuit is connected to the other input; an intermediate frequency filter to which the output of this frequency mixing circuit is connected; and an intermediate frequency automatic gain control to which the output of this intermediate frequency filter is connected. A circuit, an output terminal to which an output of the intermediate frequency automatic gain control circuit is supplied, and an automatic gain control detection circuit to which an output of the intermediate frequency automatic gain control circuit is supplied, wherein the automatic gain control detection circuit is provided. A gain distribution control circuit is provided between the output of the control circuit and the respective control terminals of the high-frequency automatic gain control circuit and the intermediate frequency automatic gain control circuit. A high frequency signal receiving apparatus wherein the control circuit has a linear relationship between a signal level input to the input terminal and an output control voltage of the automatic gain control detection circuit.
帰還回路で構成され、この電圧比較器の一方の入力端子
は中間周波数自動利得制御回路の制御端子に接続され、
前記電圧比較器の出力は高周波自動利得制御回路の制御
端子に接続された請求項１に記載の高周波信号受信装
置。2. The gain distribution control circuit comprises a feedback circuit using a voltage comparator. One input terminal of the voltage comparator is connected to a control terminal of the intermediate frequency automatic gain control circuit.
The high-frequency signal receiving device according to claim 1, wherein an output of the voltage comparator is connected to a control terminal of a high-frequency automatic gain control circuit.
混合回路への信号入力が過大にならないように設定され
た基準電圧が接続された請求項２に記載の高周波信号受
信装置。3. The high-frequency signal receiving device according to claim 2, wherein one input terminal of the voltage comparator is connected to a reference voltage set so that a signal input to the frequency mixing circuit does not become excessive.
させることができる請求項３に記載の高周波信号受信装
置。4. The high-frequency signal receiving device according to claim 3, wherein the reference voltage can be changed by using an adjusting element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001142794A JP3876644B2 (en) | 2001-05-14 | 2001-05-14 | High frequency signal receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001142794A JP3876644B2 (en) | 2001-05-14 | 2001-05-14 | High frequency signal receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002344345A true JP2002344345A (en) | 2002-11-29 |
| JP3876644B2 JP3876644B2 (en) | 2007-02-07 |
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|---|---|---|---|
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005004341A1 (en) * | 2003-07-07 | 2005-01-13 | Matsushita Electric Industrial Co., Ltd. | Digital signal reception device |
| JP2006203489A (en) * | 2005-01-20 | 2006-08-03 | Matsushita Electric Ind Co Ltd | High frequency signal receiver, integrated circuit for use therein, and electronic apparatus employing high frequency signal receiver |
| JP2007158812A (en) * | 2005-12-06 | 2007-06-21 | Yagi Antenna Co Ltd | Digital television broadcasting repeater |
| CN103391060A (en) * | 2012-05-09 | 2013-11-13 | 索尼公司 | Gain control circuit and receiving system |
-
2001
- 2001-05-14 JP JP2001142794A patent/JP3876644B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005004341A1 (en) * | 2003-07-07 | 2005-01-13 | Matsushita Electric Industrial Co., Ltd. | Digital signal reception device |
| CN100411311C (en) * | 2003-07-07 | 2008-08-13 | 松下电器产业株式会社 | Digital signal reception device |
| JP2006203489A (en) * | 2005-01-20 | 2006-08-03 | Matsushita Electric Ind Co Ltd | High frequency signal receiver, integrated circuit for use therein, and electronic apparatus employing high frequency signal receiver |
| JP2007158812A (en) * | 2005-12-06 | 2007-06-21 | Yagi Antenna Co Ltd | Digital television broadcasting repeater |
| CN103391060A (en) * | 2012-05-09 | 2013-11-13 | 索尼公司 | Gain control circuit and receiving system |
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| Publication number | Publication date |
|---|---|
| JP3876644B2 (en) | 2007-02-07 |
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