JP2002298650A - Conductive paste and wiring board using the same and its manufacturing method - Google Patents
Conductive paste and wiring board using the same and its manufacturing methodInfo
- Publication number
- JP2002298650A JP2002298650A JP2001100052A JP2001100052A JP2002298650A JP 2002298650 A JP2002298650 A JP 2002298650A JP 2001100052 A JP2001100052 A JP 2001100052A JP 2001100052 A JP2001100052 A JP 2001100052A JP 2002298650 A JP2002298650 A JP 2002298650A
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- Japan
- Prior art keywords
- mass
- conductive layer
- layer portion
- material powder
- conductive paste
- Prior art date
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、導電ペースト並び
にそれを用いた配線基板及びその製造方法に関し、更に
詳しくは、ガラスセラミック基板上に導電ペーストを用
いて形成された導電層部のその表面にガラス成分が浮き
出すことのない配線部形成用の導電ペースト並びに、そ
れを用いて製造され、導電層部と基板との密着強度が高
く、且つ反りの程度の小さい配線基板及びその製造方法
に関する。本発明の配線基板は、積層型ＬＣフィルタ
ー、カプラ（方向性結合器）ローパスフィルタ内蔵カプ
ラ、電力分配器、バラン（平衡−不平衡変換素子）、ア
ンテナスイッチモジュール、ミキサーモジュール基板、
ＰＬＬモジュール基板、ＶＣＯ（電圧制御型発振器）、
ＴＣＸＯ（温度補償型水晶発振器）等の電子部品、フリ
ップチップ接続方式の集積回路チップを電気的に接続す
るための電極パット群を備えたＣ４（ControlledCollap
se Chip Connection)パッケージ、ＣＳＰ(Chip Size Pa
ckage)等のセラミック配線基板等に利用され、これらの
パッケージに抵抗、コンデンサ及びインダクタのうちの
少なくとも１つを一体化してモジュール化したものにも
利用される。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductive paste, a wiring board using the same, and a method of manufacturing the same. More particularly, the present invention relates to a conductive layer formed on a glass ceramic substrate using the conductive paste. The present invention relates to a conductive paste for forming a wiring portion in which a glass component does not protrude, a wiring substrate manufactured using the same, having high adhesion strength between a conductive layer portion and a substrate and having a small degree of warpage, and a method for manufacturing the same. The wiring board of the present invention includes a laminated LC filter, a coupler (directional coupler) with a built-in low-pass filter, a power divider, a balun (balanced-unbalanced conversion element), an antenna switch module, a mixer module board,
PLL module board, VCO (voltage controlled oscillator),
C4 (ControlledCollap) equipped with an electrode pad group for electrically connecting electronic components such as TCXO (Temperature Compensated Crystal Oscillator) and flip-chip connection type integrated circuit chips
se Chip Connection) Package, CSP (Chip Size Pa)
This is used for ceramic wiring boards and the like, and is also used for modules obtained by integrating at least one of a resistor, a capacitor, and an inductor with these packages.
【０００２】[0002]
【従来の技術】近年、配線基板用の絶縁基体として、ガ
ラスセラミック焼結体や酸化アルミニウム質焼結体等の
電気絶縁材料が検討されている。ガラスセラミック焼結
体を絶縁基体とする場合には、通常、その上に配線パタ
ーンに沿って設けられる導電層部が導電ペーストによっ
て設けられ、同時焼成して製造される。また、導電層部
の表面には、耐半田性（半田喰われ性、半田濡れ性）の
向上のため、ニッケル、金等のメッキを施すことが多
く、メッキ工程において、導体層部とガラスセラミック
基板との密着強度の劣化を引き起こすことがある。ま
た、絶縁基体であるセラミックと導体層部の焼成収縮挙
動のミスマッチングが原因で基板に反りが発生するとい
った問題もある。2. Description of the Related Art In recent years, electrical insulating materials such as glass ceramic sintered bodies and aluminum oxide sintered bodies have been studied as insulating bases for wiring boards. When a glass ceramic sintered body is used as an insulating base, a conductive layer portion provided along a wiring pattern thereon is usually provided with a conductive paste, and is manufactured by simultaneous firing. In addition, the surface of the conductive layer is often plated with nickel, gold, or the like in order to improve solder resistance (solder erosion and solder wettability). In some cases, the adhesion strength to the substrate may be degraded. Also, there is a problem that the substrate is warped due to mismatching of firing shrinkage behavior between the ceramic which is the insulating base and the conductor layer portion.
【０００３】[0003]
【発明が解決しようとする課題】本発明は、ガラスセラ
ミック基板上に導電ペーストを用いて形成された導電層
部に、導電層部表面にガラス成分が浮き出すことのない
配線部形成用の導電ペースト並びに、それを用いて製造
され、導電層部と基板との密着強度が高く、且つ反りの
程度の小さい配線基板及びその製造方法を提供すること
を目的とする。SUMMARY OF THE INVENTION The present invention relates to a conductive layer formed on a glass ceramic substrate by using a conductive paste, and a conductive layer for forming a wiring portion in which a glass component does not emerge on the surface of the conductive layer. An object of the present invention is to provide a paste, a wiring board manufactured using the paste, having high adhesion strength between the conductive layer portion and the substrate, and having a small degree of warpage, and a method for manufacturing the same.
【０００４】[0004]
【課題を解決するための手段】本発明の導電ペースト
は、平均粒子径０．３〜２μｍの第１銀原料粉末０．５
〜３０質量％と、平均粒子径３〜５μｍの第２銀原料粉
末７０〜９９．５質量％と、が配合されてなり、該第１
銀原料粉末及び該第２銀原料粉末の合計１００質量部に
対して、更に二酸化マンガンを０．２〜１質量部、酸化
銅を０．２〜１質量部、二酸化珪素を０．３〜１質量
部、モリブデン及びタングステンを３〜５．６質量部含
有することを特徴とする。The conductive paste of the present invention comprises a first silver raw material powder having an average particle diameter of 0.3 to 2 μm.
-30% by mass, and 70-99.5% by mass of a second silver raw material powder having an average particle diameter of 3-5 μm.
Based on a total of 100 parts by mass of the silver raw material powder and the second silver raw material powder, 0.2 to 1 part by mass of manganese dioxide, 0.2 to 1 part by mass of copper oxide, and 0.3 to 1 part by mass of silicon dioxide. It is characterized by containing 3 to 5.6 parts by mass of molybdenum and tungsten.
【０００５】上記第１銀原料粉末としては、平均粒子径
が０．３〜２μｍの範囲にあるものであれば特に限定さ
れないが、粉末形状は球状が好ましい。また、平均粒子
径は、好ましくは０．５〜１．８μｍ、より好ましくは
０．５〜１．５μｍである。上記第２銀原料粉末として
は、平均粒子径が３〜５μｍの範囲にあるものであれば
特に限定されないが、粉末形状は球状が好ましい。ま
た、平均粒子径は、好ましくは３〜４．５μｍ、より好
ましくは３〜４μｍである。The first silver raw material powder is not particularly limited as long as it has an average particle diameter in the range of 0.3 to 2 μm, but the shape of the powder is preferably spherical. Further, the average particle size is preferably 0.5 to 1.8 μm, more preferably 0.5 to 1.5 μm. The second silver raw material powder is not particularly limited as long as it has an average particle diameter in the range of 3 to 5 μm, but the shape of the powder is preferably spherical. Further, the average particle size is preferably 3 to 4.5 μm, more preferably 3 to 4 μm.
【０００６】上記第１銀原料粉末と上記第２銀原料粉末
との配合量の組み合わせは、（０．５〜３０）／（７０
〜９９．５）質量％であり、好ましくは（０．５〜２
０）／（８０〜９９．５）質量％、より好ましくは（１
〜１５）／（８５〜９９）質量％、特に好ましくは（１
〜１０）／（９０〜９９）質量％である。上記第１銀原
料粉末の配合量が０．５質量％未満あるいは上記第２銀
原料粉末の配合量が９９．５質量％を超えると、銀粒子
同士の充填が悪く、焼成後の導体層部に径の大きなポア
が多数発生してしまうため、メッキ工程において種々の
不良を招く可能性がある。一方、上記第１銀原料粉末の
配合量が１５質量％を超えるかあるいは上記第２銀原料
粉末の配合量が８５質量％未満では、導体の焼結温度の
低下を招くことから、導体が過焼結になったり、逆に基
板と導体層部との焼成収縮挙動のミスマッチングを生
じ、反りを生じることから好ましくない。The combination of the amounts of the first silver raw material powder and the second silver raw material powder is (0.5 to 30) / (70
９９99.5)% by mass, preferably (0.5 to 2).
0) / (80 to 99.5) mass%, more preferably (1)
To 15) / (85 to 99) mass%, particularly preferably (1
-10) / (90-99) mass%. If the compounding amount of the first silver raw material powder is less than 0.5% by mass or the compounding amount of the second silver raw material powder exceeds 99.5% by mass, the filling of the silver particles is poor, and the conductor layer portion after firing is poor. Since a large number of pores having a large diameter are generated, various defects may be caused in the plating process. On the other hand, if the blending amount of the first silver raw material powder exceeds 15% by mass or the blending amount of the second silver raw material powder is less than 85% by mass, the sintering temperature of the conductor is lowered. It is not preferable because it causes sintering, or conversely, causes mismatching of firing shrinkage behavior between the substrate and the conductor layer portion, thereby causing warpage.
【０００７】本発明の導電ペーストには、上記第１銀原
料粉末及び上位第２銀原料粉末の他に更に二酸化マンガ
ン、酸化銅、二酸化珪素、モリブデン及びタングステン
が含有されるが、上記第１銀原料粉末及び上位第２銀原
料粉末以外の成分を上記範囲とすることで基板との焼成
マッチングを取ることが可能となり、反りを抑えること
ができ、更には導体と基板との密着強度向上の効果を備
えることができる。The conductive paste of the present invention contains manganese dioxide, copper oxide, silicon dioxide, molybdenum and tungsten in addition to the first silver raw material powder and the upper second silver raw material powder. By setting the components other than the raw material powder and the upper second silver raw material powder within the above ranges, it is possible to achieve firing matching with the substrate, to suppress warpage, and to further improve the adhesion strength between the conductor and the substrate. Can be provided.
【０００８】本発明の導電ペーストは、上記成分以外
に、通常、バインダーを含有させたものとすることがで
きる。上記バインダーの例としては、アクリル系樹脂、
セルローズ系樹脂、ゴム系樹脂、ポリウレタン系樹脂、
ポリエステル系樹脂、フェノール系樹脂等が挙げられ
る。上記バインダーの含有量は、上記第１銀原料粉末及
び上位第２銀原料粉末の合計１００質量部に対して、通
常、１．５〜１０質量部である。また、本発明の導電ペ
ーストの溶剤としては、アセテート類、ブチルセロソル
ブ等のセロソルブ類、ブチルカルビトール等のカルビト
ール類等を用いることができる。The conductive paste of the present invention may contain a binder in addition to the above components. Examples of the binder include acrylic resins,
Cellulose resin, rubber resin, polyurethane resin,
Examples include polyester-based resins and phenol-based resins. The content of the binder is usually 1.5 to 10 parts by mass with respect to 100 parts by mass of the first silver raw material powder and the upper second silver raw material powder in total. In addition, as the solvent for the conductive paste of the present invention, acetates, cellosolves such as butyl cellosolve, carbitols such as butyl carbitol, and the like can be used.
【０００９】本発明の配線基板は、ホウ珪酸鉛系ガラス
を主成分とするガラスセラミック基板と、請求項１記載
の導電性ペーストを用いて該ガラスセラミック基板上に
形成された導電層部及び該導電層部上に形成されたメッ
キ層部からなる配線部と、を備え、該導電層部表面の凹
部の最大口径が６μｍであることを特徴とする。A wiring substrate according to the present invention comprises a glass ceramic substrate containing lead borosilicate glass as a main component, a conductive layer portion formed on the glass ceramic substrate using the conductive paste according to claim 1, and A wiring portion formed of a plating layer portion formed on the conductive layer portion, wherein the maximum diameter of the concave portion on the surface of the conductive layer portion is 6 μm.
【００１０】本発明の配線基板の製造方法は、ホウ珪酸
鉛系ガラスを主成分とするガラスセラミック基板に、請
求項１記載の導電ペーストを用いて配線パターンに沿っ
て導電層部を形成する工程と、この積層体を焼成する工
程と、該導電層部表面を清浄化するメッキ前処理工程
と、該導電層部表面にメッキをして配線部を形成する工
程と、を備えることを特徴とする。According to a second aspect of the present invention, there is provided a method of manufacturing a wiring board, comprising the steps of forming a conductive layer portion along a wiring pattern on a glass ceramic substrate containing lead borosilicate glass as a main component by using the conductive paste according to claim 1. And a step of baking the laminate, a pre-plating treatment step of cleaning the surface of the conductive layer portion, and a step of forming a wiring portion by plating the surface of the conductive layer portion. I do.
【００１１】上記ホウ珪酸鉛系ガラスとしては特に限定
されないが、ガラスの軟化点が５４０〜７８０℃のもの
が好ましい。上記ガラスセラミック基板に本発明の導電
ペーストを用いて配線パターンに沿って導電層部を形成
する工程では、スクリーン印刷等が用いられる。導電層
部が形成された後、焼成する工程では、通常、大気雰囲
気で、温度８００〜９００℃、時間１５〜３０分で焼成
される。また、焼成工程後の導電層部の厚さは、通常、
５〜２０μｍである。The lead borosilicate glass is not particularly limited, but preferably has a softening point of 540 to 780 ° C. In the step of forming a conductive layer portion along the wiring pattern on the glass ceramic substrate using the conductive paste of the present invention, screen printing or the like is used. After the conductive layer portion is formed, in the step of baking, the baking is usually performed in an air atmosphere at a temperature of 800 to 900 ° C. for a time of 15 to 30 minutes. Also, the thickness of the conductive layer after the firing step is usually
5 to 20 μm.
【００１２】上記焼成工程後のガラスセラミック基板
は、反りの程度（反り量）を小さくすることができ、厚
さ０．２ｍｍの基板上に形成された縦１２．５ｍｍ、横
１２．５ｍｍ、厚さ５〜２０μｍの導体層部は、導体層
部の１５ｍｍ長さに対する基板の反り量を好ましくは１
２０μｍ以下とすることができる。上記反り量が１２０
μｍを超えると基板焼成後に行われる後工程、例えばバ
ンダ印刷、部品実装工程において問題となるため、好ま
しくない。尚、上記反り量の測定方法は実施例において
述べる。The glass ceramic substrate after the firing step can reduce the degree of warpage (the amount of warpage), and is formed on a substrate having a thickness of 0.2 mm by 12.5 mm in length, 12.5 mm in width, and 12.5 mm in width. The conductor layer having a thickness of 5 to 20 μm preferably has a warp amount of the substrate of 1 mm for a length of 15 mm of the conductor layer.
It can be 20 μm or less. The warpage amount is 120
If it exceeds μm, it is not preferable because it causes a problem in a post-process performed after the substrate is baked, for example, in a bander printing or component mounting process. The method for measuring the amount of warpage will be described in Examples.
【００１３】本発明の導電ペーストを用いた上記焼成工
程後の基板には、上記導電層部表面の銀粒子間にポアが
発生し、凹部を形成するが、このポアの最大径を好まし
くは６μｍ、より好ましくは５．５μｍ、更に好ましく
は５μｍとすることができる。このようなポアは、メッ
キ工程において導体密着強度劣化を引き起こすこととな
る。つまり、メッキ液あるいはメッキ前処理液がポアを
通して、導体層内部に侵入し、導体層内部のガラス成分
等をエッチングしてしまい、結果的に導体層部とセラミ
ックとの密着強度劣化を引き起こすためである。従っ
て、上記ポアの最大径が小さいほど、密着強度劣化を防
止することができる。一方、上記ポアの最大径が大きす
ぎると、焼成時においてガラスセラミック成分に含まれ
るガラス成分が導体層上に拡散し（いわゆる「ガラス浮
き」）、メッキ前処理工程によって上記導電層部表面に
浮き出てきたガラスセラミック成分が除去しきれずに残
り、そこへメッキを行っても、形成が不完全となる。In the substrate after the firing step using the conductive paste of the present invention, pores are generated between the silver particles on the surface of the conductive layer portion to form a concave portion. The maximum diameter of the pore is preferably 6 μm. , More preferably 5.5 μm, and still more preferably 5 μm. Such pores cause deterioration of the conductor adhesion strength in the plating process. In other words, the plating solution or plating pretreatment solution penetrates into the inside of the conductor layer through the pores and etches glass components and the like inside the conductor layer, resulting in deterioration of the adhesion strength between the conductor layer portion and the ceramic. is there. Therefore, the smaller the maximum diameter of the pore is, the more the deterioration of the adhesion strength can be prevented. On the other hand, if the maximum diameter of the pores is too large, the glass component contained in the glass ceramic component diffuses on the conductor layer during firing (so-called “glass float”), and floats on the surface of the conductive layer portion by a plating pretreatment step. The remaining glass ceramic component remains without being completely removed, and even if plating is performed thereon, the formation is incomplete.
【００１４】上記導電層部は、その表面へのメッキによ
ってメッキ層部とされるが、メッキの前には、上記焼成
工程によって上記導電層部表面に浮き出てきたガラスセ
ラミック成分及び堆積した不純物等を除去し、清浄化す
るために、メッキ前処理が行われる。このメッキ前処理
工程は、公知の方法で行うことができ、例えば、酸処理
及びアルカリ処理を組み合わせて行われる。The conductive layer portion is formed into a plating layer portion by plating the surface thereof. Before plating, the glass ceramic component and the deposited impurities, etc., which have emerged on the surface of the conductive layer portion by the firing step. Pre-plating treatment is performed to remove and clean. This plating pretreatment step can be performed by a known method, for example, a combination of an acid treatment and an alkali treatment.
【００１５】上記導電層部表面にメッキをする際のメッ
キ素材は特に限定されないが、ニッケル、ニッケル−リ
ン、ニッケル−ホウ素が好ましい。特にニッケル−リン
メッキをした場合は、配線部表面に短時間で酸化膜が形
成されることがなく、これによって配線部の半田の濡れ
性が良好となり、半田を介して電子部品を強固に接続す
ることができる。また、これらを上記導電層部表面にメ
ッキをする方法も特に限定されず、電解メッキ、無電解
メッキ等によることができる。The material for plating the surface of the conductive layer portion is not particularly limited, but nickel, nickel-phosphorus, and nickel-boron are preferred. In particular, when nickel-phosphorus plating is performed, an oxide film is not formed on the surface of the wiring portion in a short time, whereby the solder wettability of the wiring portion is improved, and the electronic component is firmly connected via the solder. be able to. Further, the method of plating these on the surface of the conductive layer is not particularly limited, and may be electrolytic plating, electroless plating, or the like.
【００１６】本発明の配線基板によれば、上記導電層部
と上記配線部の密着強度を好ましくは１５Ｎ／２ｍｍ□
以上、より好ましくは１６Ｎ／２ｍｍ□以上、更に好ま
しくは１７Ｎ／２ｍｍ□以上とすることができる。ま
た、本発明の配線基板は、高温放置エージング特性に優
れるものである。According to the wiring board of the present invention, the adhesion strength between the conductive layer portion and the wiring portion is preferably 15 N / 2 mm □.
As described above, it is more preferably 16 N / 2 mm □ or more, and further preferably 17 N / 2 mm □ or more. Further, the wiring board of the present invention has excellent high-temperature storage aging characteristics.
【００１７】[0017]
【発明の実施の形態】以下に実施例を挙げて、本発明を
更に詳しく説明する。 １．セラミックグリーンシートの作製 以下の方法により、配線基板用のセラミックグリーンシ
ートを作製した。即ち、セラミック原料として、軟化点
が６７８℃のホウ珪酸鉛ガラス粉末〔組成：ＳｉＯ
2（４９％）、Ａｌ2Ｏ3（５％）、Ｂ2Ｏ3（５％）、Ｎ
ａ2Ｏ（２．５％）、Ｋ2Ｏ（１．５％）、ＣａＯ（５
％）、ＰｂＯ（３２％）〕とα−Ａｌ2Ｏ3粉末（商品名
「Ａｌ−Ｓ４３Ａ」、住友化学社製）とを質量比１：１
で合計１ｋｇとしてアルミナ製ポットに入れ、更に溶剤
としてメチルエチルケトン２００ｇ、バインダーとして
メタクリル酸メチル系のアクリル樹脂１００ｇ、可塑剤
としてジオクチルフタレート５０ｇ、分散剤５ｇを入
れ、１０時間混合し、スラリーを得た。このスラリーを
用いて、ドクターブレード法により縦１２９ｍｍ、横１
４５ｍｍ、厚さ０．２５ｍｍのセラミックグリーンシー
トを得た。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail with reference to the following examples. 1. Preparation of Ceramic Green Sheet A ceramic green sheet for a wiring board was prepared by the following method. That is, as a ceramic raw material, a lead borosilicate glass powder having a softening point of 678 ° C. [composition: SiO 2
2 (49%), Al 2 O 3 (5%), B 2 O 3 (5%), N
a 2 O (2.5%), K 2 O (1.5%), CaO (5%)
%), PbO (32%)] and α-Al 2 O 3 powder (trade name “Al-S43A”, manufactured by Sumitomo Chemical Co., Ltd.) at a mass ratio of 1: 1.
And put into an alumina pot, 200 g of methyl ethyl ketone as a solvent, 100 g of a methyl methacrylate-based acrylic resin as a binder, 50 g of dioctyl phthalate as a plasticizer, and 5 g of a dispersant, and mixed for 10 hours to obtain a slurry. Using this slurry, the doctor blade method was used to measure 129 mm long and 1 mm wide.
A ceramic green sheet having a size of 45 mm and a thickness of 0.25 mm was obtained.
【００１８】２．導電ペーストの作製 平均粒子径の異なる銀粉末と、二酸化マンガン、酸化
銅、二酸化珪素、モリブデン及びタングステンの各粉末
を表１に示すような割合とし、更にバインダーとしてエ
チルセルロース５質量部及びブチルカルビトール１５質
量部を加えて混合し、３本ロールミルを用いて混練して
導電ペーストを作製した。2. Preparation of conductive paste Silver powder having different average particle diameters, and powders of manganese dioxide, copper oxide, silicon dioxide, molybdenum and tungsten were set in the proportions shown in Table 1, and 5 parts by mass of ethyl cellulose and butyl carbitol 15 were used as binders. A mass part was added and mixed, and kneaded using a three-roll mill to prepare a conductive paste.
【００１９】[0019]
【表１】 [Table 1]
【００２０】３．配線基板の作製 上記で得たセラミックグリーンシート１枚に上記導電ペ
ーストを用いて、焼成後に縦１２．５ｍｍ、横１２．５
ｍｍの正方形（以下、「１２．５ｍｍ□」という。）の
導電層部となるような配線パターンをスクリーン印刷で
形成した。また、これとは別に、上記で得たセラミック
グリーンシートを４枚積層圧着して積層体とし、この積
層体の最上層に上記導電ペーストを用いて、焼成後に縦
２ｍｍ、横２ｍｍの正方形（以下、「２ｍｍ□」とい
う。）の導電層部となるような配線パターンをスクリー
ン印刷で形成した。これらを大気雰囲気で８４０℃で１
５分焼成後、アルカリ性溶液及び酸性溶液で洗浄し、パ
ラジウムによって活性化処理を行った。その後、ニッケ
ル−リンメッキ浴で無電解メッキを行い、ニッケル−リ
ンのメッキ膜厚を１〜５μｍとし、更に金メッキで膜厚
を０．０３〜０．１μｍとした。この基板を水で洗浄
し、乾燥させて配線基板を得た。3. Preparation of Wiring Substrate One ceramic green sheet obtained above was baked using the above-mentioned conductive paste by 12.5 mm in length and 12.5 mm in width.
A wiring pattern was formed by screen printing so as to form a conductive layer portion of a square of mm (hereinafter, referred to as “12.5 mm □”). Separately, four ceramic green sheets obtained as described above are laminated and pressed to form a laminate, and the above-mentioned conductive paste is used as the uppermost layer of the laminate. , “2 mm □”) was formed by screen printing so as to form a conductive layer portion. These are placed in air at 840 ° C for 1
After baking for 5 minutes, the resultant was washed with an alkaline solution and an acidic solution, and activated with palladium. Thereafter, electroless plating was performed in a nickel-phosphorous plating bath to make the nickel-phosphorous plating film thickness 1 to 5 μm, and further, gold plating to a film thickness 0.03 to 0.1 μm. This substrate was washed with water and dried to obtain a wiring substrate.
【００２１】４．評価 下記項目の評価を行い、その結果を表２に示した。 （１）導電層部表面のポアの観察 導電ペーストを用いて形成され、焼成された導電層部表
面のポアを見るために、試料１及び１２について、電界
放射型走査電子顕微鏡（型式ＪＳＭ−６３３０Ｆ型、日
本電子社製）を用いて、加速電圧２０ｋＶ、１０００倍
の倍率で観察した。4. Evaluation The following items were evaluated, and the results are shown in Table 2. (1) Observation of pores on the surface of the conductive layer portion In order to see the pores formed on the surface of the conductive layer portion using the conductive paste and fired, samples 1 and 12 were subjected to a field emission scanning electron microscope (model JSM-6330F). Using a mold (manufactured by JEOL Ltd.) at an acceleration voltage of 20 kV and a magnification of 1000 times.
【００２２】（２）反り 上記で得た焼成後の基板上の、導電ペーストによって形
成された縦１２．５ｍｍ、横１２．５ｍｍの導電層部に
発生するうねり量を、表面粗度計（サーフコム５７５Ａ
型、東京精密社製）を用いて測定し、配線基板の「反り
量」として評価した。具体的には、表面粗度計を用いて
導電層部上を焼成後の基板の対角線に沿って長さ１５ｍ
ｍトレースし、得られた凹凸量から導電層部の厚みを差
し引いた数値とした。単位はμｍである。(2) Warpage The amount of undulation generated in the conductive layer of 12.5 mm in length and 12.5 mm in width formed by the conductive paste on the fired substrate obtained above is measured by a surface roughness meter (Surfcom). 575A
(Manufactured by Tokyo Seimitsu Co., Ltd.) and evaluated as the “warpage amount” of the wiring board. Specifically, a length of 15 m along the diagonal line of the substrate after firing on the conductive layer portion using a surface roughness meter.
The value was obtained by subtracting the thickness of the conductive layer portion from the obtained unevenness amount. The unit is μm.
【００２３】（３）表面のガラス成分 上記で得た焼成後の基板上に形成された導体層部表面の
銀と鉛の原子組成比を光電子分光装置（ＪＰＳ−９０Ｍ
Ｘ型、日本電子社製）を用いてピーク強度によって求め
た。尚、測定条件は、Ｘ線源がＭｇ−Ｋα（出力１０ｋ
Ｖ−２０ｍＡ）、検出器のエネルギーパスが３０ｅＶ、
ステップ幅が０．２ｅＶ、測定面積がφ６ｍｍである。
表２において、「多」は、Ｐｂ／Ａｇのピーク強度比が
０．１以上、即ち、ガラス成分が多く浮き出しているこ
とを示し、「少」は０．１未満であることを意味する。(3) Surface Glass Component The atomic composition ratio of silver and lead on the surface of the conductor layer formed on the fired substrate obtained above was measured using a photoelectron spectrometer (JPS-90M).
X type, manufactured by JEOL Ltd.). The measurement conditions were as follows: X-ray source was Mg-Kα (output 10 k
V-20 mA), the energy path of the detector is 30 eV,
The step width is 0.2 eV and the measurement area is φ6 mm.
In Table 2, “High” means that the peak intensity ratio of Pb / Ag is 0.1 or more, that is, that many glass components are raised, and “Low” means that it is less than 0.1.
【００２４】（４）配線基板のメッキ性 導体層部表面にニッケル−リンメッキをしたメッキ表面
について、メッキ膜の剥がれや、無メッキ部の存在の有
無を見るために、上記電子顕微鏡を用いて観察した。
尚、表２において、「○」は、メッキ膜の剥がれや無メ
ッキ部等がなく、良好にメッキされていることを示し、
「×」はメッキ膜の剥がれや無メッキ部が存在し、メッ
キ不良であることを示す。(4) Plating property of wiring board The nickel-phosphorus-plated surface of the conductor layer is observed using the above-mentioned electron microscope to check whether the plating film has peeled off or whether there is a non-plated portion. did.
In Table 2, “○” indicates that the plating was well-plated without peeling of the plating film or a non-plating portion.
"X" indicates that the plating film was peeled off or a non-plated portion was present and plating was defective.
【００２５】（５）密着強度 メッキ後の２ｍｍ□の基板を錫／鉛の共晶半田浴（２１
０℃）に２秒間浸漬し、導体層部に半田をのせた。半田
ののった導体層部に直径０．５ｍｍのニッケルメッキ付
きＬ字銅線を半田付けし、基板面の法線方向に２０ｍｍ
／分の速度でリードプルテスターで引っ張り、導体層部
層と基板間での破断発生時の強度を測定した。(5) Adhesion Strength A plated 2 mm square substrate is placed in a tin / lead eutectic solder bath (21
(0 ° C.) for 2 seconds, and solder was placed on the conductor layer. An L-shaped copper wire with a nickel plating having a diameter of 0.5 mm is soldered to the conductor layer portion on which the solder has been applied, and a 20 mm normal direction of the board surface is applied.
The tensile strength at the time of breakage between the conductor layer portion layer and the substrate was measured by pulling at a rate of / min with a lead pull tester.
【００２６】[0026]
【表２】 [Table 2]
【００２７】５．実施例の効果 試料１は銀粉末の平均粒子径が８．５μｍのものを１種
だけ用いた例であり、図１に示すように、焼成によって
たくさん発生したポアの大きさが大きく、更に導電層部
表面にガラス成分が多く浮き出て、メッキも不良で密着
強度も劣っていた。試料２は平均粒子径が３．５μｍの
ものを１種だけ用いた例であり、焼成によって大きなポ
アが発生したがその数は少なかった。しかし、更に導電
層部表面にガラス成分が多く浮き出て、メッキも不良で
あった。試料３は、平均粒子径が１μｍのものを１種だ
け用いた場合であり、焼成によってたくさん発生したポ
アの大きさが大きく、導電層部表面にガラス成分が多く
浮き出て、メッキも不良であり、更に配線基板の反りが
大きかった。試料４は、平均粒子径の異なる２種の銀粉
末を用いた例であるが、これらの含有量が本発明の範囲
外であり、大きなポアがたくさん発生し、導電層部表面
にガラス成分が多く浮き出て、メッキも不良であった。
更に、配線基板の反りもひどかった。試料５〜１３は平
均粒子径の異なる２種の銀粉末の含有量が本発明の範囲
にある例であり、例えば試料１２の導電層部表面のＳＥ
Ｍ写真（図２）からも分かるように、ポアの発生が少な
く、表面に浮き出るガラス成分も少なかった。それによ
って、メッキの密着強度も高かった。そして、平均粒子
径１μｍの銀粉末の含有割合が減るにつれて焼成による
配線基板の反りの程度が小さくなった。5. Effect of Example Sample 1 is an example in which only one kind of silver powder having an average particle diameter of 8.5 μm was used. As shown in FIG. A lot of glass components emerged on the surface of the layer, the plating was poor, and the adhesion strength was poor. Sample 2 is an example in which only one kind having an average particle diameter of 3.5 μm was used. Large pores were generated by firing, but the number was small. However, a lot of glass components appeared on the surface of the conductive layer portion, and the plating was poor. Sample 3 was a case where only one kind having an average particle diameter of 1 μm was used. The size of the pores generated by firing was large, a large amount of glass components appeared on the surface of the conductive layer portion, and the plating was poor. Further, the warpage of the wiring board was large. Sample 4 is an example using two kinds of silver powders having different average particle diameters, but their contents are out of the range of the present invention, many large pores are generated, and the glass component is formed on the surface of the conductive layer portion. Many were raised and the plating was poor.
Furthermore, the warpage of the wiring board was severe. Samples 5 to 13 are examples in which the content of two kinds of silver powders having different average particle sizes is within the range of the present invention.
As can be seen from the M photograph (FIG. 2), the generation of pores was small, and the amount of glass component floating on the surface was also small. Thereby, the adhesion strength of the plating was also high. Then, as the content ratio of the silver powder having an average particle diameter of 1 μm was reduced, the degree of warpage of the wiring substrate due to firing was reduced.
【００２８】[0028]
【発明の効果】本発明の導電ペーストによれば、平均粒
子径の異なる２種の銀原料粉末と各種成分を含有するこ
とで、ガラスセラミック基板上に形成される導電層部表
面に大きなポアが発生することなく、また焼成処理によ
ってガラス成分が浮き出ることがない。また、本発明の
配線基板及びその製造方法によれば、上記導電ペースト
によって形成される導電層部と、ガラスセラミック基板
との密着性に優れ、更には基板が反ることのない配線基
板を得ることができる。According to the conductive paste of the present invention, by containing two kinds of silver raw material powders having different average particle diameters and various components, large pores are formed on the surface of the conductive layer portion formed on the glass ceramic substrate. It does not occur, and the glass component does not emerge due to the firing treatment. Further, according to the wiring board and the method of manufacturing the same of the present invention, it is possible to obtain a wiring board which has excellent adhesion between the conductive layer portion formed by the conductive paste and the glass ceramic substrate, and further, does not warp the substrate. be able to.
【図１】試料１の導電層部表面を示す写真である。FIG. 1 is a photograph showing the surface of a conductive layer portion of Sample 1.
【図２】試料１２の導電層部表面を示す写真である。FIG. 2 is a photograph showing the surface of a conductive layer portion of Sample 12.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｋ 3/12 ６１０ Ｈ０５Ｋ 3/12 ６１０Ｍ 3/24 3/24 Ｄ Ｆターム(参考） 4E351 AA07 BB01 CC12 CC22 DD04 DD05 DD17 DD21 DD31 EE02 GG03 GG13 GG14 GG15 4J040 AA011 AA012 HA061 HA132 HA302 JB02 JB10 KA32 LA01 LA06 LA09 MA04 NA20 5E343 AA02 AA23 BB08 BB12 BB16 BB24 BB25 BB39 BB40 BB52 BB71 BB72 DD03 DD33 EE01 EE02 EE13 GG01 GG16 GG18 5G301 DA03 DA09 DA14 DA33 DA42 DA53 DA55 DA59 DD01 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 3/12 610 H05K 3/12 610M 3/24 3/24 DF term (Reference) 4E351 AA07 BB01 CC12 CC22 DD04 DD05 DD17 DD21 DD31 EE02 GG03 GG13 GG14 GG15 4J040 AA011 AA012 HA061 HA132 HA302 JB02 JB10 KA32 LA01 LA06 LA09 MA04 NA20 5E343 AA02 AA23 BB08 BB12 DA16 BB24 BB25 BB39 BB01 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 BB52 DA42 DA53 DA55 DA59 DD01
Claims (4)
粉末０．５〜３０質量％と、平均粒子径３〜５μｍの第
２銀原料粉末７０〜９９．５質量％と、が配合されてな
り、該第１銀原料粉末及び該第２銀原料粉末の合計１０
０質量部に対して、更に二酸化マンガンを０．２〜１質
量部、酸化銅を０．２〜１質量部、二酸化珪素を０．３
〜１質量部、モリブデン及びタングステンを３〜５．６
質量部含有することを特徴とする導電ペースト。A first silver raw material powder having an average particle diameter of 0.3 to 2 μm is 0.5 to 30% by mass, and a second silver raw material powder having an average particle diameter of 3 to 5 μm is 70 to 99.5% by mass. And a total of 10 parts of the first silver raw material powder and the second silver raw material powder.
Further, 0.2 to 1 part by mass of manganese dioxide, 0.2 to 1 part by mass of copper oxide, and 0.3 part by mass of silicon dioxide with respect to 0 parts by mass.
To 1 part by weight, 3 to 5.6 parts of molybdenum and tungsten
A conductive paste, which is contained by mass.
スセラミック基板と、請求項１記載の導電性ペーストを
用いて該ガラスセラミック基板上に形成された導電層部
及び該導電層部上に形成されたメッキ層部からなる配線
部と、を備え、該導電層部表面の凹部の最大口径が６μ
ｍであることを特徴とする配線基板。2. A glass ceramic substrate containing lead borosilicate glass as a main component, a conductive layer portion formed on the glass ceramic substrate using the conductive paste according to claim 1, and a conductive layer portion formed on the glass ceramic substrate. And a wiring portion comprising a formed plating layer portion, wherein the maximum diameter of the concave portion on the surface of the conductive layer portion is 6 μm.
m.
スセラミック基板に、請求項１記載の導電ペーストを用
いて配線パターンに沿って導電層部を形成する工程と、
この積層体を焼成する工程と、焼成後の導電層部表面を
清浄化するメッキ前処理工程と、該導電層部表面にメッ
キをして配線部を形成する工程と、を備えることを特徴
とする配線基板の製造方法。3. A step of forming a conductive layer portion along a wiring pattern on a glass ceramic substrate containing lead borosilicate glass as a main component, using the conductive paste according to claim 1.
Baking the laminate, pre-plating step of cleaning the surface of the conductive layer portion after baking, and forming a wiring portion by plating the surface of the conductive layer portion, Method for manufacturing a wiring board.
間に発生するポアの最大径が６μｍである請求項３記載
の配線基板の製造方法。4. The method according to claim 3, wherein a maximum diameter of pores generated between silver particles on the surface of the conductive layer after the firing step is 6 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001100052A JP3772093B2 (en) | 2001-03-30 | 2001-03-30 | Conductive paste, wiring board using the same, and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001100052A JP3772093B2 (en) | 2001-03-30 | 2001-03-30 | Conductive paste, wiring board using the same, and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002298650A true JP2002298650A (en) | 2002-10-11 |
| JP3772093B2 JP3772093B2 (en) | 2006-05-10 |
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ID=18953529
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001100052A Expired - Fee Related JP3772093B2 (en) | 2001-03-30 | 2001-03-30 | Conductive paste, wiring board using the same, and manufacturing method thereof |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004362950A (en) * | 2003-06-05 | 2004-12-24 | Noritake Co Ltd | Conductive paste mainly composed of silver powder, and its manufacturing method |
| JP2005203304A (en) * | 2004-01-19 | 2005-07-28 | Hitachi Chem Co Ltd | Mixed conductive powder |
| JP2006128608A (en) * | 2004-09-29 | 2006-05-18 | Kyocera Corp | Electronic part, method for manufacturing the same, chip resistor using the same, ferrite core and inductor |
| JP2010056092A (en) * | 2009-11-30 | 2010-03-11 | Hitachi Chem Co Ltd | Mixed conductive powder |
| JP2010170916A (en) * | 2009-01-23 | 2010-08-05 | Nichia Corp | Conductive material and method of manufacturing the same, electronic device including conductive material, and light-emitting device |
| JP2011204688A (en) * | 2011-06-08 | 2011-10-13 | Hitachi Chem Co Ltd | Mixed conductive powder |
| CN113689971A (en) * | 2021-08-25 | 2021-11-23 | 浙江光达电子科技有限公司 | Spraying silver paste for 5G filter and preparation method thereof |
-
2001
- 2001-03-30 JP JP2001100052A patent/JP3772093B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004362950A (en) * | 2003-06-05 | 2004-12-24 | Noritake Co Ltd | Conductive paste mainly composed of silver powder, and its manufacturing method |
| JP2005203304A (en) * | 2004-01-19 | 2005-07-28 | Hitachi Chem Co Ltd | Mixed conductive powder |
| JP2006128608A (en) * | 2004-09-29 | 2006-05-18 | Kyocera Corp | Electronic part, method for manufacturing the same, chip resistor using the same, ferrite core and inductor |
| JP2010170916A (en) * | 2009-01-23 | 2010-08-05 | Nichia Corp | Conductive material and method of manufacturing the same, electronic device including conductive material, and light-emitting device |
| JP2010056092A (en) * | 2009-11-30 | 2010-03-11 | Hitachi Chem Co Ltd | Mixed conductive powder |
| JP2011204688A (en) * | 2011-06-08 | 2011-10-13 | Hitachi Chem Co Ltd | Mixed conductive powder |
| CN113689971A (en) * | 2021-08-25 | 2021-11-23 | 浙江光达电子科技有限公司 | Spraying silver paste for 5G filter and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3772093B2 (en) | 2006-05-10 |
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