JP2002231669A - Polishing cloth for semiconductor wafer, and polishing method of semiconductor wafer using the polishing cloth - Google Patents

Polishing cloth for semiconductor wafer, and polishing method of semiconductor wafer using the polishing cloth

Info

Publication number
JP2002231669A
JP2002231669A JP2001020734A JP2001020734A JP2002231669A JP 2002231669 A JP2002231669 A JP 2002231669A JP 2001020734 A JP2001020734 A JP 2001020734A JP 2001020734 A JP2001020734 A JP 2001020734A JP 2002231669 A JP2002231669 A JP 2002231669A
Authority
JP
Japan
Prior art keywords
polishing
abrasive grains
cloth
semiconductor wafer
polishing cloth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001020734A
Other languages
Japanese (ja)
Other versions
JP3617665B2 (en
Inventor
Seishi Harada
晴司 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Silicon Corp
Original Assignee
Mitsubishi Materials Silicon Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Silicon Corp filed Critical Mitsubishi Materials Silicon Corp
Priority to JP2001020734A priority Critical patent/JP3617665B2/en
Publication of JP2002231669A publication Critical patent/JP2002231669A/en
Application granted granted Critical
Publication of JP3617665B2 publication Critical patent/JP3617665B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Polishing Bodies And Polishing Tools (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide polishing cloth for semiconductor wafers that reduces cost and time in waste liquid treatment, and restrains frequent replacement of the polishing cloth, and to provide a method for polishing the semiconductor wafers by the polishing cloth. SOLUTION: Polishing clothes 10A and 10A are rotated, while alkaline polishing liquid is being supplied, and the polishing cloths 10A and 10A are brought into contact with the front and rear of a silicon wafer W for polishing both the surfaces. Although liberation abrasive grains have been required for polishing in the conventional polishing cloths, the polishing abrasive grain is fixed onto the polishing operation surface of the polishing cloths 10A and 10A, thus carrying out polishing by the polishing liquid that does not contain the polishing abrasive grains, and hence reducing the costs and time in waste liquid treatment for restoring replacing frequency of the polishing cloths 10A and 10A, caused by silting due to the polishing abrasive grain.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は半導体ウェーハ用
研磨布およびこれを用いた半導体ウェーハの研磨方法、
詳しくは半導体ウェーハの外面を、固定砥粒を含む研磨
布によって研磨する半導体ウェーハ用研磨布およびこれ
を用いた半導体ウェーハの研磨方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing pad for a semiconductor wafer and a method for polishing a semiconductor wafer using the same.
More specifically, the present invention relates to a semiconductor wafer polishing cloth for polishing an outer surface of a semiconductor wafer with a polishing cloth containing fixed abrasive grains, and a method for polishing a semiconductor wafer using the same.

【0002】[0002]

【従来の技術】一般に、シリコンウェーハの製造にあっ
ては、CZ法による単結晶シリコンインゴットの引き上
げが行われ、次いでブロック切断、外筒研削、オリエン
テーションフラット(OF)加工が施される。そして、
多数枚のシリコンウェーハへのスライス、シリコンウェ
ーハ外周部の面取り、シリコンウェーハ表裏両面のラッ
ピング、シリコンウェーハ表裏両面の加工ダメージ(加
工ひずみ)を除去するエッチング、その面取り面を鏡面
仕上げするPCR(Polishing Conor
Rounding)、さらにシリコンウェーハ表裏両面
を鏡面化する鏡面研磨という各工程が行われる。その
後、最終洗浄、検査が施されて受注先のデバイスメーカ
などへ出荷されている。
2. Description of the Related Art In general, in manufacturing a silicon wafer, a single crystal silicon ingot is pulled up by a CZ method, and then, block cutting, outer cylinder grinding, and orientation flat (OF) processing are performed. And
Slicing into a large number of silicon wafers, chamfering the outer periphery of the silicon wafer, lapping both sides of the silicon wafer, etching to remove processing damage (processing strain) on both sides of the silicon wafer, and PCR (Polishing Conor) for mirror-finishing the chamfered surface
Rounding, and mirror polishing for mirror-polishing both the front and back surfaces of the silicon wafer. After that, they are subjected to final cleaning and inspection before being shipped to the order-receiving device manufacturer.

【0003】従来、この鏡面研磨工程は、研磨定盤上に
ウレタンパッドなどの研磨布が展張された研磨装置によ
って行われていた。すなわち、シリコンウェーハ表面の
鏡面研磨時には、研磨液中に遊離砥粒(研磨砥粒)を含
むスラリー(研磨剤)を供給しながら、回転中の研磨布
の研磨作用面に、シリコンウェーハの表面または裏面を
押し当てることによって、微粒子である遊離砥粒の研削
作用により、このシリコンウェーハの表裏両面を鏡面仕
上げしている。また、従来のPCR工程では、シリコン
ウェーハの裏面が保持板に吸着・保持され、この状態で
シリコンウェーハの外周部に周知の鏡面仕上げが行われ
る。具体的には、円筒状の研磨布を回転させ、遊離砥粒
を含むスラリーを供給しながら、保持板に吸着・保持さ
れたシリコンウェーハの面取り面を、この回転中の研磨
布の研磨作用面に押し当てて鏡面仕上げしている。
Conventionally, the mirror polishing step has been performed by a polishing apparatus in which a polishing cloth such as a urethane pad is spread on a polishing platen. That is, at the time of mirror polishing of the silicon wafer surface, while supplying a slurry (abrasive) containing free abrasive grains (polishing abrasive grains) to the polishing liquid, the surface of the silicon wafer or By pressing the back surface, the front and back surfaces of this silicon wafer are mirror-finished by the grinding action of the free abrasive grains as fine particles. In the conventional PCR process, the back surface of the silicon wafer is sucked and held by the holding plate, and in this state, a well-known mirror finish is performed on the outer peripheral portion of the silicon wafer. Specifically, while rotating the cylindrical polishing cloth and supplying the slurry containing loose abrasive grains, the chamfered surface of the silicon wafer sucked and held on the holding plate is changed to the polishing action surface of the rotating polishing cloth. To a mirror finish.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、このよ
うな従来法によるシリコンウェーハ表面の鏡面研磨工程
およびシリコンウェーハ外周部のPCR工程では、いず
れもスラリー中の遊離砥粒の研削作用によって、シリコ
ンウェーハ表裏面またはシリコンウェーハの面取り面を
研磨していた。この方法は、遊離砥粒を含んだスラリー
を使用するため、研磨後に多量の遊離砥粒を含む研磨廃
液が発生する。研磨廃液は、そのまま廃棄すれば環境に
悪影響を及ぼす。そのため、所定の廃液処理を施してか
ら処分しなければならない。したがって、遊離砥粒の量
が多くなるほど、その廃液処理に必要な設備コスト、ラ
ンニングコストが高まる一方、廃液の処理時間も長くな
り、シリコンウェーハの研磨処理の効率も低下すること
となる。また、このように遊離砥粒を使用すれば、研磨
処理の際に、研磨布に目詰まりなどが生じて、その性能
が低下してしまう。そのため、新しい研磨布に頻繁に取
り替えなければならず、研磨処理作業の効率がさらに低
下していた。
However, in the mirror polishing process of the silicon wafer surface and the PCR process of the outer peripheral portion of the silicon wafer according to the conventional methods, the grinding action of the free abrasive grains in the slurry causes the silicon wafer surface polishing. The back surface or the chamfered surface of the silicon wafer was polished. In this method, since a slurry containing free abrasive grains is used, a polishing waste liquid containing a large amount of free abrasive grains is generated after polishing. If the polishing waste liquid is discarded as it is, it has an adverse effect on the environment. Therefore, it must be disposed of after a predetermined waste liquid treatment. Therefore, as the amount of the free abrasive grains increases, the equipment cost and running cost required for the treatment of the waste liquid increase, while the processing time of the waste liquid also increases, and the efficiency of the polishing treatment of the silicon wafer decreases. In addition, when such free abrasive grains are used, clogging or the like occurs in the polishing cloth during the polishing process, and the performance thereof deteriorates. Therefore, it has to be frequently replaced with a new polishing cloth, and the efficiency of the polishing process has been further reduced.

【0005】そこで、発明者は、鋭意研究の結果、遊離
砥粒に比べて、研磨廃液の処理が簡便な固定砥粒を利用
した新しい研磨布の開発に成功した。すなわち、研磨布
の研磨作用面にきわめて細かい研磨砥粒を固定すれば、
研磨廃液中の研磨砥粒の量が少なくなり、廃液処理に要
するコストの削減および処理時間の短縮などが図れ、さ
らに研磨砥粒による研磨布の目詰まりの頻度も少なくな
ることを知見し、この発明を完成させた。また、発明者
は、研磨砥粒の中でも、精密仕上げ用として優れた研磨
性能を有するシリカに着目した。すなわち、シリカ砥粒
がアルミナなどの研磨砥粒よりもやわらかく、研磨レー
トが低いという欠点を、この単結晶シリカを使用するこ
とで解消できることを知見し、この発明を完成させた。
Accordingly, as a result of intensive studies, the inventor has succeeded in developing a new polishing cloth using fixed abrasive grains which can easily treat a waste polishing liquid as compared with free abrasive grains. In other words, if extremely fine abrasive grains are fixed to the polishing surface of the polishing cloth,
It was found that the amount of abrasive grains in the polishing waste liquid was reduced, the cost required for waste liquid treatment and the processing time were reduced, and the frequency of clogging of the polishing cloth by the abrasive grains was also reduced. Completed the invention. In addition, the inventors focused on silica having excellent polishing performance for precision finishing among polishing abrasive grains. That is, the inventors have found that the use of this single crystal silica can eliminate the disadvantage that the silica abrasive grains are softer than abrasive grains such as alumina and have a lower polishing rate, and have completed the present invention.

【0006】[0006]

【発明の目的】この発明は、廃液処理コストの削減と廃
液処理時間の短縮とが図れ、しかも研磨砥粒による研磨
布の目詰まりに起因した研磨布の張り替え頻度を低減す
ることができる半導体ウェーハ用研磨布およびこれを用
いた半導体ウェーハの研磨方法を提供することを、その
目的としている。また、この発明は、良好な研磨精度と
研磨レートとを確保することができる半導体ウェーハ用
研磨布を提供することを、その目的としている。さら
に、この発明は、研磨布の研磨作用面に研磨砥粒を過不
足なく固定することができる半導体ウェーハ用研磨布を
提供することを、その目的としている。そして、この発
明は、研磨廃液の廃棄量を低減することができる半導体
ウェーハの研磨方法を提供することを、その目的として
いる。
SUMMARY OF THE INVENTION It is an object of the present invention to reduce the frequency of waste liquid treatment and the time required for waste liquid treatment, and to reduce the frequency of polishing cloth replacement caused by clogging of the polishing cloth by abrasive grains. It is an object of the present invention to provide a polishing cloth for use and a method for polishing a semiconductor wafer using the same. Another object of the present invention is to provide a polishing pad for a semiconductor wafer that can ensure a good polishing accuracy and a good polishing rate. A further object of the present invention is to provide a polishing pad for semiconductor wafers, which can fix polishing abrasive grains to the polishing surface of the polishing pad without any excess or shortage. An object of the present invention is to provide a method for polishing a semiconductor wafer, which can reduce the amount of waste polishing liquid.

【0007】[0007]

【課題を解決するための手段】請求項1に記載の発明
は、半導体ウェーハの所定の面を研磨する半導体ウェー
ハ用研磨布であって、研磨作用面に微細な研磨砥粒が固
定された半導体ウェーハ用研磨布である。半導体ウェー
ハとしては、例えばシリコンウェーハ、ガリウム砒素ウ
ェーハなどが挙げられる。この研磨布により研磨される
半導体ウェーハの面は限定されない。例えば、半導体ウ
ェーハの表面、その裏面、半導体ウェーハ外周部の面取
り面などである。1枚の研磨布で研磨するのは、半導体
ウェーハの1つの面でもよいし、2つ以上の面でもよ
い。
According to the present invention, there is provided a polishing pad for a semiconductor wafer for polishing a predetermined surface of a semiconductor wafer, wherein a fine polishing abrasive grain is fixed on a polishing surface. This is a polishing cloth for wafers. Examples of the semiconductor wafer include a silicon wafer and a gallium arsenide wafer. The surface of the semiconductor wafer polished by this polishing cloth is not limited. For example, the front surface of the semiconductor wafer, the back surface thereof, the chamfered surface of the outer peripheral portion of the semiconductor wafer, and the like. The polishing with one polishing cloth may be performed on one surface of the semiconductor wafer, or may be performed on two or more surfaces.

【0008】研磨布の種類は限定されない。例えば、ポ
リエステルフェルトにポリウレタンを含浸させた多孔性
の不織布タイプでもよい。また、発泡したウレタンのブ
ロックをスライスした発泡性ウレタンタイプでもよい。
さらに、ポリエステルフェルトにポリウレタンが含浸さ
れた基材の表面に発泡ポリウレタンを積層し、このポリ
ウレタンの表層部分を除去して発泡層に開口部を形成し
たスエードタイプでもよい。
[0008] The type of polishing cloth is not limited. For example, a porous nonwoven fabric type obtained by impregnating polyurethane into polyester felt may be used. Further, a foamable urethane type obtained by slicing a foamed urethane block may be used.
Further, a suede type in which foamed polyurethane is laminated on the surface of a base material in which polyurethane is impregnated with polyester felt, and an opening is formed in the foamed layer by removing a surface layer portion of the polyurethane may be used.

【0009】研磨砥粒の種類は限定されない。例えばダ
イヤモンド砥粒、シリカ(二酸化珪素)砥粒、炭化シリ
コン砥粒、アルミナ(酸化アルミニウム)砥粒、セリア
(酸化セリウム)砥粒などを採用することができる。ま
た、これらの2種類以上を所定の配合比で混合してもよ
い。例えば、シリカとアルミナとセリアの混合物、シリ
カとセリアの混合物などが挙げられる。ただし、シリカ
のうちでも単結晶シリカを使用した方が、研磨レートが
増大して好ましい。研磨砥粒の形状は限定されない。例
えば球形でも、不定形でもよい。研磨砥粒の粒径も限定
されない。研磨砥粒が固定されるのは、少なくとも研磨
布の研磨作用面である。もちろん、それ以外の面に研磨
砥粒を固定してもよい。
[0009] The type of abrasive grains is not limited. For example, diamond abrasive grains, silica (silicon dioxide) abrasive grains, silicon carbide abrasive grains, alumina (aluminum oxide) abrasive grains, ceria (cerium oxide) abrasive grains, and the like can be used. Further, two or more of these may be mixed at a predetermined compounding ratio. For example, a mixture of silica, alumina, and ceria, a mixture of silica and ceria, and the like can be given. However, it is preferable to use single crystal silica among the silicas because the polishing rate is increased. The shape of the abrasive grains is not limited. For example, it may be spherical or irregular. The particle size of the abrasive grains is not limited. The abrasive grains are fixed at least on the polishing surface of the polishing cloth. Of course, abrasive grains may be fixed on other surfaces.

【0010】研磨砥粒を、研磨布の研磨作用面に固定す
る方法は限定されない。液状の合成樹脂(例えば発泡ポ
リウレタン)中に所定量の研磨砥粒を混入する方法など
が挙げられる。液状の合成樹脂に研磨砥粒を混入する方
法では、微細な研磨砥粒を、研磨布の研磨作用面に確実
に固定することができる。半導体ウェーハの研磨時に
は、研磨砥粒(遊離砥粒)を含む研磨液を供給しながら
研磨してもよいし、研磨砥粒を含まない研磨液(アルカ
リ性溶液など)を流しながら研磨してもよい。ただし、
研磨砥粒を含まない研磨液の方が、この発明の効果(廃
液処理の容易性など)が顕著となる。研磨砥粒を含む研
磨液の使用時には、できるだけ研磨砥粒の含有量は少な
い方がよい。
The method for fixing the abrasive grains to the polishing surface of the polishing cloth is not limited. A method in which a predetermined amount of abrasive grains are mixed into a liquid synthetic resin (for example, foamed polyurethane) is exemplified. In the method in which the abrasive grains are mixed into the liquid synthetic resin, the fine abrasive grains can be reliably fixed to the polishing surface of the polishing cloth. When polishing a semiconductor wafer, polishing may be performed while supplying a polishing liquid containing polishing abrasive grains (free abrasive grains), or may be performed while flowing a polishing liquid containing no polishing abrasive grains (such as an alkaline solution). . However,
The effect of the present invention (ease of waste liquid treatment, etc.) becomes more remarkable in a polishing liquid containing no abrasive grains. When using a polishing liquid containing abrasive grains, the content of the abrasive grains should be as small as possible.

【0011】請求項2に記載の発明は、上記研磨砥粒が
単結晶シリカである請求項1に記載の半導体ウェーハ用
研磨布である。研磨布に対してコロイダルシリカの場
合、60体積%程度を混入する必要があるが、単結晶シ
リカでは10体積%以上で済むという効果が得られる。
この単結晶シリカの形状は不定形となる。単結晶シリカ
の粒径は0.5〜10μm、現状では3μmのものを使
用する。10μmを超えると半導体ウェーハの研磨面に
有害な傷を発生し易くなる。
According to a second aspect of the present invention, there is provided the polishing pad for a semiconductor wafer according to the first aspect, wherein the abrasive grains are single crystal silica. In the case of colloidal silica with respect to the polishing cloth, it is necessary to mix about 60% by volume, but in the case of single crystal silica, an effect of only 10% by volume or more is obtained.
The shape of this single crystal silica is irregular. Single crystal silica having a particle size of 0.5 to 10 μm, and currently 3 μm is used. If it exceeds 10 μm, harmful scratches are likely to occur on the polished surface of the semiconductor wafer.

【0012】請求項3に記載の発明は、上記研磨砥粒は
不定形で、その平均粒径が3〜5μmである請求項1ま
たは請求項2に記載の半導体ウェーハ用研磨布である。
研磨砥粒の粒径は、5μmの場合でFQ#2000、3
μmの場合でFQ#3000となる。
According to a third aspect of the present invention, there is provided the polishing cloth for semiconductor wafer according to the first or second aspect, wherein the abrasive grains are irregular and have an average particle diameter of 3 to 5 μm.
The grain size of the abrasive grains is 5 μm, FQ # 2000, 3
In the case of μm, FQ # 3000 is obtained.

【0013】請求項4に記載の発明は、上記研磨布への
研磨砥粒の混入量が、体積比で研磨布100に対して研
磨砥粒が12〜60である請求項1〜請求項3のうちの
いずれか1項に記載の半導体ウェーハ用研磨布である。
好ましい混入量は15〜30である。体積比で12未満
では、研磨レートが低下する。また、60を超えると有
害な傷が多発する。
According to a fourth aspect of the present invention, the amount of the abrasive grains mixed into the polishing cloth is 12 to 60 with respect to the polishing cloth 100 in volume ratio. The polishing cloth for a semiconductor wafer according to any one of the above.
The preferred amount is 15 to 30. If the volume ratio is less than 12, the polishing rate decreases. If it exceeds 60, harmful scratches occur frequently.

【0014】請求項5に記載の発明は、研磨作用面に微
細な研磨砥粒が固定された研磨布を準備し、研磨砥粒を
含まない研磨液を供給しながら、回転中の上記研磨布を
半導体ウェーハの表面、裏面、面取り面の少なくともい
ずれか1面に接触させてこの面を研磨する半導体ウェー
ハの研磨方法である。研磨砥粒を含まない研磨液として
は、例えばアルカリ性溶液を用いることができる。具体
的には、例えば純水に対して、アミノエチルエタノール
アミンと、ジエチレントリアミン五酢酸(DTPA)と
を混合して混合液を作製した後、この混合液について水
酸化カリウム溶液でpH値を調整したものなどを採用す
ることができる。例えばアミンは2重量%、キレート剤
は0.08mol/L、pH値は11.0とする。
According to a fifth aspect of the present invention, there is provided a polishing cloth having fine polishing abrasive grains fixed on a polishing surface, and supplying the polishing liquid containing no polishing abrasive grains while rotating the polishing cloth. Is a method for polishing a semiconductor wafer by contacting at least one of a front surface, a back surface, and a chamfered surface of the semiconductor wafer to polish the surface. As the polishing liquid containing no abrasive grains, for example, an alkaline solution can be used. Specifically, for example, after mixing aminoethylethanolamine and diethylenetriaminepentaacetic acid (DTPA) with pure water to prepare a mixed solution, the pH value of the mixed solution was adjusted with a potassium hydroxide solution. Things can be adopted. For example, the amine is 2% by weight, the chelating agent is 0.08 mol / L, and the pH value is 11.0.

【0015】この研磨液の供給量は、装置の大きさによ
り異なるが、標準的な装置においては200〜2000
ml/分、好ましくは500〜1000ml/分であ
る。200ml/分未満ではウェーハに対して有害な傷
を発生し易くなる。2000ml/分を超えると研磨レ
ートが低下する。研磨布の回転速度は限定されない。通
常は20〜120rpm、特に25〜50rpmが好ま
しい。研磨布を半導体ウェーハの表面および/または裏
面に接触させる際の研磨圧力は限定されない。通常は1
00〜500g/cm2 、特に400〜500g/cm
2 が好ましい。100g/cm2 未満では研磨レートが
低下する。また、500g/cm2 を超えるとウェーハ
に対し有害な傷が発生し易い。
The supply amount of the polishing liquid varies depending on the size of the apparatus, but is 200 to 2000 in a standard apparatus.
ml / min, preferably 500-1000 ml / min. At less than 200 ml / min, harmful scratches on the wafer tend to occur. If it exceeds 2000 ml / min, the polishing rate will decrease. The rotation speed of the polishing cloth is not limited. Usually, 20 to 120 rpm, particularly 25 to 50 rpm is preferable. The polishing pressure when the polishing cloth is brought into contact with the front surface and / or the back surface of the semiconductor wafer is not limited. Usually 1
00 to 500 g / cm 2 , especially 400 to 500 g / cm
2 is preferred. If it is less than 100 g / cm 2 , the polishing rate decreases. On the other hand, if it exceeds 500 g / cm 2 , harmful scratches are likely to occur on the wafer.

【0016】請求項6に記載の発明は、上記研磨液は、
アルカリ性溶液である請求項5に記載の半導体ウェーハ
の研磨方法である。
According to a sixth aspect of the present invention, the polishing liquid comprises:
The method for polishing a semiconductor wafer according to claim 5, wherein the method is an alkaline solution.

【0017】[0017]

【作用】この発明によれば、例えば研磨砥粒を含まない
研磨液(請求項5)を供給しながら、研磨布を回転さ
せ、この回転中の研磨布と、半導体ウェーハの外面(表
面、裏面、面取り面)とを接触させることにより、この
半導体ウェーハの外面を研磨する。従来の研磨布では、
研磨に際して研磨液中に研磨砥粒(遊離砥粒)を必要と
したが、この発明の研磨布ではあらかじめ研磨布に研磨
砥粒が固定されているので、研磨砥粒を含まない研磨液
を使用して研磨が行なえる。その結果、廃液処理コスト
の削減と廃液処理時間の短縮とが図れ、しかも研磨砥粒
による研磨布の目詰まりに起因した研磨布の交換頻度を
抑えることができる。
According to the present invention, for example, the polishing pad is rotated while supplying a polishing liquid containing no abrasive grains (claim 5), and the rotating polishing pad and the outer surface (front surface, back surface) of the semiconductor wafer are rotated. , The outer surface of the semiconductor wafer is polished. With a conventional polishing cloth,
Although polishing abrasive grains (free abrasive grains) were required in the polishing liquid during polishing, the polishing cloth of the present invention uses a polishing liquid that does not contain polishing abrasive grains because the polishing abrasive grains are fixed to the polishing cloth in advance. Polishing can be performed. As a result, the waste liquid treatment cost and the waste liquid treatment time can be reduced, and the frequency of replacement of the polishing cloth due to clogging of the polishing cloth by the abrasive grains can be suppressed.

【0018】特に、請求項2の発明によれば、研磨砥粒
として単結晶シリカを採用したので、精密仕上げ用とし
て優れた研磨性能を有するシリカの硬度が高まり、従来
にない高い研磨レートが得られる。
In particular, according to the second aspect of the present invention, since single-crystal silica is used as the polishing abrasive, the hardness of silica having excellent polishing performance for precision finishing is increased, and a higher polishing rate than ever before can be obtained. Can be

【0019】また、請求項3の発明によれば、研磨布の
研磨作用面に、不定形でその粒径が3〜5μmの研磨砥
粒を固定する。したがって、この微細な研磨砥粒(固定
砥粒)により半導体ウェーハの外面を高精度で研磨する
ことができる。よって、研磨時の加工ダメージも従来と
略同レベルの値を期待することができる。
According to the third aspect of the present invention, abrasive grains having an irregular shape and a particle diameter of 3 to 5 μm are fixed to the polishing surface of the polishing cloth. Therefore, the outer surface of the semiconductor wafer can be polished with high precision by the fine polishing abrasive grains (fixed abrasive grains). Therefore, the processing damage at the time of polishing can be expected to be substantially the same level as that of the related art.

【0020】さらに、請求項4の発明によれば、研磨砥
粒の研磨布に対する混入量をその体積比で研磨布100
に対して研磨砥粒12〜60の範囲に規定したので、研
磨砥粒を過不足なく研磨布の研磨作用面に固定すること
ができる。
Further, according to the fourth aspect of the present invention, the mixing ratio of the abrasive grains to the polishing pad is determined by the volume ratio of the polishing pad.
The abrasive grains are defined in the range of 12 to 60, so that the abrasive grains can be fixed to the polishing surface of the polishing cloth without excess or deficiency.

【0021】そして、請求項6の発明によれば、研磨液
が研磨砥粒(遊離砥粒)を含まないアルカリ性溶液とな
るので、研磨液の再使用量が増加し、研磨廃液の廃棄量
を低減することができる。
According to the sixth aspect of the present invention, since the polishing liquid is an alkaline solution containing no abrasive grains (free abrasive grains), the reuse amount of the polishing liquid increases, and the polishing waste liquid is discarded. Can be reduced.

【0022】[0022]

【発明の実施の形態】以下、この発明の実施例を図面を
参照して説明する。図1は、この発明の一実施例に係る
半導体ウェーハ用研磨布を使用したウェーハ両面研磨装
置の使用状態を示す一部に断面図を含んだ斜視図であ
る。図2は、この発明の一実施例に係る半導体ウェーハ
用研磨布を使用したウェーハ両面研磨装置の使用状態に
おけるキャリアプレート外周部の要部拡大断面図であ
る。図3は、この発明の一実施例に係る半導体ウェーハ
用研磨布を使用したウェーハ面取り面研磨装置の使用状
態を示す正面図である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view, partially including a cross-sectional view, showing a use state of a wafer double-side polishing apparatus using a semiconductor wafer polishing cloth according to one embodiment of the present invention. FIG. 2 is an enlarged sectional view of a main part of an outer peripheral portion of a carrier plate in a use state of a wafer double-side polishing apparatus using a polishing cloth for a semiconductor wafer according to one embodiment of the present invention. FIG. 3 is a front view showing a use state of a wafer chamfering polishing apparatus using a semiconductor wafer polishing cloth according to one embodiment of the present invention.

【0023】図1〜図3において、10A,10Bは、
この発明の一実施例に係る半導体ウェーハ用研磨布(以
下、研磨布)である。一方の研磨布10Aは、シリコン
ウェーハWの表裏両面を鏡面研磨するウェーハ両面研磨
装置11に組み込まれている。また、他方の研磨布10
Bは、シリコンウェーハWの面取り面を研磨するウェー
ハ面取り面の研磨装置12に組み込まれている。ウェー
ハ両面研磨装置11は、互いに平行に設けられた上定盤
13および下定盤14と、これらの上定盤13、下定盤
14間に介在されて、軸線回りに回転自在に設けられた
小径な太陽ギヤ15と、この軸線と同じ軸線を中心に回
転自在に設けられた大径なインターナルギヤ16と、そ
れぞれ4枚のシリコンウェーハWを保持する4個のウェ
ーハ保持孔17aとを有し、かつ各外縁部に、太陽ギヤ
15およびインターナルギヤ16に噛合される外ギヤ1
7bが形成された計4枚の円板形状のキャリアプレート
17とを備え、アルカリ性溶液を供給しながらシリコン
ウェーハWを研磨する。
1 to 3, 10A and 10B are:
1 is a polishing cloth for a semiconductor wafer (hereinafter, polishing cloth) according to one embodiment of the present invention. One polishing cloth 10A is incorporated in a wafer double-side polishing apparatus 11 for mirror-polishing both the front and back surfaces of a silicon wafer W. The other polishing cloth 10
B is incorporated in a wafer chamfering surface polishing apparatus 12 for polishing the chamfered surface of the silicon wafer W. The wafer double-side polishing apparatus 11 has an upper surface plate 13 and a lower surface plate 14 provided in parallel with each other, and a small diameter interposed between the upper surface plate 13 and the lower surface plate 14 and rotatably provided around an axis. A sun gear 15, a large-diameter internal gear 16 rotatably provided about the same axis as the axis, and four wafer holding holes 17a for holding four silicon wafers W, respectively. And an outer gear 1 meshed with the sun gear 15 and the internal gear 16 at each outer edge.
7b are formed, and the silicon wafer W is polished while supplying an alkaline solution.

【0024】上定盤13と下定盤14との各対向面に
は、それぞれ研磨作用面に微細な研磨砥粒が固定された
2枚の研磨布10A,10Aが展張されている。シリコ
ンウェーハWは、これらの固定砥粒を含む研磨布10
A,10Aと、アルカリ性溶液の研磨液との作用により
研磨される。このシリコンウェーハWに対する各研磨布
10A,10Aの当接圧力はそれぞれ250gf/cm
2 程度である。上定盤13と下定盤14とは同じ方向へ
回転する。それぞれの回転速度、すなわち両研磨布10
A,10Aの回転速度は30rpmである。研磨液の供
給量は3000ml/分である。
On each of the opposing surfaces of the upper surface plate 13 and the lower surface plate 14, two polishing cloths 10A, 10A each having fine polishing abrasive grains fixed on the polishing surface are spread. The silicon wafer W is a polishing cloth 10 containing these fixed abrasive grains.
A and 10A are polished by the action of an alkaline solution polishing liquid. The contact pressure of each of the polishing cloths 10A, 10A against the silicon wafer W is 250 gf / cm.
About 2 . The upper surface plate 13 and the lower surface plate 14 rotate in the same direction. Each rotation speed, that is, both polishing cloths 10
The rotation speed of A and 10A is 30 rpm. The supply amount of the polishing liquid is 3000 ml / min.

【0025】図3に示すように、後者の研磨布10B
は、円筒形状の外観を有し、面取り面を鏡面仕上げする
ためのPCR加工用の研磨具である。この研磨布10B
の研磨作用面(外周面)には、微細な研磨砥粒が固定さ
れている。すなわち、シリコンウェーハWは、この固定
砥粒を含む研磨布10Bと、アルカリ性溶液の研磨液と
の作用によって研磨される。研磨時、研磨布10Bの回
転速度は500rpm、シリコンウェーハWの回転速度
は5rpmとなっている。この際の研磨布10Bに対す
るシリコンウェーハWの当接圧力は1.5kg/cm2
程度である。研磨液の供給量は1800ml/分であ
る。
As shown in FIG. 3, the latter polishing cloth 10B
Is a polishing tool for PCR processing having a cylindrical appearance and a mirror-finished chamfered surface. This polishing cloth 10B
Fine polishing abrasive grains are fixed to the polishing surface (outer peripheral surface) of the substrate. That is, the silicon wafer W is polished by the action of the polishing pad 10B containing the fixed abrasive grains and the polishing solution of the alkaline solution. During polishing, the rotation speed of the polishing pad 10B is 500 rpm, and the rotation speed of the silicon wafer W is 5 rpm. At this time, the contact pressure of the silicon wafer W against the polishing pad 10B is 1.5 kg / cm 2.
It is about. The supply amount of the polishing liquid is 1800 ml / min.

【0026】次に、これらの研磨布10A,10Bを詳
細に説明する。なお、両研磨布10A,10Bは同じ素
材から作製されている。ここでは説明の都合上、研磨布
10Aを例に説明する。図1および図2に示すように、
研磨布10A,10Aは多孔性の不織布を基体とし、こ
れに不定形の単結晶シリカ製の研磨砥粒が均一に固定さ
れている。単結晶シリカには、フジミ社製のFQ#30
00(平均粒径3μm)が採用されている。この研磨布
10Aは、液状の発泡ポリウレタン中に、体積比で研磨
布100に対して20となる研磨砥粒を混入し、この混
入後の発泡ポリウレタンを成形用ローラによってシート
状に付形し、これを所定半径にカットして得ている。こ
れにより、微細な研磨砥粒を、研磨作用面を含む研磨布
10A,10Aの略全体に均一に固定することができ
る。
Next, the polishing cloths 10A and 10B will be described in detail. The polishing cloths 10A and 10B are made of the same material. Here, for convenience of description, the polishing cloth 10A will be described as an example. As shown in FIGS. 1 and 2,
The polishing cloths 10A, 10A are made of a porous non-woven fabric as a substrate, on which abrasive grains made of amorphous single-crystal silica are fixed uniformly. Single crystal silica includes FQ # 30 manufactured by Fujimi
00 (average particle size: 3 μm). The polishing cloth 10A is obtained by mixing polishing abrasive grains having a volume ratio of 20 with respect to the polishing cloth 100 in a liquid foamed polyurethane, shaping the mixed foamed polyurethane into a sheet shape by a molding roller, This is obtained by cutting to a predetermined radius. Thereby, fine polishing abrasive grains can be uniformly fixed to substantially the entire polishing cloths 10A, 10A including the polishing action surface.

【0027】研磨時に使用される研磨液としては、純水
にアミノエチルエタノールアミンと、ジエチレントリア
ミン五酢酸(DTPA)とを混合して混合液を作製し、
この混合液について水酸化カリウム溶液でpH値を調整
したものを採用している。アミンは2重量%、キレート
剤(DTPA)は0.08mol/Lである。調整後の
pH値は11.0である。研磨液の供給量は3000m
l/分である。ただし、研磨布10Bの場合、研磨液の
供給量は1800ml/分である。
As a polishing liquid used for polishing, a mixed liquid is prepared by mixing aminoethylethanolamine and diethylenetriaminepentaacetic acid (DTPA) in pure water.
The mixture obtained by adjusting the pH value with a potassium hydroxide solution is employed. The amine is 2% by weight and the chelating agent (DTPA) is 0.08 mol / L. The adjusted pH value is 11.0. The supply amount of polishing liquid is 3000m
1 / min. However, in the case of the polishing cloth 10B, the supply amount of the polishing liquid is 1800 ml / min.

【0028】次に、各研磨布10A,10Bを使用した
シリコンウェーハWの研磨方法について説明する。図5
は、この発明の一実施例に係るシリコンウェーハの研磨
方法のフローチャートである。図5に示すように、この
実施例にあっては、大略スライス、面取り、ラッピン
グ、エッチング、研削、洗浄、PCR、洗浄、1次研磨
(固定砥粒での研磨)、2次研磨、仕上げ研磨の各工程
を経て、片面鏡面研磨ウェーハが作製される。以下、各
工程を詳細に説明する。
Next, a method for polishing the silicon wafer W using the polishing cloths 10A and 10B will be described. FIG.
1 is a flowchart of a method for polishing a silicon wafer according to one embodiment of the present invention. As shown in FIG. 5, in this embodiment, roughly slicing, chamfering, lapping, etching, grinding, washing, PCR, washing, primary polishing (polishing with fixed abrasive), secondary polishing, and finishing polishing Through these steps, a single-sided mirror-polished wafer is manufactured. Hereinafter, each step will be described in detail.

【0029】CZ法により引き上げられたシリコンイン
ゴットは、スライス工程(S101)で、厚さ860μ
m程度の8インチのシリコンウェーハWにスライスされ
る。次に、このスライスドウェーハは、面取り工程(S
102)で、その外周部が、#600〜#2000のメ
タルダイヤ砥石により、所定の形状に面取りされる。こ
れにより、シリコンウェーハWの外周部は、丸みを帯び
た形状(例えばMOS型の面取り形状)に成形される。
そして、この面取りされたシリコンウェーハWは、ラッ
ピング工程(S103)において、その表裏両面がラッ
ピングされる。この工程は、シリコンウェーハWを互い
に平行なラップ定盤間に配置し、その後、このラップ定
盤間に、アルミナ砥粒と分散剤と水の混合物であるラッ
プ液を流し込む。それから、加圧下で回転・摺り合わせ
を行うことにより、このシリコンウェーハの表裏両面を
機械的にラッピングする。この際、シリコンウェーハW
のラップオフ量は、シリコンウェーハの表裏両面を合わ
せて60〜120μm程度である。
The silicon ingot pulled up by the CZ method has a thickness of 860 μm in the slicing step (S101).
The silicon wafer W is sliced into an 8-inch silicon wafer W of about m. Next, this sliced wafer is subjected to a chamfering step (S
At 102), the outer peripheral portion is chamfered into a predetermined shape by a metal diamond grindstone of # 600 to # 2000. Thereby, the outer peripheral portion of the silicon wafer W is formed into a rounded shape (for example, a MOS type chamfered shape).
In the lapping step (S103), the front and back surfaces of the chamfered silicon wafer W are wrapped. In this step, the silicon wafer W is arranged between lapping plates parallel to each other, and then a lapping liquid, which is a mixture of alumina abrasive grains, a dispersant, and water, is poured between the lapping plates. Then, by rotating and sliding under pressure, the front and back surfaces of the silicon wafer are mechanically wrapped. At this time, the silicon wafer W
Is about 60 to 120 μm in total on both the front and back surfaces of the silicon wafer.

【0030】その後、このラップドウェーハWをエッチ
ングする(S104)。具体的には、フッ酸と硝酸とを
混合した混酸液(常温〜50℃)中にシリコンウェーハ
Wを所定時間だけ浸漬する。次いで、このエッチドウェ
ーハの表面を研削する(S105)。具体的には、#6
00〜#4000のレジノイド研削砥石を搭載した研削
装置により研削する。このときの研削量は5〜15μm
程度である。次に、シリコンウェーハWの洗浄を行い、
研削によってシリコンウェーハ表裏両面に付着した研削
砥粒を除去する(S106)。
Thereafter, the wrapped wafer W is etched (S104). Specifically, the silicon wafer W is immersed for a predetermined time in a mixed acid solution (normal temperature to 50 ° C.) in which hydrofluoric acid and nitric acid are mixed. Next, the surface of the etched wafer is ground (S105). Specifically, # 6
Grinding is performed by a grinding device equipped with a resinoid grinding wheel of 00 to # 4000. The grinding amount at this time is 5 to 15 μm
It is about. Next, the silicon wafer W is cleaned,
Grinding grains attached to the front and back surfaces of the silicon wafer by grinding are removed (S106).

【0031】続いて、このシリコンウェーハWの面取り
部をPCR加工する(S107)。この加工時には、図
3に示す研磨布10B付きのウェーハ面取り面研磨装置
12が用いられる。すなわち、研磨砥粒を含まない研磨
液を1800ml/分で供給しながら、図示しない回転
モータにより研磨布10Bを軸線回りに5rpmで回転
する。この回転中の研磨布10Bの外周面に、500r
pmで回転しているシリコンウェーハWの面取り面を、
1.5kg/cm2 の研磨圧力で押し当てる。こうし
て、この面取り面を鏡面研磨する。このPCR加工によ
り、上記ウェーハ外周面に残存した面取り治具の痕跡は
除去される。
Subsequently, the chamfered portion of the silicon wafer W is subjected to PCR (S107). At the time of this processing, a wafer chamfering polishing apparatus 12 with a polishing cloth 10B shown in FIG. 3 is used. That is, the polishing pad 10B is rotated around the axis at 5 rpm by a rotating motor (not shown) while supplying the polishing liquid containing no abrasive grains at 1800 ml / min. 500r is applied to the outer peripheral surface of the rotating polishing cloth 10B.
The beveled surface of the silicon wafer W rotating at pm
Pressing is performed with a polishing pressure of 1.5 kg / cm 2 . Thus, the chamfered surface is mirror-polished. By this PCR process, traces of the chamfering jig remaining on the outer peripheral surface of the wafer are removed.

【0032】その後、シリコンウェーハWの洗浄工程を
行い、研磨によりウェーハ表面に付着した微細な研磨砥
粒を除去する(S108)。それから、図1に示す2枚
の研磨布10Aを備えたウェーハ両面研磨装置11によ
ってシリコンウェーハWの表裏両面を1次研磨する(S
109)。すなわち、上定盤13と下定盤14との間
で、研磨液を供給しながらキャリアプレート17を自転
および公転させ、それぞれのキャリアプレート17の各
ウェーハ保持孔17aに保持された4枚のシリコンウェ
ーハWの表裏両面を、上下1対の研磨布10A,10A
に押圧しながら一括して機械的化学的研磨する。この
際、シリコンウェーハWの研磨部分に3000ml/分
で研磨液が供給される。続いて、シリコンウェーハWの
表面を、研磨砥粒が固定されていない(株)ロデールニ
ッタ製の研磨布を用いて2次研磨する(S110)。さ
らに、このシリコンウェーハWの表面に、同じく研磨砥
粒が固定されていない研磨布による仕上げ研磨が施され
る(S111)。なお、1次研磨(S109)の後に2
次研磨を省略して仕上げ研磨(S111)を施すことも
できる。
Thereafter, a cleaning step of the silicon wafer W is performed to remove fine polishing abrasive grains adhered to the wafer surface by polishing (S108). Then, the front and back surfaces of the silicon wafer W are primarily polished by the double-sided wafer polishing apparatus 11 provided with the two polishing cloths 10A shown in FIG. 1 (S
109). That is, the carrier plate 17 is rotated and revolved while supplying the polishing liquid between the upper surface plate 13 and the lower surface plate 14, and the four silicon wafers held in the respective wafer holding holes 17 a of each carrier plate 17 are provided. A pair of upper and lower polishing cloths 10A, 10A
Mechanical and chemical polishing at the same time while pressing. At this time, a polishing liquid is supplied to the polishing portion of the silicon wafer W at 3000 ml / min. Subsequently, the surface of the silicon wafer W is secondarily polished using a polishing cloth manufactured by Rodel Nitta Co., Ltd. on which the abrasive grains are not fixed (S110). Further, the surface of the silicon wafer W is subjected to finish polishing using a polishing cloth on which the abrasive grains are not fixed (S111). After the primary polishing (S109),
The final polishing (S111) can be performed without the next polishing.

【0033】このように、研磨布10A,10Bの研磨
作用面に研磨砥粒を固定したので、廃液処理コストの削
減と廃液処理時間の短縮とが図れ、しかも研磨砥粒によ
る目詰まりを原因とした研磨布10A,10Bの交換頻
度を減少させることができる。また、研磨砥粒として単
結晶シリカを採用したので、従来のシリカ製の研磨砥粒
に比べて硬度が高まり、シリカ砥粒でありながら、良好
な研磨精度と良好な研磨レートとを同時に得ることがで
きる。実際に、この一実施例の両面研磨装置11を用い
て、シリコンウェーハWの両面研磨の試験を行なったと
ころ、図4の、この発明の一実施例に係る半導体ウェー
ハ用研磨布の単結晶シリコンの含有量と研磨レートとの
関係を示すグラフから明らかなように、0.6〜0.7
μm/分という通常範囲の研磨レートが得られた。
As described above, since the polishing abrasive grains are fixed to the polishing surfaces of the polishing cloths 10A and 10B, the waste liquid processing cost and the waste liquid processing time can be reduced. The frequency of replacement of the polished cloths 10A and 10B can be reduced. In addition, since single-crystal silica is used as the abrasive grains, the hardness is higher than conventional abrasive grains made of silica, and it is possible to simultaneously obtain good polishing accuracy and a good polishing rate while using silica abrasive grains. Can be. Actually, when a double-side polishing test of a silicon wafer W was performed using the double-side polishing apparatus 11 of this embodiment, the polishing pad for a semiconductor wafer according to the embodiment of the present invention shown in FIG. As is clear from the graph showing the relationship between the content and the polishing rate, 0.6 to 0.7
A polishing rate in the usual range of μm / min was obtained.

【0034】しかも、不織布製の研磨布10A,10B
を採用し、それぞれの研磨作用面に粒径3〜5μmの不
定形な研磨砥粒を固定したので、この微細な研磨砥粒に
よって、シリコンウェーハWの面を高精度で研磨するこ
とができる。その結果、研磨時の加工ダメージを小さく
することができる。さらに、研磨砥粒の混入量をその体
積比で研磨布100に対して12〜60の範囲に入る値
に規定したので、研磨砥粒を過不足なく研磨布10A,
10Bの研磨作用面に固定することができる。さらにま
た、研磨液として遊離砥粒を含まないアルカリ性溶液を
採用したので、研磨液の再使用量が増加し、研磨廃液の
廃棄量を低減することができる。
Moreover, the polishing cloths 10A, 10B made of non-woven fabric
Is adopted, and irregular polishing abrasive grains having a particle size of 3 to 5 μm are fixed to each polishing action surface, so that the surface of the silicon wafer W can be polished with high precision by these fine abrasive grains. As a result, processing damage during polishing can be reduced. Furthermore, since the mixing amount of the polishing abrasive grains is specified to be a value within the range of 12 to 60 with respect to the polishing cloth 100 in terms of the volume ratio, the polishing abrasive grains are properly and sufficiently supplied.
It can be fixed to the polishing surface of 10B. Furthermore, since an alkaline solution containing no free abrasive grains is employed as the polishing liquid, the reuse amount of the polishing liquid increases, and the amount of waste polishing liquid can be reduced.

【0035】[0035]

【発明の効果】この発明によれば、研磨作用面に研磨砥
粒を固定して研磨布を作製し、この研磨布により半導体
ウェーハの外面を研磨するので、廃液処理コストの削減
と廃液処理時間の短縮とが図れ、しかも研磨砥粒による
研磨布の目詰まりによる研磨布の交換頻度を減少させる
ことができる。
According to the present invention, a polishing cloth is manufactured by fixing polishing abrasive grains on a polishing surface, and the outer surface of a semiconductor wafer is polished with the polishing cloth. Can be reduced, and the frequency of replacement of the polishing pad due to clogging of the polishing pad by the abrasive grains can be reduced.

【0036】特に、請求項2の発明によれば、研磨砥粒
を単結晶シリカとしたので、シリカ砥粒の硬度を高め、
良好な研磨精度と良好な研磨レートとを同時に得ること
ができる。
In particular, according to the second aspect of the present invention, since the polishing abrasive grains are made of single crystal silica, the hardness of the silica abrasive grains is increased.
Good polishing accuracy and a good polishing rate can be obtained at the same time.

【0037】また、請求項3の発明によれば、単結晶シ
リカ製の研磨砥粒を不定形とし、その粒径を3〜5μm
としたので、この微細な固定砥粒によって、研磨時の加
工ダメージも略従来通りで、半導体ウェーハの外面を高
精度に研磨することができる。
According to the third aspect of the present invention, the abrasive grains made of single-crystal silica are made amorphous, and the grain size is 3 to 5 μm.
Therefore, with the fine fixed abrasive grains, the processing damage at the time of polishing is substantially the same as the conventional method, and the outer surface of the semiconductor wafer can be polished with high precision.

【0038】さらに、請求項4の発明によれば、研磨砥
粒の研磨布への混入量をその体積比で研磨布100に対
して研磨砥粒12〜60の範囲に規定したので、研磨砥
粒を過不足なく研磨作用面に固定することができる。
Further, according to the fourth aspect of the present invention, the mixing amount of the abrasive grains into the polishing cloth is defined in the range of 12 to 60 abrasive grains with respect to the polishing cloth 100 by volume ratio. The grains can be fixed to the polishing surface without excess or deficiency.

【0039】また、請求項6の発明によれば、研磨液が
遊離砥粒を含まないアルカリ性溶液であるので、研磨液
の再使用量が増加し、研磨廃液の廃棄量を低減すること
ができる。
According to the sixth aspect of the present invention, since the polishing liquid is an alkaline solution containing no free abrasive grains, the reuse amount of the polishing liquid increases, and the amount of waste polishing liquid can be reduced. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例に係る半導体ウェーハ用研
磨布を使用したウェーハ両面研磨装置の使用状態を示す
一部に断面図を含んだ斜視図である。
FIG. 1 is a perspective view including a cross-sectional view of a part showing a use state of a wafer double-side polishing apparatus using a polishing cloth for a semiconductor wafer according to one embodiment of the present invention.

【図2】この発明の一実施例に係る半導体ウェーハ用研
磨布を使用したウェーハ両面研磨装置の使用状態におけ
るキャリアプレート外周部の要部拡大断面図である。
FIG. 2 is an enlarged sectional view of a main part of an outer peripheral portion of a carrier plate in a use state of a wafer double-side polishing apparatus using a semiconductor wafer polishing cloth according to one embodiment of the present invention.

【図3】この発明の一実施例に係る半導体ウェーハ用研
磨布を使用したウェーハ面取り面研磨装置の使用状態を
示す正面図である。
FIG. 3 is a front view showing a use state of a wafer chamfering polishing apparatus using a semiconductor wafer polishing cloth according to one embodiment of the present invention.

【図4】この発明の一実施例に係る半導体ウェーハ用研
磨布の単結晶シリコンの含有量と研磨レートとの関係を
示すグラフである。
FIG. 4 is a graph showing a relationship between a single crystal silicon content and a polishing rate of the polishing pad for semiconductor wafer according to one embodiment of the present invention.

【図5】この発明の一実施例に係るシリコンウェーハの
研磨方法のフローチャートである。
FIG. 5 is a flowchart of a method for polishing a silicon wafer according to one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

10A,10B 半導体ウェーハ用研磨布、 W 半導体ウェーハ。 10A, 10B Polishing cloth for semiconductor wafer, W Semiconductor wafer.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 半導体ウェーハの所定の面を研磨する半
導体ウェーハ用研磨布であって、 研磨作用面に微細な研磨砥粒が固定された半導体ウェー
ハ用研磨布。
1. A polishing pad for a semiconductor wafer for polishing a predetermined surface of a semiconductor wafer, wherein the polishing pad has fine polishing grains fixed on a polishing surface.
【請求項2】 上記研磨砥粒が単結晶シリカである請求
項1に記載の半導体ウェーハ用研磨布。
2. The polishing pad for semiconductor wafers according to claim 1, wherein said polishing abrasive grains are single crystal silica.
【請求項3】 上記研磨砥粒は不定形で、その平均粒径
が3〜5μmである請求項1または請求項2に記載の半
導体ウェーハ用研磨布。
3. The polishing pad for semiconductor wafers according to claim 1, wherein said polishing abrasive grains are irregular and have an average particle size of 3 to 5 μm.
【請求項4】 上記研磨布への研磨砥粒の混入量が、体
積比で研磨布100に対して研磨砥粒が12〜60であ
る請求項1〜請求項3のうちのいずれか1項に記載の半
導体ウェーハ用研磨布。
4. The polishing cloth according to claim 1, wherein the amount of the abrasive grains mixed into the polishing cloth is 12 to 60 with respect to the polishing cloth 100 by volume ratio. The polishing cloth for a semiconductor wafer according to item 1.
【請求項5】 研磨作用面に微細な研磨砥粒が固定され
た研磨布を準備し、 研磨砥粒を含まない研磨液を供給しながら、回転中の上
記研磨布を半導体ウェーハの表面、裏面、面取り面の少
なくともいずれか1面に接触させてこの面を研磨する半
導体ウェーハの研磨方法。
5. A polishing cloth having fine polishing grains fixed on a polishing surface is prepared, and the rotating polishing cloth is placed on the front and back surfaces of a semiconductor wafer while supplying a polishing liquid containing no polishing grains. And a method for polishing a semiconductor wafer by polishing at least one of the chamfered surfaces by contacting the surface.
【請求項6】 上記研磨液は、アルカリ性溶液である請
求項5に記載の半導体ウェーハの研磨方法。
6. The method according to claim 5, wherein the polishing liquid is an alkaline solution.
JP2001020734A 2001-01-29 2001-01-29 Polishing cloth for semiconductor wafer Expired - Fee Related JP3617665B2 (en)

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