JP2002201076A - Silicon nitride substrate and circuit substrate - Google Patents

Silicon nitride substrate and circuit substrate

Info

Publication number
JP2002201076A
JP2002201076A JP2001328477A JP2001328477A JP2002201076A JP 2002201076 A JP2002201076 A JP 2002201076A JP 2001328477 A JP2001328477 A JP 2001328477A JP 2001328477 A JP2001328477 A JP 2001328477A JP 2002201076 A JP2002201076 A JP 2002201076A
Authority
JP
Japan
Prior art keywords
silicon nitride
substrate
circuit board
nitride substrate
grain boundary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001328477A
Other languages
Japanese (ja)
Other versions
JP2002201076A5 (en
JP3539634B2 (en
Inventor
Shigeyuki Hamayoshi
繁幸 濱吉
Toshiyuki Imamura
寿之 今村
Masahisa Sofue
昌久 祖父江
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to JP2001328477A priority Critical patent/JP3539634B2/en
Publication of JP2002201076A publication Critical patent/JP2002201076A/en
Application granted granted Critical
Publication of JP3539634B2 publication Critical patent/JP3539634B2/en
Publication of JP2002201076A5 publication Critical patent/JP2002201076A5/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a silicon nitride substrate and a circuit substrate using it, with a surface property suitable for manufacturing the circuit substrate excellent in bonding strength and a cool resistant thermal cycle property. SOLUTION: The silicon nitride substrate made of silicon nitride sintered compact made up of silicon nitride grain and grain boundary phase practically, has a surface property that center line average ruggedness(Ra) is 0.2-20 μm on the surface, and an area rate of the silicon nitride grain is 70-100% when the total area rate of the silicon nitride grain and the grain boundary phase is 100%. And on the silicon nitride substrate, the distance (L) between the highest top part of the silicon nitride grain and the lowest bottom part of the silicon nitride grain or grain boundary phase exposed to the substrate surface, is 1-40 μm.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、高耐圧・高電流の
パワ−モジュ−ル等の実装に適した回路基板およびそれ
に用いる窒化ケイ素質基板(以下、窒化ケイ素基板と称
する)に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board suitable for mounting a power module or the like having a high withstand voltage and a high current and a silicon nitride substrate (hereinafter, referred to as a silicon nitride substrate) used for the circuit board.

【0002】[0002]

【従来の技術】窒化ケイ素焼結体は、高温強度特性、耐
摩耗性等の機械的特性に加え、耐熱性、低熱膨張性、耐
熱衝撃性及び金属に対する耐食性に優れているので、従
来からガスタ−ビン用部材、エンジン用部材、製鋼用機
械部材あるいは溶融金属の耐溶部材等の各種の構造用部
材に用いられている。また、高い絶縁性を利用して電気
絶縁材料としても使用されている。
2. Description of the Related Art In addition to mechanical properties such as high-temperature strength and abrasion resistance, silicon nitride sintered bodies have excellent heat resistance, low thermal expansion, thermal shock resistance and corrosion resistance to metals. -Used for various structural members such as bottle members, engine members, mechanical members for steel making, or melt-resistant members of molten metal. It is also used as an electrical insulating material by utilizing its high insulating properties.

【0003】最近、高周波トランジスタ、パワーIC等
の発熱量の大きい半導体素子の発展に伴い、電気絶縁性
に加えて良好な放熱特性(高い熱伝導率)を有するセラ
ミックス基板の需要が増加している。このようなセラミ
ックス基板として既に窒化アルミニウム基板が用いられ
ているが、窒化アルミニウム基板は機械的強度や破壊靭
性等が低く、基板ユニットの組立て工程での締め付けに
よって割れるおそれがある。また、ケイ素半導体素子を
窒化アルミニウム基板に実装した回路基板では、ケイ素
(Si)と窒化アルミニウム基板との熱膨張差が大きい
ため、冷熱サイクルにより窒化アルミニウム基板にクラ
ックや割れが発生し、実装信頼性が低下するという問題
がある。
In recent years, with the development of high-heat-generating semiconductor devices such as high-frequency transistors and power ICs, the demand for ceramic substrates having good heat dissipation characteristics (high thermal conductivity) in addition to electrical insulation has been increasing. . Although an aluminum nitride substrate is already used as such a ceramic substrate, the aluminum nitride substrate has low mechanical strength and fracture toughness, and may be broken by tightening in the assembly process of the substrate unit. Further, in a circuit board in which a silicon semiconductor element is mounted on an aluminum nitride substrate, the thermal expansion difference between silicon (Si) and the aluminum nitride substrate is large. Is reduced.

【0004】そこで、窒化アルミニウムより熱伝導率は
劣るものの、熱膨張率がSiに近似すると共に、機械的
強度、破壊靭性及び耐熱疲労特性に優れた高熱伝導性窒
化ケイ素焼結体からなる基板が注目されている。
Therefore, a substrate made of a high thermal conductive silicon nitride sintered body having a thermal expansion coefficient close to that of Si but having excellent mechanical strength, fracture toughness and thermal fatigue resistance characteristics, although having a lower thermal conductivity than aluminum nitride. Attention has been paid.

【0005】また、回路基板としては、上記のような材
料特性に優れる窒化ケイ素基板に銅回路を形成させてな
るものや、更なる耐冷熱サイクル特性に対する向上を目
的にアルミニウム回路を形成させてなるものが種々検討
されている。
As a circuit board, a circuit formed by forming a copper circuit on a silicon nitride substrate having excellent material properties as described above, or an aluminum circuit formed for the purpose of further improving the thermal cycling resistance. Various things have been studied.

【0006】例えば銅回路基板については、特開平6−
216481号公報には、熱伝導率が60〜180W/m・Kであ
る窒化ケイ素基板の表面に、活性金属を含有する接合金
属層を介して、銅回路板を一体的に接合してなるセラミ
ックス銅回路基板が記載されている。この回路基板で
は、15〜35重量%のCuと、Ti、Zr、Hf及びNbからなる群
から選択された少なくとも一種の活性金属1〜10重量%
とを含有し、残部実質的にAgからなる組成を有するろう
材を用いることにより、銅回路板と窒化ケイ素基板との
間の接合強度を向上させている。
For example, a copper circuit board is disclosed in
Japanese Patent No. 216481 discloses a ceramic obtained by integrally joining a copper circuit board to a surface of a silicon nitride substrate having a thermal conductivity of 60 to 180 W / m · K via a joining metal layer containing an active metal. A copper circuit board is described. In this circuit board, 15 to 35% by weight of Cu and 1 to 10% by weight of at least one active metal selected from the group consisting of Ti, Zr, Hf and Nb
The bonding strength between the copper circuit board and the silicon nitride substrate is improved by using a brazing material having a composition substantially consisting of Ag and the balance being Ag.

【0007】また、特開平8−319187号公報に
は、大気中にて温度150〜360℃の範囲で表面酸化処理に
より酸化銅層を形成した銅回路板を窒化ケイ素基板表面
の所定位置に配置し、銅の融点(1083℃)未満で銅−酸
化銅の共晶温度(1065℃)以上の温度に加熱し、生成し
たCu-O共晶化合物液相を接合剤として銅回路板を窒
化ケイ素基板表面に直接的に接合する、いわゆるDBC
(Direct Bonding Cupper)回路基板が記載されてい
る。この回路基板では、銅板を窒化珪素基板に直接接合
するため、金属回路板と窒化珪素基板との間に接着剤及
びろう材のような介在物が存在しない。したがって両者
間での熱抵抗が低く、金属回路板上に設けられた半導体
素子の発熱を系外に迅速に放散できるという利点を有す
る。
Japanese Patent Application Laid-Open No. 8-319187 discloses that a copper circuit board having a copper oxide layer formed by surface oxidation at a temperature in the range of 150 to 360 ° C. in the atmosphere is arranged at a predetermined position on the surface of a silicon nitride substrate. Then, the copper circuit board is heated to a temperature higher than the eutectic temperature of copper-copper oxide (1065 ° C.) at a temperature lower than the melting point of copper (1083 ° C.) and the resulting Cu—O eutectic compound liquid phase is used as a bonding agent to transform the copper circuit board into silicon nitride So-called DBC, which is directly bonded to the substrate surface
(Direct Bonding Cupper) A circuit board is described. In this circuit board, since the copper plate is directly bonded to the silicon nitride substrate, there is no inclusion such as an adhesive or a brazing material between the metal circuit board and the silicon nitride substrate. Therefore, there is an advantage that heat resistance between the two is low, and heat generated by the semiconductor element provided on the metal circuit board can be quickly radiated out of the system.

【0008】また、アルミニウム回路基板については、
特開平10−65296号公報には、Siにより
形成されたセラミックス基板と、当該セラミックス基板
の両面にAl-Siろう材を介してそれぞれ接着したア
ルミニウム板とを備えた回路基板が記載されている。こ
の回路基板は、従来の銅や銅合金等にて形成された金属
部材に比して変形抵抗が小さくなり、回路基板に冷熱サ
イクルを付加したとき、セラミックス基板に作用する熱
応力が小さいので、セラミックス基板にクラックが発生
しないという利点を有する。
[0008] For the aluminum circuit board,
Japanese Patent Application Laid-Open No. H10-65296 describes a circuit board including a ceramic substrate formed of Si 3 N 4 and aluminum plates adhered to both surfaces of the ceramic substrate via Al-Si brazing material. ing. This circuit board has smaller deformation resistance than conventional metal members made of copper, copper alloy, etc., and the thermal stress acting on the ceramics substrate when a thermal cycle is applied to the circuit board is small. There is an advantage that cracks do not occur in the ceramic substrate.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、上記従
来の回路基板では、銅又はアルミニウム等の金属回路板
と窒化ケイ素基板との接合状態を支配する窒化ケイ素基
板の表面形態の検討はなされていない。上記したいずれ
の接合方法でも窒化ケイ素基板の表面形態を調整しない
と、銅又はアルミニウム等の金属回路板と窒化ケイ素基
板との接合強度および耐冷熱サイクル特性等にばらつき
が生じ、高信頼性の回路基板が得られないといった問題
がある。
However, in the above-mentioned conventional circuit board, no study has been made on the surface morphology of the silicon nitride substrate which governs the bonding state between the metal circuit board made of copper or aluminum and the silicon nitride substrate. If the surface morphology of the silicon nitride substrate is not adjusted by any of the bonding methods described above, the bonding strength between the metal circuit board such as copper or aluminum and the silicon nitride substrate and the thermal cycling characteristics vary, and a highly reliable circuit is obtained. There is a problem that a substrate cannot be obtained.

【0010】本発明は、上記従来の問題に鑑みてなされ
たものであり、接合強度および耐冷熱サイクル特性に優
れた回路基板の製造に好適な表面性状を有する窒化ケイ
素基板およびこれを用いた回路基板を提供することを目
的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has a silicon nitride substrate having a surface property suitable for manufacturing a circuit board having excellent bonding strength and thermal cycling resistance, and a circuit using the same. It is intended to provide a substrate.

【0011】[0011]

【課題を解決するための手段】上記課題を解決した本発
明の窒化ケイ素基板は、中心線平均粗さ(Ra)が0.2〜2
0μmの表面性状を有することを特徴とする。中心線平
均粗さ(Ra)が20μm超では、窒化ケイ素基板に金属回
路板を接合したとき接合界面に局所的にボイドが生成
し、未接着面積が多くなり接合強度の著しい低下を招
く。一方、中心線平均粗さ(Ra)が0.2μm未満では、
ボイドの生成を抑制できるが、アンカ−リングによる複
合効果が得られないため、やはり充分な接合強度が得ら
れない。従って、窒化ケイ素基板の表面性状に関し、中
心線平均粗さ(Ra)は0.2〜20μmが望ましい。
The silicon nitride substrate of the present invention which has solved the above problems has a center line average roughness (Ra) of 0.2 to 2 mm.
It has a surface property of 0 μm. If the center line average roughness (Ra) exceeds 20 μm, voids are locally formed at the bonding interface when the metal circuit board is bonded to the silicon nitride substrate, and the unbonded area increases, resulting in a significant decrease in bonding strength. On the other hand, when the center line average roughness (Ra) is less than 0.2 μm,
Although the generation of voids can be suppressed, a sufficient bonding strength cannot be obtained because the composite effect of anchoring cannot be obtained. Therefore, regarding the surface properties of the silicon nitride substrate, the center line average roughness (Ra) is desirably 0.2 to 20 μm.

【0012】また、本発明の窒化ケイ素基板は、実質的
に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体
からなり、基板表面における前記窒化ケイ素粒子及び前
記粒界相の合計面積率を100%として、前記窒化ケイ素
粒子の面積率が70〜100%であるのが好ましい。この条
件を満たす窒化ケイ素基板は、優れた耐熱衝撃性及び耐
熱疲労信頼性を有する。
Further, the silicon nitride substrate of the present invention comprises a silicon nitride sintered body substantially consisting of silicon nitride particles and a grain boundary phase, and has a total area ratio of the silicon nitride particles and the grain boundary phase on the substrate surface. Is preferably 100%, the area ratio of the silicon nitride particles is preferably 70 to 100%. A silicon nitride substrate satisfying these conditions has excellent thermal shock resistance and thermal fatigue reliability.

【0013】また、本発明の窒化ケイ素基板は、基板表
面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒
化ケイ素粒子又は粒界相の最低高さの谷底部との距離
(L)が1〜40μmであるのが好ましい。距離(L)が
40μm超では窒化ケイ素基板と金属回路板との接合界面
に局所的にボイドが生成し、未接着面積が多くなり接合
強度の低下を生じる。また1μm未満ではボイドの生成
を抑制できるが、アンカ−リングによる複合効果が得ら
れないため、やはり充分な接合強度が得られない。
In the silicon nitride substrate of the present invention, the distance (L) between the peak of the maximum height of the silicon nitride particles exposed on the substrate surface and the bottom of the valley of the minimum height of the silicon nitride particles or the grain boundary phase. Is preferably 1 to 40 μm. Distance (L)
If it exceeds 40 μm, voids are locally formed at the bonding interface between the silicon nitride substrate and the metal circuit board, and the unbonded area increases, resulting in a decrease in bonding strength. If the thickness is less than 1 μm, the formation of voids can be suppressed, but the combined effect of anchoring cannot be obtained, so that sufficient bonding strength cannot be obtained.

【0014】また、本発明の回路基板は、高強度・高熱
伝導性窒化珪素焼結体からなる基板に金属回路板を接合
してなる。金属回路板としてはAlあるいはCuを接合
してなるものが好ましく、従来に比べて格段に優れた接
合強度および耐冷熱サイクル特性が得られる。
Further, the circuit board of the present invention is obtained by bonding a metal circuit board to a board made of a silicon nitride sintered body having high strength and high thermal conductivity. As the metal circuit board, one formed by joining Al or Cu is preferable, and significantly superior joining strength and cooling / heat cycling characteristics can be obtained as compared with the related art.

【0015】[0015]

【発明の実施の形態】以下、本発明の実施態様について
詳細に説明する。まず、本発明の窒化ケイ素基板の表面
性状を調整する方法としては、例えばサンドブラスト、
ショットブラスト、グリッドブラストまたはハイドロブ
ラスト等の機械加工により粒界相を機械的に除去する方
法、あるいは塩酸又は硫酸等の酸エッチング処理により
粒界相を溶出する方法がある。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail. First, as a method for adjusting the surface properties of the silicon nitride substrate of the present invention, for example, sandblasting,
There is a method of mechanically removing the grain boundary phase by machining such as shot blast, grid blast or hydroblast, or a method of eluting the grain boundary phase by acid etching treatment with hydrochloric acid or sulfuric acid.

【0016】銅又はアルミニウム等の金属板を窒化ケイ
素基板に接合するには、ろう付け法が好ましい。前述の
ように、銅板に対してはTi、ZrまたはHf等の活性
金属を含有するAg−Cu合金を、またアルミニウム板
に対してはAl-Si合金をろう材として用いるのが好
ましい。さらに銅板およびアルミニウム板にそれぞれC
u-O及びAl−O共晶化合物液相を接着層として用
い、これらの金属回路板を直接窒化ケイ素基板に接合し
ても良い。
To join a metal plate such as copper or aluminum to a silicon nitride substrate, a brazing method is preferred. As described above, an Ag-Cu alloy containing an active metal such as Ti, Zr or Hf is preferably used as a brazing material for a copper plate, and an Al-Si alloy is preferably used for an aluminum plate. C and C
A liquid phase of u-O and Al-O eutectic compounds may be used as an adhesive layer, and these metal circuit boards may be directly bonded to a silicon nitride substrate.

【0017】金属回路板と窒化ケイ素基板との接合強度
を支配する因子には、(1)接合物質間のぬれ及び拡
散、(2)界面生成物の強度、及び(3)界面構造があ
る。例えば、活性金属のTiを含有するAg-Cu合金
をろう材として、金属板を窒化ケイ素基板に接合する活
性金属法では、界面の接合強度は、(2)および(3)
の因子に大きく影響される。この場合、界面生成物はろ
う材相/窒化ケイ素の界面に生成するTiN相である。
このTiN相の生成過程について詳述すると、窒化ケイ
素が加熱処理過程でろう材相と接触すると、SiとNは
ろう材相に解けて液相の混相が生成する。次に分解によ
って生成した液相領域からTiN粒子が核生成し、窒化
ケイ素とろう材との接合界面に沿って成長する。TiN
粒子は特定の結晶学的方位関係にある結晶粒界で生成し
成長するため、TiN相と窒化ケイ素とは結晶的整合性
があり、接合強度が上昇する。したがって、強固な接合
強度を得るためには、ろう材相/窒化ケイ素界面に、充
分にTiN粒子を析出させることが肝要である。
Factors governing the bonding strength between the metal circuit board and the silicon nitride substrate include (1) wetting and diffusion between bonding materials, (2) strength of interface products, and (3) interface structure. For example, in the active metal method in which a metal plate is bonded to a silicon nitride substrate using an Ag-Cu alloy containing active metal Ti as a brazing material, the bonding strength at the interface is (2) and (3).
Is greatly influenced by the following factors. In this case, the interface product is a TiN phase formed at the brazing material phase / silicon nitride interface.
The generation process of the TiN phase will be described in detail. When silicon nitride comes into contact with the brazing material phase in the heat treatment process, Si and N are melted into the brazing material phase and a mixed phase of a liquid phase is formed. Next, TiN particles are nucleated from the liquid phase region generated by the decomposition, and grow along the bonding interface between the silicon nitride and the brazing material. TiN
Since the grains are generated and grown at crystal grain boundaries having a specific crystallographic orientation relationship, the TiN phase and the silicon nitride have a crystalline consistency, and the bonding strength increases. Therefore, in order to obtain a strong bonding strength, it is important to sufficiently precipitate TiN particles at the brazing filler metal phase / silicon nitride interface.

【0018】また、銅又はアルミニウムの共晶酸化物液
相を接着剤として用いる直接接合法でも、接合界面に界
面生成物となる酸化膜相の最適化を図る必要がある。こ
こで、酸化膜相は、窒化ケイ素基板の場合、焼結助剤成
分とSiOとのシリケ−ト結晶相およびガラス相から
なる。具体的に焼結助剤としてYを用いる場合、
・2SiO相とY−SiO系ガラス
とを生成する。金属回路板と窒化ケイ素基板との接合強
度はこれらシリケ−ト相及びガラス相の生成形態に大き
く依存する。したがって、直接接合法では、酸化膜相の
生成形態を制御することが肝要である。
In the direct bonding method using a liquid phase of a eutectic oxide of copper or aluminum as an adhesive, it is necessary to optimize an oxide film phase which is an interface product at a bonding interface. Here, in the case of a silicon nitride substrate, the oxide film phase comprises a silicate crystal phase of a sintering aid component and SiO 2 and a glass phase. Specifically, when Y 2 O 3 is used as a sintering aid,
Y 2 O 3 · 2SiO 2 phase and Y 2 O 3 to produce a -SiO 2 based glass. The bonding strength between the metal circuit board and the silicon nitride substrate largely depends on the form of formation of these silicate phase and glass phase. Therefore, in the direct bonding method, it is important to control the form of formation of the oxide film phase.

【0019】しかしながら、これら金属回路板と窒化ケ
イ素基板との接合強度を支配するTiN相又は酸化膜相
の生成は、基板表面性状が適切な場合にのみ形成され
る。前者では、窒化ケイ素基板表面に大きな凹凸がある
と、ろう材相が全面に浸透せず、ろう材相/窒化ケイ素
界面にボイドが形成され、接合不良が生じる。後者で
は、酸化膜相の生成はあるものの、やはり全面に浸透せ
ず、同様に接合不良が生じる。一方、窒化ケイ素基板の
表面に凹凸が極めて少ない場合、界面生成物は析出する
が、その反面、ろう材相の窒化ケイ素粒子間への噛み込
みによるアンカ−効果がなくなり、その結果、接合強度
が低下する。このように充分な接合強度を得るために
は、窒化ケイ素基板の表面形態は所定の条件を満たす必
要がある。
However, the generation of a TiN phase or an oxide film phase that governs the bonding strength between the metal circuit board and the silicon nitride substrate is formed only when the surface properties of the substrate are appropriate. In the former case, if there are large irregularities on the surface of the silicon nitride substrate, the brazing material phase does not penetrate the entire surface, and voids are formed at the brazing material phase / silicon nitride interface, resulting in poor bonding. In the latter case, although an oxide film phase is generated, the oxide film phase does not penetrate the entire surface, and a bonding failure similarly occurs. On the other hand, when the surface of the silicon nitride substrate has very few irregularities, interface products are precipitated, but on the other hand, the anchoring effect due to the brazing material phase being caught between the silicon nitride particles is lost, and as a result, the bonding strength is reduced. descend. In order to obtain sufficient bonding strength, the surface morphology of the silicon nitride substrate needs to satisfy predetermined conditions.

【0020】また、本発明の窒化ケイ素基板では、窒化
ケイ素粒子の面積率が70〜100%であるものが好まし
い。上述した活性金属法の場合、ろう材相と窒化ケイ素
粒子とが接触した結果生成するTiN相が接合強度を支
配するが、焼結助剤成分からなる粒界相が多いと、この
TiN相に加え粒界相に溶解したSi成分が粒界相を通
じて拡散し、過剰なTi成分と反応して5Ti+3Si
→TiSiの反応によりTiケイ化物を形成する。
このTiケイ化物は低強度であるのみならず、熱膨張係
数は9.5×10 −6/KとSi34の熱膨張係数3.2×10−6
/Kの約3倍も大きい。このため、熱膨張係数差に起因す
るSi34/TiSi間での界面剥離が生じ、著し
い接合強度の低下を招く。したがって、充分な接合強度
を得るために、粒界相量を低減することが重要である。
In the silicon nitride substrate of the present invention,
Silicon particles having an area ratio of 70 to 100% are preferred.
No. In the case of the active metal method described above, the brazing filler metal phase and silicon nitride
The TiN phase formed as a result of contact with the particles supports the bonding strength.
However, if there are many grain boundary phases composed of sintering aid components,
In addition to the TiN phase, the Si component dissolved in the grain boundary phase passes through the grain boundary phase.
And reacts with the excess Ti component to form 5Ti + 3Si
→ Ti5Si3To form Ti silicide.
This Ti silicide has not only low strength but also a thermal expansion coefficient.
Number is 9.5 × 10 -6/ K and SiThreeNFourThermal expansion coefficient of 3.2 × 10-6
It is about three times larger than / K. For this reason, due to the difference in thermal expansion coefficient,
SiThreeNFour/ Ti5Si3Interfacial delamination occurs between
Causes a decrease in bonding strength. Therefore, sufficient bonding strength
It is important to reduce the amount of the grain boundary phase in order to obtain.

【0021】また直接接合法の場合、接合界面に生成す
る酸化膜相が接合強度を支配するが、この酸化膜は焼結
助剤成分とSiOとのシリケ−ト結晶相およびガラス
相からなり、Yを焼結助剤とした場合はY
・2SiO相及びY−SiO系ガラス相を生
成する。接合界面において助剤成分からなる粒界相量が
多くなると、ガラス相の生成割合が高くなり、これに伴
い接合強度は向上する。しかしながら、更に粒界相量が
増大すると低強度であるシリケ−ト相の生成割合が大き
くなり、強度は著しく低下する。したがって、いずれの
接合方法を用いる場合も、窒化ケイ素粒子及び粒界相の
適正な比率範囲が存在する。本発明では窒化ケイ素基板
での窒化ケイ素粒子の面積率は70〜100%であるのが好
ましいことを新しく知見した。
In the case of the direct bonding method, the oxide film phase formed at the bonding interface governs the bonding strength. This oxide film is composed of a silicate crystal phase of a sintering aid component and SiO 2 and a glass phase. , When Y 2 O 3 is used as a sintering aid, Y 2 O 3
· 2SiO to generate two-phase and Y 2 O 3 -SiO 2 based glass phase. When the amount of the grain boundary phase composed of the auxiliary component at the bonding interface increases, the generation ratio of the glass phase increases, and accordingly, the bonding strength improves. However, when the amount of the grain boundary phase further increases, the generation rate of the low-strength silicate phase increases, and the strength remarkably decreases. Therefore, when using any of the joining methods, there is an appropriate ratio range of the silicon nitride particles and the grain boundary phase. In the present invention, it has been newly found that the area ratio of silicon nitride particles on the silicon nitride substrate is preferably 70 to 100%.

【0022】本発明の窒化ケイ素基板を用いて構成され
る回路基板は、金属とセラミックス基板の接合強度が優
れる点、また高い耐冷熱サイクル特性等の強度信頼性を
生かしてパワ−半導体用基板、マルチチップモジュ−ル
用基板などの各種基板、ペルチェ素子用熱伝板、あるい
は各種発熱素子用ヒ−トシンクなどの電子部品用部材と
して好適である。
The circuit board formed by using the silicon nitride substrate of the present invention has a high bonding strength between a metal and a ceramic substrate, and a substrate for a power semiconductor, taking advantage of strength reliability such as high cooling / heating cycle characteristics. It is suitable as a member for electronic components such as various substrates such as a substrate for a multi-chip module, a heat transfer plate for a Peltier element, or a heat sink for various heating elements.

【0023】本発明の窒化ケイ素基板により半導体素子
用基板を構成した場合、半導体素子の作動に伴う繰り返
しの冷熱サイクルによる基板のクラックの発生が抑制さ
れ、耐熱衝撃性および耐冷熱サイクル性が著しく向上
し、耐久性ならびに信頼性に優れたものを提供できる。
また、高出力化および高集積化を指向する半導体素子を
搭載した場合でも熱抵抗特性の劣化が少なく、かつ優れ
た放熱特性を発揮する。また本発明の窒化ケイ素基板に
よる優れた機械的特性を反映してそれ自体が構造部材を
兼ねることができるので回路基板構造を簡略化できると
いう実用性に富んだ利点を有する。
When a substrate for a semiconductor device is constituted by the silicon nitride substrate of the present invention, generation of cracks in the substrate due to repetitive cooling / heating cycles accompanying the operation of the semiconductor device is suppressed, and the thermal shock resistance and the cooling / heating cycle resistance are significantly improved. In addition, a product excellent in durability and reliability can be provided.
Further, even when a semiconductor element for high output and high integration is mounted, deterioration of thermal resistance characteristics is small and excellent heat radiation characteristics are exhibited. In addition, since the silicon nitride substrate of the present invention can also serve as a structural member by reflecting the excellent mechanical properties of the silicon nitride substrate, it has a practical advantage that the circuit board structure can be simplified.

【0024】[0024]

【実施例】以下、実施例により本発明を詳細に説明する
が、それら実施例により本発明が限定されるものではな
い。 (実施例1)平均粒子径が0.2〜3.0μmの窒化ケイ素粉
末:96重量部に対し、MgO:3重量部、および Y
:1重量部の焼結助剤を添加した混合粉末を作製し
た。次に、アミン系の分散剤を2wt%添加したトルエ
ン・ブタノール溶液を満たしたボールミルの樹脂製ポッ
ト中に、前記混合粉末および粉砕媒体の窒化ケイ素製ボ
ールを投入し、48時間湿式混合した。次に、前記ポット
中の混合粉末:83.3重量部に対しポリビニル系の有機バ
インダー:12.5重量部および可塑剤(ジメチルフタレ−
ト):4.2重量部を添加し、次いで48時間湿式混合しシ
ート成形用スラリーを得た。この成形用スラリーを調整
後、ドクターブレード法によりグリーンシートを成形し
た。次に、成形したグリーンシートを空気中400〜600℃
で2〜5時間加熱することにより前記有機バインダー成分
を十分に除去し、脱脂したグリーンシートを0.9MPa(9
気圧)の窒素雰囲気中で1850℃で5時間焼結し、さらに
同じ窒素雰囲気中で1900℃で24時間熱処理し、次いで室
温に冷却した。得られたシート状窒化ケイ素焼結体を機
械加工し、サンドブラストにより表面性状を調整し、縦
50mm×横50mm×厚さ0.6mmの半導体モジュール用
窒化ケイ素基板を得た。サンドブラスト条件は以下の通
りであった。 基板の送り速度:20 cm/分 処理ゾーンの長さ:80 cm ノズル数:4本 ノズルの噴出圧力:0.35 MPa 基板表面に対する噴射角度:30° 砥粒:アルミナ製#240
EXAMPLES The present invention will be described below in detail with reference to examples, but the present invention is not limited to these examples. (Example 1) Silicon nitride powder having an average particle diameter of 0.2 to 3.0 µm: 96 parts by weight, MgO: 3 parts by weight, and Y 2 O
3 : A mixed powder to which 1 part by weight of a sintering aid was added was prepared. Next, into a resin pot of a ball mill filled with a toluene / butanol solution to which 2% by weight of an amine-based dispersant was added, the mixed powder and a silicon nitride ball as a pulverizing medium were charged and wet-mixed for 48 hours. Next, 12.5 parts by weight of a polyvinyl organic binder and 83.3 parts by weight of the mixed powder in the pot and a plasticizer (dimethyl phthalate) were used.
G): 4.2 parts by weight were added, followed by wet mixing for 48 hours to obtain a sheet forming slurry. After adjusting the molding slurry, a green sheet was formed by a doctor blade method. Next, the formed green sheet is placed in air at 400 to 600 ° C.
The organic binder component is sufficiently removed by heating for 2 to 5 hours at 0.9 MPa (0.9 MPa (9 MPa)).
(Atmospheric pressure) in a nitrogen atmosphere at 1850 ° C. for 5 hours, heat-treated in the same nitrogen atmosphere at 1900 ° C. for 24 hours, and then cooled to room temperature. The obtained sheet-shaped silicon nitride sintered body was machined, and the surface properties were adjusted by sandblasting.
A silicon nitride substrate for a semiconductor module having a size of 50 mm x 50 mm x 0.6 mm was obtained. Sandblast conditions were as follows. Substrate feed speed: 20 cm / min Processing zone length: 80 cm Number of nozzles: 4 Nozzle ejection pressure: 0.35 MPa Injection angle to substrate surface: 30 ° Abrasive: Alumina # 240

【0025】サンドブラスト処理により焼結体表面の粒
界相が除去されるので、サンドブラスト処理条件(板の
送り速度、処理ゾーンの長さ、ノズルの数及び噴出圧
力、基板表面に対する噴射角度、砥粒の種類及び粒度
等)を調整すれば、焼結体の中心線平均表面粗さ(R
a)、窒化ケイ素粒子、粒界相の面積率、及び粒界相の
頂部と谷底間の距離(L)を自在に変化させた窒化ケイ
素基板を得ることができる。上記のサンドブラスト条件
で処理して得られた本発明の半導体モジュール用の代表
的な窒化ケイ素基板の中心線平均粗さ(Ra)を触針式表
面粗さ測定器により測定した結果を図1に示す。図1に
おいて、横軸は窒化ケイ素基板表面の測定長さ(30m
m)を示し、縦軸はRaを示す。また測定の原点は0であ
り、Raおよび測定長さのスケールは左下に示す。この結
果、本実施例の窒化ケイ素基板のRaは0.6μmであり、
窒化ケイ素粒子の面積率は81.0%であり、粒界相の面積
率は19.0%であった。
Since the grain boundary phase on the surface of the sintered body is removed by sand blasting, the sand blasting conditions (plate feed speed, length of processing zone, number of nozzles and ejection pressure, injection angle with respect to the substrate surface, abrasive grains, By adjusting the type and grain size of the sintered body, the center line average surface roughness (R
a) A silicon nitride substrate can be obtained in which the silicon nitride particles, the area ratio of the grain boundary phase, and the distance (L) between the top and the bottom of the grain boundary phase are freely changed. FIG. 1 shows the results of measuring the center line average roughness (Ra) of a typical silicon nitride substrate for a semiconductor module of the present invention obtained by processing under the above sandblasting conditions using a stylus type surface roughness meter. Show. In FIG. 1, the horizontal axis represents the measured length (30 m) of the silicon nitride substrate surface.
m), and the vertical axis indicates Ra. The origin of the measurement is 0, and the scale of Ra and the measurement length are shown at the lower left. As a result, Ra of the silicon nitride substrate of this example is 0.6 μm,
The area ratio of the silicon nitride particles was 81.0%, and the area ratio of the grain boundary phase was 19.0%.

【0026】得られた窒化ケイ素基板の表面部組織を走
査型電子顕微鏡(日立製作所製、商品名:S4500)によ
り倍率2000倍で撮影した写真を図2(a)に示す。図2
(b)は図2(a)の走査型電子顕微鏡写真に対応する
模式図であり、窒化ケイ素粒子は21、粒界相は22で示さ
れている。また、比較例として窒化ケイ素粒子の面積率
が5%である窒化ケイ素基板の表面組織写真を図7に示
す。次に、図3(a)および(b)はRa=0.6μmの前
記窒化ケイ素基板を用いて構成した本発明の回路基板の
代表的な断面組織を走査型電子顕微鏡により倍率50倍及
び4000倍で撮影した写真であり、Cu回路板31と窒化ケ
イ素基板33とがろう材層32を介して接合されている。図
4は、図3(b)におけるCu回路板31とろう材層32と
を除去した状態、すなわちCu回路板31に接合する前の
窒化ケイ素基板33の表面状態を示す断面模式図である。
ここで窒化ケイ素基板33における(L)は、窒化ケイ素
粒子21の最大高さの山頂部41と、窒化ケイ素粒子21ある
いは粒界相22の最低高さの谷底部42との距離43に相当す
る。
FIG. 2 (a) shows a photograph of the surface structure of the obtained silicon nitride substrate taken at a magnification of 2000 times with a scanning electron microscope (trade name: S4500, manufactured by Hitachi, Ltd.). FIG.
FIG. 2B is a schematic view corresponding to the scanning electron micrograph of FIG. 2A, in which the silicon nitride particles are indicated by 21 and the grain boundary phase is indicated by 22. FIG. 7 shows a photograph of the surface structure of a silicon nitride substrate having a silicon nitride particle area ratio of 5% as a comparative example. Next, FIGS. 3 (a) and 3 (b) show a typical cross-sectional structure of a circuit board of the present invention constituted by using the silicon nitride substrate having Ra = 0.6 μm by a scanning electron microscope at a magnification of 50 × and 4000 ×. The Cu circuit board 31 and the silicon nitride substrate 33 are joined through the brazing material layer 32. FIG. 4 is a schematic cross-sectional view showing a state in which the Cu circuit board 31 and the brazing material layer 32 in FIG. 3B are removed, that is, a surface state of the silicon nitride substrate 33 before being joined to the Cu circuit board 31.
Here, (L) in the silicon nitride substrate 33 corresponds to the distance 43 between the peak 41 of the maximum height of the silicon nitride particles 21 and the valley bottom 42 of the minimum height of the silicon nitride particles 21 or the grain boundary phase 22. .

【0027】次に、サンドブラスト処理条件を適宜変え
て作製した前記窒化ケイ素基板のうちの代表的なもの
(試料No.1〜10)をサンプリングし、それらの断面組
織写真を前記走査型電子顕微鏡により倍率2000倍で撮影
し、得られた断面組織写真の200μm×500μmの視野に
おいて長さ:500μmにわたり窒化ケイ素粒子の最大高
さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さ
の谷底部との距離(L)を測定した。また得られた断面
組織写真の200μm×500μmの視野を画像解析装置によ
り解析し、窒化ケイ素粒子および粒界相の平均面積率を
求めた。また金属回路板と窒化ケイ素基板(試料No.1
〜10)との接合強度を評価するためにピ−ル強度試験を
行った。ピ−ル強度試験は、図5に示す回路基板50の銅
製またはアルミニウム製回路板52の一端部が窒化ケイ素
基板51の側面に対し5mm突出するように予め接合して
おき、これを90度上方に引張りあげるのに要する単位長
さ当りの力で評価した。
Next, representative ones of the silicon nitride substrates (samples Nos. 1 to 10) prepared by appropriately changing the sandblasting conditions were sampled, and their cross-sectional micrographs were taken with the scanning electron microscope. Photographed at a magnification of 2000 times, the cross-sectional structure photograph obtained in a 200 μm × 500 μm field of view has a length of 500 μm and a peak of the maximum height of the silicon nitride particles over 500 μm and a valley of the minimum height of the silicon nitride particles or the grain boundary phase. (L) was measured. Further, the visual field of 200 μm × 500 μm of the obtained cross-sectional structure photograph was analyzed by an image analyzer to determine the average area ratio of the silicon nitride particles and the grain boundary phase. Metal circuit board and silicon nitride substrate (Sample No. 1)
A peel strength test was carried out to evaluate the bonding strength with 〜10). In the peel strength test, one end of the copper or aluminum circuit board 52 of the circuit board 50 shown in FIG. It was evaluated by the force per unit length required to pull it up.

【0028】次に、作製した前記窒化ケイ素基板(試料
No.1〜10)により図6の回路基板60を作製した。回路
基板60は前記縦50mm×横50mm×厚さ0.6mmの寸法
の窒化ケイ素基板51の表面に銅製またはアルミニウム製
の回路板61をろう材53により接合して設け、基板51の裏
面には銅板またはアルミニウム板62をろう材53により接
合して構成している。試料No.1〜10の各窒化ケイ素基
板の中心線平均粗さRa、窒化ケイ素粒子、粒界相の面積
率およびLを表1に示す。また前記窒化ケイ素基板を用
い、接合金属板が銅またはアルミニウム製で、ろう付け
または直接接合した場合のピール強度および破壊発生位
置(破壊モード)を表1に示す。なお、表1中の破壊モ
ードの項目において、Cuは接合金属の銅より破壊し
た、Alは接合金属のアルミニウムより破壊した、接合
界面は基板と接合金属との接合界面から破壊したことを
それぞれ示している。
Next, the silicon nitride substrate (sample
No. 1 to 10), the circuit board 60 of FIG. 6 was manufactured. The circuit board 60 is provided by bonding a copper or aluminum circuit board 61 to the surface of a silicon nitride substrate 51 having the dimensions of 50 mm × 50 mm × 0.6 mm by brazing material 53, and a copper plate on the back of the board 51. Alternatively, an aluminum plate 62 is joined by a brazing material 53. Table 1 shows the center line average roughness Ra, the silicon nitride particles, the area ratio of the grain boundary phase, and L of each of the silicon nitride substrates of Sample Nos. 1 to 10. Further, Table 1 shows the peel strength and the location of fracture (breakage mode) when the above-mentioned silicon nitride substrate was used and the joining metal plate was made of copper or aluminum and brazed or directly joined. In the breakdown mode items in Table 1, Cu indicates that the joint metal was broken from copper, Al indicates that the joint metal was broken from aluminum, and the joint interface indicates that the joint was broken from the joint interface between the substrate and the joint metal. ing.

【0029】(比較例1)サンドブラスト処理条件を変
化させた以外は実施例1と同様にして、窒化ケイ素基板
及び回路基板を作製し、評価した。結果を表1の試料N
o.21〜28に示す。
Comparative Example 1 A silicon nitride substrate and a circuit board were prepared and evaluated in the same manner as in Example 1 except that the sandblasting conditions were changed. The results are shown in Sample 1 of Table 1.
o.21-28.

【0030】[0030]

【表1】 [Table 1]

【0031】表1の実施例の試料No.1〜10から、以下
の知見が得られた。中心線平均粗さ(Ra)が0.2〜20μ
mの表面性状を有し、表面部の窒化ケイ素粒子の面積率
が70〜100%であり、窒化ケイ素粒子の最大高さの山頂
部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部
との距離(L)が1〜40μmである窒化ケイ素基板を用
い、銅またはアルミニウム製の金属板を接合した回路基
板を作製し、ピ−ル強度を測定した場合、得られた回路
基板のいずれも22.0kN/m以上と高いピール強度を有し、
破壊は接合部から起こらないことが確認できた。
The following findings were obtained from samples Nos. 1 to 10 of the examples in Table 1. Center line average roughness (Ra) 0.2 ~ 20μ
m, the area ratio of silicon nitride particles on the surface is 70 to 100%, the peak of the maximum height of the silicon nitride particles and the valley of the minimum height of the silicon nitride particles or the grain boundary phase. When a circuit board in which a metal plate made of copper or aluminum is bonded using a silicon nitride substrate having a distance (L) of 1 to 40 μm and the peel strength is measured, any of the obtained circuit boards Also has a high peel strength of 22.0 kN / m or more,
It was confirmed that the fracture did not occur from the joint.

【0032】これに対し、表1の比較例1の試料No.21
〜23から、以下の知見が得られた。 No.21の中心線平均粗さ(Ra)は0.2μm未満であり、
ピ−ル強度は8.5 kN/mと低く、破壊は接合界面から生じ
た。 No.22の中心線平均粗さ(Ra)は20μm超であり、ピ
−ル強度は9.5kN/mと低く、破壊は接合界面から生じ
た。 No.23は窒化ケイ素粒子の面積率が70%未満でかつ粒
界相の面積率が30%超であり、ピ−ル強度は5.5kN/mと
低く、破壊は接合界面から生じた。 No.24の窒化ケイ素粒子の最大高さの山頂部と窒化ケ
イ素粒子あるいは粒界相の最低高さの谷底部との距離
(L)は1μm未満であり、ピ−ル強度は7.0kN/mと低
く、破壊は接合界面から生じた。 No.25の窒化ケイ素粒子の最大高さの山頂部と窒化ケ
イ素粒子あるいは粒界相の最低高さの谷底部の距離
(L)は45μmであり、ピ−ル強度は6.5kN/mと低く、破
壊は接合界面から生じた。 No.26は、接合方法をろう付けから直接接合に変更し
た以外No.22と同じであるが、この場合もピ−ル強度は
7.0kN/mと低く、破壊は接合界面から生じた。 No.27は、金属回路板を銅製からアルミニウム製に変
更した以外No.22と同じであるが、この場合もピ−ル強
度は6.5kN/mと低く、破壊は接合界面から生じた。 No.28は、接合方法をろう付けから直接接合に変更し
た以外No.27と同じであるが、この場合もピ−ル強度は
6.2kN/mと低く、破壊は接合界面から生じた。
On the other hand, Sample No. 21 of Comparative Example 1 in Table 1
~ 23, the following findings were obtained. The center line average roughness (Ra) of No. 21 is less than 0.2 μm,
The peel strength was as low as 8.5 kN / m, and the fracture occurred from the joint interface. The center line average roughness (Ra) of No. 22 was over 20 μm, the peel strength was as low as 9.5 kN / m, and the fracture occurred from the joint interface. In No. 23, the area ratio of the silicon nitride particles was less than 70% and the area ratio of the grain boundary phase was more than 30%, the peel strength was as low as 5.5 kN / m, and the fracture occurred from the joint interface. The distance (L) between the top of the maximum height of the silicon nitride particles of No. 24 and the bottom of the lowest height of the silicon nitride particles or the grain boundary phase is less than 1 μm, and the peel strength is 7.0 kN / m. And fracture occurred from the joint interface. The distance (L) between the peak of the maximum height of the silicon nitride particles of No. 25 and the valley bottom of the minimum height of the silicon nitride particles or the grain boundary phase is 45 μm, and the peel strength is as low as 6.5 kN / m. The failure occurred from the joint interface. No. 26 is the same as No. 22 except that the joining method was changed from brazing to direct joining.
As low as 7.0 kN / m, the fracture occurred from the joint interface. No. 27 was the same as No. 22 except that the metal circuit board was changed from copper to aluminum, but also in this case, the peel strength was as low as 6.5 kN / m, and the fracture occurred from the joint interface. No. 28 is the same as No. 27 except that the joining method was changed from brazing to direct joining.
As low as 6.2 kN / m, the fracture occurred from the joint interface.

【0033】(実施例2)実施例1と同様の製造条件に
より作製した窒化ケイ素基板により図6の回路基板60を
作製した。回路基板60は作製した縦50mm×横50mm×
厚さ0.6mm寸法の窒化ケイ素基板51の表面にろう材53
を介して銅製回路板61を設け、また窒化ケイ素基板51の
裏面にもろう材53を介して銅製回路板62を接合して構成
されている。得られた窒化ケイ素基板51のRaは5μmで
あり、窒化ケイ素粒子の面積率は85%であり、粒界相の
面積率は15%であり、表面の頂部と谷底との距離Lは5
μmであった。回路基板60に対し、3点曲げ強度試験お
よび耐冷熱サイクル試験を行った。その結果、曲げ強度
は600MPa以上と大きく、回路基板60の実装工程における
締め付け割れ及びはんだ付け工程時の熱応力に起因する
クラックの発生は見られなかった。また回路基板60を実
装した半導体装置(図示省略)の製造歩留まりが飛躍的
に向上することが実証された。また耐冷熱サイクル試験
は、−40℃での冷却を30分間、室温での保持を10分間、
及び125℃における加熱を30分間とする昇温/降温サイ
クルを1サイクルとし、これを繰り返し行い、回路基板
60にクラック等が発生するまでのサイクル数を測定し
た。その結果、1000サイクル経過後でも窒化ケイ素基板
51の割れや銅製回路板61,62の剥離はなく、優れた耐久
性と信頼性とを兼備することが確認された。また1000サ
イクル経過後においても回路基板60の耐電圧特性の低下
はなかった。さらに、回路基板60を1000枚製造し、上記
耐冷熱サイクル試験による不良発生個数のばらつきを調
査したが、いずれの回路基板においても窒化ケイ素基板
の割れや銅回路板の剥離は発生せず、優れた耐熱衝撃及
び耐熱疲労信頼性を堅持していることが確認された。
Example 2 A circuit board 60 shown in FIG. 6 was manufactured from a silicon nitride substrate manufactured under the same manufacturing conditions as in Example 1. The circuit board 60 is 50 mm long x 50 mm wide x
A brazing material 53 is applied to the surface of a silicon nitride substrate 51 having a thickness of 0.6 mm.
, A copper circuit board 61 is provided via a brazing material 53 on the back surface of the silicon nitride substrate 51. The Ra of the obtained silicon nitride substrate 51 was 5 μm, the area ratio of silicon nitride particles was 85%, the area ratio of the grain boundary phase was 15%, and the distance L between the top and the valley bottom of the surface was 5 μm.
μm. The circuit board 60 was subjected to a three-point bending strength test and a thermal cycling test. As a result, the bending strength was as large as 600 MPa or more, and no crack was generated due to the tightening crack in the mounting process of the circuit board 60 and the thermal stress in the soldering process. It has also been demonstrated that the manufacturing yield of a semiconductor device (not shown) on which the circuit board 60 is mounted is dramatically improved. In addition, the cooling and heat cycle test was performed by cooling at −40 ° C. for 30 minutes, holding at room temperature for 10 minutes,
And a cycle of heating / cooling with heating at 125 ° C for 30 minutes is defined as one cycle, and this cycle is repeated.
The number of cycles until a crack or the like occurred at 60 was measured. As a result, even after 1000 cycles, the silicon nitride substrate
There were no cracks in 51 and no peeling of the copper circuit boards 61 and 62, confirming both excellent durability and reliability. Also, even after 1000 cycles, the withstand voltage characteristics of the circuit board 60 did not decrease. Furthermore, 1000 circuit boards 60 were manufactured, and the variation in the number of defects generated by the above-mentioned cooling / heating cycle test was investigated.No cracking of the silicon nitride board or peeling of the copper circuit board occurred in any of the circuit boards. It was confirmed that the thermal shock resistance and thermal fatigue reliability were maintained.

【0034】[0034]

【発明の効果】以上の通り、本発明の窒化ケイ素基板
は、銅あるいはアルミニウム等の金属回路基板を接合す
るのに好適な表面形態を有し、金属回路板と窒化ケイ素
基板との接合強度を著しく向上することができる。また
本発明の窒化ケイ素基板は本来有する高強度/高靭性に
加えて高い熱伝導率を具備するので、半導体素子用回路
基板を構成した場合に半導体素子の作動に伴う繰り返し
の冷熱サイクルに起因する基板の割れや金属回路板の剥
離の発生を抑制でき、耐熱衝撃性ならびに耐冷熱サイク
ル性を著しく向上した回路基板を提供することができ
る。
As described above, the silicon nitride substrate of the present invention has a surface morphology suitable for bonding a metal circuit board such as copper or aluminum, and the bonding strength between the metal circuit board and the silicon nitride substrate is improved. It can be significantly improved. Further, since the silicon nitride substrate of the present invention has a high thermal conductivity in addition to the inherently high strength / high toughness, when a circuit board for a semiconductor device is formed, it is caused by repeated cooling / heating cycles accompanying the operation of the semiconductor device. It is possible to provide a circuit board in which cracking of the board and peeling of the metal circuit board can be suppressed, and the thermal shock resistance and the cooling / heat cycle resistance are significantly improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の窒化ケイ素基板の代表的な表面部のRa
測定結果の一例を示す図である。
FIG. 1 shows a typical surface Ra of a silicon nitride substrate of the present invention.
It is a figure showing an example of a measurement result.

【図2】本発明の窒化ケイ素基板の代表的な表面部組織
を走査型電子顕微鏡により撮影した顕微鏡写真(a)、
(a)に対応する模式図(b)である。
FIG. 2 is a micrograph (a) of a typical surface structure of a silicon nitride substrate of the present invention taken by a scanning electron microscope;
It is a schematic diagram (b) corresponding to (a).

【図3】本発明の窒化ケイ素基板の代表的な断面組織を
走査型電子顕微鏡により撮影した顕微鏡写真(a)およ
び(b)である。
FIGS. 3A and 3B are micrographs (a) and (b) of a typical cross-sectional structure of a silicon nitride substrate of the present invention taken by a scanning electron microscope.

【図4】図3(b)に対応する模式図である。FIG. 4 is a schematic diagram corresponding to FIG. 3 (b).

【図5】ピール強度試験用試料を示す断面図である。FIG. 5 is a sectional view showing a sample for a peel strength test.

【図6】本発明の代表的な回路基板を示す断面図であ
る。
FIG. 6 is a sectional view showing a typical circuit board of the present invention.

【図7】比較例の窒化ケイ素基板の表面部組織を走査型
電子顕微鏡で撮影した写真である。
FIG. 7 is a photograph taken by a scanning electron microscope of a surface structure of a silicon nitride substrate of a comparative example.

【符号の説明】[Explanation of symbols]

21:窒化ケイ素粒子 22:粒界相 31:Cu回路板 32:ろう材層 33:窒化ケイ素基板 41:窒化ケイ素粒子の最大高さの山頂部 42:窒化ケイ素粒子あるいは粒界相の最低高さの谷底
部 43:窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素
粒子あるいは粒界相の最低高さの谷底部との距離(L) 50,60:回路基板 51:窒化ケイ素基板 52:銅合金製またはアルミニウム合金製回路板 53:ろう材 61,62:銅合金製回路板。
21: Silicon nitride particles 22: Grain boundary phase 31: Cu circuit board 32: Brazing material layer 33: Silicon nitride substrate 41: Peak of maximum height of silicon nitride particles 42: Minimum height of silicon nitride particles or grain boundary phase Bottom 43: distance (L) between the peak of the maximum height of the silicon nitride particles and the bottom of the minimum height of the silicon nitride particles or the grain boundary phase 50, 60: circuit board 51: silicon nitride substrate 52: copper Circuit board made of alloy or aluminum alloy 53: Brazing material 61, 62: Circuit board made of copper alloy.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) C04B 35/58 102C Fターム(参考) 4G001 BA06 BA09 BA32 BB06 BB09 BB32 BC13 BC52 BC54 BC73 BD21 BE32 4G026 BA17 BB22 BB27 BC02 BD11 BD12 BF11 BG02 BH07 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI theme coat ゛ (Reference) C04B 35/58 102C F-term (Reference) 4G001 BA06 BA09 BA32 BB06 BB09 BB32 BC13 BC52 BC54 BC73 BD21 BE32 4G026 BA17 BB22 BB27 BC02 BD11 BD12 BF11 BG02 BH07

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 中心線平均粗さ(Ra)が0.2〜20μmの
表面性状を有することを特徴とする窒化ケイ素基板。
1. A silicon nitride substrate having a surface characteristic having a center line average roughness (Ra) of 0.2 to 20 μm.
【請求項2】 請求項1記載の窒化ケイ素基板におい
て、実質的に窒化ケイ素粒子と粒界相とからなる窒化ケ
イ素焼結体からなり、基板表面における前記窒化ケイ素
粒子及び前記粒界相の合計面積率を100%として、前記
窒化ケイ素粒子の面積率が70〜100%であることを特徴
とする窒化ケイ素基板。
2. The silicon nitride substrate according to claim 1, comprising a silicon nitride sintered body substantially composed of silicon nitride particles and a grain boundary phase, wherein a total of the silicon nitride particles and the grain boundary phase on the substrate surface is provided. A silicon nitride substrate, wherein the area ratio of the silicon nitride particles is 70 to 100%, where the area ratio is 100%.
【請求項3】 請求項1または2に記載の窒化ケイ素基
板において、基板表面に露出した窒化ケイ素粒子の最大
高さの山頂部と、窒化ケイ素粒子又は粒界相の最低高さ
の谷底部との距離(L)が1〜40μmであることを特徴
とする窒化ケイ素基板。
3. The silicon nitride substrate according to claim 1, wherein a peak of the maximum height of the silicon nitride particles exposed on the surface of the substrate, and a valley of a minimum height of the silicon nitride particles or the grain boundary phase. A distance (L) between 1 and 40 μm.
【請求項4】 請求項1乃至3のいずれかに記載の窒化
ケイ素基板の少なくとも一面にAlあるいはCuの回路
板を接合してなることを特徴とする高強度・高熱伝導性
回路基板。
4. A high-strength, high-thermal-conductivity circuit board, comprising an Al or Cu circuit board bonded to at least one surface of the silicon nitride substrate according to claim 1.
JP2001328477A 2000-10-26 2001-10-26 Silicon nitride substrate for circuit mounting and circuit substrate Expired - Lifetime JP3539634B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001328477A JP3539634B2 (en) 2000-10-26 2001-10-26 Silicon nitride substrate for circuit mounting and circuit substrate

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000326489 2000-10-26
JP2000-326489 2000-10-26
JP2001328477A JP3539634B2 (en) 2000-10-26 2001-10-26 Silicon nitride substrate for circuit mounting and circuit substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2004031711A Division JP2004231513A (en) 2000-10-26 2004-02-09 Circuit board excellent in high strength/high heat conductivity

Publications (3)

Publication Number Publication Date
JP2002201076A true JP2002201076A (en) 2002-07-16
JP3539634B2 JP3539634B2 (en) 2004-07-07
JP2002201076A5 JP2002201076A5 (en) 2004-10-28

Family

ID=26602798

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001328477A Expired - Lifetime JP3539634B2 (en) 2000-10-26 2001-10-26 Silicon nitride substrate for circuit mounting and circuit substrate

Country Status (1)

Country Link
JP (1) JP3539634B2 (en)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005255462A (en) * 2004-03-11 2005-09-22 Hitachi Metals Ltd Silicon nitride sintered compact, method for manufacturing the same and circuit board using the same
JP2006062898A (en) * 2004-08-25 2006-03-09 Kyocera Corp Metal-ceramic composite structure and its producing method
JP2010076948A (en) * 2008-09-24 2010-04-08 Hitachi Metals Ltd Silicon nitride circuit substrate and semiconductor module using the same
JP2013012591A (en) * 2011-06-29 2013-01-17 Kyocera Corp Circuit board
WO2014157430A1 (en) * 2013-03-27 2014-10-02 日本碍子株式会社 Handle substrate for compound substrate for use with semiconductor
JP2015002272A (en) * 2013-06-15 2015-01-05 京セラ株式会社 Heat dissipation member, electronic device, and image forming device
US9293384B2 (en) 2010-01-13 2016-03-22 Kyocera Corporation Silicon nitride substrate, circuit substrate and electronic device using the same
JP2017035805A (en) * 2015-08-07 2017-02-16 Jx金属株式会社 Metal-ceramic bonding substrate and method for producing the same
US10276757B2 (en) 2016-12-27 2019-04-30 Nichia Corporation Light emitting device and method for manufacturing the same
WO2019088222A1 (en) * 2017-11-02 2019-05-09 三菱マテリアル株式会社 Joint body and insulating circuit substrate
JP2019085327A (en) * 2017-11-02 2019-06-06 三菱マテリアル株式会社 Bonded body and dielectric circuit board
US10418533B2 (en) 2016-05-31 2019-09-17 Nichia Corporation Light-emitting device having a light-transmissive member including particles of at least one first filler and method for manufacturing the same
WO2021015122A1 (en) 2019-07-23 2021-01-28 日本碍子株式会社 Bonded substrate, and method for manufacturing bonded substrate
JP6854980B1 (en) * 2020-01-21 2021-04-07 三菱電機株式会社 Heat dissipation member and heat sink
WO2021112187A1 (en) 2019-12-03 2021-06-10 日本碍子株式会社 Bonded substrate and method for manufacturing bonded substrate
WO2022004755A1 (en) * 2020-06-30 2022-01-06 株式会社トクヤマ Silicon nitride sintered substrate

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4556162B2 (en) * 2004-03-11 2010-10-06 日立金属株式会社 Silicon nitride-based sintered body, method for producing the same, and circuit board using the same
JP2005255462A (en) * 2004-03-11 2005-09-22 Hitachi Metals Ltd Silicon nitride sintered compact, method for manufacturing the same and circuit board using the same
JP2006062898A (en) * 2004-08-25 2006-03-09 Kyocera Corp Metal-ceramic composite structure and its producing method
JP4596855B2 (en) * 2004-08-25 2010-12-15 京セラ株式会社 Metal-ceramic composite structure and electrode member for plasma generation comprising the same
JP2010076948A (en) * 2008-09-24 2010-04-08 Hitachi Metals Ltd Silicon nitride circuit substrate and semiconductor module using the same
US9293384B2 (en) 2010-01-13 2016-03-22 Kyocera Corporation Silicon nitride substrate, circuit substrate and electronic device using the same
JP2013012591A (en) * 2011-06-29 2013-01-17 Kyocera Corp Circuit board
KR101531809B1 (en) * 2013-03-27 2015-06-25 엔지케이 인슐레이터 엘티디 Handle substrate for compound substrate for use with semiconductor
TWI596717B (en) * 2013-03-27 2017-08-21 Ngk Insulators Ltd Stage substrate for semiconductor composite substrate
WO2014157430A1 (en) * 2013-03-27 2014-10-02 日本碍子株式会社 Handle substrate for compound substrate for use with semiconductor
JP2015002272A (en) * 2013-06-15 2015-01-05 京セラ株式会社 Heat dissipation member, electronic device, and image forming device
JP2017035805A (en) * 2015-08-07 2017-02-16 Jx金属株式会社 Metal-ceramic bonding substrate and method for producing the same
US11430928B2 (en) 2016-05-31 2022-08-30 Nichia Corporation Light-emitting device with exposed filter particles
US10418533B2 (en) 2016-05-31 2019-09-17 Nichia Corporation Light-emitting device having a light-transmissive member including particles of at least one first filler and method for manufacturing the same
US10741733B2 (en) 2016-12-27 2020-08-11 Nichia Corporation Light emitting device
US10276757B2 (en) 2016-12-27 2019-04-30 Nichia Corporation Light emitting device and method for manufacturing the same
JP2019085327A (en) * 2017-11-02 2019-06-06 三菱マテリアル株式会社 Bonded body and dielectric circuit board
CN111225890A (en) * 2017-11-02 2020-06-02 三菱综合材料株式会社 Joined body and insulated circuit board
EP3705464A4 (en) * 2017-11-02 2021-03-24 Mitsubishi Materials Corporation Joint body and insulating circuit substrate
US10998250B2 (en) 2017-11-02 2021-05-04 Mitsubishi Materials Corporation Bonded body and insulating circuit substrate
WO2019088222A1 (en) * 2017-11-02 2019-05-09 三菱マテリアル株式会社 Joint body and insulating circuit substrate
JP7230432B2 (en) 2017-11-02 2023-03-01 三菱マテリアル株式会社 Joined body and insulating circuit board
WO2021015122A1 (en) 2019-07-23 2021-01-28 日本碍子株式会社 Bonded substrate, and method for manufacturing bonded substrate
EP4006002A4 (en) * 2019-07-23 2023-09-06 NGK Insulators, Ltd. Bonded substrate, and method for manufacturing bonded substrate
WO2021112187A1 (en) 2019-12-03 2021-06-10 日本碍子株式会社 Bonded substrate and method for manufacturing bonded substrate
JP6854980B1 (en) * 2020-01-21 2021-04-07 三菱電機株式会社 Heat dissipation member and heat sink
WO2021149161A1 (en) * 2020-01-21 2021-07-29 三菱電機株式会社 Heat dissipation member and heat sink
WO2022004755A1 (en) * 2020-06-30 2022-01-06 株式会社トクヤマ Silicon nitride sintered substrate

Also Published As

Publication number Publication date
JP3539634B2 (en) 2004-07-07

Similar Documents

Publication Publication Date Title
KR100833962B1 (en) Silicon nitride powder, sintered silicon nitride, sintered silicon nitride substrate, and circuit board and thermoelectric element module comprising such sintered silicon nitride substrate
KR100232660B1 (en) Silicon nitride circuit board
JP3539634B2 (en) Silicon nitride substrate for circuit mounting and circuit substrate
JP5673106B2 (en) Method for manufacturing silicon nitride substrate, silicon nitride substrate, silicon nitride circuit substrate, and semiconductor module
US11964919B2 (en) Method for manufacturing active metal-brazed nitride ceramic substrate with excellent joining strength
WO2006118003A1 (en) Silicon nitride substrate, process for producing the same, and silicon nitride wiring board and semiconductor module using the same
JP2002171037A (en) Ceramic circuit board and method of manufacturing the same
JP5440947B2 (en) Silicon nitride substrate manufacturing method, silicon nitride substrate, and circuit board using the same
JP2698780B2 (en) Silicon nitride circuit board
JP5667045B2 (en) Aluminum nitride substrate, aluminum nitride circuit substrate, and semiconductor device
JP6124103B2 (en) Silicon nitride circuit board and manufacturing method thereof
JP2004231513A (en) Circuit board excellent in high strength/high heat conductivity
JP4556162B2 (en) Silicon nitride-based sintered body, method for producing the same, and circuit board using the same
JP3450570B2 (en) High thermal conductive silicon nitride circuit board
JP5248381B2 (en) Aluminum nitride substrate, method for manufacturing the same, circuit substrate, and semiconductor device
JP2000128654A (en) Silicon nitride composite substrate
JP2772273B2 (en) Silicon nitride circuit board
JP2000297301A (en) Silicon carbide based composite material, its powder, and their manufacture
JPH11100274A (en) Silicon nitride sintered compact, its production and circuit board
JP2007248317A (en) Heating and cooling module
JP2000351673A (en) High heat-conductive silicon nitride-based sintered product and its production
JP4772187B2 (en) AlN sintered body and AlN circuit board using the same
JP5073135B2 (en) Aluminum nitride sintered body, production method and use thereof
JP2002029850A (en) Sintered silicon nitride compact and method for manufacturing the same
JP4761617B2 (en) Aluminum nitride sintered body, method for producing the same, and electronic component using the same

Legal Events

Date Code Title Description
A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20031209

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20031212

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040209

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20040305

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20040318

R150 Certificate of patent or registration of utility model

Ref document number: 3539634

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090402

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100402

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110402

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120402

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120402

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130402

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130402

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140402

Year of fee payment: 10

EXPY Cancellation because of completion of term