JP2002110674A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method

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Publication number
JP2002110674A
JP2002110674A JP2000297657A JP2000297657A JP2002110674A JP 2002110674 A JP2002110674 A JP 2002110674A JP 2000297657 A JP2000297657 A JP 2000297657A JP 2000297657 A JP2000297657 A JP 2000297657A JP 2002110674 A JP2002110674 A JP 2002110674A
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JP
Japan
Prior art keywords
nitrogen
insulating film
film
semiconductor device
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000297657A
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Japanese (ja)
Other versions
JP3474843B2 (en
Inventor
Naoki Yasuda
直樹 安田
Akiko Nara
明子 奈良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Priority to JP2000297657A priority Critical patent/JP3474843B2/en
Publication of JP2002110674A publication Critical patent/JP2002110674A/en
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  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem of a gate leakage current incapable of being lowered sufficiently, because sufficient amount of nitrogen cannot be introduced to a surface side of a film under conditions of preferably holding an interface characteristics and a drive force of a MOS transistor, by suppressing a nitrogen concentration near the interface of an Si substrate in a radical nitride (or plasma nitride) of an SiO2 film. SOLUTION: A method for manufacturing a semiconductor device comprises the steps of introducing more nitrogen than that in prior art to a surface side of a film while suppressing a pile-up of the nitrogen on the interface of an Si substrate (1) to a gate insulating film (2). More particularly, a nitrogen concentration and a film density near the surface of the film (interface side of the electrode) are high, a nitrogen concentration near the interface of the Si substrate is low, and a silicon nitride film having an area containing an intermediate nitrogen concentration between the surface of the film and the interface of the substrate is used as the gate insulating film between both.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置および
その製造方法に関わり、とくにMOS(metal oxidesemicon
ductor)構造のゲート絶縁膜を改良した半導体装置及び
その製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a MOS (metal oxide semiconductor).
The present invention relates to a semiconductor device having an improved gate insulating film having a ductor structure and a method of manufacturing the same.

【0002】[0002]

【従来の技術】シリコン半導体集積回路の微細化にとも
なって、MOS(metal oxide semiconductor)型半導体装置
の寸法が微細化している。最小寸法0.1ミクロン以下のM
OS型半導体装置では、実効膜厚が2nm以下のゲート絶縁
膜が必要となる。ゲート絶縁膜にSiO2を使う場合、膜厚
を2nm以下に薄くすると、ダイレクト・トンネル電流が
急激に増加し、リーク電流の最大仕様値1A/cm2を上回っ
てしまう。ゲート絶縁膜を流れるリーク電流は、MOSト
ランジスタの消費電力を増加させ、信頼性を低下させる
ので、好ましくない。そこで、MOS型半導体素子の性能
を維持しながらリーク電流を減少させるために、シリコ
ン酸化膜よりも誘電率の高い材料をゲート絶縁膜として
使うことが検討されている。そのなかでも、シリコン酸
窒化膜は、従来のMOS型半導体素子の製造工程との整合
性がよいため、近い将来の絶縁膜として有望視されてい
る。
2. Description of the Related Art With the miniaturization of silicon semiconductor integrated circuits, the dimensions of MOS (metal oxide semiconductor) type semiconductor devices have been miniaturized. M with a minimum dimension of 0.1 micron or less
An OS type semiconductor device requires a gate insulating film having an effective film thickness of 2 nm or less. When SiO 2 is used for the gate insulating film, if the film thickness is reduced to 2 nm or less, the direct tunnel current increases sharply, and exceeds the maximum specification value of the leak current of 1 A / cm 2 . Leakage current flowing through the gate insulating film is not preferable because it increases power consumption of the MOS transistor and lowers reliability. Therefore, in order to reduce the leak current while maintaining the performance of the MOS type semiconductor device, use of a material having a higher dielectric constant than the silicon oxide film as the gate insulating film has been studied. Among them, the silicon oxynitride film is considered to be promising as an insulating film in the near future because of its good compatibility with the conventional manufacturing process of a MOS type semiconductor device.

【0003】シリコン酸窒化膜の形成方法としては、従
来、SiO2のNH3窒化/再酸化、N2O酸窒化、NO酸窒化が用
いられてきた。とくに、薄膜ゲート絶縁膜では、水素フ
リーで均一に高濃度の窒素を導入できるという理由で、
NO酸窒化が主に使われている。しかし、NO酸窒化ではSi
基板側の界面近傍に窒素が入るので、MOSトランジスタ
の移動度が低下し、駆動力が低下するという問題があ
る。すなわち、NO酸窒化では、リーク電流低減の目的で
導入する窒素の量を増やせば増やすほど、MOSトランジ
スタの性能が悪くなる。
Conventionally, as a method of forming a silicon oxynitride film, NH 3 nitridation / reoxidation of SiO 2 , N 2 O oxynitridation, and NO oxynitridation have been used. In particular, in the thin gate insulating film, it is possible to introduce high-concentration nitrogen uniformly without hydrogen.
NO oxynitridation is mainly used. However, NO oxynitriding
Since nitrogen enters near the interface on the substrate side, there is a problem that the mobility of the MOS transistor is reduced and the driving force is reduced. That is, in NO oxynitriding, the performance of a MOS transistor becomes worse as the amount of nitrogen introduced for the purpose of reducing leakage current is increased.

【0004】そこで、近年、SiO2膜を形成した後にラジ
カル窒化(またはプラズマ窒化)を行ってSiO2膜の表面側
に窒素を導入する方法が提案されている(M. Togo, K. W
atanabe, T. Yamamoto, N. Ikarashi, K. Shiba, T. Ta
tsumi, H. Ono, and T. Mogami, 2000 Symp. on VLSI T
ech. p.116; S. V. Hattangady, R. Kraft, D. T.Grid
er, M. A. Douglas, G. A. Brown, P. A. Tiner, J. W.
Kuehne, P. E. Nicollian, and M. F. Pas, IEDM Tec
h. Dig. 96-495 )。この方法では、シリコン基板界面付
近の窒素濃度を低く抑えることができるので、MOSトラ
ンジスタの移動度の劣化を防ぎ、高い駆動力を得ること
ができる。また、最近の我々の検討によると、SiO2膜の
ラジカル窒化(またはプラズマ窒化)では、窒素・酸素の
組成比から予測される酸窒化膜の一般的な誘電率よりも
大きな誘電率が得られることがわかった。これは、SiO2
膜のラジカル窒化(またはプラズマ窒化)では、熱平衡で
ない状態で膜中に窒素を導入するため、膜密度が増加す
ることに起因すると考えられる。
[0004] In recent years, a method of introducing nitrogen in the surface side of the SiO 2 film by performing a radical nitriding (or plasma nitridation) after forming the SiO 2 film has been proposed (M. Togo, K. W
atanabe, T. Yamamoto, N. Ikarashi, K. Shiba, T. Ta
tsumi, H. Ono, and T. Mogami, 2000 Symp. on VLSI T
ech.p.116; SV Hattangady, R. Kraft, DTGrid
er, MA Douglas, GA Brown, PA Tiner, JW
Kuehne, PE Nicollian, and MF Pas, IEDM Tec
h. Dig. 96-495). In this method, since the nitrogen concentration near the silicon substrate interface can be kept low, deterioration of the mobility of the MOS transistor can be prevented, and high driving force can be obtained. According to our recent studies, radical nitridation (or plasma nitridation) of SiO 2 films can provide a higher dielectric constant than the general dielectric constant of oxynitride films predicted from the composition ratio of nitrogen and oxygen. I understand. This is SiO 2
It is considered that radical nitridation (or plasma nitridation) of a film introduces nitrogen into the film in a state where thermal equilibrium is not attained, so that the film density is increased.

【0005】しかし、一方では、ラジカル窒化(または
プラズマ窒化)では次の2つの問題点があることも最近
の我々の検討で明らかになってきた。第1の問題点は、
SiO2膜の表面付近に導入できる窒素の濃度に飽和値が存
在することである。第2の問題点は、表面付近の窒素濃
度が飽和する前に、Si基板界面付近の窒素濃度が増加し
てしまうことである(図15を参照)。なお、図15にお
いて、ラジカル窒化の条件は、温度700℃、圧力5hP
a、マイクロ波2.45GHz、200Wである。また、窒素濃度
はSIMSで評価した。したがって、SiO2膜のラジカル窒化
(またはプラズマ窒化)では、MOSトランジスタの駆動
力を一定に保ちながらゲート・リーク電流を低減するの
に限界がある。
However, on the other hand, it has become clear from recent studies that radical nitriding (or plasma nitriding) has the following two problems. The first problem is
This means that there is a saturation value in the concentration of nitrogen that can be introduced near the surface of the SiO 2 film. The second problem is that the nitrogen concentration near the Si substrate interface increases before the nitrogen concentration near the surface is saturated (see FIG. 15). In FIG. 15, the conditions of the radical nitriding are as follows: temperature 700 ° C., pressure 5 hP
a, microwave 2.45 GHz, 200 W. The nitrogen concentration was evaluated by SIMS. Therefore, radical nitridation of SiO 2 film
In (or plasma nitridation), there is a limit in reducing the gate leakage current while keeping the driving force of the MOS transistor constant.

【0006】[0006]

【発明が解決しようとする課題】上記のように、SiO2
のラジカル窒化(またはプラズマ窒化)では、Si基板界面
付近の窒素濃度を抑制してMOSトランジスタの界面特性
・駆動力を良好に保つという条件の下では、膜表面側に
十分な量の窒素を導入できないために、ゲート・リーク
電流を十分に下げられないという問題点があった。
As described above, in radical nitridation (or plasma nitridation) of an SiO 2 film, the nitrogen concentration near the Si substrate interface is suppressed to maintain good interface characteristics and driving force of the MOS transistor. Under such conditions, there is a problem that a sufficient amount of nitrogen cannot be introduced into the film surface side, so that the gate leak current cannot be sufficiently reduced.

【0007】本発明はこの問題を解決するためになされ
たものであり、その目的とするところは、窒素のSi基板
界面へのパイルアップを抑制しつつ、膜表面側に従来よ
りも多くの窒素を導入したゲート絶縁膜を実現すること
である。
The present invention has been made in order to solve this problem. It is an object of the present invention to suppress the pile-up of nitrogen to the Si substrate interface and to increase the amount of nitrogen on the film surface side as compared with the prior art. Is to realize a gate insulating film into which is introduced.

【0008】[0008]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明に係る半導体装置は、膜表面(電極界面
側)付近の窒素濃度および膜密度が高く、Si基板界面付
近の窒素濃度が低く、また、両者の間に、膜表面とSi基
板界面との中間の窒素濃度を持つ領域が存在するシリコ
ン酸窒化膜をゲート絶縁膜として使用することを特徴と
する。具体的には、図1のように、絶縁膜層(2)の組
成を(SiO2)x(Si3N4)1-xと表した場合のx値について、シ
リコン基板層(1)側界面から0.628nm以内の距離の平
均組成x1が0.95≦x1≦1.00で表され、また、電極側界面
から0.628nm以内の距離の平均組成をx3と表し、前記絶
縁膜層の上記2つの距離範囲を除いた領域の平均組成を
x2と表したときに0.5≦x3 < x2 ≦0.95であり、さら
に、ε(x)=3.9*x/(3-2x)+7.8*(1-x/(3-2x))と定義した
ときに、前記絶縁膜層の誘電率について、電極側界面か
ら0.628nm以内の平均誘電率ε3はε3/ε(x3) > 1を満た
し、かつ、シリコン基板層側界面から0.628nm以内の平
均誘電率をε1、前記絶縁膜層の上記2つの距離範囲を除
いた領域の平均誘電率をε2と表したとき、ε3/ε(x3)
2/ε(x2) およびε3/ε(x3) >ε1/ε(x1)を満たす。
In order to achieve the above object, a semiconductor device according to the present invention has a high nitrogen concentration and a high film density near the film surface (electrode interface side) and a high nitrogen concentration near the Si substrate interface. And a silicon oxynitride film in which a region having a nitrogen concentration between the film surface and the interface of the Si substrate exists between the two and is used as a gate insulating film. Specifically, as shown in FIG. 1, when the composition of the insulating film layer (2) is expressed as (SiO 2 ) x (Si 3 N 4 ) 1 -x, the x value of the silicon substrate layer (1) side average composition x 1 distance within 0.628nm from the interface is represented by 0.95 ≦ x 1 ≦ 1.00, also expressed from the electrode side interface of the average composition of the distances within 0.628nm and x 3, the two of the insulating film layer The average composition of the area excluding two distance ranges
a 0.5 ≦ x 3 <x 2 ≦ 0.95 when expressed as x 2, further, epsilon and (x) = 3.9 * x / (3-2x) + 7.8 * (1-x / (3-2x)) when defined, the dielectric constant of the insulating film layer, the average dielectric constant epsilon 3 within 0.628nm from the electrode side interface ε 3 / ε (x 3) > 1 was filled, and a silicon substrate layer side interface 0.628 When the average dielectric constant within nm is ε 1 and the average dielectric constant of the insulating film layer excluding the two distance ranges is ε 2 , ε 3 / ε (x 3 )
> ε 2 / ε (x 2 ) and ε 3 / ε (x 3 )> ε 1 / ε (x 1 ).

【0009】また、本発明に係る半導体装置の製造方法
は、あらかじめ膜中に窒素を導入したシリコン酸窒化膜
に対して活性窒素による窒化を行うことを特徴とする。
活性窒素による窒化は、制御性よく多くの窒素を膜表面
近くに導入できるという点で、電磁波で励起されたラジ
カル窒素(プラズマ窒素も可)を用いることが望ましい。
さらに、活性窒素による窒化を行う前のシリコン酸窒化
膜は、MOSトランジスタの駆動力劣化を生じない程度に
界面近くの窒素濃度が低く、かつ、活性窒素導入時の窒
素拡散を抑制できる程度に平均窒素濃度が高いという条
件を満たす必要から、シリコン基板の酸窒化を行った後
に、さらに窒化もしくは再酸化を行うことで膜中央付近
に比較的多くの窒素を導入することが望ましい。
Further, a method of manufacturing a semiconductor device according to the present invention is characterized in that a silicon oxynitride film in which nitrogen has been introduced in advance is nitrided with active nitrogen.
In the nitridation using active nitrogen, it is desirable to use radical nitrogen excited by electromagnetic waves (plasma nitrogen is also possible), since a large amount of nitrogen can be introduced near the film surface with good controllability.
Furthermore, the silicon oxynitride film before nitriding with active nitrogen has a low nitrogen concentration near the interface to the extent that the driving force of the MOS transistor does not deteriorate, and has an average level that can suppress nitrogen diffusion when introducing active nitrogen. Since it is necessary to satisfy the condition that the nitrogen concentration is high, it is desirable to introduce a relatively large amount of nitrogen near the center of the film by performing nitridation or reoxidation after oxynitriding the silicon substrate.

【0010】本発明によれば、シリコン酸窒化膜に対し
て活性窒素による窒化を行うと、すでに膜中に存在する
窒素が活性窒素の拡散を抑制するので、SiO2膜に対して
活性窒素による窒化を行うのに比べて、Si基板界面側へ
の窒素のパイルアップを少なくすることができる(図
2、図3参照)。また、界面側への窒素の拡散の流束を
少なくすることによって、膜表面近くの飽和窒素量を大
きくすることができる(図4参照)。したがって、界面付
近への窒素の導入量がMOSトランジスタの駆動力維持の
観点から制限される条件の下で、膜表面に従来よりも多
くの窒素を導入できる。そのことによって、従来よりも
膜の誘電率を上げることができるので、等しい実効膜厚
のゲート絶縁膜で、ゲート・リーク電流を従来よりも低
減することが可能になる。さらに、活性窒素による窒化
で導入した窒素はゲート絶縁膜の密度を高くする効果も
あるので、膜表面側に従来より多くの窒素を導入するこ
とで、膜密度増大の効果もそれだけ多く得られることに
なる。このことによっても、さらに誘電率を高くするこ
とができる。以上のことから、本発明のゲート絶縁膜を
用いることで、誘電率が高くリーク電流を抑制でき、か
つ界面特性に優れた半導体装置(MOSトランジスタ)を
実現できる。
According to the present invention, when the nitridation by active nitrogen to the silicon oxynitride film, since the nitrogen already present in the membrane suppresses the diffusion of the active nitrogen, with an active nitrogen against SiO 2 film Compared with performing nitriding, pileup of nitrogen to the interface side of the Si substrate can be reduced (see FIGS. 2 and 3). Also, by reducing the diffusion flux of nitrogen to the interface side, the amount of saturated nitrogen near the film surface can be increased (see FIG. 4). Therefore, under the condition that the amount of nitrogen introduced near the interface is limited from the viewpoint of maintaining the driving force of the MOS transistor, more nitrogen can be introduced into the film surface than before. As a result, the dielectric constant of the film can be increased as compared with the conventional case, so that the gate leakage current can be reduced with the gate insulating film having the same effective film thickness as compared with the conventional case. Furthermore, since nitrogen introduced by nitridation with active nitrogen also has the effect of increasing the density of the gate insulating film, the effect of increasing the film density can be obtained by introducing more nitrogen on the film surface than before. become. This can further increase the dielectric constant. As described above, by using the gate insulating film of the present invention, a semiconductor device (MOS transistor) having a high dielectric constant, capable of suppressing a leakage current, and having excellent interface characteristics can be realized.

【0011】[0011]

【発明の実施の形態】次に、図面を参照しながら本発明
の実施の形態(以下、実施例という)を説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment (hereinafter, referred to as an embodiment) of the present invention will be described with reference to the drawings.

【0012】最初に、本発明の半導体装置のゲート絶縁
膜にラジカル窒化を施すための装置を説明する。図4
は、ラジカル窒化装置の断面図である。図4に示すよう
に、このラジカル窒化装置は、石英からなる筐体11内
に、熱源であるランプ12が設置されている。ランプ12の
間にはウェハ13を格納するための石英管14が挿入されて
いる。ウェハ13は石英管14内で石英トレイ15に搭載され
ている。石英管14の一方はガス導入口15につながってい
る。石英管14の他方はドア16により開閉可能となってい
る。プロセス中はドア16が閉まっており、導入されたガ
スはガス排出口18から排出される。この装置内のウェハ
の温度測定は、パイロメータ19によって行われる。ま
た、17は導入ガスをラジカル化するためのマイクロ波放
電電極である。この装置では、ガス導入口に窒素ガスを
導入してマイクロ波放電を施すことによってラジカル窒
化を行うことができるが、それ以外に、ガス導入口に酸
素ガスを導入してマイクロ波放電を行うことでラジカル
酸化を行うこともできる。さらに、ガス導入口に一酸化
窒素(NO)またはアンモニア(NH3)を導入し、マイクロ波
放電を行わない場合には、それぞれNO酸窒化、NH3窒化
を行うことができる。
First, an apparatus for subjecting a gate insulating film of a semiconductor device of the present invention to radical nitriding will be described. FIG.
1 is a sectional view of a radical nitriding apparatus. As shown in FIG. 4, in this radical nitriding apparatus, a lamp 12 as a heat source is installed in a housing 11 made of quartz. A quartz tube 14 for storing a wafer 13 is inserted between the lamps 12. The wafer 13 is mounted on a quartz tray 15 in a quartz tube 14. One end of the quartz tube 14 is connected to a gas inlet 15. The other side of the quartz tube 14 can be opened and closed by a door 16. During the process, the door 16 is closed, and the introduced gas is exhausted from the gas outlet 18. The temperature of the wafer in this apparatus is measured by a pyrometer 19. Reference numeral 17 denotes a microwave discharge electrode for radicalizing the introduced gas. In this device, radical nitriding can be performed by introducing a nitrogen gas into the gas inlet and performing a microwave discharge. In addition, it is necessary to introduce an oxygen gas into the gas inlet and perform a microwave discharge. To perform radical oxidation. Furthermore, when nitrogen monoxide (NO) or ammonia (NH 3 ) is introduced into the gas inlet and microwave discharge is not performed, NO oxynitridation and NH 3 nitridation can be performed, respectively.

【0013】次に、図4のラジカル窒化装置を用いた本
発明の半導体装置の製造方法を詳細に説明する。 (第1の実施例)まず、図5に示すように、単結晶のp型シ
リコン基板21の表面に、素子分離の役割を果たす深い溝
を形成し、CVD法によりシリコン酸化膜で埋め込み、素
子分離領域22を形成する。次に、図6に示すように、ゲ
ート絶縁膜24を形成する。(ゲート絶縁膜の詳しい形成
方法は、後でまとめて述べる。) 次に、図7に示すように、ゲート絶縁膜の上部24にポリ
シリコン膜25をCVD法によって形成する。次に、図8に
示すように、ポリシリコン25上に、フォトレジストパタ
ーン26を形成する。次に、図9に示すように、フォトレ
ジストパターン26をマスクとして、ポリシリコン膜25を
反応性イオンエッチングし、第1のゲート電極25を形成
する。次に、砒素を、例えば加速電圧40keV、ドーズ量2
x1015cm-2の条件でイオン注入して、高不純物濃度のn+
型ゲート電極25、n+型ソース領域27、n+型ドレイン領域
28を同時に形成する。
Next, a method for manufacturing a semiconductor device of the present invention using the radical nitriding apparatus shown in FIG. 4 will be described in detail. (First Embodiment) First, as shown in FIG. 5, a deep groove serving as an element isolation is formed on the surface of a single-crystal p-type silicon substrate 21 and buried with a silicon oxide film by a CVD method. An isolation region 22 is formed. Next, as shown in FIG. 6, a gate insulating film 24 is formed. (A detailed method of forming the gate insulating film will be described later.) Next, as shown in FIG. 7, a polysilicon film 25 is formed on the upper portion 24 of the gate insulating film by a CVD method. Next, a photoresist pattern 26 is formed on the polysilicon 25 as shown in FIG. Next, as shown in FIG. 9, the polysilicon film 25 is subjected to reactive ion etching using the photoresist pattern 26 as a mask to form a first gate electrode 25. Next, arsenic is applied, for example, at an acceleration voltage of 40 keV and a dose of 2
Ion implantation under the condition of x10 15 cm -2 and n +
Gate electrode 25, n + source region 27, n + drain region
28 are formed simultaneously.

【0014】次に、図10に示すように、全面に300nmの
シリコン酸化膜をCVD法により堆積し、層間絶縁膜29を
形成する。この後、層間絶縁膜29上にコンタクトホール
形成用のフォトレジストパターン(不図示)を形成し、こ
れをマスクとして反応性イオンエッチング法により層間
絶縁膜29をエッチングして、コンタクトホールを開口す
る。最後に、全面にAl膜をスパッタ法により形成した
後、これをパターニングして、ソース電極210、ドレイ
ン電極211、および第2のゲート電極212を形成してn型MO
Sトランジスタが完成する。なお、本実施例では、n型MO
Sトランジスタの製造工程を示したが、p型MOSトランジ
スタでは導電型がn型とp型で入れ替わる点が異なるだけ
であり、基本的な製造工程はまったく同じである。
Next, as shown in FIG. 10, a 300 nm silicon oxide film is deposited on the entire surface by the CVD method, and an interlayer insulating film 29 is formed. Thereafter, a photoresist pattern (not shown) for forming a contact hole is formed on the interlayer insulating film 29, and the interlayer insulating film 29 is etched by a reactive ion etching method using the photoresist pattern as a mask to open a contact hole. Finally, after an Al film is formed on the entire surface by a sputtering method, this is patterned, and a source electrode 210, a drain electrode 211, and a second gate electrode 212 are formed to form an n-type MO.
The S transistor is completed. In this embodiment, the n-type MO
Although the manufacturing process of the S transistor has been described, the basic manufacturing process is exactly the same, except that the conductivity type of the p-type MOS transistor is switched between n-type and p-type.

【0015】次に、図11を用いて、ゲート絶縁膜24の
形成工程の詳細を説明する。ウェハ13をRCA洗浄した
後、図4に示すラジカル窒化装置の筐体11中へ搬送す
る。ウェハ13は石英トレイ15上に搭載されている。ラジ
カル窒化装置のガス導入口15から100hPaのNOガス
を導入し、ランプ12を点灯してウェハ13の温度を800℃
とし、60sの加熱を行うことで、膜厚1.5nmのシリコン酸
窒化膜を形成した。次に、ランプ12を消灯し、NOガスの
供給を止めた後、ラジカル窒化装置中へNH3とN2を1:50
の流量比で導入した。このときの圧力(全圧)は5hPa
であった。再びランプ12を点灯し、ウェハ13の温度を80
0℃に調整し、30sの加熱を行うことでウェハ13表面の酸
窒化膜中へさらに窒素を導入した。このとき、NO酸窒化
で先に膜中に導入されていた窒素の影響で、NH3窒化で
膜中に取り込まれる窒素はSi基板の界面近傍以外の領域
に多く取り込まれる。続けて、ラジカル窒化装置中へガ
ス導入口15から窒素ガスを導入しマイクロ波放電を行う
ことでウェハ13の表面にラジカル窒素を導入し、ランプ
12を点灯して850℃、60sの加熱を行った。このときのマ
イクロ波放電は、周波数2.45 GHz, 出力100 Wで行っ
た。
Next, the process of forming the gate insulating film 24 will be described in detail with reference to FIG. After the RCA cleaning of the wafer 13, the wafer 13 is transferred into the case 11 of the radical nitriding apparatus shown in FIG. The wafer 13 is mounted on a quartz tray 15. 100 hPa NO gas was introduced from the gas inlet 15 of the radical nitriding apparatus, and the lamp 12 was turned on to raise the temperature of the wafer 13 to 800 ° C.
By heating for 60 seconds, a silicon oxynitride film having a thickness of 1.5 nm was formed. Next, after turning off the lamp 12 and stopping the supply of NO gas, NH 3 and N 2 were introduced into the radical nitriding apparatus at a ratio of 1:50.
At a flow ratio of. The pressure (total pressure) at this time is 5 hPa
Met. The lamp 12 is turned on again, and the temperature of the wafer 13 is set to 80
By adjusting the temperature to 0 ° C. and heating for 30 s, nitrogen was further introduced into the oxynitride film on the surface of the wafer 13. At this time, due to the influence of nitrogen previously introduced into the film by NO oxynitriding, a large amount of nitrogen taken into the film by NH 3 nitriding is taken into a region other than the vicinity of the interface of the Si substrate. Subsequently, nitrogen gas was introduced into the radical nitriding device from the gas inlet 15 and microwave discharge was performed to introduce radical nitrogen to the surface of the wafer 13 and the
12 was turned on, and heating was performed at 850 ° C. for 60 seconds. The microwave discharge at this time was performed at a frequency of 2.45 GHz and an output of 100 W.

【0016】なお、上記のゲート絶縁膜の形成工程にお
いて、ウェハ13表面にNOガスで酸窒化膜を形成する代わ
りに、SiO2膜を形成した後にNOまたはN2Oガスを流して
酸窒化膜を形成してもよい。さらに、ラジカル窒化の際
の電磁波励起源としては、マイクロ波の代わりに紫外線
を用いてもよい。
In the step of forming the gate insulating film, instead of forming an oxynitride film on the surface of the wafer 13 with a NO gas, an oxynitride film is formed by flowing a NO or N 2 O gas after forming an SiO 2 film. May be formed. Further, as an electromagnetic wave excitation source at the time of radical nitriding, ultraviolet rays may be used instead of microwaves.

【0017】本実施例で形成された絶縁膜中の窒素濃度
と誘電率を、希HFによるウェットエッチング、断面TEM
(Transmission Electron Microscopy)、MEIS (Medium E
nergy Ion Scattering)、C-V評価法を組み合わせて評価
したところ、全体の物理膜厚(Tphys)が1.88nm、Si基板
界面から0.628nm以内の組成x1=0.96、絶縁膜の表面側か
ら0.628nm以内の組成x3=0.60、それ以外の部分の組成x2
=0.70が得られた。さらに、膜表面側から0.628nm以内で
は、ラジカル窒化に起因する膜密度増加に伴う50%の誘
電率の増加が認められた(ε3=1.5*ε(x3))。また、膜の
中央部では30%(ε2=1.3*ε(x2))、Si基板界面近くの0.6
28nm内でも15%の誘電率の増加(ε1=1.15*ε(x1))が認め
られた。これらの誘電率の増加率は、測定で得られた誘
電率(ε123)と組成(x1, x2, x3)、および公知の
文献(X. Guo and T. P. Ma, IEEE Electron Device Let
t. 19, 207 (1998))に記載された実験データに基づい
て、我々が見出した一般的な酸窒化膜の誘電率εと組成
比xとの関係 ε(x)=3.9*x/(3-2x)+7.8*(1-x/(3-2x))を用いて評価し
た。ラジカル窒化における膜密度の増加を考慮し、この
酸窒化膜の実効膜厚を算出すると Teff=0.628/(ε3/3.9) + 0.624/(ε2/3.9) + 0.628/(ε
1/3.9)=1.07nm となる。ここで算出された実効膜厚は、希HFによるエッ
チバック前の膜のC-V特性から得られるTeff(ゲート電極
およびSi基板の容量の寄与は補正済み)と一致してい
る。物理膜厚Tphys=1.88nm、および実効膜厚Teff=1.07n
mを用いると、この酸窒化膜全体としての平均誘電率は
ε=3.9*Tphys/Teff=6.85となる。一方、この膜の平均組
成はx=0.75である。図13には、この酸窒化膜の平均誘電
率と平均組成の関係を黒丸でプロットした。また、図13
の実線はε(x)=3.9*x/(3-2x)+7.8*(1-x/(3-2x))で表さ
れる従来の酸窒化膜の誘電率と組成の関係である。図1
2に示すように、本実施例の酸窒化膜は、組成比xの等
しい従来の酸窒化膜と比較して誘電率が大きくなってい
る。本実施例の酸窒化膜は組成比x=0.75であるが、従来
の酸窒化膜のx=0.48に相当する誘電率を得ている。一般
に、酸窒化膜はx値が小さいほど誘電率が高くなるが、
同時に窒素に関わる欠陥に起因したリーク電流が流れや
すくなることが知られている。本実施例では、組成比x
値を大きく保って欠陥起因のリーク電流を抑制し、しか
も誘電率の大きい膜を実現することができた。本実施例
のゲート絶縁膜でMOSトランジスタを形成し、酸化膜換
算電界5MV/cmにおけるゲート・リーク電流を評価したと
ころ、実効膜厚の等しいSiO2膜に比べて約3桁のリーク
電流の低減を実現できることがわかった。
The nitrogen concentration and dielectric constant in the insulating film formed in this embodiment were measured by wet etching with dilute HF and cross-sectional TEM.
(Transmission Electron Microscopy), MEIS (Medium E
Nergy Ion Scattering) and CV evaluation method combined, the overall physical thickness (T phys ) is 1.88 nm, composition x 1 = 0.96 within 0.628 nm from the Si substrate interface, 0.628 nm from the insulating film surface side Within composition x 3 = 0.60, other composition x 2
= 0.70 was obtained. Furthermore, within 0.628 nm from the film surface side, a 50% increase in dielectric constant was observed with the increase in film density due to radical nitridation (ε 3 = 1.5 * ε (x 3 )). In the center of the film, 30% (ε 2 = 1.3 * ε (x 2 )), 0.6% near the Si substrate interface
Even within 28 nm, a 15% increase in dielectric constant (ε 1 = 1.15 * ε (x 1 )) was observed. The rate of increase of these dielectric constants is determined by the dielectric constant (ε 1 , ε 2 , ε 3 ) and composition (x 1 , x 2 , x 3 ) obtained in the measurement, and the known literature (X. Guo and TP Ma , IEEE Electron Device Let
t. 19, 207 (1998)), we found the relationship between the dielectric constant ε of a general oxynitride film and the composition ratio x ε (x) = 3.9 * x / ( Evaluation was performed using (3-2x) + 7.8 * (1-x / (3-2x)). T eff = 0.628 / (ε 3 /3.9) + 0.624 / (ε 2 /3.9) + 0.628 / (ε
1 / 3.9) = 1.07 nm. The calculated effective film thickness is equal to T eff (the contribution of the capacitance of the gate electrode and the Si substrate has been corrected) obtained from the CV characteristics of the film before the etch back by the diluted HF. Physical thickness T phys = 1.88 nm and effective thickness T eff = 1.07 n
When m is used, the average dielectric constant of the entire oxynitride film is ε = 3.9 * T phys / T eff = 6.85. On the other hand, the average composition of this film is x = 0.75. FIG. 13 plots the relationship between the average dielectric constant and the average composition of this oxynitride film with black circles. FIG.
Is the relationship between the dielectric constant and the composition of the conventional oxynitride film expressed by ε (x) = 3.9 * x / (3-2x) + 7.8 * (1-x / (3-2x)). Figure 1
As shown in FIG. 2, the dielectric constant of the oxynitride film of this example is higher than that of a conventional oxynitride film having the same composition ratio x. Although the composition ratio x of the oxynitride film of this embodiment is 0.75, a dielectric constant equivalent to x = 0.48 of the conventional oxynitride film is obtained. In general, the dielectric constant of an oxynitride film increases as the x value decreases.
At the same time, it is known that leakage current caused by defects related to nitrogen easily flows. In the present embodiment, the composition ratio x
By keeping the value large, a leak current due to defects was suppressed, and a film having a large dielectric constant was realized. When a MOS transistor was formed with the gate insulating film of this example and the gate leakage current at an oxide film equivalent electric field of 5 MV / cm was evaluated, the leakage current was reduced by about three orders of magnitude compared to the SiO 2 film having the same effective film thickness. It turned out that we can realize.

【0018】本実施例では、ラジカル窒化を施す前のゲ
ート絶縁膜中に窒素を含んでいるため、ラジカル窒化時
に導入される窒素のSi基板界面への拡散を抑制でき、そ
の結果として膜の表面側に従来よりも多量の窒素を導入
することができた。それに伴って、ラジカル窒化に起因
する膜密度の増大効果も従来例よりも多く享受すること
ができる。本発明で良好な電気特性を持つゲート酸窒化
膜を実現できたのは、これらの理由(窒素濃度の増加、
および膜密度の増大)によると考えられる。
In this embodiment, since nitrogen is contained in the gate insulating film before radical nitriding is performed, diffusion of nitrogen introduced at the time of radical nitriding to the interface of the Si substrate can be suppressed. A larger amount of nitrogen could be introduced to the side than before. Accordingly, the effect of increasing the film density due to radical nitridation can be enjoyed more than in the conventional example. It is for these reasons (increase in nitrogen concentration,
And an increase in film density).

【0019】最後に、本実施例おける酸窒化膜の膜厚方
向の各領域における窒素濃度の評価結果とその物理的意
味について述べる。酸窒化膜中では、窒素の面密度と組
成比xの関係は、[N] = 6E16 * (2.9-0.7x)/(140-80x)*
(4-4x)*Tphysで与えられる。ここで、Tphysはnmの単位
で与えるものとする。
Finally, the evaluation result of the nitrogen concentration in each region in the thickness direction of the oxynitride film in this embodiment and its physical meaning will be described. In the oxynitride film, the relationship between the areal density of nitrogen and the composition ratio x is [N] = 6E16 * (2.9-0.7x) / (140-80x) *
(4-4x) * T given in phys . Here, T phys is given in units of nm.

【0020】まず、膜表面付近に導入された窒素につい
て述べる。本実施例の酸窒化膜では、膜表面(あるいは
ゲート電極側界面)から0.628nm以内で組成比x3=0.60と
なっているが、上記の式を用いて窒素の面密度に換算す
ると1.6E15cm-2(2.4ML、1ML(mono-layer)=6.8E14cm-2)
になる。ラジカル窒化では、膜表面の0.6-0.7nmの範囲
に窒素が導入されることが知られているので、膜表面の
0.628nmの窒素濃度を評価することにより、ラジカル窒
化で導入された窒素濃度を推定できる。(註: 断面TEM
ではSi(111)面間距離0.314nmの2倍という距離が評価し
やすい便宜上、0.628nmという距離範囲を採用した)。我
々の実験データでは、SiO2膜に対するラジカル窒化では
SiO2膜表面に導入できる窒素の量は1ML以下であること
が見出された。また、SiO2膜に対してイオン化した窒素
が加速・衝突するプラズマ窒化(そのため、ラジカル窒
化ほど好んで用いられない)においてさえ、SiO2膜表面
に導入できる窒素の量は高々1E15cm-2(1.5ML)であるこ
とが知られている(S. V. Hattangady, R. Kraft, D. T.
Grieder, M. A. Douglas, G. A. Brown, P. A. Tiner,
J. W. Kuehne, P. E. Nicollian, and M. F. Pas, IEDM
Tech. Dig. 96-495 (1996))。本実施例では、酸窒化膜
に対してダメージを与えないラジカル窒化法を用いて、
膜表面で従来よりも高い2.4MLの窒素の導入を実現する
ことができた。これが実現できた理由は、先にも述べた
ように、ラジカル窒化を施す前の絶縁膜がシリコン酸窒
化膜であるため、ラジカル窒化時に導入される窒素のSi
基板界面への拡散を抑制できるからである。
First, nitrogen introduced near the film surface will be described. In the oxynitride film of this embodiment, the composition ratio x 3 = 0.60 within 0.628 nm from the film surface (or the interface on the gate electrode side) is 1.6E15 cm when converted to the surface density of nitrogen using the above equation. -2 (2.4ML, 1ML (mono-layer) = 6.8E14cm -2 )
become. In radical nitridation, it is known that nitrogen is introduced in the range of 0.6-0.7 nm on the film surface.
By evaluating the nitrogen concentration at 0.628 nm, the nitrogen concentration introduced by radical nitriding can be estimated. (Note: Cross-sectional TEM
For convenience, a distance range of 0.628 nm was adopted for convenience of evaluating a distance twice the Si (111) plane distance of 0.314 nm). According to our experimental data, radical nitridation of SiO 2 film
It has been found that the amount of nitrogen that can be introduced to the surface of the SiO 2 film is 1 ML or less. Also, even in plasma nitridation in which ionized nitrogen is accelerated and collides with the SiO 2 film (and is therefore not used as favorably as radical nitriding), the amount of nitrogen that can be introduced to the SiO 2 film surface is at most 1E15 cm -2 (1.5 ML) (SV Hattangady, R. Kraft, DT
Grieder, MA Douglas, GA Brown, PA Tiner,
JW Kuehne, PE Nicollian, and MF Pas, IEDM
Tech. Dig. 96-495 (1996)). In this embodiment, a radical nitriding method that does not damage the oxynitride film is used.
The introduction of 2.4 ML of nitrogen higher than before was realized on the membrane surface. This was achieved because, as described above, the insulating film before radical nitridation is a silicon oxynitride film, so that the nitrogen
This is because diffusion to the substrate interface can be suppressed.

【0021】次に、界面付近に導入された窒素について
述べる。公知の文献(G. Lucovsky,Y. Wu, H. Niimi, V.
Misra and J. C. Phillips, Appl. Phys. Lett. 74, 2
005 (1999))によれば、Si基板界面に0.6nmのSiO2膜が存
在することで界面特性が飛躍的に向上する。本発明の請
求項および本実施例で界面から0.628nmの距離範囲で界
面窒素濃度を定義したのは、この実験結果を踏まえたも
のである。本実施例の酸窒化膜は、Si基板側界面から0.
628nm以内で平均組成x1=0.96を持っている。これは、こ
の範囲内の窒素面密度が2.1E14cm-2であることに相当す
る。この窒素面密度では、n型MOSトランジスタの電流駆
動力は、ゲート絶縁膜にSiO2を用いた場合と比べて5%
以内の低下に収めることができる。したがって、本実施
例の界面窒素濃度では集積回路の設計上とくに問題は起
こらない。
Next, nitrogen introduced near the interface will be described. Known literature (G. Lucovsky, Y.Wu, H. Niimi, V.
Misra and JC Phillips, Appl. Phys. Lett. 74, 2
005 (1999)), the presence of a 0.6 nm SiO 2 film at the Si substrate interface dramatically improves the interface characteristics. The reason for defining the interfacial nitrogen concentration in the range of 0.628 nm from the interface in the claims of the present invention and the present embodiment is based on the results of this experiment. The oxynitride film of the present example is 0.
Have an average composition x 1 = 0.96 in less than 628nm. This corresponds to a nitrogen areal density within this range of 2.1E14 cm -2 . At this nitrogen areal density, the current driving force of the n-type MOS transistor is 5% as compared with the case where SiO 2 is used for the gate insulating film.
Can be reduced to within. Therefore, no particular problem occurs in the design of the integrated circuit at the interface nitrogen concentration of this embodiment.

【0022】次に、膜の中央部に導入された窒素につい
て述べる。本実施例では膜表面およびSi基板界面からそ
れぞれ0.628nmを除いた領域の平均膜組成はx2=0.70であ
った。これは、この領域の窒素面密度が1.3E15cm-2であ
ることに相当し、そのほとんどがラジカル窒化工程の前
に膜中に導入されていた窒素である。この窒素濃度は、
ラジカル窒化で膜中に導入された窒素の界面への拡散を
抑制するのに十分である。酸窒化膜中でボロンの拡散に
よる閾値電圧のシフトを抑制するために3.2E14cm-2の窒
素濃度が必要であることが知られている(M. Fujiwara,
M. Takayanagi, and Y. Toyoshima, 1999 Symp. VLSI T
ech. Dig. P.121)が、窒素はボロンと同じ周期に属する
元素であるので、ラジカル窒化で膜中に導入される窒素
の拡散に関しても、同程度の窒素濃度で抑制できるため
である。 (第2の実施例)本発明の第2の実施例に係わるMOSトラン
ジスタの素子構造は、第1の実施例の場合と同様なの
で、詳細な説明は省略する。本実施例では、ゲート絶縁
膜の製造工程の部分が第1の実施例とは異なる。
Next, the nitrogen introduced into the center of the film will be described. In this example, the average film composition in a region excluding 0.628 nm from the film surface and the Si substrate interface was x 2 = 0.70. This corresponds to a nitrogen areal density of 1.3E15 cm -2 in this region, and most of the nitrogen is introduced into the film before the radical nitriding step. This nitrogen concentration is
It is enough to suppress diffusion of nitrogen introduced into the film by radical nitridation into the interface. It is known that a nitrogen concentration of 3.2E14 cm -2 is required to suppress the shift of the threshold voltage due to the diffusion of boron in the oxynitride film (M. Fujiwara,
M. Takayanagi, and Y. Toyoshima, 1999 Symp. VLSI T
ech. Dig. P. 121) is because nitrogen is an element belonging to the same period as boron, so that diffusion of nitrogen introduced into the film by radical nitridation can be suppressed at a similar nitrogen concentration. (Second Embodiment) The element structure of a MOS transistor according to a second embodiment of the present invention is the same as that of the first embodiment, and a detailed description thereof will be omitted. This embodiment is different from the first embodiment in the step of manufacturing the gate insulating film.

【0023】図13に示したように、ウェハ13にRCA洗
浄を施した後、ラジカル窒化装置中へ搬送した。ラジカ
ル窒化装置に100hPaのNOガスを導入し、ランプ加
熱によってウェハの温度を900℃とし、15sの加熱によっ
て膜厚1.2nmのシリコン酸窒化膜を形成した。さらに、
ラジカル窒化装置に酸素を導入し、マイクロ波放電を行
うことによって、ウェハ温度800℃で30sのラジカル酸素
アニールを行った。このときのラジカル酸素は、酸素ガ
スのマイクロ波励起(O2圧力5hPa、マイクロ波2.45
GHz, 200 W)によるプラズマ形成によって発生させた。
(比較的高濃度の窒素を導入できる高温のNO酸窒化を行
った後にラジカル酸化を行うことでSi基板界面付近に酸
素を導入して界面窒素濃度を下げつつ、膜中の平均窒素
濃度はそのままに保つことができる。) 続けて、ラジ
カル窒化装置中に窒素ガスを導入してマイクロ波放電を
行い、ウェハ温度850℃で60sの加熱を行った。ラジカル
窒素は、窒素ガスのマイクロ波励起(N2圧力5hPa、
マイクロ波2.45 GHz, 100 W)によるプラズマで発生させ
た。
As shown in FIG. 13, after the wafer 13 was subjected to RCA cleaning, it was transferred into a radical nitriding apparatus. A NO gas of 100 hPa was introduced into the radical nitriding apparatus, the temperature of the wafer was raised to 900 ° C. by lamp heating, and a silicon oxynitride film having a thickness of 1.2 nm was formed by heating for 15 s. further,
Radical oxygen annealing was performed at a wafer temperature of 800 ° C. for 30 seconds by introducing oxygen into the radical nitriding apparatus and performing microwave discharge. At this time, radical oxygen is generated by microwave excitation of oxygen gas (O 2 pressure 5 hPa, microwave 2.45
GHz, 200 W).
(A high-temperature NO oxynitridation that can introduce a relatively high concentration of nitrogen is performed, followed by radical oxidation to introduce oxygen near the Si substrate interface to lower the interface nitrogen concentration while maintaining the average nitrogen concentration in the film as it is. Subsequently, nitrogen gas was introduced into the radical nitriding apparatus to perform microwave discharge, and heating was performed at a wafer temperature of 850 ° C. for 60 seconds. Radical nitrogen is obtained by microwave excitation of nitrogen gas (N 2 pressure 5 hPa,
Microwave 2.45 GHz, 100 W).

【0024】なお、上記のゲート絶縁膜の形成工程にお
いて、ウェハ上に直接NO酸窒化膜を形成する代わりに、
SiO2膜を形成した後にNH3を流して酸窒化膜を形成して
もよい。さらに、ラジカル酸化の工程の代わりに、高圧
のドライ酸化(例えば、H.Kimijima, T. Ohguro, B. Eva
ns, B. Acker, J. Bloom, H. Mabuchi, D.-L. Kwong,
E. Morifuji, T. Yoshitomi, H. S. Momose, M. Kinuga
wa, Y. Katsumata,and H. Iwai, 1999 Symp. VLSI Tec
h. Dig. p.119を参照)を用いてもよい。さらに、ラジカ
ル窒化の際の電磁波励起源としては、マイクロ波の代わ
りに紫外線を用いてもよい。 (第3の実施例)本発明の第3の実施例に係わるMOSトラン
ジスタの素子構造は、第1の実施例の場合と同様なの
で、詳細な説明は省略する。本実施例では、ゲート絶縁
膜の製造工程の部分が第1,2の実施例とは異なる。
In the step of forming the gate insulating film, instead of forming the NO oxynitride film directly on the wafer,
After forming the SiO 2 film, NH 3 may be flowed to form the oxynitride film. Further, instead of the radical oxidation step, high-pressure dry oxidation (for example, H. Kimijima, T. Ohguro, B. Eva
ns, B. Acker, J. Bloom, H. Mabuchi, D.-L. Kwong,
E. Morifuji, T. Yoshitomi, HS Momose, M. Kinuga
wa, Y. Katsumata, and H. Iwai, 1999 Symp. VLSI Tec
h. Dig. p.119) may be used. Further, as an electromagnetic wave excitation source at the time of radical nitriding, ultraviolet rays may be used instead of microwaves. (Third Embodiment) The element structure of a MOS transistor according to a third embodiment of the present invention is the same as that of the first embodiment, and a detailed description thereof will be omitted. This embodiment is different from the first and second embodiments in the step of manufacturing the gate insulating film.

【0025】図14に示したように、最後の希HF処理を
除くRCA洗浄を施した後、ラジカル窒化装置中へウェハ1
3を搬送した。ラジカル窒化装置に窒素ガスを導入して
マイクロ波放電を行い、ウェハ温度800℃で60sの加熱を
行った。ラジカル窒素は、窒素ガスのマイクロ波励起(N
2圧力5hPa、マイクロ波2.45 GHz, 100 W)によるプ
ラズマで発生させた。このとき膜厚1.2nmの酸窒化膜が
形成された。次に、ラジカル窒化装置に酸素を導入し、
マイクロ波放電を行うことによって、ウェハ温度800℃
で60sのラジカル酸素アニールを行った。このときのラ
ジカル酸素は、酸素ガスのマイクロ波励起(O2圧力5h
Pa、マイクロ波2.45 GHz, 200 W)によるプラズマ形成
によって発生させた。続けて、ラジカル窒化装置中に窒
素ガスを導入してマイクロ波放電を行い、ウェハ温度85
0℃で60sの加熱を行った。ラジカル窒素は、窒素ガスの
マイクロ波励起(N2圧力5hPa、マイクロ波2.45 GHz,
100W)によって発生させた。
As shown in FIG. 14, after performing RCA cleaning except for the final dilute HF treatment, the wafer 1 is introduced into a radical nitriding apparatus.
3 conveyed. Microwave discharge was performed by introducing nitrogen gas into the radical nitriding apparatus, and heating was performed at a wafer temperature of 800 ° C. for 60 s. Radical nitrogen is generated by microwave excitation of nitrogen gas (N
2 Pressure 5 hPa, generated by plasma using microwaves at 2.45 GHz, 100 W). At this time, a 1.2 nm-thick oxynitride film was formed. Next, oxygen is introduced into the radical nitriding device,
Wafer temperature 800 ° C by performing microwave discharge
Performed 60s radical oxygen annealing. The radical oxygen at this time is generated by microwave excitation of oxygen gas (O 2 pressure 5 h).
Pa, microwave 2.45 GHz, 200 W). Subsequently, nitrogen gas was introduced into the radical nitriding apparatus to perform microwave discharge, and a wafer temperature of 85
Heating was performed at 0 ° C. for 60 s. Radical nitrogen a microwave excitation of the nitrogen gas (N 2 pressure 5 hPa, a microwave 2.45 GHz,
100W).

【0026】[0026]

【発明の効果】以上説明したように、本発明では、シリ
コン酸窒化膜の形成後に、活性窒素による窒化を行うこ
とによって、膜の表面側に従来よりも多量の窒素を導入
することができ、さらに、活性窒素による膜密度増加に
伴う誘電率の増加の効果を従来よりも多く享受できるの
で、従来公知例よりもリーク電流が少なく、かつ界面特
性の良好なMOSトランジスタ、MISトランジスタなどの半
導体装置が実現できる。
As described above, in the present invention, by performing nitridation with active nitrogen after the formation of the silicon oxynitride film, a larger amount of nitrogen can be introduced to the surface side of the film than before. Further, since the effect of increasing the dielectric constant due to the increase in the film density due to active nitrogen can be enjoyed more than before, semiconductor devices such as MOS transistors and MIS transistors having less leakage current and better interface characteristics than conventionally known examples. Can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係わるゲート絶縁膜の膜構造と誘電率
の関係を示す図。
FIG. 1 is a diagram showing a relationship between a film structure of a gate insulating film and a dielectric constant according to the present invention.

【図2】本発明の実施形態における、シリコン酸窒化膜
に対して活性窒素による窒化を行う工程の説明図。
FIG. 2 is an explanatory diagram of a step of performing nitriding of a silicon oxynitride film with active nitrogen in the embodiment of the present invention.

【図3】本発明の実施例と従来例における表面・界面窒
素濃度とラジカル窒化時間との関係を示す図。
FIG. 3 is a diagram showing a relationship between surface / interface nitrogen concentration and radical nitriding time in an example of the present invention and a conventional example.

【図4】本発明の実施例に用いたラジカル窒化装置の断
面図。
FIG. 4 is a sectional view of a radical nitriding apparatus used in an example of the present invention.

【図5】本発明実施例のn型MOSトランジスタの製造工程
を示す断面図。
FIG. 5 is a sectional view showing a manufacturing process of the n-type MOS transistor according to the embodiment of the present invention.

【図6】本発明実施例のn型MOSトランジスタの製造工程
を示す断面図。
FIG. 6 is a sectional view showing a manufacturing process of the n-type MOS transistor according to the embodiment of the present invention.

【図7】本発明実施例のn型MOSトランジスタの製造工程
を示す断面図。
FIG. 7 is a sectional view showing the manufacturing process of the n-type MOS transistor according to the embodiment of the present invention.

【図8】本発明実施例のn型MOSトランジスタの製造工程
を示す断面図。
FIG. 8 is a sectional view showing the manufacturing process of the n-type MOS transistor according to the embodiment of the present invention.

【図9】本発明実施例のn型MOSトランジスタの製造工程
を示す断面図。
FIG. 9 is a sectional view showing the manufacturing process of the n-type MOS transistor according to the embodiment of the present invention.

【図10】本発明のn型MOSトランジスタの製造工程を示
す断面図。
FIG. 10 is a sectional view showing the manufacturing process of the n-type MOS transistor of the present invention.

【図11】本発明のn型MOSトランジスタのゲート絶縁膜
の製造工程の説明図。
FIG. 11 is an explanatory diagram of the manufacturing process of the gate insulating film of the n-type MOS transistor of the present invention.

【図12】本発明のゲート絶縁膜の誘電率と組成の関
係。
FIG. 12 shows a relationship between a dielectric constant and a composition of a gate insulating film of the present invention.

【図13】本発明のn型MOSトランジスタのゲート絶縁膜
の製造工程の説明図。
FIG. 13 is an explanatory diagram of the manufacturing process of the gate insulating film of the n-type MOS transistor of the present invention.

【図14】本発明のn型MOSトランジスタのゲート絶縁膜
の製造工程の説明図。
FIG. 14 is an explanatory diagram of the manufacturing process of the gate insulating film of the n-type MOS transistor of the present invention.

【図15】従来のSiO2膜のラジカル窒化における膜表面
およびSi基板界面付近の窒素濃度と、ラジカル窒化時間
の関係を示す図。
FIG. 15 is a diagram showing the relationship between the nitrogen concentration near the film surface and the vicinity of the Si substrate interface in radical nitridation of a conventional SiO 2 film and the radical nitriding time.

【符号の説明】[Explanation of symbols]

11 筐体 12 ランプ 13 ウェハ 14 石英管 15 ガス導入口 16 ドア 17 マイクロ波放電電極 18 ガス排出口 19 パイロメータ 21 p型シリコン基板 22 素子分離領域 24 ゲート絶縁膜 25 ポリシリコン膜 26 フォトレジストパターン 27 n+型ソース領域 28 n+型ドレイン領域 29 シリコン酸化膜(層間絶縁膜) 210 ソース電極(金属電極) 211 ドレイン電極(金属電極) 212 ゲート電極(金属電極)11 housing 12 lamp 13 wafer 14 quartz tube 15 gas inlet 16 door 17 microwave discharge electrode 18 gas outlet 19 pyrometer 21 p-type silicon substrate 22 element isolation region 24 gate insulating film 25 polysilicon film 26 photoresist pattern 27 n + Type source region 28 n + type drain region 29 silicon oxide film (interlayer insulating film) 210 source electrode (metal electrode) 211 drain electrode (metal electrode) 212 gate electrode (metal electrode)

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成13年4月17日(2001.4.1
7)
[Submission date] April 17, 2001 (2001.4.1
7)

【手続補正1】[Procedure amendment 1]

【補正対象書類名】図面[Document name to be amended] Drawing

【補正対象項目名】図1[Correction target item name] Fig. 1

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図1】 FIG.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板層と、その上に形成された
絶縁膜層、およびその上に形成された導電性の電極を備
えた半導体装置において、前記絶縁膜層がシリコン・酸
素・窒素を含有し、その絶縁膜層の窒素濃度がシリコン
基板層側界面は低く、電極側界面は多くなっており、前
記シリコン基板層と電極の間に窒素濃度の中間領域を持
つようにし、さらに前記絶縁膜層の電極側界面付近の膜
密度が絶縁膜層の他の領域と比べて高いことを特徴とす
る半導体装置。
1. A semiconductor device comprising a silicon substrate layer, an insulating film layer formed thereon, and a conductive electrode formed thereon, wherein the insulating film layer contains silicon, oxygen, and nitrogen. The nitrogen concentration of the insulating film layer is low at the interface on the silicon substrate layer side and the interface on the electrode side is large, so that an intermediate region of the nitrogen concentration is provided between the silicon substrate layer and the electrode. A semiconductor device characterized in that the film density near the electrode-side interface of the layer is higher than in other regions of the insulating film layer.
【請求項2】 請求項1に記載された半導体装置におい
て、絶縁膜層の組成を(SiO2)x(Si3N4)1-xと表した場合
のx値について、シリコン基板層側界面から0.628nm以内
の距離の平均組成x1が0.95≦x1≦1.00で表され、また、
電極側界面から0.628nm以内の距離の平均組成をx3と表
し、前記絶縁膜層の上記2つの距離範囲を除いた領域の
平均組成をx2と表したときに0.5≦x3 < x2 ≦0.95であ
り、さらに、ε(x)=3.9*x/(3-2x)+7.8*(1-x/(3-2x))と
定義したときに、前記絶縁膜層の誘電率について、電極
側界面から0.628nm以内の平均誘電率ε3はε3/ε(x3) >
1を満たし、かつ、シリコン基板層側界面から0.628nm
以内の平均誘電率をε1、前記絶縁膜層の上記2つの距離
範囲を除いた領域の平均誘電率をε 2と表したとき、ε3
/ε(x3) >ε2/ε(x2) およびε3/ε(x3) >ε1/ε(x1)を
満たすことを特徴とする半導体装置。
2. The semiconductor device according to claim 1, wherein
The composition of the insulating film layer to (SiOTwo) x (SiThreeNFour) 1-x
Within 0.628 nm from the silicon substrate layer side interface
Average composition of distance x1Is 0.95 ≦ x1≤ 1.00, and
X is the average composition within 0.628 nm from the electrode side interface.ThreeAnd table
And a region of the insulating film layer excluding the two distance ranges.
Average composition xTwo0.5 ≦ xThree<xTwo≤ 0.95
And ε (x) = 3.9 * x / (3-2x) + 7.8 * (1-x / (3-2x))
When defined, the dielectric constant of the insulating film layer
Average permittivity ε within 0.628 nm from side interfaceThreeIs εThree/ ε (xThree)>
 1 and 0.628 nm from the silicon substrate layer side interface
Average dielectric constant within ε1, The two distances of the insulating film layer
The average dielectric constant of the region excluding the range is ε TwoWhere εThree
/ ε (xThree)> εTwo/ ε (xTwo) And εThree/ ε (xThree)> ε1/ ε (x1)
A semiconductor device characterized by satisfying.
【請求項3】 第1導電型のシリコン基板層と、この基
板層の表面に形成された一対の第2導電型半導体領域
と、この第2導電型半導体領域間の第1導電型シリコン基
板層上に形成された絶縁膜と、この絶縁膜上に設けられ
た電極を備える半導体装置において、前記絶縁膜は請求
項1または2に記載された絶縁膜層であることを特徴とす
る半導体装置。
3. A first conductivity type silicon substrate layer, a pair of second conductivity type semiconductor regions formed on the surface of the substrate layer, and a first conductivity type silicon substrate layer between the second conductivity type semiconductor regions. 3. A semiconductor device comprising an insulating film formed thereon and an electrode provided on the insulating film, wherein the insulating film is the insulating film layer according to claim 1 or 2.
【請求項4】 請求項1,2,3のいずれかに記載され
た半導体装置の製造方法であって、前記絶縁膜層の製造
する際に、ゲート絶縁膜中に窒素を導入する工程と、そ
れに引き続いて活性窒素を用いた窒化を行う工程を含む
ことを特徴とする半導体装置の製造方法。
4. The method for manufacturing a semiconductor device according to claim 1, wherein nitrogen is introduced into a gate insulating film when the insulating film layer is manufactured. A method for manufacturing a semiconductor device, comprising subsequently performing a step of performing nitridation using active nitrogen.
【請求項5】 請求項4に記載された半導体装置の製造
方法において、活性窒素を用いた窒化の工程に電磁波励
起によるラジカル窒素またはプラズマ窒素を使用するこ
とを特徴とする半導体装置の製造方法。
5. The method of manufacturing a semiconductor device according to claim 4, wherein radical nitrogen or plasma nitrogen excited by electromagnetic wave is used in the step of nitriding using active nitrogen.
【請求項6】 請求項4に記載された半導体装置の製造
方法において、ゲート絶縁膜中に窒素を導入する工程
は、Si基板層に対する酸窒化の第1工程と、それに引き
続く酸化または窒化の第2工程を含むことを特徴とする
半導体装置の製造方法。
6. The method for manufacturing a semiconductor device according to claim 4, wherein the step of introducing nitrogen into the gate insulating film includes the first step of oxynitriding the Si substrate layer and the second step of oxidizing or nitriding subsequent thereto. A method for manufacturing a semiconductor device, comprising two steps.
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US6893979B2 (en) 2001-03-15 2005-05-17 International Business Machines Corporation Method for improved plasma nitridation of ultra thin gate dielectrics
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US7655969B2 (en) 2005-05-12 2010-02-02 Elpida Memory, Inc. Semiconductor device having a cylindrical capacitor
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US6893979B2 (en) 2001-03-15 2005-05-17 International Business Machines Corporation Method for improved plasma nitridation of ultra thin gate dielectrics
US7109559B2 (en) 2001-03-15 2006-09-19 International Business Machines Corporation Nitrided ultra thin gate dielectrics
US7514376B2 (en) 2003-04-30 2009-04-07 Fujitsu Microelectronics Limited Manufacture of semiconductor device having nitridized insulating film
US7816215B2 (en) 2003-09-19 2010-10-19 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method
US7655969B2 (en) 2005-05-12 2010-02-02 Elpida Memory, Inc. Semiconductor device having a cylindrical capacitor
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