JP2002075705A - Resistor substrate - Google Patents
Resistor substrateInfo
- Publication number
- JP2002075705A JP2002075705A JP2000264184A JP2000264184A JP2002075705A JP 2002075705 A JP2002075705 A JP 2002075705A JP 2000264184 A JP2000264184 A JP 2000264184A JP 2000264184 A JP2000264184 A JP 2000264184A JP 2002075705 A JP2002075705 A JP 2002075705A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- substrate
- thin film
- ceramic substrate
- resistor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、セラミックス基板
上に抵抗体層が形成された抵抗体基板に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resistor substrate having a resistor layer formed on a ceramic substrate.
【０００２】[0002]
【従来の技術】半導体製造技術の進歩により、集積回路
（ＩＣ）は、高集積化、高速化および大チップ化され、
大規模集積回路（ＬＳＩ）および超大規模集積回路（Ｖ
ＬＳＩ）などの高集積回路が開発されており、これらの
集積回路を基板上に搭載した回路基板を使用するこよ
り、電子機器の小形化，高機能化および高性能化が実現
されている。2. Description of the Related Art With the advance of semiconductor manufacturing technology, integrated circuits (ICs) have become higher in integration, higher in speed, and larger in size.
Large-scale integrated circuits (LSI) and very large-scale integrated circuits (V
2. Description of the Related Art Highly integrated circuits such as LSIs (LSIs) have been developed, and miniaturization, high functionality, and high performance of electronic devices have been realized by using circuit boards on which these integrated circuits are mounted.
【０００３】基板材料としては、用途に応じて樹脂、金
属およびセラミックス等が用いられるが、これらの中で
もセラミックスは、放熱性、電気的特性および信頼性を
はじめ多くの特性において総合的に優れている。従来、
セラミック基板としては、アルミナ（Ａｌ２Ｏ３）を適
用したものが主流となっており、アルミナ基板上に直接
酸化ルテニウムなどから成る薄膜抵抗体層を形成して抵
抗体基板が形成されていた。[0003] Resins, metals, ceramics, and the like are used as the substrate material depending on the application. Among them, ceramics are generally excellent in many characteristics such as heat dissipation, electrical characteristics and reliability. . Conventionally,
As a ceramic substrate, a substrate to which alumina (Al 2 O 3 ) is applied is mainly used, and a resistor substrate is formed by directly forming a thin-film resistor layer made of ruthenium oxide or the like on the alumina substrate.
【０００４】近年、半導体素子や回路の高集積化により
発熱量が急増したことから、セラミック基板に要求され
る主たる機能が、半導体チップを機械的応力から保護す
る機能から、電気的および熱的な影響から保護する機能
に移行してきている。そのような技術的要請に対処する
ために、セラミック基板として、高い放熱性を有するＡ
ｌＮ，ＳｉＣおよびＳｉ３Ｎ４等のセラミック材料を用
いることも試行されている。[0004] In recent years, the amount of heat generation has increased rapidly due to the high integration of semiconductor elements and circuits, and the main function required for a ceramic substrate has been changed from the function of protecting a semiconductor chip from mechanical stress to the electric and thermal characteristics. Features are shifting to protection from impact. In order to cope with such a technical demand, a ceramic substrate having high heat dissipation A
Attempts have also been made to use ceramic materials such as 1N, SiC and Si 3 N 4 .
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、窒化ア
ルミニウム等の非酸化物からなるセラミック基板上に直
接抵抗体層を形成すると、セラミック基板と抵抗体層と
の密着強度が低いため、セラミック基板から抵抗体層が
剥離し易く、また、抵抗体基板の経時劣化が大きいとい
う問題が提起されていた。However, if a resistor layer is formed directly on a ceramic substrate made of a non-oxide such as aluminum nitride, the adhesion strength between the ceramic substrate and the resistor layer is low. There has been a problem that the body layer is easily peeled off and the resistor substrate deteriorates with time.
【０００６】本発明は、上記問題を解決するためになさ
れたものであり、セラミック基板と抵抗体層との密着性
を向上させ、高い放熱性を有する抵抗体基板を得ること
を目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above problem, and has as its object to improve the adhesion between a ceramic substrate and a resistor layer and to obtain a resistor substrate having high heat dissipation.
【０００７】[0007]
【課題を解決するための手段】本発明者らは、セラミッ
ク基板上に金属チタン，酸化チタン，窒化チタンの少な
くとも１種から成るＴｉ膜を下地として形成した後、こ
のＴｉ膜上に抵抗体層を形成したときに、セラミック基
板からの抵抗体層の剥離を効果的に防止でき、抵抗体の
経時劣化が大幅に低減できるという知見を得た。Means for Solving the Problems The inventors of the present invention formed a Ti film composed of at least one of titanium metal, titanium oxide and titanium nitride on a ceramic substrate as a base, and then formed a resistor layer on the Ti film. It has been found that, when formed, the separation of the resistor layer from the ceramic substrate can be effectively prevented, and the deterioration with time of the resistor can be greatly reduced.
【０００８】すなわち、本発明に係る抵抗体基板は、セ
ラミック基板上にチタンを主成分とする薄膜を介してル
テニウム酸化物，ルテニウム窒化物，タンタル酸化物お
よびタンタル窒化物の少なくとも１種の金属化合物から
成る抵抗体層を一体に形成したことを特徴とする。That is, the resistor substrate according to the present invention comprises at least one metal compound of ruthenium oxide, ruthenium nitride, tantalum oxide and tantalum nitride on a ceramic substrate via a thin film containing titanium as a main component. Characterized in that a resistor layer made of
【０００９】本発明においては、薄膜を介してセラミッ
クス基板上に抵抗体層を形成した抵抗体を作製し、活性
な金属であるチタン（Ｔｉ）を主成分とした薄膜を形成
しているため、セラミック基板と薄膜との密着性が良好
となり、かつ、薄膜と抵抗体層との間に金属間化合物が
形成されることにより、より良好な密着性が得られるた
め、抵抗体層の剥離を効果的に防止できる。In the present invention, a resistor is formed by forming a resistor layer on a ceramic substrate via a thin film, and a thin film containing titanium (Ti) as an active metal as a main component is formed. The adhesion between the ceramic substrate and the thin film is improved, and the intermetallic compound is formed between the thin film and the resistor layer, whereby better adhesion is obtained. Can be prevented.
【００１０】また、本発明では、活性金属としてのＴｉ
を主成分とした薄膜を用いたが、Ｔｉのかわりに４Ａ族
の元素であるＺｒまたはＨｆを用いても良い。しかし、
Ｈｆは高価格であることからＴｉを用いることがコスト
上実用的である。Further, according to the present invention, Ti as an active metal is used.
Although a thin film mainly containing is used, Zr or Hf which is a 4A group element may be used instead of Ti. But,
Since Hf is expensive, the use of Ti is practical in terms of cost.
【００１１】また上記抵抗体基板において、薄膜が、金
属チタン，酸化チタンおよび窒化チタンの少なくとも１
種から構成することが好ましい。In the above-mentioned resistor substrate, the thin film is made of at least one of titanium metal, titanium oxide and titanium nitride.
It is preferred to consist of seeds.
【００１２】なお、形成する抵抗体層の抵抗値は用途に
応じて設定できる。すなわち、抵抗体層の抵抗値を低く
する場合には、薄膜として金属チタンを用いる。一方、
抵抗体層の抵抗値を高くする場合には、薄膜として窒化
チタンまたは酸化チタンを適用する。このように薄膜の
構成材を適宜選択することにより、抵抗値の選択幅が広
い抵抗体基板を形成することが可能である。The resistance value of the resistor layer to be formed can be set according to the application. That is, when reducing the resistance value of the resistor layer, metal titanium is used as the thin film. on the other hand,
When increasing the resistance value of the resistor layer, titanium nitride or titanium oxide is used as the thin film. By appropriately selecting the constituent materials of the thin film in this way, it is possible to form a resistor substrate having a wide selection range of the resistance value.
【００１３】なお、薄膜として金属チタンを用いた場
合、抵抗体を製造する際に部分的に酸化チタンに変化さ
せて抵抗値を制御することも可能である。In the case where titanium metal is used as the thin film, it is possible to control the resistance value by partially changing to titanium oxide when manufacturing the resistor.
【００１４】また、上記抵抗体基板において、セラミッ
ク基板を、窒化アルミニウムおよび窒化珪素の少なくと
も一方から構成してもよい。In the above resistor substrate, the ceramic substrate may be made of at least one of aluminum nitride and silicon nitride.
【００１５】上記構成によれば、ＡｌＮおよびＳｉ３Ｎ
４などの高放熱性セラミック基板を用いるため、優れた
放熱性を得ることができる。According to the above configuration, AlN and Si 3 N
Since a highly heat-dissipating ceramic substrate such as No. 4 is used, excellent heat dissipation can be obtained.
【００１６】さらに、上記抵抗体基板において、薄膜の
厚さが、１０〜１００ｎｍであることが好ましい。Further, in the resistor substrate, the thin film preferably has a thickness of 10 to 100 nm.
【００１７】上記薄膜の厚さが１０ｎｍ未満であると、
薄膜を形成した効果が少なく経時劣化が大きくなってし
まう。一方、薄膜の厚さが１００ｎｍを超えると薄膜自
体が抵抗物質として作用し、抵抗体基板の機能にばらつ
きが生じてしまう。そのため、本発明において、薄膜の
厚さは１０〜１００ｎｍの範囲に規定される。さらに、
好ましくは、薄膜の厚さを４０〜１００ｎｍの範囲に規
定すると良い。When the thickness of the thin film is less than 10 nm,
The effect of forming the thin film is small, and the deterioration with time increases. On the other hand, if the thickness of the thin film exceeds 100 nm, the thin film itself acts as a resistive substance, causing variations in the function of the resistor substrate. Therefore, in the present invention, the thickness of the thin film is defined in the range of 10 to 100 nm. further,
Preferably, the thickness of the thin film is set in the range of 40 to 100 nm.
【００１８】また、上記抵抗体基板において、抵抗体層
の厚さは、０．６〜３０μｍであることが好ましい。In the above resistor substrate, the resistor layer preferably has a thickness of 0.6 to 30 μm.
【００１９】抵抗体層の厚さが０．６μｍ未満であると
セラミックス基板の表面凹凸などの表面状態の影響を受
け易く均一な厚さの抵抗体膜を形成し難く、また膜厚が
薄いことから目的の抵抗値を得難い。逆に抵抗体層の厚
さが３０μｍを超えると抵抗体層の厚みが厚すぎること
から膜厚の均一化が難しく抵抗値の安定化が困難である
め、本発明では、０．６〜３０μｍの範囲と規定した。If the thickness of the resistor layer is less than 0.6 μm, it is easily affected by surface conditions such as surface irregularities of the ceramic substrate, and it is difficult to form a resistor film having a uniform thickness. It is difficult to obtain the desired resistance value from Conversely, when the thickness of the resistor layer exceeds 30 μm, the thickness of the resistor layer is too large, so that it is difficult to make the film thickness uniform and difficult to stabilize the resistance value. Specified as the range.
【００２０】さらに、上記抵抗体基板において、セラミ
ック基板の表面粗さ（Ｒａ）が、２μｍ以下であること
が好ましい。Further, in the above resistor substrate, the ceramic substrate preferably has a surface roughness (Ra) of 2 μm or less.
【００２１】本発明において、セラミック基板の表面粗
さを２μｍ以下と規定したが、薄膜をスパッタ法などで
蒸着形成する場合には、表面粗さ（Ｒａ）を０．５μｍ
以下とすることが好ましく、厚膜法で薄膜を形成する場
合には表面粗さ（Ｒａ）を２μｍ以下とすることが好ま
しい。In the present invention, the surface roughness of the ceramic substrate is specified to be 2 μm or less. However, when a thin film is formed by vapor deposition by sputtering or the like, the surface roughness (Ra) is 0.5 μm.
When a thin film is formed by a thick film method, the surface roughness (Ra) is preferably 2 μm or less.
【００２２】[0022]
【発明の実施の形態】以下、本発明の実施形態につい
て、実施例１〜実施例９および比較例１〜比較例６を用
いて説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to Examples 1 to 9 and Comparative Examples 1 to 6.
【００２３】実施例１（図１、表１） 本実施例では、セラミック基板として表面粗さＲａ＝
０．８μｍの窒化アルミニウム（ＡｌＮ）基板を用い
た。窒化アルミニウム基板上にスパッタ法を用いて、厚
さ５０ｎｍのＴｉＮからなる薄膜を形成した。その後、
薄膜上に厚膜法を用いて、縦１ｍｍ、横１ｍｍ、厚さ２
０ｎｍのＲｕ酸化物からなる抵抗体層を形成した。さら
に、抵抗体層上の両端にＮｉ／Ａｕからなる電極部分を
形成して抵抗体基板を得た。 Embodiment 1 (FIG. 1, Table 1) In this embodiment, the surface roughness Ra =
A 0.8 μm aluminum nitride (AlN) substrate was used. A thin film made of TiN having a thickness of 50 nm was formed on the aluminum nitride substrate by a sputtering method. afterwards,
Using a thick film method on a thin film, 1 mm long, 1 mm wide, 2 mm thick
A resistor layer of Ru oxide of 0 nm was formed. Further, electrode portions made of Ni / Au were formed on both ends of the resistor layer to obtain a resistor substrate.
【００２４】得られた抵抗体基板の断面図を図１に概略
的に示す。FIG. 1 schematically shows a cross-sectional view of the obtained resistor substrate.
【００２５】図１に示すように、抵抗体基板１は、セラ
ミックス基板２上に薄膜３を介して抵抗体層４が形成さ
れる。さらに、抵抗体層４上の両端部にＮｉ／Ａｕから
なる電極部分５が形成される。As shown in FIG. 1, a resistor substrate 1 has a ceramic substrate 2 on which a resistor layer 4 is formed via a thin film 3. Further, electrode portions 5 made of Ni / Au are formed at both ends on the resistor layer 4.
【００２６】実施例２〜実施例９（図１、表１） 実施例２ないし実施例８は、セラミック基板として窒化
アルミニウムを用い、実施例９は窒化珪素（Ｓｉ
３Ｎ４）を用いた。セラミック基板の表面粗さ（Ｒａ）
を表１に示すように変化させて、実施例４ないし実施例
６では厚膜法を用いて薄膜を形成する一方、それ以外は
スパッタ法を用いて薄膜を形成した。また、抵抗体層の
寸法は、縦１ｍｍ、横１ｍｍとし、厚さを表１に示すよ
うに変化させた抵抗体層を用い、抵抗体層の材質および
厚さを変化させて抵抗体基板を形成した。なお、抵抗体
層の形成に際して、実施例８のみスパッタ法を用いて抵
抗体層を形成し、その厚さを１μｍとし、その他は厚膜
法を用いたものである。 Examples 2 to 9 (FIG. 1, Table 1) In Examples 2 to 8, aluminum nitride was used as the ceramic substrate, and in Example 9, silicon nitride (Si) was used.
3 N 4) was used. Surface roughness of ceramic substrate (Ra)
Was changed as shown in Table 1. In Examples 4 to 6, thin films were formed by using the thick film method, and in other cases, thin films were formed by using the sputtering method. The dimensions of the resistor layer were 1 mm in length and 1 mm in width, and the resistor substrate was used by changing the material and thickness of the resistor layer using a resistor layer whose thickness was changed as shown in Table 1. Formed. In forming the resistor layer, only the resistor layer was formed by using the sputtering method in Example 8, the thickness was set to 1 μm, and the other layers were formed by using the thick film method.
【００２７】比較例１〜比較例６（表１） 比較例として、表１に示すように、比較例１ないし比較
例６に係る抵抗体基板を作製した。 Comparative Examples 1 to 6 (Table 1) As comparative examples, as shown in Table 1, resistor substrates according to Comparative Examples 1 to 6 were produced.
【００２８】比較例１および比較例２は、薄膜の厚さを
５ｎｍおよび１５０ｎｍとして本発明の範囲外とした抵
抗体基板であり、比較例３は、薄膜を形成せずに窒化ア
ルミニウム基板上に直接Ｒｕ酸化物からなる抵抗体層を
形成した抵抗体基板である。Comparative Example 1 and Comparative Example 2 are resistor substrates in which the thickness of the thin film is 5 nm and 150 nm and are out of the range of the present invention. Comparative Example 3 is that a thin film is not formed on an aluminum nitride substrate. This is a resistor substrate on which a resistor layer made of Ru oxide is directly formed.
【００２９】また、比較例４は、セラミック基板の表面
粗さＲａを４μｍとして本発明の範囲を超える表面が粗
いセラミック基板を用いたものであり、比較例５および
比較例６は抵抗体層の厚さを本発明の範囲外として、比
較例５は６０μｍ、比較例６は０．３μｍとしたもので
ある。Comparative Example 4 used a ceramic substrate having a surface roughness Ra exceeding 4 μm and having a rough surface exceeding the range of the present invention. Comparative Examples 5 and 6 used a resistor layer having a surface roughness Ra of 4 μm. The thickness was out of the range of the present invention, and Comparative Example 5 was 60 μm and Comparative Example 6 was 0.3 μm.
【００３０】上記実施例１〜実施例９および上記比較例
１〜比較例６について、高温高湿試験を実施して、セラ
ミック基板上に形成された抵抗体層の剥離の有無を調査
した。With respect to Examples 1 to 9 and Comparative Examples 1 to 6, a high-temperature and high-humidity test was performed to examine whether or not the resistor layer formed on the ceramic substrate had peeled off.
【００３１】高温高湿試験の条件は、温度５０℃、湿度
９５％の雰囲気中に抵抗体基板を１０００時間放置した
後の抵抗値の増加率（％）を測定した。具体的には、常
温（２５℃）における抵抗値からの変化率を測定した。The conditions of the high-temperature and high-humidity test were as follows: After the resistive substrate was allowed to stand in an atmosphere at a temperature of 50 ° C. and a humidity of 95% for 1000 hours, an increase rate (%) of the resistance value was measured. Specifically, the rate of change from the resistance value at normal temperature (25 ° C.) was measured.
【００３２】また、高温高湿試験後に抵抗体の断面をＳ
ＥＭで観察することにより、セラミック基板上に形成さ
れた抵抗体層の剥離の有無を調査した。After the high temperature and high humidity test, the cross section of the resistor was changed to S
By observing with EM, the presence or absence of peeling of the resistor layer formed on the ceramic substrate was investigated.
【００３３】なお、高温高湿試験および抵抗体層の剥離
の有無は、各実施例および各比較例により作製した抵抗
体基板を各１００個ずつ用い、これらの抵抗体基板につ
いて試験を行い、その平均値を示したものである。その
結果を表１に示す。The high-temperature and high-humidity test and the presence / absence of peeling of the resistor layer were performed by using 100 resistor substrates manufactured in each of the examples and comparative examples, and conducting a test on these resistor substrates. It shows the average value. Table 1 shows the results.
【００３４】[0034]
【表１】 [Table 1]
【００３５】表１に示すように、高温高湿試験を実施し
た結果、薄膜を形成した実施例１ないし実施例９の抵抗
体基板は、１０００時間経過後においても抵抗値の増加
率が２．１％以下となっており、経時変化による抵抗値
のばらつきが小さい。一方、薄膜を設けていない比較例
３の抵抗体基板は、抵抗値の増加率が７．５％となって
おり経時変化による抵抗値のばらつきが大きくなってお
り、かつ、抵抗体層の剥離も９０個以上確認された。な
お、高温高湿試験と同様に冷熱サイクル試験も実施した
ところ、同様の結果を得た。As shown in Table 1, as a result of the high-temperature and high-humidity test, the resistive substrates of Examples 1 to 9 in which a thin film was formed showed a resistance increase rate of 2. It is 1% or less, and the variation of the resistance value with the lapse of time is small. On the other hand, in the resistor substrate of Comparative Example 3 in which no thin film was provided, the rate of increase in the resistance value was 7.5%, the variation in the resistance value over time was large, and the resistor layer was peeled off. 90 or more were also confirmed. In addition, when the cooling / heating cycle test was performed similarly to the high temperature / high humidity test, similar results were obtained.
【００３６】さらに、本試験の断面のＳＥＭ観察を実施
した。その結果、ＴｉＮからなる薄膜を形成したものの
み断面で抵抗体層の剥離が観察され、また、膜厚が５ｎ
ｍと薄い比較例１の抵抗体基板においては、密着強度の
改善効果が少なく、抵抗体層の剥離が１００個中１０個
程度確認され、ややはがれがあった。Further, the cross section of this test was observed by SEM. As a result, peeling of the resistor layer was observed only in the section where the thin film made of TiN was formed, and the film thickness was 5n.
In the resistor substrate of Comparative Example 1 having a small thickness of m, the effect of improving the adhesion strength was small, and about 10 out of 100 resistor layers were confirmed to have peeled off.
【００３７】膜厚が１５０ｎｍと厚い比較例２に係る抵
抗体基板においては、抵抗体層の剥離も観察されず、ま
た抵抗値の増加率も０．８％と小さかったが、機械的強
度が低下してしまう難点があった。In the resistor substrate according to Comparative Example 2 having a thick film thickness of 150 nm, peeling of the resistor layer was not observed and the rate of increase of the resistance value was as small as 0.8%, but the mechanical strength was low. There was a drawback that it decreased.
【００３８】本実施形態によれば、セラミック基板上に
Ｔｉを主成分とする薄膜を介して抵抗体層を形成するこ
とで、セラミック基板と抵抗体層との密着性を向上させ
て抵抗体層の剥離を防止するとともに、経時変化による
抵抗値のばらつきを低減した抵抗体基板が得られる。According to the present embodiment, by forming the resistor layer on the ceramic substrate via the thin film containing Ti as a main component, the adhesion between the ceramic substrate and the resistor layer is improved, and the resistance layer is formed. Thus, a resistor substrate can be obtained in which peeling of the resistor is prevented and variation in resistance value due to aging is reduced.
【００３９】[0039]
【発明の効果】以上説明の通り、本発明によれば、高い
放熱性を有するとともに、経時変化による抵抗値のばら
つきを低減でき、抵抗体層の剥離を防止して信頼性が高
く、かつ、Ｓｉから成る半導体の熱膨張率に近似した抵
抗体基板が得られる。As described above, according to the present invention, the present invention has a high heat dissipation property, can reduce the variation of the resistance value due to aging, prevents the resistor layer from peeling off, and has high reliability. A resistor substrate having a coefficient of thermal expansion similar to that of a semiconductor made of Si can be obtained.
【図１】本発明の実施形態を説明する図で、抵抗体基板
の一実施例を概略的に示す断面図。FIG. 1 is a view for explaining an embodiment of the present invention, and is a cross-sectional view schematically showing an example of a resistor substrate.
１ 抵抗体基板 ２ セラミック基板 ３ 薄膜 ４ 抵抗体層 ５ 電極部分 REFERENCE SIGNS LIST 1 resistor substrate 2 ceramic substrate 3 thin film 4 resistor layer 5 electrode part
Claims (6)
る薄膜を介してルテニウム酸化物，ルテニウム窒化物，
タンタル酸化物およびタンタル窒化物の少なくとも１種
の金属化合物から成る抵抗体層を一体に形成したことを
特徴とする抵抗体基板。A ruthenium oxide, a ruthenium nitride, a ruthenium oxide, and a thin film containing titanium as a main component on a ceramic substrate.
A resistor substrate, wherein a resistor layer comprising at least one metal compound of tantalum oxide and tantalum nitride is integrally formed.
よび窒化チタンの少なくとも１種から成ることを特徴と
する請求項１記載の抵抗体基板。2. The resistor substrate according to claim 1, wherein said thin film is made of at least one of titanium metal, titanium oxide and titanium nitride.
ムおよび窒化珪素の少なくとも１種から成ることを特徴
とする請求項１または２に記載の抵抗体基板。3. The resistor substrate according to claim 1, wherein said ceramic substrate is made of at least one of aluminum nitride and silicon nitride.
あることを特徴とする請求項１ないし３のいずれかに記
載の抵抗体基板。4. The resistor substrate according to claim 1, wherein said thin film has a thickness of 10 to 100 nm.
ｍであることを特徴とする請求項１ないし４のいずれか
に記載の抵抗体基板。5. The resistance layer has a thickness of 0.6 to 30 μm.
5. The resistor substrate according to claim 1, wherein m is m.
が、２μｍ以下であることを特徴とする請求項１ないし
５のいずれかに記載の抵抗体基板。6. The surface roughness (Ra) of the ceramic substrate
The resistor substrate according to any one of claims 1 to 5, wherein is equal to or less than 2 µm.
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|---|---|---|---|
| JP2000264184A JP4398576B2 (en) | 2000-08-31 | 2000-08-31 | Resistor board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000264184A JP4398576B2 (en) | 2000-08-31 | 2000-08-31 | Resistor board |
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| Publication Number | Publication Date |
|---|---|
| JP2002075705A true JP2002075705A (en) | 2002-03-15 |
| JP4398576B2 JP4398576B2 (en) | 2010-01-13 |
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|---|---|---|---|
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004320014A (en) * | 2003-04-14 | 2004-11-11 | Agilent Technol Inc | Thin-film resistor element |
| JP2016191705A (en) * | 2015-03-30 | 2016-11-10 | 三菱マテリアル株式会社 | Temperature sensor and manufacturing method for the same |
| WO2020012926A1 (en) * | 2018-07-12 | 2020-01-16 | Koa株式会社 | Resistor and circuit board |
-
2000
- 2000-08-31 JP JP2000264184A patent/JP4398576B2/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004320014A (en) * | 2003-04-14 | 2004-11-11 | Agilent Technol Inc | Thin-film resistor element |
| JP2016191705A (en) * | 2015-03-30 | 2016-11-10 | 三菱マテリアル株式会社 | Temperature sensor and manufacturing method for the same |
| WO2020012926A1 (en) * | 2018-07-12 | 2020-01-16 | Koa株式会社 | Resistor and circuit board |
| JP2020010004A (en) * | 2018-07-12 | 2020-01-16 | Koa株式会社 | Resistor and circuit substrate |
| CN112335000A (en) * | 2018-07-12 | 2021-02-05 | Koa株式会社 | Resistor and circuit board |
| US11282621B2 (en) | 2018-07-12 | 2022-03-22 | Koa Corporation | Resistor and circuit substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4398576B2 (en) | 2010-01-13 |
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