JP2002053630A - Semiconductor substrate and method for producing the same - Google Patents
Semiconductor substrate and method for producing the sameInfo
- Publication number
- JP2002053630A JP2002053630A JP2000239942A JP2000239942A JP2002053630A JP 2002053630 A JP2002053630 A JP 2002053630A JP 2000239942 A JP2000239942 A JP 2000239942A JP 2000239942 A JP2000239942 A JP 2000239942A JP 2002053630 A JP2002053630 A JP 2002053630A
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- Prior art keywords
- semiconductor substrate
- substrate
- polymerization
- insulating film
- functional group
- Prior art date
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- Compositions Of Macromolecular Compounds (AREA)
- Polymerisation Methods In General (AREA)
- Graft Or Block Polymers (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Treatments Of Macromolecular Shaped Articles (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、低誘電率、低誘電
正接が要求されるクロック周波数が５００ＭＨｚを超え
る電子機器部品に対応でき、かつ絶縁性を必要とする部
位に用いられる材料に関し、特に、加工性に優れた高分
子から形成されることを特徴とする低誘電率絶縁膜の形
成方法、及び該低誘電率絶縁膜を層間絶縁膜として形成
する工程を有する半導体回路基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a material which can be applied to an electronic device part which requires a low dielectric constant and a low dielectric loss tangent and has a clock frequency exceeding 500 MHz and which is required to have an insulating property. The present invention relates to a method for forming a low dielectric constant insulating film, which is formed from a polymer having excellent workability, and a method for manufacturing a semiconductor circuit substrate, comprising a step of forming the low dielectric constant insulating film as an interlayer insulating film. .
【０００２】[0002]
【従来の技術】半導体集積回路においては集積度の増加
及び素子密度の向上に伴い、特に素子の多層化への要求
が高まっている。また、半導体装置の微細化、低消費電
力化および高速化等の要求に伴い、半導体素子の高周波
数化も進んでいる。半導体集積回路の配線では、信号伝
播速度は配線抵抗と配線間の寄生容量によって決定され
るが、デバイスの高集積化により配線幅、配線間隔は狭
くなり、配線抵抗の上昇と配線容量の増大のため信号伝
搬速度が低下し配線遅延を引き起こすことが問題視され
ている。配線遅延を小さくするためには、配線の低抵抗
化とともに絶縁膜の低誘電率化が有効な手段といわれ、
高周波数化に伴う誘電損失の増大による電力ロスを防ぐ
ためにも、絶縁膜材料の低誘電率化、低誘電正接化が要
求されている。また、これらのほかにも、前記電子機器
部品用材料に対する要求として、耐熱性、放熱性、耐湿
性、低応力、加工の容易さなどが要求されている。従来
から半導体集積回路の絶縁樹脂として広く用いられてき
たエポキシ樹脂は、高周波数領域での誘電特性が悪く、
高周波数用樹脂として満足な特性が得られていなかっ
た。2. Description of the Related Art In a semiconductor integrated circuit, with an increase in the degree of integration and an increase in element density, a demand for a multilayered element has been particularly increased. In addition, with the demand for miniaturization, low power consumption, high speed, and the like of semiconductor devices, the frequency of semiconductor elements has been increasing. In the wiring of a semiconductor integrated circuit, the signal propagation speed is determined by the wiring resistance and the parasitic capacitance between the wirings. However, as the integration of the device increases, the wiring width and the wiring interval become narrower, and the wiring resistance increases and the wiring capacitance increases. For this reason, it is considered that the signal propagation speed is reduced and a wiring delay is caused. In order to reduce the wiring delay, it is said that lowering the resistance of the wiring and lowering the dielectric constant of the insulating film are effective means.
In order to prevent power loss due to an increase in dielectric loss due to a higher frequency, a lower dielectric constant and a lower dielectric loss tangent of an insulating film material are required. In addition to these, heat resistance, heat dissipation, moisture resistance, low stress, and ease of processing are required as the requirements for the electronic device component material. Epoxy resin, which has been widely used as an insulating resin for semiconductor integrated circuits, has poor dielectric properties in the high-frequency region,
Satisfactory characteristics as a high frequency resin have not been obtained.
【０００３】近年では、二酸化珪素（ＳｉＯ2 ）、窒化
珪素（ＳｉＮ）、燐珪酸ガラス（ＰＳＧ）、およびＳｉ
ＯＦ材料や、Ｓｉ−Ｈを含むＳｉＯ2 ベースの無機材料
か、あるいはポリアリール樹脂、ポリイミド樹脂、フッ
素添加ポリイミド樹脂やフッ素系樹脂などの有機系高分
子材料が用いられてきた。これらの層間絶縁膜は、一般
にＣＶＤ法などの気相成長法、または塗布液を用いて絶
縁膜を形成する塗布法によって基板上に作製されている
が、ＣＶＤ法などの気相成長法では得られるシリカ系
（ＳｉＯ2 ）被膜の比誘電率はＳｉＯＦ系膜の３. ５が
限界と言われており、アルコキシシランの部分加水分解
物からなるシリカ系被膜形成用塗布液では、比誘電率
２. ５の被膜が得られるものの、被塗布面との密着性が
悪いという欠点があった。さらにＳｉＯＦ膜では吸湿性
が高く、そのため誘電率が経時変化して上昇するという
問題もあった。また、近年配線の低抵抗化を行うために
従来のアルミニウム系配線に代えて銅配線の使用が検討
されているが、ＳｉＯ2 系の無機絶縁膜は通電時に銅が
絶縁膜中を拡散してリーク不良が生じるという欠点があ
った。In recent years, silicon dioxide (SiO 2), silicon nitride (SiN), phosphosilicate glass (PSG), and Si
OF materials, SiO 2 -based inorganic materials containing Si—H, or organic polymer materials such as polyaryl resins, polyimide resins, fluorinated polyimide resins, and fluorine-based resins have been used. These interlayer insulating films are generally formed on a substrate by a vapor phase growth method such as a CVD method or a coating method of forming an insulating film using a coating solution, but are obtained by a vapor phase growth method such as a CVD method. It is said that the relative dielectric constant of the silica-based (SiO 2 ) film to be obtained is 3.5 as the limit of the SiOF-based film. .5, but had the disadvantage of poor adhesion to the surface to be coated. Further, the SiOF film has a high hygroscopicity, which causes a problem that the dielectric constant changes with time and increases. In recent years, the use of copper wiring instead of the conventional aluminum-based wiring has been studied in order to reduce the resistance of the wiring. However, copper diffuses through the insulating film of an SiO 2 -based inorganic insulating film when current is applied. There is a disadvantage that a leak failure occurs.
【０００４】一方、ポリアリール樹脂、フッ素添加ポリ
イミド樹脂やフッ素系樹脂などのＣＶＤ被膜やこれらの
塗布液を用いて形成される被膜は、比誘電率が２前後と
優れているが、被塗布面との密着性や、微細加工に用い
るレジスト材料との密着性も悪く、耐薬品性、耐酸素プ
ラズマ性に劣るなどの欠点があった。これら有機高分子
膜では、銅拡散が生じないことが知られているが、ガラ
ス転移温度が２００〜３５０℃と低くて耐熱性に難があ
り、熱膨張率も大きいことから、配線にダメージを与え
ることが問題となっていた。さらにフッ素含有樹脂材料
は、他材料との密着性が悪く、配線脇に空隙を生じ易
く、この配線脇空隙は、多層配線を形成するためのビア
ホール開口時に位置ずれが生じた際、配線層間のショー
トを招く恐れがあった。以上のように、高速デバイスを
実現するために不可欠な低抵抗配線と低誘電率絶縁層の
形成という点からは、諸要求特性を十分にバランス良く
満たす材料は未だ得られていない。On the other hand, a CVD film of a polyaryl resin, a fluorine-added polyimide resin, a fluorine-based resin, or the like, or a film formed by using these coating liquids has an excellent relative dielectric constant of about 2, but has a relatively low dielectric constant. And the adhesion to a resist material used for microfabrication are poor, and there are drawbacks such as poor chemical resistance and oxygen plasma resistance. It is known that copper diffusion does not occur in these organic polymer films. However, since the glass transition temperature is as low as 200 to 350 ° C., the heat resistance is difficult, and the thermal expansion coefficient is large. Giving was a problem. Further, the fluorine-containing resin material has poor adhesion to other materials, and tends to form voids beside wirings. When gaps are generated at the time of opening a via hole for forming a multilayer wiring, gaps between wiring layers are generated. There was a risk of a short circuit. As described above, from the viewpoint of forming the low resistance wiring and the low dielectric constant insulating layer, which are indispensable for realizing a high-speed device, a material that satisfies various requirements in a well-balanced manner has not yet been obtained.
【０００５】これらを解決しようとする方法として、本
発明のように固体表面近傍における重合方法に関しては
特願平４−１４０１３４号公報及び特願平５−２３８５
７２号公報に記載があるが、いずれも基板表面に露出し
た単結晶表面を利用して高分子化合物をエピタキシャル
成長させることを特徴としているが、重合の起点は基板
表面近傍であり、基板表面上ではない。従って、上記方
法においては、基板表面と生成した絶縁膜との密着性が
必ずしも十分でないという課題があった。As a method for solving these problems, a polymerization method in the vicinity of a solid surface as in the present invention is disclosed in Japanese Patent Application Nos. 4-140134 and 5-2385.
No. 72, all of which are characterized by epitaxially growing a polymer compound using the single crystal surface exposed on the substrate surface, but the starting point of polymerization is near the substrate surface, and on the substrate surface Absent. Therefore, the above method has a problem that the adhesion between the substrate surface and the formed insulating film is not always sufficient.
【０００６】[0006]
【発明が解決しようとする課題】本発明はかかる事情に
鑑み、誘電率が低く、銅拡散がなく、耐薬品性、耐酸素
プラズマ性が良好で、微細な配線加工が可能である上
に、基板との密着性が優れた絶縁膜層の形成方法ならび
に上記方法により製造された高速で信頼性の高い回路基
板を提供することにある。In view of such circumstances, the present invention has a low dielectric constant, no copper diffusion, good chemical resistance, good oxygen plasma resistance, and enables fine wiring processing. An object of the present invention is to provide a method for forming an insulating film layer having excellent adhesion to a substrate and a high-speed and highly reliable circuit board manufactured by the above method.
【０００７】[0007]
【課題を解決するための手段】上記課題を解決するため
に、本発明では、配線基盤上に重合反応に関与する官能
基を導入する前工程処理後にエピタキシャルにポリマー
を形成せしめ、ポリマーの密度制御を行うという手段に
より目的の低誘電絶縁層形成を達成するものである。さ
らに具体的には、請求項１記載の発明は、基板表面にグ
ラフトもしくは吸着された、基板表面にグラフトもしく
は吸着された分子に化学的に結合された、又は基板表面
内部もしくは基板表面上に形成された塗膜層に含有され
た、Ａ）重合反応開始性の官能基、Ｂ）重合連鎖移動性
の官能基、Ｃ）重合性の官能基の内少なくとも一つの官
能基を有する化合物を基点に、基板表面上でモノマーを
重合せしめ低誘電率の層間絶縁膜層を形成する工程を含
む半導体基板の製造方法である。In order to solve the above-mentioned problems, according to the present invention, a polymer is formed epitaxially after a pre-process for introducing a functional group involved in a polymerization reaction onto a wiring board, thereby controlling the density of the polymer. Is performed to achieve the desired formation of the low dielectric insulating layer. More specifically, the invention according to claim 1 is characterized in that it is grafted or adsorbed on the substrate surface, chemically bonded to a molecule grafted or adsorbed on the substrate surface, or formed inside or on the substrate surface. A compound having at least one functional group among A) a functional group capable of initiating polymerization reaction, B) a functional group capable of polymerizing chain transfer, and C) a functional group capable of being polymerized contained in the coated film layer. A method of manufacturing a semiconductor substrate, comprising a step of forming a low dielectric constant interlayer insulating film layer by polymerizing a monomer on a substrate surface.
【０００８】請求項２記載の発明は、重合反応が、リビ
ングラジカル重合、リビングカチオン重合、リビングア
ニオン重合、イニファーター重合、グループトランスフ
ァー重合からなる群より選ばれる少なくとも一種類の重
合反応である請求項１に記載の半導体基板の製造方法で
ある。The invention according to claim 2 is that the polymerization reaction is at least one kind of polymerization reaction selected from the group consisting of living radical polymerization, living cationic polymerization, living anion polymerization, iniferter polymerization, and group transfer polymerization. 2. A method for manufacturing a semiconductor substrate according to item 1.
【０００９】請求項３記載の発明は、モノマーが、（メ
タ）アクリル酸エステル、ビニルエステル、芳香族ビニ
ル、ビニルエーテル、環状エーテルモノマーからなる群
より選ばれる少なくとも一種類のモノマーを含有する組
成物である請求項１、２の何れか１項に記載の半導体基
板の製造方法である。[0009] The invention according to claim 3 is a composition wherein the monomer contains at least one kind of monomer selected from the group consisting of (meth) acrylic acid ester, vinyl ester, aromatic vinyl, vinyl ether and cyclic ether monomer. A method for manufacturing a semiconductor substrate according to any one of claims 1 and 2.
【００１０】請求項４記載の発明は、基板表面上におけ
る、少なくとも連続する段階での重合においては、異な
るモノマー組成物を用いて多段階に重合せしめる請求項
１〜３の何れか１項に記載の半導体基板の製造方法であ
る。The invention according to claim 4 is the method according to any one of claims 1 to 3, wherein polymerization is performed in multiple steps using different monomer compositions at least in a continuous step on the substrate surface. Is a method for manufacturing a semiconductor substrate.
【００１１】請求項５記載の発明は、請求項１〜４の何
れか１項に記載の層間絶縁膜層が半導体基板に形成され
た後に、さらにフッ素化合物を用いてプラズマ処理せし
める半導体基板の製造方法である。According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor substrate, wherein after the interlayer insulating film layer according to any one of the first to fourth aspects is formed on the semiconductor substrate, the semiconductor substrate is further subjected to a plasma treatment using a fluorine compound. Is the way.
【００１２】請求項６記載の発明は、請求項１〜５の何
れか１項に記載の半導体基板の製造方法によって作製さ
れ、ポリマーの末端が基板材料表面に化学的に結合され
た官能基に化学的に結合されている半導体基板である。According to a sixth aspect of the present invention, there is provided a method for manufacturing a semiconductor substrate according to any one of the first to fifth aspects, wherein the terminal of the polymer is bonded to a functional group chemically bonded to the surface of the substrate material. A semiconductor substrate that is chemically bonded.
【００１３】請求項７記載の発明は、層間絶縁膜層の嵩
密度が０．１〜０．９ｋｇ／Ｌである請求項１〜５の何
れか１項に記載の製造法によって作製された半導体基板
である。According to a seventh aspect of the present invention, there is provided a semiconductor device manufactured by the method according to any one of the first to fifth aspects, wherein the bulk density of the interlayer insulating film layer is 0.1 to 0.9 kg / L. It is a substrate.
【００１４】請求項８記載の発明は、請求項４又は５に
記載の製造方法によって作成され、基板の厚み方向に対
して、嵩密度が異なる層間絶縁膜層が複数積層された多
層積層構造を有する半導体基板である。According to an eighth aspect of the present invention, there is provided a multilayer laminated structure formed by the manufacturing method according to the fourth or fifth aspect, wherein a plurality of interlayer insulating film layers having different bulk densities are laminated in the thickness direction of the substrate. A semiconductor substrate.
【００１５】請求項９記載の発明は、請求項４又は５に
記載の製造方法によって作製され、ポリマーが、異種モ
ノマーからなるブロック構造を有する半導体基板であ
る。According to a ninth aspect of the present invention, there is provided a semiconductor substrate produced by the manufacturing method according to the fourth or fifth aspect, wherein the polymer has a block structure composed of different monomers.
【００１６】請求項１０記載の発明は、請求項４又は５
に記載の製造方法によって作成され、ポリマーが、分子
鎖の一部に分岐構造を有する半導体基板である。The invention described in claim 10 is the invention according to claim 4 or 5.
Wherein the polymer is a semiconductor substrate having a branched structure in a part of a molecular chain.
【００１７】請求項１１記載の発明は、請求項１〜５の
何れか１項に記載の製造方法によって作製され、ポリマ
ーの側鎖及び／または末端に反応性の官能基を有する半
導体基板である。According to an eleventh aspect of the present invention, there is provided a semiconductor substrate produced by the production method according to any one of the first to fifth aspects and having a reactive functional group on a side chain and / or a terminal of the polymer. .
【００１８】請求項１２記載の発明は、層間絶縁膜の比
誘電率（ｋ）が２．８未満である請求６〜11の何れか１
項に記載の半導体基板である。According to a twelfth aspect of the present invention, the relative dielectric constant (k) of the interlayer insulating film is less than 2.8.
It is a semiconductor substrate described in the paragraph.
【００１９】また、基板に対して、強い相互作用をもっ
てポリマー末端を意図的に櫛形に結合するポリマーを形
成するために厚み方向での熱伝達性を高度に維持するこ
とが出来る。In addition, since a polymer is formed which intentionally bonds the polymer ends to the substrate with strong interaction with the substrate, heat transfer in the thickness direction can be maintained at a high level.
【００２０】本発明の重合は、重合反応によりポリマー
に取り込まれる官能基を導入した半導体基板表面上で行
われ、重合に先立って導入される官能基の基板表面上で
の密度制御が可能であるために、重合により生成する層
間絶縁膜層の密度を厳密に制御できる。上記半導体基板
表面に官能基を導入する方法としては、たとえば、気相
又は液相で上記基板を処理することにより行われる。こ
の際に、導入される官能基の基板表面上での密度制御
は、気相又は液相中の官能基を含有する化合物の濃度を
調整することにより容易に行える。The polymerization of the present invention is carried out on the surface of a semiconductor substrate into which a functional group incorporated into the polymer by a polymerization reaction has been introduced, and the density of the functional group introduced prior to polymerization can be controlled on the substrate surface. Therefore, the density of the interlayer insulating film layer generated by polymerization can be strictly controlled. The method of introducing a functional group into the surface of the semiconductor substrate is performed, for example, by treating the substrate in a gas phase or a liquid phase. At this time, the density of the introduced functional group on the substrate surface can be easily controlled by adjusting the concentration of the compound containing the functional group in the gas phase or the liquid phase.
【００２１】上記基板表面上での重合方法としては、ビ
ニル重合反応が一般的であるので、基板表面上に導入さ
れる官能基としては、例えば、ビニル重合反応開始性官
能基、ビニル重合連鎖移動性の官能基、ビニル重合性の
官能基等が挙げられる。As the polymerization method on the substrate surface, a vinyl polymerization reaction is generally used. As the functional group introduced on the substrate surface, for example, a vinyl polymerization reaction-initiating functional group, a vinyl polymerization chain transfer Functional groups, vinyl polymerizable functional groups, and the like.
【００２２】上記重合反応開始性官能基としては、例え
ば、パーオキサイド基、アゾジアミド基、ヒドロキシル
パーオキサイド基；金属触媒との複合で重合開始性のラ
ジカルを発生する水酸基、チオール基；光及び／又は熱
等により乖離しラジカル重合能を有する沃素、塩素臭素
等のハロゲン化合物、チオカーバメート基等が挙げられ
る。Examples of the above-mentioned polymerization reaction-initiating functional group include a peroxide group, an azodiamide group, a hydroxyl peroxide group; a hydroxyl group, a thiol group which generates a polymerization-initiating radical in combination with a metal catalyst; Examples thereof include halogen compounds such as iodine and chlorine bromine having a radical polymerization ability which are separated by heat or the like, and thiocarbamate groups.
【００２３】上記重合連鎖移動性の官能基としては、例
えば、チオール基、ジサルファイド基、沃素、塩素、臭
素等のハロゲン基等が挙げられる。Examples of the above-mentioned functional group having a polymerization chain transfer property include a thiol group, a disulfide group, and a halogen group such as iodine, chlorine and bromine.
【００２４】上記重合性の官能基としては特に限定され
ないが、例えば、ビニル基、又はα及び／又はβ位に置
換基を有するビニル基、即ち、（メタ）アクリル基、ア
リル基、アルケニル基、ノルボルネン化合物等が挙げら
る。The polymerizable functional group is not particularly restricted but includes, for example, a vinyl group or a vinyl group having a substituent at the α and / or β position, that is, a (meth) acryl group, an allyl group, an alkenyl group, And norbornene compounds.
【００２５】上記官能基を有する化合物は基板表面と親
和性を有する官能基を含有することにより、基板表面に
容易にグラフト又は吸着されたり、基板表面内部又は基
板表面上に形成された塗膜層に含有され易くなり、重合
によって生成したポリマーからなる良好な層間絶縁膜が
形成される。上記基板表面と親和性を有する官能基とし
ては、例えば、式（１）で表されるシリル基、イソシア
ネート基、エポキシ基、グリシジル基、アミノ基、イミ
ダゾリン基等が挙げられる。The compound having a functional group contains a functional group having an affinity for the substrate surface, so that the compound can be easily grafted or adsorbed on the substrate surface, or a coating layer formed inside or on the substrate surface. And an excellent interlayer insulating film made of a polymer formed by polymerization is formed. Examples of the functional group having an affinity for the substrate surface include a silyl group, an isocyanate group, an epoxy group, a glycidyl group, an amino group, and an imidazoline group represented by the formula (1).
【００２６】[0026]
【化１】 Embedded image
【００２７】上記重合方法としては、ビニル重合に適用
される一般的な重合法が挙げられるが、各種重合方法の
中でもリビングラジカル重合、リビングカチオン重合、
リビングアニオン重合、イニファーター重合、グループ
トランスファー重合等の成長反応以外の副反応が起こり
にくいリビング重合法が好適に用いられる。リビング重
合法を用いることにより、分子鎖長のそろったポリマー
や異種モノマーからなるブロック構造を有するポリマー
が形成され、絶縁層の表面を平滑にしたり、層間絶縁膜
の密度制御が容易となる。Examples of the polymerization method include general polymerization methods applied to vinyl polymerization. Among various polymerization methods, living radical polymerization, living cationic polymerization,
A living polymerization method in which side reactions other than the growth reaction such as living anionic polymerization, iniferter polymerization, and group transfer polymerization hardly occur is preferably used. By using the living polymerization method, a polymer having a uniform molecular chain length or a polymer having a block structure composed of different monomers is formed, and the surface of the insulating layer can be smoothed and the density of the interlayer insulating film can be easily controlled.
【００２８】上記重合に用いられるモノマーとしては、
特に限定されないが、（メタ）アクリル酸エステル、ビ
ニルエステル、芳香族ビニル、ビニルエーテル、環状エ
ーテルモノマー等のリビング重合可能なモノマーが好適
に用いられ、絶縁性、耐熱性等の各種要求性能に応じて
適宜選択して用いられる。The monomers used in the above polymerization include:
Although not particularly limited, monomers capable of living polymerization, such as (meth) acrylates, vinyl esters, aromatic vinyls, vinyl ethers, and cyclic ether monomers, are suitably used, and according to various required performances such as insulation and heat resistance. It is appropriately selected and used.
【００２９】上記モノマー中には、少量の他のモノマー
を併用することも可能であり、例えば重合開始能とビニ
ル基等の重合性の官能基をともに有するモノマーを一部
併用することにより、ポリマーの一部に分岐構造を導入
したり、ポリマーの末端や側鎖、もしくは末端と側鎖の
両方に反応性の官能基を設けることにより、各層ごとの
密度を調節したり、積層される次の界面との密着性や分
子間の空隙構造の安定化や、官能基を利用してポリマー
末端を強い相互作用をもって意図的に櫛形に結合するポ
リマーを形成せしめて厚み方向での熱伝達性を高度に維
持したり、分子鎖の一部に分岐鎖を導入したり、架橋構
造を導入することが可能になり、嵩密度を調整したり、
耐熱性、力学的強度の向上が可能となる。It is also possible to use a small amount of other monomers in combination with the above-mentioned monomers. For example, by partially using a monomer having both a polymerization initiating ability and a polymerizable functional group such as a vinyl group, a polymer can be obtained. The density of each layer is adjusted by introducing a branched structure into a part of the polymer, or by providing a reactive functional group at the terminal or side chain of the polymer, or at both the terminal and the side chain, or High heat transfer in the thickness direction by stabilizing adhesion to the interface and stabilizing the void structure between molecules, and forming a polymer that intentionally combines the polymer ends with strong interaction using functional groups to form a comb. Or to introduce a branched chain into a part of the molecular chain, it is possible to introduce a cross-linked structure, to adjust the bulk density,
Heat resistance and mechanical strength can be improved.
【００３０】更にリビング重合方法を用いることにより
モノマー組成を変えて多段重合を行うことが容易なの
で、各層毎にモノマー組成を変えて膜厚方向での層間絶
縁膜の組成が異なる多層構造にすることにより、接着
性、密度、耐熱性、電気特性等のコントロールができ、
各種性能のバランスのとれた優れた層間絶縁膜を容易に
形成することができる。例えば、基板表面では、基板と
の親和性の高いモノマー組成とすることにより厚み方向
に配向したポリマーが一部屈曲し界面接着性を改善で
き、表面層においては、フッ素化処理が容易なポリマー
構造とすることも可能である。又、基板表面では単官能
モノマーを重合し、その後に多官能モノマーを重合させ
れば、絶縁層表面の密度を高め、平滑化が可能である。
更には、基板近傍では高密度とし、中間層において低密
度とし、表面層を高密度とするといった３層構造を取る
ことにより基板表面との密着性が高く、また、誘電率の
低い絶縁膜層形成が可能である。Further, since the multi-stage polymerization can be easily performed by changing the monomer composition by using the living polymerization method, the multilayer composition in which the composition of the interlayer insulating film differs in the film thickness direction by changing the monomer composition for each layer. Can control adhesion, density, heat resistance, electrical properties, etc.
An excellent interlayer insulating film having various performances balanced can be easily formed. For example, on the substrate surface, a polymer composition having a high affinity for the substrate has a polymer composition oriented in the thickness direction that partially bends to improve interfacial adhesion, and the surface layer has a polymer structure that is easily fluorinated. It is also possible to use Further, by polymerizing a monofunctional monomer on the substrate surface and then polymerizing a polyfunctional monomer, the density of the insulating layer surface can be increased and smoothing can be performed.
Furthermore, by adopting a three-layer structure of high density in the vicinity of the substrate, low density in the intermediate layer, and high density of the surface layer, the adhesion to the substrate surface is high, and the insulating film layer has a low dielectric constant. Formation is possible.
【００３１】上記基板表面での重合により層間絶縁膜を
形成せしめた後に、フッ素化合物を用いてプラズマ処理
せしめることにより、ポリマー層のアルキル基中の水素
をフッ素置換して膜の低誘電率化や耐熱性、放熱性を向
上することが出来る。After the interlayer insulating film is formed by the polymerization on the substrate surface, plasma treatment is performed using a fluorine compound, whereby hydrogen in the alkyl group of the polymer layer is substituted with fluorine to reduce the dielectric constant of the film. Heat resistance and heat dissipation can be improved.
【００３２】上記重合反応は、重合反応によりポリマー
に取り込まれる官能基を導入した半導体基板表面上で行
われるので基板に対する密着性は優れているが、形成さ
れたポリマー層中の非グラフト性ポリマーを溶剤で洗浄
除去したり、モノマー組成物中に多官能モノマーを一部
含有させることにより、更に密着力や膜の強度を向上さ
せることができる。The above polymerization reaction is carried out on the surface of a semiconductor substrate into which a functional group to be incorporated into the polymer by the polymerization reaction is introduced, so that the adhesion to the substrate is excellent, but the non-grafting polymer in the formed polymer layer is removed. The adhesion and the strength of the film can be further improved by washing away with a solvent or by partially including a polyfunctional monomer in the monomer composition.
【００３３】上記層間絶縁膜の嵩密度は、０．1 ｋｇ／
Ｌ〜０．９ｋｇ／Ｌが好ましい。層間絶縁膜層の嵩密度
が０．９ｋｇ／Ｌを越えると誘電率の低減が困難とな
り、嵩密度が０．1 ｋｇ／Ｌ未満となると膜の力学的強
度が低下し、該膜上にさらに他の膜を積層するのが困難
となるとともに、放熱性が低下し易くなってしまう。The bulk density of the interlayer insulating film is 0.1 kg /
L to 0.9 kg / L is preferred. When the bulk density of the interlayer insulating film layer exceeds 0.9 kg / L, it is difficult to reduce the dielectric constant, and when the bulk density is less than 0.1 kg / L, the mechanical strength of the film decreases, and It becomes difficult to stack other films, and the heat dissipation tends to decrease.
【００３４】上記層間絶縁膜の比誘電率（ｋ）は２. ８
未満が好ましく、更に好ましくは２. ５未満である。非
誘電率が２. ８以上になると配線遅延の低減効果が減少
することがある。The relative dielectric constant (k) of the interlayer insulating film is 2.8.
Is preferably less than 2.5, and more preferably less than 2.5. When the non-dielectric constant is 2.8 or more, the effect of reducing wiring delay may decrease.
【００３５】[0035]
【実施例】以下に実施例により本発明をさらに詳しく説
明するが、本発明はこれら実施例にのみ限定されるもの
ではない。 実施例１ < １１１> 面をもつシリコンウェハーを１ｃｍ×１ｃｍ
の大きさにカットし、エタノール、イオン交換水でそれ
ぞれ１０分間超音波洗浄した。次にフッ酸で１０秒間処
理して表面の酸化層を除き、イオン交換水で洗浄した。
これを濃硝酸により室温下で１時間処理し、さらにイオ
ン交換水で洗浄してシリコンウェーハー表面上に親水基
を導入した。このようにして表面に親水基を導入したシ
リコンウェハーに、３−アミノプロピルトリエトキシシ
ランの蒸気を２０時間接触させ、表面にアミノ基を導入
した。次に２−ブロモイソブチル酸を反応させ、ウェー
ハー表面にブロモ基を導入した。ブロモ基を導入したシ
リコンウェハーを、フラスコに入れ、ウェハーを完全に
浸すようにメチルメタクリレートモノマー１０ｇを入
れ、続いて塩化第１銅０．１２ｇ、４，４’−ビピリジ
ル０．６ｇを加えた。次にフラスコの内容物を液体窒素
で凍結させ減圧脱気した後室温に戻すという操作を３回
行い、充分に脱気した後、フラスコに窒素を導入し、シ
ールした。これを１３０℃のオイルバスに入れて４時間
加熱し、重合を進行させた。重合終了後、ウェハーをメ
タノール、イオン交換水で洗浄し、５０℃のオーブンで
１０時間真空乾燥した。EXAMPLES The present invention will be described in more detail with reference to the following examples, but the present invention is not limited to these examples. Example 1 A silicon wafer having a <111> plane was 1 cm × 1 cm.
And ultrasonically washed with ethanol and ion-exchanged water for 10 minutes each. Next, the surface was treated with hydrofluoric acid for 10 seconds to remove the oxide layer on the surface, and washed with ion-exchanged water.
This was treated with concentrated nitric acid at room temperature for 1 hour, and further washed with ion-exchanged water to introduce a hydrophilic group on the surface of the silicon wafer. In this manner, 3-aminopropyltriethoxysilane vapor was brought into contact with the silicon wafer having the hydrophilic groups introduced on its surface for 20 hours to introduce amino groups on the surface. Next, 2-bromoisobutyric acid was reacted to introduce a bromo group on the wafer surface. A bromo group-introduced silicon wafer was placed in a flask, and 10 g of methyl methacrylate monomer was placed so that the wafer was completely immersed, followed by 0.12 g of cuprous chloride and 0.6 g of 4,4'-bipyridyl. Next, the operation of freezing the contents of the flask with liquid nitrogen, degassing under reduced pressure, and returning to room temperature was performed three times. After sufficient degassing, nitrogen was introduced into the flask and sealed. This was placed in a 130 ° C. oil bath and heated for 4 hours to allow the polymerization to proceed. After completion of the polymerization, the wafer was washed with methanol and ion-exchanged water, and dried in a 50 ° C. oven for 10 hours under vacuum.
【００３６】（表面フッ素化処理）次に、平行平板型の
プラズマ発生装置を用いて、ＲＦが１３．５６ＭＨｚ、
パワーが３００Ｗの条件にて、上記で得られたウェーハ
ーの表面を６フッ化プロピレンガスを用いたフッ素プラ
ズマ処理を行った。(Surface fluorination treatment) Next, using a parallel plate type plasma generator, the RF was 13.56 MHz,
Under the condition of a power of 300 W, the surface of the wafer obtained above was subjected to a fluorine plasma treatment using propylene hexafluoride gas.
【００３７】（表面層の誘電率測定）シリコンウェハー
に代えてＡｌを蒸着した基板上に、上記と同様の方法
で、ＰＭＭＡ層を形成した後にフッ素プラズマ処理を行
った。この膜上に銀ペーストを塗布し、Ａｌ下地層との
間で誘電率を測定したところ、周波数１ＭＨｚで誘電率
は２．４であった。(Measurement of Dielectric Constant of Surface Layer) Instead of a silicon wafer, a PMMA layer was formed on a substrate on which Al was deposited by the same method as described above, and then a fluorine plasma treatment was performed. A silver paste was applied on this film, and the permittivity between the paste and the Al underlayer was measured. As a result, the permittivity was 2.4 at a frequency of 1 MHz.
【００３８】（表面層の基板密着性評価）上記シリコン
ウェーハー上のフッ素プラズマ処理ＰＭＭＡ層に対し
て、ＪＩＳＤ‐０２０２に準じてクロスカット碁盤目試
験を行い、試験前後の表面の組成変化をＥＳＣＡ（Elec
toron Spectoroscopy for Chemical Analysis ）を用い
て調べたところ変化は認められず、剥がれは全く見られ
なかった。(Evaluation of Substrate Adhesion of Surface Layer) A cross-cut grid test was performed on the fluorine plasma-treated PMMA layer on the silicon wafer according to JISD-0202, and changes in the surface composition before and after the test were evaluated by ESCA ( Elec
When examined using toron spectoroscopy for chemical analysis), no change was observed and no peeling was observed.
【００３９】実施例２ 実施例１記載の方法に従って表面に親水基を導入したシ
リコンウェハーに、ブロモプロピルトリメトキシシラン
の蒸気を２０時間接触させ、表面にブロモ基を導入し
た。このシリコンウェハーを２００ｍｌフラスコに入
れ、アルゴンで３回置換し、ナトリウム／カリウム合金
で乾燥し、蒸留したＴＨＦで洗浄し、さらにＴＨＦをウ
ェハーが完全に浸るように加えた。これを０℃に冷却
し、ジーｔｅｒｔ−ブチルビフェニルリチウムを加え、
ブロモ基をリチオ化した。次にカルシウムハライドを加
え乾燥後、蒸留し、さらにモレキュラーシーブにより乾
燥したスチレンモノマー２ｇを加えて重合を開始した。
３時間重合させた後、重合溶液の一部を取り出し、反応
液中の未反応モノマーを、ガスクロマトグラフィーで測
定したところ検出出来ず、重合転化率は、ほぼ１００％
であることが確認された。重合終了後、ウェハーをメタ
ノール、イオン交換水で洗浄し、５０℃のオーブンで１
０時間真空乾燥した。このウェハーを用いて実施例１と
同様にフッ素プラズマ処理を行った。Example 2 A bromopropyltrimethoxysilane vapor was brought into contact with a silicon wafer having a surface into which a hydrophilic group was introduced according to the method described in Example 1 for 20 hours to introduce a bromo group into the surface. The silicon wafer was placed in a 200 ml flask, purged three times with argon, dried with a sodium / potassium alloy, washed with distilled THF, and THF was added to completely immerse the wafer. This was cooled to 0 ° C., di-tert-butylbiphenyllithium was added,
The bromo group was lithiated. Next, calcium halide was added, dried and distilled, and 2 g of styrene monomer dried by molecular sieve was added to initiate polymerization.
After polymerization for 3 hours, a part of the polymerization solution was taken out, and unreacted monomers in the reaction solution were not detected by gas chromatography, and the polymerization conversion was almost 100%.
Was confirmed. After the polymerization is completed, the wafer is washed with methanol and ion-exchanged water, and heated in a 50 ° C. oven.
Vacuum dried for 0 hours. Using this wafer, a fluorine plasma treatment was performed in the same manner as in Example 1.
【００４０】シリコンウェハーに代えてＡｌを蒸着した
基板上に、上記と同様の方法で、ポリスチレン層を形成
した後にフッ素プラズマ処理を行った。この膜上に銀ペ
ーストを塗布し、Ａｌ下地層との間で誘電率を測定した
ところ、周波数１ＭＨｚで誘電率は２．３であった。上
記シリコンウェーハー上のフッ素プラズマ処理ポリスチ
レン層に対して、実施例１と同様にクロスカット碁盤目
試験を行ったが剥がれは全く見られなかった。In place of a silicon wafer, a polystyrene layer was formed on a substrate on which Al was deposited by the same method as described above, and then a fluorine plasma treatment was performed. A silver paste was applied on this film, and the dielectric constant between the silver paste and the Al underlayer was measured. As a result, the dielectric constant was 2.3 at a frequency of 1 MHz. A cross-cut grid test was performed on the fluorine plasma-treated polystyrene layer on the silicon wafer in the same manner as in Example 1, but no peeling was observed.
【００４１】実施例３ 実施例１記載の方法に従って、表面に親水基を導入した
シリコンウェハーに、３−アミノプロピルトリエトキシ
シランの蒸気を２０時間接触させ、表面にアミノ基を導
入した。次に２−ブロモイソブチル酸を反応させ、ウェ
ーハー表面にブロモ基を導入した。ブロモ基を導入した
シリコンウェハーを、フラスコに入れ、ウェハーを完全
に浸すようにメチルメタクリレートモノマー１０ｇを入
れ、続いて塩化第１銅０．１２ｇ、４，４’−ビピリジ
ル０．６ｇを加えた。次にフラスコの内容物を液体窒素
で凍結させ減圧脱気した後室温に戻すという操作を３回
行い、充分に脱気した後、フラスコに窒素を導入し、シ
ールした。これを１３０℃のオイルバスに入れて４時間
加熱し、重合を進行させた。次に重合溶液を室温まで冷
却し、真空乾燥にてモノマーを系内から除いてテトラメ
チロールメタンテトラアクリレート（商品名ＡＴＭＭ
Ｔ；新中村化学（株）社製）２０ｇを加えて、再度１３
０℃に加熱し、１時間重合を行った。重合終了後、ウェ
ハーをメタノール、イオン交換水で洗浄し、５０℃のオ
ーブンで１０時間真空乾燥した。このウェハーに対し
て、実施例１に従って表面にフッ素プラズマ処理を行っ
た。Example 3 According to the method described in Example 1, a 3-aminopropyltriethoxysilane vapor was brought into contact with a silicon wafer having a surface into which a hydrophilic group had been introduced for 20 hours to introduce an amino group into the surface. Next, 2-bromoisobutyric acid was reacted to introduce a bromo group on the wafer surface. A bromo group-introduced silicon wafer was placed in a flask, and 10 g of methyl methacrylate monomer was placed so that the wafer was completely immersed, followed by 0.12 g of cuprous chloride and 0.6 g of 4,4'-bipyridyl. Next, the operation of freezing the contents of the flask with liquid nitrogen, degassing under reduced pressure, and returning to room temperature was performed three times. After sufficient degassing, nitrogen was introduced into the flask and sealed. This was placed in a 130 ° C. oil bath and heated for 4 hours to allow the polymerization to proceed. Next, the polymerization solution is cooled to room temperature, and the monomer is removed from the system by vacuum drying to remove tetramethylolmethanetetraacrylate (trade name: ATMM).
T; manufactured by Shin-Nakamura Chemical Co., Ltd.)
The mixture was heated to 0 ° C. and polymerized for 1 hour. After completion of the polymerization, the wafer was washed with methanol and ion-exchanged water, and dried in a 50 ° C. oven for 10 hours under vacuum. The surface of the wafer was subjected to a fluorine plasma treatment according to Example 1.
【００４２】シリコンウェハーに代えてＡｌを蒸着した
基板上に、上記と同様の方法で、ポリメチルメタクリレ
ート層を形成した後にフッ素プラズマ処理を行った。こ
の膜上に銀ペーストを塗布し、Ａｌ下地層との間で誘電
率を測定したところ、周波数１ＭＨｚで誘電率は２．２
であった。上記シリコンウェーハー上のフッ素プラズマ
処理ＰＭＭＡ層に対して、実施例１と同様にクロスカッ
ト碁盤目試験を行ったが剥がれは全く見られなかった。After a polymethyl methacrylate layer was formed on a substrate on which Al was deposited instead of a silicon wafer by the same method as described above, a fluorine plasma treatment was performed. A silver paste was applied on this film, and the dielectric constant between the silver paste and the Al underlayer was measured. As a result, the dielectric constant was 2.2 at a frequency of 1 MHz.
Met. A cross-cut grid test was performed on the fluorine plasma-treated PMMA layer on the silicon wafer in the same manner as in Example 1, but no peeling was observed.
【００４３】実施例４ 実施例１記載の方法に従って、表面に親水基を導入した
シリコンウェハーに、３−アミノプロピルトリエトキシ
シランの蒸気を２０時間接触させ、表面にアミノ基を導
入した。次に２−ブロモイソブチル酸を反応させ、ウェ
ーハー表面にブロモ基を導入した。ブロモ基を導入した
シリコンウェハーを、フラスコに入れ、ウェハーを完全
に浸すようにメチルメタクリレートモノマー１０ｇを入
れ、続いて塩化第１銅０．１２ｇ、４，４’−ビピリジ
ル０．６ｇを加えた。次にフラスコの内容物を液体窒素
で凍結させ減圧脱気した後室温に戻すという操作を３回
行い、充分に脱気した後、フラスコに窒素を導入し、シ
ールした。これを１３０℃のオイルバスに入れて４時間
加熱し、重合を進行させた。次に重合溶液を室温まで冷
却し、真空乾燥にてモノマーを系内から除いてパーフル
オロヘキシルメタクリレート２０ｇを加えて、再度１３
０℃に加熱し、１時間重合を行った。重合終了後、ウェ
ハーをメタノール、イオン交換水で洗浄し、５０℃のオ
ーブンで１０時間真空乾燥した。Example 4 According to the method described in Example 1, a 3-aminopropyltriethoxysilane vapor was brought into contact with a silicon wafer having a surface into which a hydrophilic group had been introduced for 20 hours to introduce an amino group into the surface. Next, 2-bromoisobutyric acid was reacted to introduce a bromo group on the wafer surface. A bromo group-introduced silicon wafer was placed in a flask, and 10 g of methyl methacrylate monomer was placed so that the wafer was completely immersed, followed by 0.12 g of cuprous chloride and 0.6 g of 4,4'-bipyridyl. Next, the operation of freezing the contents of the flask with liquid nitrogen, degassing under reduced pressure, and returning to room temperature was performed three times. After sufficient degassing, nitrogen was introduced into the flask and sealed. This was placed in a 130 ° C. oil bath and heated for 4 hours to allow the polymerization to proceed. Next, the polymerization solution was cooled to room temperature, the monomer was removed from the system by vacuum drying, and 20 g of perfluorohexyl methacrylate was added.
The mixture was heated to 0 ° C. and polymerized for 1 hour. After completion of the polymerization, the wafer was washed with methanol and ion-exchanged water, and dried in a 50 ° C. oven for 10 hours under vacuum.
【００４４】シリコンウェハーに代えてＡｌを蒸着した
基板上に、上記と同様の方法で、ポリマー層を形成した
後にフッ素プラズマ処理を行った。この膜上に銀ペース
トを塗布し、Ａｌ下地層との間で誘電率を測定したとこ
ろ、周波数１ＭＨｚで誘電率は２．２であった。上記シ
リコンウェーハー上のフッ素プラズマ処理ポリマー層に
対して、実施例１と同様にクロスカット碁盤目試験を行
ったが剥がれは全く見られなかった。In place of the silicon wafer, a polymer layer was formed on a substrate on which Al was deposited by the same method as described above, and then a fluorine plasma treatment was performed. A silver paste was applied on this film, and the dielectric constant between the silver paste and the Al base layer was measured. As a result, the dielectric constant was 2.2 at a frequency of 1 MHz. A cross-cut grid test was performed on the fluorine plasma-treated polymer layer on the silicon wafer in the same manner as in Example 1, but no peeling was observed.
【００４５】[0045]
【発明の効果】本発明の低誘電率絶縁膜層を有する半導
体基板の製造方法は上記の方法によるので誘電率が低
く、銅拡散がなく、耐薬品性、耐酸素プラズマ性が良好
で、微細な配線加工が可能である上に、基板との密着性
が優れた絶縁膜層が容易に形成でき、得られた低誘電率
絶縁膜層は誘電特性、導体層密着性、耐熱性に優れてお
り、信頼性の高い絶縁膜材料として各種各様の電子部品
へ広く使用することが可能である。このような材料を利
用することで、例えば集積回路（ＩＣ）、大規模集積回
路（ＬＳＩ）等の高集積度の半導体集積回路を含む高速
回路基板の提供が可能となる。特にクロック周波数が５
００ＭＨｚを超えるような高周波数下で使用される電子
機器部品に適用し、層間に用いる絶縁性樹脂として好適
である。The method of the present invention for producing a semiconductor substrate having a low dielectric constant insulating film layer has a low dielectric constant, no copper diffusion, good chemical resistance, excellent oxygen plasma resistance, In addition to being able to process wiring, an insulating film layer with excellent adhesion to the substrate can be easily formed, and the obtained low dielectric constant insulating film layer has excellent dielectric properties, conductive layer adhesion, and heat resistance. As a highly reliable insulating film material, it can be widely used for various kinds of electronic components. By using such a material, it is possible to provide a high-speed circuit board including a highly integrated semiconductor integrated circuit such as an integrated circuit (IC) and a large-scale integrated circuit (LSI). Especially when the clock frequency is 5
It is applied to electronic device parts used under high frequencies exceeding 00 MHz, and is suitable as an insulating resin used between layers.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｃ０８Ｊ 7/00 ＣＥＲ Ｃ０８Ｊ 7/00 ＣＥＲＺ ＣＥＺ ＣＥＺＺ ３０６ ３０６ Ｈ０１Ｌ 21/312 Ｈ０１Ｌ 21/312 Ｃ 21/768 Ｃ０８Ｌ 101:00 // Ｃ０８Ｌ 101:00 Ｈ０１Ｌ 21/90 Ｓ (72)発明者 杉本 俊哉 大阪府三島郡島本町百山２ー１ 積水化学 工業株式会社内 Ｆターム(参考） 4F073 AA03 AA12 BA18 BA19 BA22 BA27 CA01 CA67 4J011 CA02 CA08 CC04 CC06 CC07 PA13 PB02 PB14 PB16 PC02 PC08 PC09 4J026 AC00 BA04 BA15 BA27 DB06 FA05 GA08 HA39 HE06 5F033 QQ00 QQ91 RR21 SS21 SS30 WW00 WW09 XX03 XX13 XX23 XX28 5F058 AA08 AA10 AC03 AE04 AF10 AG07 AH02 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) C08J 7/00 CER C08J 7/00 CERZ CEZ CEZZ 306 306 H01L 21/312 H01L 21/312 C 21/768 C08L 101: 00 // C08L 101: 00 H01L 21/90 S (72) Inventor Toshiya Sugimoto 2-1 Momoyama, Shimamotocho, Mishima-gun, Osaka Prefecture F-term in Sekisui Chemical Co., Ltd. 4F073 AA03 AA12 BA18 BA19 BA22 BA27 CA01 CA67 4J011 CA02 CA08 CC04 CC06 CC07 PA13 PB02 PB14 PB16 PC02 PC08 PC09 4J026 AC00 BA04 BA15 BA27 DB06 FA05 GA08 HA39 HE06 5F033 QQ00 QQ91 RR21 SS21 SS30 WW00 WW09 XX03 XX13 XX23 XX28 5F0A A03A08A03A03
Claims (12)
た、基板表面にグラフトもしくは吸着された分子に化学
的に結合された、又は基板表面内部もしくは基板表面上
に形成された塗膜層に含有された、Ａ）重合反応開始性
の官能基、Ｂ）重合連鎖移動性の官能基、Ｃ）重合性の
官能基の内少なくとも一つの官能基を有する化合物を基
点に、基板表面上でモノマーを重合せしめ低誘電率の層
間絶縁膜層を形成する工程を含むことを特徴とする半導
体基板の製造方法。The present invention relates to a coating film formed on a substrate surface or chemically bonded to molecules grafted or adsorbed on a substrate surface, chemically bonded to molecules grafted or adsorbed on a substrate surface, or contained in a coating layer formed on or on a substrate surface. A) polymerizing a monomer on the substrate surface, starting from a compound having at least one of a functional group capable of initiating a polymerization reaction; A method for manufacturing a semiconductor substrate, comprising a step of forming a low dielectric constant interlayer insulating film layer.
ビングカチオン重合、リビングアニオン重合、イニファ
ーター重合、グループトランスファー重合からなる群よ
り選ばれる少なくとも一種類の重合反応であることを特
徴とする請求項１に記載の半導体基板の製造方法。2. The polymerization reaction according to claim 1, wherein the polymerization reaction is at least one kind of polymerization reaction selected from the group consisting of living radical polymerization, living cationic polymerization, living anion polymerization, iniferter polymerization, and group transfer polymerization. 3. The method for manufacturing a semiconductor substrate according to item 1.
ル、ビニルエステル、芳香族ビニル、ビニルエーテル、
環状エーテルモノマーからなる群より選ばれる少なくと
も一種類のモノマーを含有する組成物であることを特徴
とする請求項１、２の何れか１項に記載の半導体基板の
製造方法。3. The method according to claim 1, wherein the monomer is (meth) acrylate, vinyl ester, aromatic vinyl, vinyl ether,
The method for producing a semiconductor substrate according to claim 1, wherein the composition is a composition containing at least one kind of monomer selected from the group consisting of cyclic ether monomers.
る段階での重合においては、異なるモノマー組成物を用
いて多段階に重合せしめることを特徴とする請求項１〜
３の何れか１項に記載の半導体基板の製造方法。4. The method according to claim 1, wherein in the polymerization at least in a continuous stage on the substrate surface, the polymerization is carried out in multiple stages using different monomer compositions.
3. The method of manufacturing a semiconductor substrate according to claim 3.
絶縁膜層が半導体基板に形成された後に、さらにフッ素
化合物を用いてプラズマ処理せしめることを特徴とする
半導体基板の製造方法。5. A method of manufacturing a semiconductor substrate, comprising, after forming the interlayer insulating film layer according to claim 1 on a semiconductor substrate, further performing a plasma treatment using a fluorine compound. .
体基板の製造方法によって作製され、ポリマーの末端が
基板材料表面に化学的に結合された官能基に化学的に結
合されていることを特徴とする半導体基板。6. The method according to claim 1, wherein the terminal of the polymer is chemically bonded to a functional group chemically bonded to the surface of the substrate material. A semiconductor substrate.
ｋｇ／Ｌであることを特徴とする請求項１〜５の何れか
１項に記載の製造法によって作製されたことを特徴とす
る半導体基板。7. The bulk density of the interlayer insulating film layer is 0.1 to 0.9.
A semiconductor substrate manufactured by the manufacturing method according to claim 1, wherein the semiconductor substrate is kg / L.
作成され、基板の厚み方向に対して、嵩密度が異なる層
間絶縁膜層が複数積層された多層積層構造を有すること
を特徴とする半導体基板。8. A multi-layer structure in which a plurality of interlayer insulating layers having different bulk densities in a thickness direction of a substrate are formed by the manufacturing method according to claim 4 or 5. Semiconductor substrate.
作製され、ポリマーが、異種モノマーからなるブロック
構造を有することを特徴とする半導体基板。9. A semiconductor substrate produced by the production method according to claim 4, wherein the polymer has a block structure composed of different monomers.
って作成され、ポリマーが、分子鎖の一部に分岐構造を
有することを特徴とする半導体基板。10. A semiconductor substrate produced by the production method according to claim 4, wherein the polymer has a branched structure in a part of a molecular chain.
造方法によって作製され、ポリマーの側鎖及び／または
末端に反応性の官能基を有することを特徴とする半導体
基板。11. A semiconductor substrate produced by the production method according to claim 1, wherein the semiconductor substrate has a reactive functional group on a side chain and / or a terminal of the polymer.
未満であることを特徴とする請求６〜11の何れか１項に
記載の半導体基板。12. The dielectric constant (k) of the interlayer insulating film is 2.8.
The semiconductor substrate according to claim 6, wherein:
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010140372A1 (en) * | 2009-06-03 | 2010-12-09 | 国立大学法人京都大学 | Polymerization initiator for living radical polymerization |
| JP2011242809A (en) * | 2001-05-15 | 2011-12-01 | E Ink Corp | Electrophoretic particles |
| WO2014109258A1 (en) * | 2013-01-08 | 2014-07-17 | 富士フイルム株式会社 | Method for producing living polymer on base, block copolymer, and film having microphase-separated structure produced using same and method for production thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103282478B (en) * | 2010-12-15 | 2014-12-10 | 罗地亚（中国）投资有限公司 | Fluoropolymer compositions |
-
2000
- 2000-08-08 JP JP2000239942A patent/JP3817121B2/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011242809A (en) * | 2001-05-15 | 2011-12-01 | E Ink Corp | Electrophoretic particles |
| JP2011242810A (en) * | 2001-05-15 | 2011-12-01 | E Ink Corp | Electrophoretic particles |
| WO2010140372A1 (en) * | 2009-06-03 | 2010-12-09 | 国立大学法人京都大学 | Polymerization initiator for living radical polymerization |
| CN102459356A (en) * | 2009-06-03 | 2012-05-16 | 国立大学法人京都大学 | Polymerization initiator for living radical polymerization |
| US8742045B2 (en) | 2009-06-03 | 2014-06-03 | Kyoto University | Polymerization initiator for living radical polymerization |
| WO2014109258A1 (en) * | 2013-01-08 | 2014-07-17 | 富士フイルム株式会社 | Method for producing living polymer on base, block copolymer, and film having microphase-separated structure produced using same and method for production thereof |
| JPWO2014109258A1 (en) * | 2013-01-08 | 2017-01-19 | 富士フイルム株式会社 | Method for producing living polymer on support, block copolymer, microphase separation structure membrane using the same, and method for producing the same |
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