JP2001223391A - Forming method of light-emitting diode - Google Patents

Forming method of light-emitting diode

Info

Publication number
JP2001223391A
JP2001223391A JP2000035644A JP2000035644A JP2001223391A JP 2001223391 A JP2001223391 A JP 2001223391A JP 2000035644 A JP2000035644 A JP 2000035644A JP 2000035644 A JP2000035644 A JP 2000035644A JP 2001223391 A JP2001223391 A JP 2001223391A
Authority
JP
Japan
Prior art keywords
led chip
emitting diode
package
light emitting
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000035644A
Other languages
Japanese (ja)
Other versions
JP4366810B2 (en
Inventor
Hiroaki Tamemoto
広昭 為本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Original Assignee
Nichia Chemical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP2000035644A priority Critical patent/JP4366810B2/en
Publication of JP2001223391A publication Critical patent/JP2001223391A/en
Application granted granted Critical
Publication of JP4366810B2 publication Critical patent/JP4366810B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a forming method of a flip-chip type light-emitting diode where in the junction between an electrode of an LED chip and a lead electrode of a package is stabilized while thickness as a light-emitting diode is reduced for significantly improved mass-production efficiency as well as lower production cost. SOLUTION: A part of the lead electrode is pressurized to raise other part, thus forming a protrusion for connection between the protrusion and the electrode of LED chip. Related to the junction between the electrode of LED chip and the lead electrode, the LED chip is fixed by melting/coagulation of a solder- plating, a cream solder, or a solder ball applied on the surface of lead electrode.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、一対のリード電極
を有するパッケージ上にＬＥＤチップが配置された発光
ダイオードの形成方法に係わり、特に、前記各リード電
極の一部分に突起部を形成する工程を有する発光ダイオ
ードの形成方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a light emitting diode in which an LED chip is disposed on a package having a pair of lead electrodes, and more particularly to a method for forming a projection on a part of each of the lead electrodes. And a method for forming a light emitting diode having the same.

【０００２】[0002]

【従来の技術】発光ダイオードは、小型で効率が良く、
鮮やかな色の発光をする。また低消費電力であるほか、
半導体素子であるために球切れなどの心配がない。初期
駆動特性が優れ、振動やＯＮ／ＯＦＦ点灯の繰り返しに
強いという特徴を有する。このような理由から、発光ダ
イオードは近年特に、様々な分野で種々の光源として利
用されている。なかでも、ＬＥＤチップが半導体成膜用
基板上に形成された活性層面側の面と、ＬＥＤチップを
配置させるパッケージとが対向するように取り付けられ
た構造（フリップチップ型）の発光ダイオードは、ＬＥ
Ｄチップの半導体成膜用基板上に形成された活性層面側
と反対の面が発光ダイオード上面を向いているためにチ
ップ内での熱が発光ダイオード上方へと放熱される効果
が高く、ゆえに高電力消費が可能なため、特に多く用い
られている。またＬＥＤチップの電極とパッケージのリ
ード電極とを直接接続するためチップを電気接続する際
に金線などを用いてワイヤーボンディングする必要がな
いという理由、さらにそのワイヤが無い分ＬＥＤチップ
とパッケージを合わせただけの厚みの発光ダイオードと
でき薄型化が図れるという理由などから、量産されやす
くまた広い分野で頻繁に利用されている。2. Description of the Related Art Light emitting diodes are small and efficient.
It emits bright colors. In addition to low power consumption,
Since it is a semiconductor element, there is no fear of breaking the ball. It has excellent initial drive characteristics and is resistant to vibration and ON / OFF lighting. For these reasons, light emitting diodes have recently been used as various light sources in various fields in recent years. In particular, a light-emitting diode having a structure (flip chip type) in which an LED chip is mounted so that a surface on an active layer side formed on a semiconductor film-forming substrate and a package on which the LED chip is arranged faces each other is an LE.
Since the surface opposite to the active layer surface formed on the semiconductor film formation substrate of the D chip faces the upper surface of the light emitting diode, the effect of radiating the heat in the chip to the upper side of the light emitting diode is high. Since power consumption is possible, it is widely used. Also, because the LED chip electrode and the lead electrode of the package are directly connected, there is no need to wire bond using gold wire when electrically connecting the chip. It is easily mass-produced and is frequently used in a wide range of fields, for example, because a light emitting diode having a thickness as small as possible can be achieved.

【０００３】近年、上記のように高密度実装が可能なＬ
ＥＤ発光装置として、ＬＥＤチップとほぼ同等のサイズ
を有するパッケージ、いわゆるＣＳＰ（Ｃｈｉｐ Ｓｃ
ａｌｅ Ｐａｃｋａｇｅ）が注目されている。その一例
を図５に示す。このＣＳＰとしては従来、次に詳述する
ようにフリップチップ接続方式（フェースダウンボンデ
ィング法）を用いて形成される方法がある。[0003] In recent years, as described above, L
As an ED light emitting device, a package having substantially the same size as an LED chip, a so-called CSP (Chip Sc)
are attracting attention. An example is shown in FIG. Conventionally, as the CSP, there is a method formed by using a flip chip connection method (face down bonding method) as described in detail below.

【０００４】まず、ウェーハ状態のチップの金属パッド
にメッキまたは金ボール等（５６）を付着させて突起部
分（バンプ）を形成した後、ダイシングにより各チップ
として切り離す。またこのチップ５１が配置されるパッ
ケージ５３上にも、前記金属パッドと対応する位置に半
田バンプ５７を形成させる。[0004] First, a projection (bump) is formed by plating or attaching a gold ball (56) to a metal pad of a chip in a wafer state, and then separated into individual chips by dicing. Also, on the package 53 on which the chip 51 is arranged, solder bumps 57 are formed at positions corresponding to the metal pads.

【０００５】次に上記パッケージを、フリップチップボ
ンダの台上に空気吸引することにより固定させ、同時に
上記チップの方も、半導体成膜用基板上に形成された活
性層面側と反対の面（チップの裏面）をフリップチップ
ボンダのホルダで空気吸引して保持する。そしてホルダ
側を台上にゆっくりと接近させてチップ側のバンプ５６
とパッケージ側のバンプ５７を対向させ、位置を合わせ
て密着・加圧し、両バンプの溶解温度に設定したリフロ
ー炉内に通して、実際に両バンプを接合させる。その後
冷却させ、チップとパッケージとの間に出来た隙間、す
なわち両バンプを合わせた高さだけの空間に、毛細管現
象を用いて樹脂５８を充填する。このようにしてチップ
とほぼ同等サイズのＣＳＰが形成される。さらにその
後、ＬＥＤチップを外部から保護する目的、チップから
の光を外部へと均等に取り出す等の目的で、透光性樹脂
５５を用いてＬＥＤチップ全体を封止する場合もある。Next, the package is fixed on a flip chip bonder table by suctioning air, and at the same time, the chip is also fixed to a surface (chip) opposite to the active layer surface formed on the semiconductor film forming substrate. (Back side) is suctioned and held by the holder of the flip chip bonder. Then, the holder side is slowly brought close to the table, and the bumps 56 on the chip side are moved.
And the bumps 57 on the package side are opposed to each other, and are closely contacted and pressurized with each other in position, and are passed through a reflow furnace set at a melting temperature of both bumps to actually join the two bumps. Thereafter, the resin 58 is cooled, and a gap formed between the chip and the package, that is, a space having a height corresponding to both bumps is filled with the resin 58 by using a capillary phenomenon. In this way, a CSP having substantially the same size as the chip is formed. Further, thereafter, the entire LED chip may be sealed with the translucent resin 55 for the purpose of protecting the LED chip from the outside, extracting light from the chip evenly to the outside, or the like.

【０００６】[0006]

【発明が解決しようとする課題】しかしながら上述のよ
うな形成方法でできた発光ダイオードは、チップとパッ
ケージとの間に出来る隙間を樹脂で充填することで両者
のバンプの接合部に加わる応力を緩和できるものの、そ
の樹脂を毛細管現象等を利用して該隙間に注入するため
非常に多大な時間を要することとなり、量産性の向上を
妨げていた。それに前記隙間に樹脂を充填した後さらに
透光性樹脂を用いてＬＥＤチップ全体を封止する場合、
樹脂注入という作業工程が二段階におよび、量産過程に
おいては効率的ではなかった。However, in the light emitting diode formed by the above-described method, the gap between the chip and the package is filled with resin to reduce the stress applied to the joint between the two bumps. Although it is possible, it takes a very long time to inject the resin into the gap by utilizing the capillary phenomenon or the like, which hinders improvement in mass productivity. When the entire LED chip is further sealed with a translucent resin after filling the gap with a resin,
The resin injection process involved two steps and was not efficient in the mass production process.

【０００７】特にＬＥＤチップ側のバンプに金メッキを
用いた場合、パッケージ側の半田バンプとの接合部分は
強度が低下しやすく、また濡れの状態も悪くなるため接
合が不安定となるので、少なくともその接合部分に樹脂
を注入して接合部分を保護し、安定させる必要性があっ
た。In particular, when gold plating is used for the bumps on the LED chip side, the strength of the joint with the solder bump on the package side is liable to decrease, and the wet state deteriorates, so that the bonding becomes unstable. There is a need to inject a resin into the joint to protect and stabilize the joint.

【０００８】また、バンプには１５〜３０μｍ厚さがあ
りその形成には電気メッキが用いられるのが一般的であ
るが、このようにバンプ形成には薄膜被着、フォトリソ
グラフィ、エッチング、メッキ工程という特殊なプロセ
スが必要で、そのために歩留まり低下やバンプ形成コス
トの上昇は避けられなかった。その上チップとパッケー
ジの電極両方にバンプ形成を行うと大変な時間を要する
こととなり、効率的な大量生産が不可能であった。Further, the bumps have a thickness of 15 to 30 μm and are generally formed by electroplating. In this way, the bumps are formed by thin film deposition, photolithography, etching and plating steps. Therefore, a reduction in yield and an increase in bump formation cost were unavoidable. In addition, when bumps are formed on both the chip and the package electrodes, it takes a very long time, and efficient mass production is impossible.

【０００９】さらに、チップとパッケージの電極両方に
バンプ形成すると、バンプ形成工程にそれだけ時間を要
するだけでなく、チップとパッケージの間に出来る隙間
が大きくなり、発光ダイオードとしての薄型化を図ると
いうフリップチップ型発光ダイオードの本来の目的を十
分には果たせなくなっていた。Further, when bumps are formed on both the chip and package electrodes, not only the time required for the bump formation process is increased, but also the gap formed between the chip and the package becomes large, and the thickness of the light emitting diode is reduced. The original purpose of the chip type light emitting diode cannot be sufficiently fulfilled.

【００１０】そこでこの発明は、上述のようなバンプ形
成方法を用いずに、ＬＥＤチップを配置させるパッケー
ジのリード電極上にバンプ的な突起部を容易に形成する
ことができ、また発光ダイオードとしての薄型化も実現
でき、さらに量産性を格段に向上させることができる発
光ダイオードの形成方法を提供することを目的としてい
る。Therefore, according to the present invention, a bump-like projection can be easily formed on a lead electrode of a package on which an LED chip is arranged without using the above-described bump formation method. It is an object of the present invention to provide a method for forming a light emitting diode, which can realize a reduction in thickness and can further improve mass productivity remarkably.

【００１１】[0011]

【課題を解決するための手段】上記の目的を達成するた
めに本願発明者は、一対のリード電極を有するパッケー
ジと、該一対のリード電極上に配置させるとともに電気
的に接続させたフリップチップ型ＬＥＤチップと、該Ｌ
ＥＤチップを被覆する透光性樹脂とを有する発光ダイオ
ードの形成方法であって、前記各リード電極の一部分を
押圧することにより他の一部分を***させて形成される
突起部上に、前記ＬＥＤチップの電極を配置させること
を特徴とする発光ダイオードの形成方法を発明した。ま
たこの形成方法は、少なくとも一対のリード電極を有す
るパッケージと、前記リード電極上に配置され、かつ電
気的に接続されたＬＥＤチップとを有する発光ダイオー
ドの形成方法であって、前記ＬＥＤチップと電気的に接
続させる該各リード電極の一部分を押圧することにより
他の一部分を***させて各リード電極表面に突起部を形
成する工程と、前記突起部を介してリード電極上にＬＥ
Ｄチップを固定させる工程と、前記ＬＥＤチップ上に透
光性樹脂を配置する工程とを有する発光ダイオードの形
成方法であり、さらに、パッケージ表面に形成された一
対のリード電極に半田メッキが施され、該リード電極と
ＬＥＤチップとの接合部は、該半田メッキを溶融・凝固
することでＬＥＤチップを固定していることを特徴とす
る発光ダイオードの形成方法である。また、パッケージ
表面に形成された一対のリード電極に、膜厚が１μｍ以
下の金メッキが施され、さらに該リード電極表面にクリ
ーム半田またはフラックスを用いて半田ボールを供給
し、該リード電極とＬＥＤチップとの接合部は、該半田
を溶融・凝固させることでＬＥＤチップを固定している
ことを特徴とする発光ダイオードの形成方法である。In order to achieve the above object, the present inventor has proposed a package having a pair of lead electrodes and a flip chip type which is disposed on the pair of lead electrodes and electrically connected thereto. An LED chip and the L
A method of forming a light emitting diode having a light-transmitting resin that covers an ED chip, wherein the LED chip is formed on a protrusion formed by pressing a part of each of the lead electrodes to protrude the other part. And a method for forming a light emitting diode, wherein the electrodes are arranged. The method for forming a light emitting diode includes a package having at least a pair of lead electrodes and an LED chip disposed on and electrically connected to the lead electrode, wherein the LED chip is electrically connected to the LED chip. Forming a projection on the surface of each lead electrode by pressing a part of each of the lead electrodes to be electrically connected to each other to form a protrusion on the surface of each lead electrode;
A method for forming a light emitting diode, comprising: fixing a D chip; and arranging a light-transmitting resin on the LED chip. Further, a pair of lead electrodes formed on a surface of the package are plated with solder. A method of forming a light emitting diode, characterized in that the bonding portion between the lead electrode and the LED chip fixes the LED chip by melting and solidifying the solder plating. Also, a pair of lead electrodes formed on the package surface are plated with gold having a thickness of 1 μm or less, and solder balls are supplied to the surface of the lead electrode using cream solder or flux. Is a method for forming a light emitting diode, wherein the LED chip is fixed by melting and solidifying the solder.

【００１２】具体的にこの発明は、ＬＥＤチップを配置
させるパッケージに一対のリード電極を形成した後、凸
型ポンチ（押圧片）を用いて該リード電極の一部分を押
圧することにより他の一部分を***させてバンプ的な突
起部を形成させる方法である。これにより従来のように
特殊なプロセス経てバンプを形成する必要がなくなり、
容易にバンプ的な突起部を形成することが可能になり、
量産効率を格段に向上させることができる。Specifically, according to the present invention, a pair of lead electrodes is formed on a package in which an LED chip is arranged, and then a part of the lead electrode is pressed by using a convex punch (pressing piece) to form another part. This is a method of forming bump-like projections by protruding. This eliminates the need to form bumps through a special process as in the past,
It is possible to easily form bump-like projections,
Mass production efficiency can be significantly improved.

【００１３】またＬＥＤチップは直接パッケージのリー
ド電極に接続され、その接合部はリード電極に施された
半田メッキを溶融・凝固することでＬＥＤチップを固定
させるか、あるいは膜厚が１μｍ以下の金メッキを施し
たリード電極表面にさらにクリーム半田またはフラック
スを用いて半田ボールを施し、該半田を溶融・凝固させ
ることでＬＥＤチップを固定させるので、従来のように
両者のバンプ同士を接続させる場合と違って接合部の面
積を広くとることができ、ゆえに接合部の安定感が増
し、接合部補強のための樹脂をＬＥＤチップとパッケー
ジとの間にできる隙間に注入させる必要がなくなる。ゆ
えに、透光性樹脂を用いてＬＥＤチップ全体を封止する
場合でも、樹脂注入という作業工程が二段階に及ぶこと
はなくなった。The LED chip is directly connected to the lead electrode of the package, and the joint portion is fixed by melting and solidifying the solder plating applied to the lead electrode, or gold plating having a thickness of 1 μm or less. A solder ball is further applied to the surface of the lead electrode which has been subjected to soldering using cream solder or flux, and the solder is melted and solidified to fix the LED chip, which is different from the conventional case where both bumps are connected to each other. As a result, the area of the joint can be widened, so that the sense of stability of the joint increases, and it is not necessary to inject resin for reinforcing the joint into the gap formed between the LED chip and the package. Therefore, even when the entire LED chip is sealed using a translucent resin, the work process of resin injection does not extend to two steps.

【００１４】さらに、チップ側の電極には突起部を形成
せず、パッケージ側の電極のみに突起部を形成してＬＥ
Ｄチップの電極と直接接続するので作業工程が効率化さ
れるだけでなく、ＬＥＤチップとパッケージとの隙間が
少なくなり、発光ダイオードとしての薄型化を図るとい
うフリップチップ型発光ダイオードの本来の目的を十分
に果たすことが出来る。発光ダイオードが様々な分野で
種々の光源として利用されている今日においては、薄型
化されればその使用用途や範囲をさらに広げることがで
きる。本発明によれば、例えば携帯型プリンターやスキ
ャナー、またバックライト等種々の小型機器に組み込ま
れる光源として、現在よりも薄型の発光ダイオードを提
供でき、またそれらは小型機器自体のさらなる小型化を
実現させることできる。Further, no protrusion is formed on the electrode on the chip side, and a protrusion is formed only on the electrode on the package side to form an LE.
The original purpose of the flip-chip type light-emitting diode is to directly connect with the electrode of the D-chip, not only to improve the efficiency of the work process but also to reduce the gap between the LED chip and the package and to make it thinner as a light-emitting diode. I can fulfill it enough. In today's world where light-emitting diodes are used as various light sources in various fields, their use and range can be further expanded if they are made thinner. ADVANTAGE OF THE INVENTION According to this invention, as a light source incorporated in various small apparatuses, such as a portable printer and a scanner, and a backlight, a light emitting diode thinner than the present can be provided, and they realize further miniaturization of the small apparatus itself. Can be done.

【００１５】[0015]

【発明の実施の形態】以下、本発明の実施の一形態につ
いて図１〜４に基づいて説明するが、これのみに限ると
いうことはない。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 1 to 4, but is not limited thereto.

【００１６】まず発光素子として、主発光ピークが４７
０ｎｍのＧａＩｎＮ半導体を用いた。ＬＥＤチップは、
洗浄させたサファイヤ基板上にＴＭＧ（トリメチルガリ
ウム）ガス、ＴＭＩ（トリメチルインジュウム）ガス、
窒素ガス及びドーパントガスをキャリアガスと共に流
し、ＭＯＣＶＤ法で窒化ガリウム系化合物半導体を成膜
させることにより形成させた。ドーパントガスとしてＳ
ｉＨ4とＣｐ2Ｍｇと、を切り替えることによってｎ型導
電性を有する窒化ガリウム系半導体とｐ型導電性を有す
る窒化ガリウム系半導体を形成しｐｎ接合を形成させ
た。（なお、ｐ型半導体は、成膜後４００℃以上でアニ
ールさせてある。）エッチングによりｐｎ各半導体表面
を露出させた後、スパッタリング法により各電極をそれ
ぞれ形成させた。こうして出来上がった半導体ウエハー
をスクライブラインを引いた後、外力により分割させ発
光素子として２５０μｍ角のＬＥＤチップ１１を形成さ
せた。First, as a light emitting element, the main light emission peak is 47
A GaInN semiconductor of 0 nm was used. LED chip,
TMG (trimethyl gallium) gas, TMI (trimethyl indium) gas,
It was formed by flowing a nitrogen gas and a dopant gas together with a carrier gas and forming a gallium nitride-based compound semiconductor by MOCVD. S as dopant gas
By switching between iH 4 and Cp 2 Mg, a gallium nitride-based semiconductor having n-type conductivity and a gallium nitride-based semiconductor having p-type conductivity were formed, and a pn junction was formed. (Note that the p-type semiconductor was annealed at 400 ° C. or higher after film formation.) After exposing the respective pn semiconductor surfaces by etching, each electrode was formed by a sputtering method. After a scribe line was drawn on the semiconductor wafer thus completed, the wafer was divided by an external force to form LED chips 11 of 250 μm square as light emitting elements.

【００１７】次に、金型を用いてその内部に成形樹脂を
注入させ成形し、冷却後金型から取り出すことによりパ
ッケージ１３を形成させる。その後一対のリード電極１
４を、立体メッキを用いてパッケージ１３の表面に沿う
ようにして形成し、さらにそのリード電極表面に、半田
メッキ装置を用いて半田メッキ２５を施した。こうして
できた一対のリード電極を有するパッケージ２３（図
２）に加熱を施し、図２（Ａ）に示すように、形成した
両電極の間ａに向かって押圧片（凸形状のポンチ）２６
をパッケージの上方より降下させ、リード電極の熱が冷
めないうちに両リード電極２４を加圧するようにパッケ
ージの左右方向（矢印方向）へと数回動かす。この作動
によりリード電極の加圧された部分は盛り上がり、図１
（Ａ）のリード電極１４の一部分である１６のような、
ＬＥＤチップの電極とパッケージのリード電極とを直接
接続させるための突起部をごく容易に形成させることが
できる。Next, a molding resin is injected into the inside of the mold using a mold, molded, and taken out of the mold after cooling, whereby the package 13 is formed. Then, a pair of lead electrodes 1
4 was formed along the surface of the package 13 using three-dimensional plating, and further, solder plating 25 was applied to the surface of the lead electrode using a solder plating apparatus. The package 23 (FIG. 2) having a pair of lead electrodes thus formed is heated, and as shown in FIG. 2A, a pressing piece (convex punch) 26 is pressed between the formed two electrodes a.
Is lowered from above the package, and is moved several times in the left-right direction (arrow direction) of the package so as to press both lead electrodes 24 before the heat of the lead electrodes cools. By this operation, the pressurized portion of the lead electrode rises, and FIG.
16A which is a part of the lead electrode 14 of FIG.
The projection for directly connecting the electrode of the LED chip and the lead electrode of the package can be formed very easily.

【００１８】このような突起部はあるいは、図２（Ｂ）
に示すように、一対のリード電極を有するパッケージ２
３に加熱を施した後、２７のような形状の押圧片（凸形
状のポンチ）をパッケージ上方からリード電極２４上に
真っ直ぐに降下させ（矢印）、リード電極に凹部を形
成させた後、続いて押圧片２７を真っ直ぐ上方に戻す
（矢印）。この作動によりリード電極を加圧して図１
（Ｂ）１７にみられるような凹部を形成することで、多
少ではあるが同時に１６の部分が盛り上がり（５〜８０
μｍ盛り上がる）、その部分をＬＥＤチップの電極とパ
ッケージのリード電極とを直接接続させるための突起部
とすることができる。Such a projection may alternatively be provided in FIG.
As shown in FIG. 2, a package 2 having a pair of lead electrodes
3 is heated, and a pressing piece (a convex punch) having a shape like 27 is dropped straight down from above the package onto the lead electrode 24 (arrow) to form a concave portion in the lead electrode. To return the pressing piece 27 straight upward (arrow). By this operation, the lead electrode is pressurized and
(B) By forming a concave portion as seen in 17, the portion of 16 is slightly raised simultaneously (5 to 80).
μm), and that portion can be used as a projection for directly connecting the electrode of the LED chip and the lead electrode of the package.

【００１９】図４には、これらの方法で形成したいくつ
かのパターンの突起部の形状を、パッケージ上面から見
た概略図で示してある（斜線部が突起部を示す）。図１
の発光ダイオードのリード電極は、図４（ａ）に対応し
ている。FIG. 4 is a schematic diagram showing the shapes of the projections of several patterns formed by these methods as viewed from the top of the package (shaded portions indicate the projections). FIG.
The lead electrode of the light emitting diode corresponds to FIG.

【００２０】これら比較的簡単な方法で従来のバンプに
代わるような突起部分をパッケージ側電極のみに形成す
るので、複雑なバンプ形成工程を削除でき、大幅なコス
トダウンと効率的な量産が可能となる。また突起部分は
パッケージ側電極のみに形成するので、従来のようにＬ
ＥＤチップとパッケージの電極両方にバンプ形成する場
合と比べると形成工程の時短が可能になり、またチップ
とパッケージの間に出来る隙間を小さくできるので、発
光ダイオードとしての薄型化を図るというフェースダウ
ン構造の本来の目的をより十分に果たすことができる。Since the projections that replace the conventional bumps are formed only on the package side electrodes by these relatively simple methods, a complicated bump formation process can be eliminated, and a significant cost reduction and efficient mass production can be realized. Become. Also, since the protruding portion is formed only on the package side electrode, the L
A face-down structure that reduces the time required for the formation process compared to the case where bumps are formed on both the electrodes of the ED chip and the package, and reduces the gap between the chip and the package, thereby reducing the thickness of the light emitting diode. Can fulfill its original purpose more fully.

【００２１】次に図３に示すように、上述の方法でリー
ド電極３４の一部分に突起部３６を形成したパッケージ
３３を、フリップチップボンダの台上３９に該突起部を
有する面が上面になるように配置して空気吸引すること
により固定させ、同時に前述の方法で形成させておいた
ＬＥＤチップ３１の方も、半導体成膜用基板上に形成さ
れた活性層面側と反対の面（チップの裏面）をフリップ
チップボンダのホルダ３８で空気吸引して保持する。そ
してホルダ側を台上に接近させてチップ側の電極部３２
とパッケージ側のリード電極突起部３６を対向させ、位
置を合わせて密着・加圧し、先にパッケージのリード電
極表面に施しておいたメッキ層の溶解温度に設定したリ
フロー炉内に通して、実際に両者をフェースダウン接合
させる。その後冷却させると、いったん溶解されたメッ
キ層が再び凝固し、それによってＬＥＤチップをパッケ
ージのリード電極に直接接着・固定させることができ、
しかもその接合部の面積を比較的大きくとることができ
るので、接合部の安定感が増す。あるいは、前述したリ
ード電極表面に半田メッキを施す工程において、膜厚が
１μｍ以下の金メッキをリード電極表面に施し、さらに
該リード電極表面にクリーム半田またはフラックスを用
いて半田ボールを供給し、該リード電極とＬＥＤチップ
との接合部を、該半田を溶融・凝固させることでＬＥＤ
チップを固定させても、同様の効果が得られる。この半
田ボールとは、粒径が、先述したような従来方法に用い
られるバンプの厚みよりも小さい微粒子である。Next, as shown in FIG. 3, the package 33 having the protrusion 36 formed on a part of the lead electrode 34 by the above-described method is mounted on the flip-chip bonder table 39 so that the surface having the protrusion becomes the upper surface. The LED chip 31, which is arranged in such a manner as to be fixed by sucking air and formed at the same time by the above-described method, also has a surface opposite to the surface of the active layer formed on the semiconductor film forming substrate (the surface of the chip). The back surface) is sucked and held by the holder 38 of the flip chip bonder. Then, the holder side is brought close to the table, and the electrode part 32 on the chip side is moved.
The package and the lead electrode protrusions 36 on the package side are opposed to each other, and are closely contacted and pressurized with each other, and passed through a reflow furnace set at the melting temperature of the plating layer previously applied to the surface of the lead electrode of the package. Are joined face down. After cooling, the dissolved plating layer solidifies again, which allows the LED chip to be directly bonded and fixed to the lead electrode of the package,
Moreover, since the area of the joint can be made relatively large, the sense of stability of the joint increases. Alternatively, in the step of applying solder plating to the lead electrode surface described above, gold plating having a thickness of 1 μm or less is applied to the lead electrode surface, and solder balls are supplied to the lead electrode surface using cream solder or flux. By melting and solidifying the solder at the joint between the electrode and the LED chip, the LED
The same effect can be obtained by fixing the chip. The solder balls are fine particles having a particle diameter smaller than the thickness of the bump used in the conventional method as described above.

【００２２】またこのＬＥＤチップとリード電極との接
合の際に、わずかではあるがリード電極突起部分１６付
近に押し出された余分なメッキ、あるいは半田が、外部
からの応力を吸収でき、両者の接合部分を補強する役割
を果たす。Further, when the LED chip and the lead electrode are joined, extra plating or solder extruded slightly around the lead electrode projecting portion 16 can absorb stress from the outside, and the two can be joined together. It serves to reinforce the part.

【００２３】続いて透光性エポキシ樹脂１５を封止部材
として用い、細管からＬＥＤチップが搭載されたパッケ
ージ上に配置させ、少なくともＬＥＤチップ全体と、Ｌ
ＥＤチップとパッケージ側電極との接合部分をすべて保
護できるように封止した。ＬＥＤチップからの可視光と
蛍光体からの蛍光との混色光を放射する発光ダイオード
とする場合には、この封止部材に蛍光体を混合させても
よい。封止部材は、配置後１５０℃５時間にて硬化さ
せ、図１のごとき発光ダイオードを形成させた。またこ
の封止部材は発光ダイオードの使用用途や環境に合わせ
て、用いなくてもよい場合もある。Subsequently, the light-transmissive epoxy resin 15 is used as a sealing member, and is placed on a package on which the LED chip is mounted from a thin tube.
Sealing was performed so that all joints between the ED chip and the package-side electrode could be protected. In the case where the light emitting diode emits mixed light of visible light from the LED chip and fluorescent light from the fluorescent material, the sealing member may be mixed with a fluorescent material. After the arrangement, the sealing member was cured at 150 ° C. for 5 hours to form a light emitting diode as shown in FIG. In some cases, the sealing member may not be used in accordance with the use application and environment of the light emitting diode.

【００２４】次に、図１に基づいて本発明による方法で
形成された発光ダイオードの各構成部について詳述す
る。Next, each component of the light emitting diode formed by the method according to the present invention will be described in detail with reference to FIG.

【００２５】（ＬＥＤチップ１１）本発明に用いられる
ＬＥＤチップ１１には、例えば窒化物系化合物半導体な
どが挙げられる。発光素子であるＬＥＤチップは、ＭＯ
ＣＶＤ法等により基板上にＩｎＧａＮ等の半導体を発光
層として形成させる。半導体の構造としては、ＭＩＳ接
合、ＰＩＮ接合やｐｎ接合などを有するホモ構造、ヘテ
ロ構造あるいはダブルへテロ構成のものが挙げられる。
半導体層の材料やその混晶度によって発光波長を種々選
択することができる。また、半導体活性層を量子効果が
生ずる薄膜に形成させた単一量子井戸構造や多重量子井
戸構造とすることもできる。(LED Chip 11) The LED chip 11 used in the present invention includes, for example, a nitride-based compound semiconductor. The LED chip, which is a light emitting element, is an MO chip.
A semiconductor such as InGaN is formed as a light emitting layer on a substrate by a CVD method or the like. Examples of the semiconductor structure include a homo structure, a hetero structure, and a double hetero structure having an MIS junction, a PIN junction, a pn junction, and the like.
Various emission wavelengths can be selected depending on the material of the semiconductor layer and the degree of mixed crystal thereof. Also, a single quantum well structure or a multiple quantum well structure in which the semiconductor active layer is formed as a thin film in which a quantum effect occurs can be used.

【００２６】窒化ガリウム系化合物半導体を使用した場
合、半導体基板にはサファイヤ、スピネル、ＳｉＣ、Ｓ
ｉ、ＺｎＯ等の材料が用いられる。結晶性の良い窒化ガ
リウムを形成させるためにはサファイヤ基板を用いるこ
とが好ましい。このサファイヤ基板上にＧａＮ、ＡｌＮ
等のバッファー層を形成しその上にｐｎ接合を有する窒
化ガリウム半導体を形成させる。窒化ガリウム系半導体
は、不純物をドープしない状態でｎ型導電性を示す。発
光効率を向上させるなど所望のｎ型窒化ガリウム半導体
を形成させる場合は、ｎ型ドーパントとしてＳｉ、Ｇ
ｅ、Ｓｅ、Ｔｅ、Ｃ等を適宜導入することが好ましい。
一方、ｐ型窒化ガリウム半導体を形成させる場合は、ｐ
型ドーパンドであるＺｎ、Ｍｇ、Ｂｅ、Ｃａ、Ｓｒ、Ｂ
ａ等をドープさせる。When a gallium nitride-based compound semiconductor is used, sapphire, spinel, SiC, S
Materials such as i and ZnO are used. In order to form gallium nitride having good crystallinity, a sapphire substrate is preferably used. GaN, AlN on this sapphire substrate
And the like, and a gallium nitride semiconductor having a pn junction is formed thereon. Gallium nitride-based semiconductors exhibit n-type conductivity without being doped with impurities. When a desired n-type gallium nitride semiconductor is formed, for example, to improve luminous efficiency, Si, G
It is preferable to appropriately introduce e, Se, Te, C, and the like.
On the other hand, when forming a p-type gallium nitride semiconductor,
Type dopants Zn, Mg, Be, Ca, Sr, B
a and the like are doped.

【００２７】窒化ガリウム系化合物半導体は、ｐ型ドー
パントをドープしただけではｐ型化しにくいためｐ型ド
ーパント導入後に、炉による加熱、低速電子線照射やプ
ラズマ照射等により低抵抗化させることが好ましい。エ
ッチングなどによりｐ型半導体及びｎ型半導体の露出面
を形成させた後、半導体層上にスパッタリング法や真空
蒸着法などを用いて所望の形状の各電極１２を形成させ
る。Since the gallium nitride-based compound semiconductor is difficult to become p-type only by doping it with a p-type dopant, it is preferable to reduce the resistance by heating in a furnace, irradiating a low-speed electron beam or irradiating plasma after introducing the p-type dopant. After the exposed surfaces of the p-type semiconductor and the n-type semiconductor are formed by etching or the like, each electrode 12 having a desired shape is formed on the semiconductor layer by using a sputtering method, a vacuum evaporation method, or the like.

【００２８】次に、形成された半導体ウエハー等をダイ
ヤモンド製の刃先を有するブレードが回転するダイシン
グソーにより直接フルカットするか、又は刃先幅よりも
広い幅の溝を切り込んだ後（ハーフカット）、外力によ
って半導体ウエハーを割る。あるいは、先端のダイヤモ
ンド針が往復直線運動するスクライバーにより半導体ウ
エハーに極めて細いスクライブライン（経線）を例えば
碁盤目状に引いた後、外力によってウエハーを割り半導
体ウエハーからチップ状にカットする。このようにして
窒化ガリウム系化合物半導体であるＬＥＤチップを形成
させることができる。Next, the formed semiconductor wafer or the like is directly full-cut by a dicing saw in which a blade having a diamond cutting edge is rotated, or after a groove having a width wider than the cutting edge width is cut (half cut). The semiconductor wafer is broken by external force. Alternatively, an extremely thin scribe line (meridian) is drawn on the semiconductor wafer, for example, in a checkerboard pattern by a scriber in which a diamond needle at the tip reciprocates linearly, and then the wafer is cut by an external force and cut into chips from the semiconductor wafer. Thus, an LED chip that is a gallium nitride-based compound semiconductor can be formed.

【００２９】本発明の発光ダイオードにおいて、封止部
材の樹脂に蛍光体を混合させることによって白色系を発
光させる場合は、蛍光体との補色等を考慮して発光素子
の主発光波長は４００ｎｍ以上５３０ｎｍ以下が好まし
く、４２０ｎｍ以上４９０ｎｍ以下がより好ましい。Ｌ
ＥＤチップと蛍光体との効率をそれぞれより向上させる
ためには、４５０ｎｍ以上４７５ｎｍ以下がさらに好ま
しい。In the light emitting diode of the present invention, when white light is emitted by mixing a fluorescent substance with the resin of the sealing member, the main light emitting wavelength of the light emitting element is 400 nm or more in consideration of the complementary color with the fluorescent substance. It is preferably 530 nm or less, more preferably 420 nm or more and 490 nm or less. L
In order to further improve the efficiency of the ED chip and the efficiency of the phosphor, the thickness is more preferably 450 nm or more and 475 nm or less.

【００３０】（パッケージ１３）パッケージ１３は、金
型を用いてその内部に成形樹脂を注入させ成形し、冷却
後金型から取り出すことにより形成するのであるが、そ
の成形樹脂としては、液晶ポリマーやＰＢＴ樹脂、ポリ
アミド樹脂、ＡＢＳ樹脂、メラミン樹脂等の絶縁性支持
部材を用いることができる。あるいはプリント基板のよ
うな、エポキシ樹脂等を用いた積層板を用いてもよい。(Package 13) The package 13 is formed by injecting a molding resin into a mold using a mold, molding the molded resin, and removing the molded resin from the mold after cooling. An insulating support member such as a PBT resin, a polyamide resin, an ABS resin, and a melamine resin can be used. Alternatively, a laminated board using an epoxy resin or the like, such as a printed board, may be used.

【００３１】（リード電極１４）リード電極１４として
は、パッケージ上に配置されたＬＥＤチップをパッケー
ジ外部と電気的に接続させるものであるため、電気伝導
性に優れたものが好ましい。具体的材料としては、ニッ
ケル等のメタライズあるいはリン青銅、銅箔をエッチン
グしたもの等の電気良導体を挙げることができる。また
本発明による発光ダイオードの場合、ＬＥＤチップとの
接着部材としてこのような材料の表面に、銀や金（特に
膜厚が１μｍ以下の金メッキ）あるいは錫系等の平滑な
メッキを施してあるので、電極部材であると共にＬＥＤ
チップからの光を効率よく外部に放出させるように、そ
の表面を光反射部材として利用することもできる。(Lead Electrode 14) As the lead electrode 14, an LED chip arranged on the package is electrically connected to the outside of the package, and therefore, a lead electrode 14 having excellent electric conductivity is preferable. Specific examples of the material include a metallized nickel or the like, or an electric conductor such as phosphor bronze or etched copper foil. In the case of the light emitting diode according to the present invention, the surface of such a material is plated with silver or gold (especially gold plating having a thickness of 1 μm or less) or tin-based smooth plating as an adhesive member to the LED chip. LED as well as electrode member
In order to efficiently emit light from the chip to the outside, the surface can be used as a light reflecting member.

【００３２】（封止部材樹脂１５）ＬＥＤチップ上に配
置する封止部材１５は、発光ダイオードの使用用途に応
じてＬＥＤチップ、ＬＥＤチップとパッケージ側リード
電極との接合部などを外部から保護するためのものであ
るが、用途に応じて用いなくてもよい場合もある。封止
部材は、各種樹脂や硝子などを用いて形成させることが
できる。(Sealing Member Resin 15) The sealing member 15 arranged on the LED chip protects the LED chip and the joint between the LED chip and the lead electrode on the package side from the outside according to the application of the light emitting diode. However, there is a case where it is not necessary to use it depending on the application. The sealing member can be formed using various resins, glass, or the like.

【００３３】封止部材の具体的材料としては、主として
エポキシ樹脂、ユリア樹脂、シリコーンなどの耐候性に
優れた透明樹脂や硝子などが好適に用いられる。また、
封止部材に拡散剤を含有させることによってＬＥＤチッ
プからの指向性を緩和させ視野角を増やすこともでき
る。拡散剤の具体的材料としては、チタン酸バリウム、
酸化チタン、酸化アルミニウム、酸化珪素等が好適に用
いられる。As a specific material of the sealing member, a transparent resin excellent in weather resistance, such as an epoxy resin, a urea resin, or silicone, or glass is preferably used. Also,
By including a diffusing agent in the sealing member, the directivity from the LED chip can be reduced and the viewing angle can be increased. Specific materials for the diffusing agent include barium titanate,
Titanium oxide, aluminum oxide, silicon oxide and the like are preferably used.

【００３４】以下、本発明によって形成された図１の発
光ダイオードの効果を確認するため、図５のごとき発光
ダイオードを形成させ、本発明による発光ダイオードと
の比較実験を行った。図５の発光ダイオードは先述した
従来方法のように、ウェーハ状態のチップの金属パッド
にメッキまたは金ボール等を付着させて突起部分（バン
プ）を形成した後ダイシングにより各チップとして切り
離し、またこのチップが配置されるパッケージ上にも前
記金属パッドと対応する位置に半田バンプを形成させた
以外は、本発明による発光ダイオードと同様にして形成
させた。Hereinafter, in order to confirm the effect of the light emitting diode of FIG. 1 formed by the present invention, a light emitting diode as shown in FIG. 5 was formed, and a comparative experiment with the light emitting diode of the present invention was performed. The light emitting diode shown in FIG. 5 is formed by forming a protruding portion (bump) by plating or attaching a gold ball or the like to a metal pad of a chip in a wafer state as in the conventional method described above, and then separating the chips by dicing. Was formed in the same manner as the light emitting diode according to the present invention, except that solder bumps were also formed at positions corresponding to the metal pads on the package on which was disposed.

【００３５】図１、図５の発光ダイオードのパッケージ
のリード電極部分にそれぞれ突起部分（バンプ）を形成
させる工程を同時にスタートさせ、両発光ダイオードの
パッケージ１０００個のリード電極にそれぞれ突起部分
（バンプ）の形成を施した。図１の発光ダイオードのパ
ッケージ１０００個の電極全てに突起部分形成を施すの
に要した時間は約５秒であったが、図５の発光ダイオー
ドの方には約３０分を要した。さらに図５の発光ダイオ
ードの場合ＬＥＤチップの電極にもバンプ形成を行った
ので、それにも約３０分を要し、合わせると約１時間を
要したこととなった。また当然の事ながら、図１の発光
ダイオードはパッケージの電極にしか突起部分を形成し
ていないので、図５の発光ダイオードの約７５％の厚み
しかなく、発光ダイオードのさらなる薄型化をも実現で
きた。The steps of forming protrusions (bumps) on the respective lead electrode portions of the light emitting diode packages of FIGS. 1 and 5 are started simultaneously, and the protrusion portions (bumps) are respectively formed on the 1000 lead electrodes of both light emitting diode packages. Was formed. The time required to form the protruding portions on all the 1000 electrodes of the light emitting diode package of FIG. 1 was about 5 seconds, whereas the light emitting diode of FIG. 5 required about 30 minutes. Further, in the case of the light emitting diode of FIG. 5, bumps were also formed on the electrodes of the LED chip, so that it took about 30 minutes, and about 1 hour in total. Naturally, since the light emitting diode of FIG. 1 has protrusions only on the electrodes of the package, it is only about 75% of the thickness of the light emitting diode of FIG. 5, and the light emitting diode can be further thinned. Was.

【００３６】[0036]

【発明の効果】本発明の、発光ダイオードのパッケージ
電極部にＬＥＤチップを直接接続させるための突起部分
を、凸形状のポンチ（押圧片）で前記電極部の一部分を
押圧することにより形成することで、発光ダイオードの
量産効率と生産コストダウンを格段に向上させることが
でき、また発光ダイオードの薄型化を実現することがで
きる。またＬＥＤチップとパッケージのリード電極との
接合部は、リード電極に施された半田メッキを溶融・凝
固することでＬＥＤチップを固定させるか、あるいは膜
厚が１μｍ以下の金メッキを施したリード電極表面にさ
らにクリーム半田またはフラックスを用いて半田ボール
を施し、該半田を溶融・凝固させることでＬＥＤチップ
を固定させるので、接合部の面積を広くとることがで
き、ゆえに接合部の安定感を増すことができる。According to the present invention, the projecting portion for directly connecting the LED chip to the package electrode portion of the light emitting diode is formed by pressing a part of the electrode portion with a convex punch (pressing piece). Thus, the mass production efficiency and the production cost of the light emitting diode can be remarkably improved, and the thickness of the light emitting diode can be reduced. The joint between the LED chip and the lead electrode of the package may be fixed by melting and solidifying the solder plating applied to the lead electrode, or the surface of the gold-plated lead electrode having a film thickness of 1 μm or less. Furthermore, solder balls are applied using cream solder or flux, and the LED chips are fixed by melting and solidifying the solder, so that the area of the joint can be increased, thereby increasing the sense of stability of the joint. Can be.

【図面の簡単な説明】[Brief description of the drawings]

【図１】 図１は、本発明により形成された発光ダイオ
ードの模式的断面図である。FIG. 1 is a schematic sectional view of a light emitting diode formed according to the present invention.

【図２】 図２は、本発明である発光ダイオードの形成
過程の一部を、拡大して模式的に示した図である。FIG. 2 is an enlarged view schematically showing a part of a process of forming a light emitting diode according to the present invention.

【図３】 図３は、本発明である発光ダイオードの形成
過程の一部を、拡大して模式的に示した図である。FIG. 3 is an enlarged view schematically showing a part of a process of forming a light emitting diode according to the present invention.

【図４】 図４は、本発明により形成したいくつかのパ
ターンの突起部の形状を、パッケージ上面から見た概略
図である（斜線部が突起部を示す）。FIG. 4 is a schematic view of the shapes of projections of some patterns formed according to the present invention, as viewed from the top of the package (shaded portions indicate the projections).

【図５】 図５は、本発明による発光ダイオードとの比
較のために形成した発光ダイオードの模式的断面図であ
る。FIG. 5 is a schematic sectional view of a light emitting diode formed for comparison with a light emitting diode according to the present invention.

【符号の説明】[Explanation of symbols]

１１、３１、５１・・・ＬＥＤチップ １２、３２、５２・・・ＬＥＤチップの電極部分 １３、２３、３３、４３、５３・・・パッケージ １４、２４、３４、４４、５４・・・パッケージのリー
ド電極 １５、５５・・・封止部材樹脂 １６、３６、４６・・・リード電極の突起部分 １７・・・リード電極の凹部 ２５、３５・・・メッキ層 ２６、２７・・・凸型ポンチ（押圧片） ３８・・・フリップチップボンダのホルダ ３９・・・フリップチップボンダの台 ５６・・・ＬＥＤチップに付着させたバンプ ５７・・・リード電極を有するパッケージ上に形成させ
た半田バンプ ５８・・・樹脂11, 31, 51 ... LED chip 12, 32, 52 ... electrode part of LED chip 13, 23, 33, 43, 53 ... package 14, 24, 34, 44, 54 ... package Lead electrodes 15, 55: Resin for sealing member 16, 36, 46 ... Protrusion of lead electrode 17: Depression of lead electrode 25, 35 ... Plating layer 26, 27 ... Convex punch (Pressing piece) 38 ... Flip chip bonder holder 39 ... Flip chip bonder base 56 ... Bump attached to LED chip 57 ... Solder bump 58 formed on package having lead electrode 58 ···resin

Claims (4)

【特許請求の範囲】[Claims] 【請求項１】 一対のリード電極を有するパッケージ
と、該一対のリード電極上に配置させるとともに電気的
に接続させたフリップチップ型ＬＥＤチップと、該ＬＥ
Ｄチップを被覆する透光性樹脂とを有する発光ダイオー
ドの形成方法であって、前記各リード電極の一部分を押
圧することにより他の一部分を***させて形成される突
起部上に、前記ＬＥＤチップの電極を配置させることを
特徴とする発光ダイオードの形成方法。1. A package having a pair of lead electrodes, a flip-chip type LED chip disposed on and electrically connected to the pair of lead electrodes,
A method of forming a light emitting diode, comprising: a light-transmitting resin that covers a D chip, wherein a part of each of the lead electrodes is pressed to protrude another part, and the LED chip A method for forming a light emitting diode, comprising: 【請求項２】 少なくとも一対のリード電極を有するパ
ッケージと、該リード電極上に配置され、かつ電気的に
接続されたＬＥＤチップとを有する発光ダイオードの形
成方法であって、前記ＬＥＤチップと電気的に接続させ
る前記各リード電極の一部分を押圧することにより他の
一部分を***させて各リード電極表面に突起部を形成す
る工程と、前記突起部を介してリード電極上にＬＥＤチ
ップを固定させる工程と、前記ＬＥＤチップ上に透光性
樹脂を配置する工程とを有する発光ダイオードの形成方
法。2. A method for forming a light emitting diode, comprising: a package having at least a pair of lead electrodes; and an LED chip disposed on and electrically connected to the lead electrodes, wherein the LED chip is electrically connected to the LED chip. Forming a projection on the surface of each lead electrode by pressing a part of each of the lead electrodes to be connected to the other to raise another part, and fixing an LED chip on the lead electrode via the projection. And a step of disposing a translucent resin on the LED chip. 【請求項３】 パッケージ表面に形成された一対のリー
ド電極に半田メッキが施され、該リード電極とＬＥＤチ
ップとの接合部は、該半田メッキを溶融・凝固させるこ
とでＬＥＤチップを固定していることを特徴とする請求
項２に記載の発光ダイオードの形成方法。3. A pair of lead electrodes formed on the surface of the package are plated with solder, and the joint between the lead electrode and the LED chip is fixed by melting and solidifying the solder plating. The method for forming a light emitting diode according to claim 2, wherein: 【請求項４】 パッケージ表面に形成された一対のリー
ド電極に、膜厚が１μｍ以下の金メッキが施され、さら
に該リード電極表面にクリーム半田またはフラックスを
用いて半田ボールを供給し、該リード電極とＬＥＤチッ
プとの接合部は、該半田を溶融・凝固させることでＬＥ
Ｄチップを固定していることを特徴とする請求項２に記
載の発光ダイオードの形成方法。4. A pair of lead electrodes formed on the surface of the package are plated with gold having a thickness of 1 μm or less, and a solder ball is supplied to the surface of the lead electrode using cream solder or flux. The joint between the LED chip and the LED chip is formed by melting and solidifying the solder.
3. The method according to claim 2, wherein the D chip is fixed.
JP2000035644A 2000-02-08 2000-02-08 Method for forming light emitting diode Expired - Lifetime JP4366810B2 (en)

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JP2001223391A true JP2001223391A (en) 2001-08-17
JP4366810B2 JP4366810B2 (en) 2009-11-18

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CN117497681A (en) * 2023-12-29 2024-02-02 南昌凯捷半导体科技有限公司 Mini-LED chip and manufacturing method thereof
CN117497681B (en) * 2023-12-29 2024-04-05 南昌凯捷半导体科技有限公司 Mini-LED chip and manufacturing method thereof

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