JP2001196705A - Solid electronic device base body and manufacturing method therefor - Google Patents

Solid electronic device base body and manufacturing method therefor

Info

Publication number
JP2001196705A
JP2001196705A JP2000010270A JP2000010270A JP2001196705A JP 2001196705 A JP2001196705 A JP 2001196705A JP 2000010270 A JP2000010270 A JP 2000010270A JP 2000010270 A JP2000010270 A JP 2000010270A JP 2001196705 A JP2001196705 A JP 2001196705A
Authority
JP
Japan
Prior art keywords
circuit pattern
resin
electronic device
conductive
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000010270A
Other languages
Japanese (ja)
Inventor
Naotake Ebinuma
尚武 海老沼
Shozo Nakamura
省三 中村
Yoshiyuki Ando
好幸 安藤
Hideki Asano
秀樹 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Hitachi Ltd
Original Assignee
Hitachi Cable Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Hitachi Ltd filed Critical Hitachi Cable Ltd
Priority to JP2000010270A priority Critical patent/JP2001196705A/en
Publication of JP2001196705A publication Critical patent/JP2001196705A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a solid electronic device base body structure, together, with its manufacturing method which reduces a load on a global environment, with no use of complex process, such as formation of a conductive film by electroless copper plating or film transfer of a circuit pattern. SOLUTION: A resin base body where a circuit pattern groove is formed is formed first, and then the circuit pattern groove of the mold is directly filled with a conductive material, so that a conductive circuit part is formed at the resin base body.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、立体的形状面に電
子回路を有する電子デバイスの基体構造と製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a base structure of an electronic device having an electronic circuit on a three-dimensional surface and a method of manufacturing the same.

【0002】[0002]

【従来の技術】従来、射出成形法で製造されるMID
(立体成形回路部品)基体の電子回路用導電膜(後工程
でニッケルめっき、金めっきを施すための下地となる樹
脂基体表面に最初に形成する金属膜)形成方法は二つに
分類できる。一つは、日立電線株式会社カタログ(CAT.
No.B−502)に紹介されているような、めっきグレード
熱可塑性樹脂で成形された樹脂基体表面に無電解銅めっ
きで導電膜を形成する方法、他は、特開平10−296791で
開示されているような、熱可塑性樹脂で成形された樹脂
基体表面に、銅箔等で回路パターンが描画されたフィル
ムを押しつけ、熱圧着で回路パターンを転写する方法等
が代表的である。
2. Description of the Related Art Conventionally, MID manufactured by an injection molding method
(Three-dimensional molded circuit parts) The method of forming a conductive film for an electronic circuit of a substrate (a metal film first formed on the surface of a resin substrate serving as a base for nickel plating and gold plating in a later step) can be classified into two types. One is the Hitachi Cable, Ltd. catalog (CAT.
No. B-502), a method of forming a conductive film by electroless copper plating on the surface of a resin substrate molded with a plating grade thermoplastic resin, and others are disclosed in JP-A-10-296791. A typical method is to press a film on which a circuit pattern is drawn with a copper foil or the like onto the surface of a resin substrate formed of a thermoplastic resin and transfer the circuit pattern by thermocompression bonding.

【0003】[0003]

【発明が解決しようとする課題】上記の何れの方法も、
樹脂基体に導電膜を形成する手段として、極めて多くの
プロセスを必要としている。例えば、無電解銅めっき法
における2回成形法では、金型が2種類必要であり、
又、一回成形法では無電解銅めっきの後、回路パターン
を作成するためのフォトレジストプロセスが必要であ
る。又、樹脂表面の粗化プロセスも必要であり、めっき
プロセスを含め、多くの化学薬品を使用しなければなら
ない。プロセス環境保全、および使用済み薬品の管理が
地球環境保全に大きな負担となる等、困難な問題を抱え
ている。
SUMMARY OF THE INVENTION In any of the above methods,
An extremely large number of processes are required as means for forming a conductive film on a resin substrate. For example, in the twice forming method in the electroless copper plating method, two types of molds are required,
In addition, the single-molding method requires a photoresist process for forming a circuit pattern after electroless copper plating. Also, a resin surface roughening process is necessary, and many chemicals must be used, including a plating process. There are difficult problems such as process environment preservation and management of used chemicals, which impose a great burden on global environment preservation.

【0004】また、フィルム転写法では、回路パターン
を描画した転写用フィルムを事前に製作する必要が有る
こと、金型の曲面、角部にフィルムがなじまないのでフ
ィルムの賦形性に限界が有り、成形品の形状に制約が有
ることなど多くの課題があり、製造コストを引き上げる
要因となっている。
Further, in the film transfer method, it is necessary to manufacture a transfer film on which a circuit pattern is drawn in advance, and there is a limit in the formability of the film because the film does not fit on the curved surface and corners of the mold. However, there are many problems, such as restrictions on the shape of the molded product, and this is a factor that increases the manufacturing cost.

【0005】[0005]

【課題を解決するための手段】上記した課題を解決する
に最も効果的な手段は、プロセスを簡単にすることであ
る。すなわち無電界銅メッキプロセスを使用せず、また
転写フィルムを使用しない製造方法を用いて立体形状電
子デバイスサ基体を製造することにある。
The most effective means of solving the above problems is to simplify the process. That is, it is to manufacture a three-dimensionally shaped electronic device substrate using a manufacturing method that does not use an electroless copper plating process and does not use a transfer film.

【0006】本発明では、最初に作る樹脂基体に、必要
とする回路パターン溝を直接作り込み、次のプロセス
で、先に作った回路パターン溝に導電性物質を充填した
基体構造及び製造方法を提案する。
According to the present invention, there is provided a substrate structure and a manufacturing method in which a required circuit pattern groove is directly formed in a resin substrate to be formed first, and a conductive material is filled in the previously formed circuit pattern groove in the next process. suggest.

【0007】[0007]

【発明の実施の形態】以下に、上記課題を解決し得る本
発明の立体形状電子デバイス基体の構造と製造方法につ
いて詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and manufacturing method of a three-dimensionally shaped electronic device substrate according to the present invention which can solve the above-mentioned problems will be described below in detail.

【0008】図1は本発明請求項1に記載の電子デバイ
ス基体の構造を示す概念図である。樹脂基体1の表面に
導電性物質2を用いて回路パターンを創成した構造であ
る。
FIG. 1 is a conceptual diagram showing the structure of an electronic device substrate according to the first aspect of the present invention. This is a structure in which a circuit pattern is created using a conductive substance 2 on the surface of a resin base 1.

【0009】図2は本発明請求項2に記載の樹脂材料を
用いて最初に成形する樹脂基体の構造概念図である。
FIG. 2 is a conceptual view of the structure of a resin base formed first using the resin material according to the second aspect of the present invention.

【0010】図3は本発明請求項3に記載の導電物質を
樹脂基体に充填する一手段を示す成形概念図である。
FIG. 3 is a conceptual drawing showing one means for filling the resin substrate with the conductive substance according to the third aspect of the present invention.

【0011】以下、図を用いて実施例を説明する。An embodiment will be described below with reference to the drawings.

【0012】図2に示す樹脂基体1を製造する方法を説
明する。樹脂基体1を成形する材料は、熱硬化性樹脂、
熱可塑性樹脂どちらを用いても差し支えないが、熱硬化
性樹脂を用いる場合はトランスファ成形法が最適であ
り、熱可塑性樹脂の場合は射出成形法が適している。
A method for manufacturing the resin substrate 1 shown in FIG. 2 will be described. The material for forming the resin base 1 is a thermosetting resin,
Either thermoplastic resin may be used, but when a thermosetting resin is used, a transfer molding method is optimal, and when a thermoplastic resin is used, an injection molding method is suitable.

【0013】本実験では、樹脂基体1の成形用材料とし
て、半導体封止用材料に用いられているシリカ配合熱硬
化性エポキシ樹脂を用いた。他の熱硬化性樹脂でも有効
である。
In this experiment, a silica-containing thermosetting epoxy resin used for a semiconductor sealing material was used as a material for molding the resin substrate 1. Other thermosetting resins are also effective.

【0014】金型構造については説明を省略するが、成
形した樹脂基体1の表面に立体形状を賦形し、その立体
表面に回路パターン溝3を4個所に設けた。それぞれの
回路パターン溝3の形状は幅0.5mm、深さ0.25
mmの長方形断面とした。このような形状の樹脂基体1
を成形できる金型を製作し、実験に供した。
Although the description of the mold structure is omitted, a three-dimensional shape is formed on the surface of the molded resin substrate 1 and circuit pattern grooves 3 are provided at four locations on the three-dimensional surface. The shape of each circuit pattern groove 3 is 0.5 mm in width and 0.25 in depth.
mm rectangular section. Resin substrate 1 having such a shape
A mold capable of molding was manufactured and subjected to an experiment.

【0015】成形した樹脂基体1の回路パターン溝3
に、次のプロセスで導電性物質2を充填する方法は幾通
りか考えられるが、充填方法は用いる導電性物質の性状
により決定される。
Circuit pattern groove 3 of molded resin substrate 1
There are several methods for filling the conductive material 2 in the following process, and the filling method is determined by the properties of the conductive material used.

【0016】本実験では、導電性物質2の主材料として
銅粉を用いたが、電気導電性に優れた材料、例えば銀、
アルミニュウム、あるいは金等も対象となる。
In this experiment, copper powder was used as the main material of the conductive substance 2, but a material having excellent electrical conductivity, for example, silver,
Aluminum, gold, etc. are also targeted.

【0017】銅粉とそのバインダとなる樹脂の混合比は
本実験では銅粉70Vol%、バインダ30Vol%を
用いたが、この比率は用いる導電性金属の形状及び粒
度、バインダの粘度等により左右される。導電性金属の
比率が高い方が良いことは明らかである。
In this experiment, the mixing ratio of copper powder and the resin serving as the binder was 70 vol% of copper powder and 30 vol% of binder, but this ratio depends on the shape and particle size of the conductive metal used, the viscosity of the binder, and the like. You. It is clear that the higher the ratio of the conductive metal, the better.

【0018】(実施例1)シリカ配合熱硬化性エポキシ
樹脂を用いたトランスファ成形法で樹脂基体1を成形し
た後、銅粉70Vol%、PPS(ポリフェニレンサル
ファイド)粉末30Vol%の割合で混合した導電性物
質2を混練溶融後、粉砕ペレット化し、図3に示す略構
造の金型を用い射出成形法(成形機は図示せず)で充填
成形した。
Example 1 A resin base 1 was molded by a transfer molding method using a silica-containing thermosetting epoxy resin, and then mixed with a 70 vol% copper powder and a 30 vol% PPS (polyphenylene sulfide) powder. After kneading and melting the substance 2, it was pulverized into pellets and filled and molded by an injection molding method (a molding machine is not shown) using a mold having a substantially structure shown in FIG.

【0019】固定金型5bに樹脂基体1をインサート
し、可動金型5bをかぶせ、導電物質注入口6から導電
性物質2を射出注入した。導電性物質は回路パターン溝
に完全充填された。
The resin base 1 was inserted into the fixed mold 5b, covered with the movable mold 5b, and the conductive substance 2 was injected and injected from the conductive substance injection port 6. The conductive material was completely filled in the circuit pattern groove.

【0020】(実施例2)シリカ配合熱硬化性エポキシ
樹脂を用いたトランスファ成形法で樹脂基体1を成形し
た後、銅粉70Vol%、熱硬化性エポキシ樹脂粉末3
0Vol%の割合で混合した導電性物質をタブレット化
し、図3に示す略構造の金型を用いトランスファ成形法
(成形機は図示せず)で充填成形した。固定金型5bに
樹脂基体1をインサートし、可動金型5bをかぶせ、導
電物質注入口6から導電性物質2を射出注入した。導電
物質は回路パターン溝に完全充填された。
Example 2 A resin base 1 was molded by a transfer molding method using a silica-containing thermosetting epoxy resin, and then 70 vol% of copper powder and 3 thermosetting epoxy resin powders were used.
The conductive substance mixed at a ratio of 0 Vol% was tabletted, and filled and molded by a transfer molding method (a molding machine is not shown) using a mold having a substantially structure shown in FIG. The resin substrate 1 was inserted into the fixed mold 5b, covered with the movable mold 5b, and the conductive substance 2 was injected and injected from the conductive substance injection port 6. The conductive material was completely filled in the circuit pattern groove.

【0021】(実施例3)シリカ配合熱硬化性エポキシ
樹脂を用いたトランスファ成形法で樹脂基体を成形した
後、銅粉70Vol%、熱硬化性シリコン樹脂30Vo
l%の割合で混合した導電性物質を、図3に示す略構造
の金型を用い射出成形法(成形機は図示せず)で充填成
形した。固定金型5bに樹脂基体1をインサートし、可
動金型5bをかぶせ、導電物質注入口6から導電性物質
2を射出注入した。導電物質は回路パターン溝に完全充
填された。
Example 3 A resin base was molded by a transfer molding method using a silica-containing thermosetting epoxy resin, and then 70 vol% of copper powder and 30 Vo of thermosetting silicone resin.
The conductive material mixed at a ratio of 1% was filled and molded by an injection molding method (a molding machine is not shown) using a mold having a substantially structure shown in FIG. The resin substrate 1 was inserted into the fixed mold 5b, covered with the movable mold 5b, and the conductive substance 2 was injected and injected from the conductive substance injection port 6. The conductive material was completely filled in the circuit pattern groove.

【0022】[0022]

【発明の効果】本発明によれば、樹脂基体に導電性物質
を直接充填し、回路パターンを形成した低コスト立体形
状電子デバイス基体を提供できる。また、樹脂基体に無
電解銅めっきを施すプロセス、あるいは賦形性に劣るフ
ィルム転写プロセス等を必要としない電子デバイス基体
製造方法を提供できる。
According to the present invention, it is possible to provide a low-cost three-dimensional electronic device substrate having a circuit pattern formed by directly filling a resin substrate with a conductive substance. Further, it is possible to provide a method of manufacturing an electronic device substrate which does not require a process of applying electroless copper plating to a resin substrate or a film transfer process having poor shapeability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】電子デバイス基体の全容を示す概念図である。FIG. 1 is a conceptual diagram showing the entire electronic device substrate.

【図2】樹脂基体の構造図である。FIG. 2 is a structural view of a resin base.

【図3】導電性物質充填機構を示す概念図である。FIG. 3 is a conceptual diagram showing a conductive substance filling mechanism.

【符号の説明】[Explanation of symbols]

1…樹脂基体、2…導電性物質で造った回路パターン、
3…回路パターン溝、4…ランナー、5a…固定金型、
5b…可動金型、6…導電性物質注入口。
1 ... resin substrate, 2 ... circuit pattern made of conductive material,
3 ... circuit pattern groove, 4 ... runner, 5a ... fixed mold,
5b: movable mold, 6: conductive material injection port.

フロントページの続き (72)発明者 中村 省三 神奈川県横浜市戸塚区吉田町292番地 株 式会社日立製作所生産技術研究所内 (72)発明者 安藤 好幸 茨城県日立市日高町五丁目1番1号 日立 電線株式会社パワーシステム研究所内 (72)発明者 浅野 秀樹 茨城県日立市日高町五丁目1番1号 日立 電線株式会社パワーシステム研究所内 Fターム(参考) 4F206 AA34 AA39 AB16 AB17 AG03 AH36 JA07 JB15 JB25 JF01 JF02 JL02 JM04 JN11 JQ81 5E338 AA05 AA16 BB51 BB63 CC01 CD01 EE22 EE31 Continued on the front page (72) Inventor Shozo Nakamura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi, Ltd. Production Engineering Laboratory (72) Inventor Yoshiyuki Ando 5-1-1 Hidaka-cho, Hitachi-shi, Ibaraki No. 1 Power System Research Laboratory, Hitachi Cable, Ltd. (72) Inventor Hideki Asano 5-1-1, Hidaka-cho, Hitachi City, Ibaraki Prefecture F-term, Power System Research Laboratory, Hitachi Cable, Ltd. JA07 JB15 JB25 JF01 JF02 JL02 JM04 JN11 JQ81 5E338 AA05 AA16 BB51 BB63 CC01 CD01 EE22 EE31

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 予め回路パターン溝を形成した樹脂基体
に、導電性物質を充填し、導電回路部を形成した立体形
状電子デバイス基体。
1. A three-dimensional electronic device substrate in which a conductive substance is filled in a resin substrate in which a circuit pattern groove is formed in advance and a conductive circuit portion is formed.
【請求項2】 最初に回路パターン溝を形成した樹脂基
体を成形し、次に、その成形体の回路パターン溝に導電
性物質を充填成形することにより、樹脂基体に導電回路
部を形成する立体形状電子デバイス基体の製造方法。
2. A three-dimensional structure for forming a conductive circuit portion on a resin substrate by first molding a resin substrate on which a circuit pattern groove is formed, and then filling the circuit pattern groove of the molded body with a conductive substance. A method for manufacturing a shaped electronic device substrate.
【請求項3】 二次成形で回路パターン溝に充填する導
電性物質は、金属粉末を主材料とし、バインダとして用
いる接着剤は熱可塑性樹脂、または熱硬化性樹脂で有る
ことを特徴とする請求項1に記載する電子デバイス基
体。
3. The method according to claim 1, wherein the conductive material filled in the circuit pattern groove in the secondary molding is mainly made of metal powder, and the adhesive used as the binder is a thermoplastic resin or a thermosetting resin. Item 2. The electronic device substrate according to Item 1.
JP2000010270A 2000-01-17 2000-01-17 Solid electronic device base body and manufacturing method therefor Pending JP2001196705A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000010270A JP2001196705A (en) 2000-01-17 2000-01-17 Solid electronic device base body and manufacturing method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000010270A JP2001196705A (en) 2000-01-17 2000-01-17 Solid electronic device base body and manufacturing method therefor

Publications (1)

Publication Number Publication Date
JP2001196705A true JP2001196705A (en) 2001-07-19

Family

ID=18538307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000010270A Pending JP2001196705A (en) 2000-01-17 2000-01-17 Solid electronic device base body and manufacturing method therefor

Country Status (1)

Country Link
JP (1) JP2001196705A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005032779A (en) * 2003-07-07 2005-02-03 Mitsui Chemicals Inc Method for manufacturing package
JP2006076020A (en) * 2004-09-07 2006-03-23 Toyota Motor Corp Injection mold, injection molding method, manufacturing method of circuit molded product and circuit molded product
JP2006156308A (en) * 2004-12-01 2006-06-15 Sony Corp Deformed member, electronic device member and manufacturing method therefor
WO2019016989A1 (en) 2017-07-19 2019-01-24 オムロン株式会社 Method for manufacturing resin structure, and resin structure

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005032779A (en) * 2003-07-07 2005-02-03 Mitsui Chemicals Inc Method for manufacturing package
JP2006076020A (en) * 2004-09-07 2006-03-23 Toyota Motor Corp Injection mold, injection molding method, manufacturing method of circuit molded product and circuit molded product
JP2006156308A (en) * 2004-12-01 2006-06-15 Sony Corp Deformed member, electronic device member and manufacturing method therefor
WO2019016989A1 (en) 2017-07-19 2019-01-24 オムロン株式会社 Method for manufacturing resin structure, and resin structure
US11044815B2 (en) 2017-07-19 2021-06-22 Omron Corporation Method for manufacturing resin structure, and resin structure

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