JP2001185638A - Wiring board of multilayer ceramic structure - Google Patents
Wiring board of multilayer ceramic structureInfo
- Publication number
- JP2001185638A JP2001185638A JP36461799A JP36461799A JP2001185638A JP 2001185638 A JP2001185638 A JP 2001185638A JP 36461799 A JP36461799 A JP 36461799A JP 36461799 A JP36461799 A JP 36461799A JP 2001185638 A JP2001185638 A JP 2001185638A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- ceramic
- ceramic layer
- forming
- sealing surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電子部品パッケー
ジ用のセラミック積層構造の配線基板に関し、詳しく
は、SAWフィルタ、水晶振動子、トランジスタ、IC
等の電子部品を封止するパッケージに用いられるセラミ
ック積層構造の配線基板(以下、配線基板又は単に基板
ともいう)に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board having a laminated ceramic structure for an electronic component package, and more particularly, to a SAW filter, a quartz oscillator, a transistor, and an IC.
The present invention relates to a wiring board having a ceramic laminated structure (hereinafter, also referred to as a wiring board or simply a board) used for a package for sealing an electronic component such as an electronic component.
【0002】[0002]
【従来の技術】図10〜図12はこの種のセラミック積
層構造の配線基板100の一例を示したもので、セラミ
ック三層構造で平面視、略矩形をなし、上面に矩形で開
口する凹部105を備えた容器状をなしている。その凹
部105は、電子部品(図示せず)が収容されるスペー
スであり、その左右両側は、縦断面視、凹部105の底
面107をなす最下層(一層目)のセラミック層101
から上の開口に向かって階段状に形成されている。そし
て、中間のセラミック層102の上面のうち、内側にお
いて露出している棚部(ボンディングシェルフ)110
にはボンディングパッド(ワイヤボンディングのための
電極)112が複数形成されている。2. Description of the Related Art FIGS. 10 to 12 show an example of a wiring board 100 of this type having a ceramic laminated structure, which has a three-layer ceramic structure, has a substantially rectangular shape in plan view, and has a rectangular opening 105 on its upper surface. In the shape of a container with The concave portion 105 is a space for accommodating an electronic component (not shown), and the left and right sides thereof are the lowermost (first layer) ceramic layer 101 forming the bottom surface 107 of the concave portion 105 in a longitudinal sectional view.
It is formed in a step shape from the top to the opening. Then, on the upper surface of the intermediate ceramic layer 102, a shelf (bonding shelf) 110 that is exposed on the inner side
Are formed with a plurality of bonding pads (electrodes for wire bonding) 112.
【0003】また、最上層の四角枠状のセラミック層1
03は、基板の内外方向に対し所定の幅をなし、その上
面は封止面(封止エリア)115をなすところであり、
その表面には図示しないメタライズ層(以下、封止用メ
タライズ層ともいう)が形成されている。そして、封止
面115にはそこに形成されたメタライズ層とダイアタ
ッチ面(凹部の底面107に形成されたメタライズ層)
との層間の導通(電気的接続)をとるためのビア(柱状
の導体)121が適数形成されている。この配線基板1
00は、凹部105内に電子部品チップを搭載し、その
電極とボンディングパッド112との間でワイヤボンデ
ィングをした後、凹部105を覆うようにリッド(図示
せず)が被せられ、封止面115に例えばハンダ付けさ
れて気密封止される。The uppermost square frame-shaped ceramic layer 1
Reference numeral 03 denotes a predetermined width in the inward and outward directions of the substrate, and the upper surface thereof forms a sealing surface (sealing area) 115.
A metallized layer (not shown) (hereinafter also referred to as a metallized layer for sealing) is formed on the surface. The sealing surface 115 has a metallized layer formed thereon and a die attach surface (a metallized layer formed on the bottom surface 107 of the concave portion).
A suitable number of vias (columnar conductors) 121 are formed to establish conduction (electrical connection) between layers. This wiring board 1
00, after mounting an electronic component chip in the concave portion 105 and performing wire bonding between its electrode and the bonding pad 112, a lid (not shown) is covered so as to cover the concave portion 105; Is hermetically sealed, for example, by soldering.
【0004】この種のセラミック積層構造の配線基板1
00は、その製造において、ボンディングパッド11
2、封止面115の封止用メタライズ層、ビア121な
どの金属層形成用に高融点金属粉末を主成分とするメタ
ライズペーストが印刷されるとともに、各層の形状をな
すように形成されたセラミックグリーンシートを積層、
圧着し、その後、焼成することで製造される。ただし、
各セラミックグリーンシートは、通常、多数の基板が一
度にとれる大きさに形成されたものが使用され、その積
層、圧着後に、各基板単位の境界に分割用の溝(ブレー
ク溝)をいれ、焼成後に必要なメッキ層を一括して形成
した後、その溝に沿って各基板単位に分割する(折り取
る)ことで多量生産される。[0004] This type of wiring board 1 having a ceramic laminated structure
00 indicates that the bonding pad 11
2. A metallized paste mainly composed of a high melting point metal powder is printed for forming a metallized layer for sealing on the sealing surface 115 and a metal layer such as the via 121, and a ceramic formed to have a shape of each layer. Laminate green sheets,
It is manufactured by pressing and then firing. However,
Each ceramic green sheet is usually formed to have a size that allows a large number of substrates to be taken at one time. After laminating and pressing, a dividing groove (break groove) is formed at the boundary of each substrate unit, and firing is performed. After a necessary plating layer is collectively formed later, mass production is performed by dividing (cutting) each substrate unit along the groove.
【0005】このような配線基板100は、それが搭載
される機器の小型化にともなう設置面積の縮小化の要請
により、配線基板自体の外寸法(平面寸法)をできるだ
け小さくすることが要求されている。こうした小型化の
要請により、封止面115の幅W1及び棚部(ボンディ
ングパッド形成面)110の幅W2も、それぞれに支障
のない範囲で可能な限り狭くすることが要請されてお
り、封止面115の幅W1については例えば0.35m
m程度、棚部110の幅W2については例えば0.25
mm程度の必要最小限の微小寸法に設定されるようにな
ってきている。In order to reduce the installation area of such a wiring board 100 in accordance with the miniaturization of the equipment on which the wiring board 100 is mounted, it is required that the external dimensions (planar dimensions) of the wiring board itself be made as small as possible. I have. Due to such a demand for miniaturization, the width W1 of the sealing surface 115 and the width W2 of the shelf (bonding pad forming surface) 110 are also required to be as narrow as possible without impeding each other. For example, the width W1 of the surface 115 is 0.35 m.
m, the width W2 of the shelf 110 is, for example, 0.25
It has been set to a required minimum minute dimension of about mm.
【0006】ところで、前記配線基板100のように層
間の導通をとるビア121を設ける場合には、ビア12
1の外側のセラミックの肉幅WVをその製造上、一定寸
法以上確保することが必要とされる。というのは、ビア
121の側のセラミックの肉幅WVが狭すぎると、その
部分において、グリーンシートの成形時つまりビアホー
ルのためのパンチング(孔あけ)時や各基板形状に打ち
抜く時に、ビアホールの外側にキレが発生しやすいし、
焼成時やその後のブレーク時にも同部位に割れやカケが
発生しやすく、製品歩留まりを悪くするためである。こ
うしたことから従来、上記のようなセラミック積層構造
の配線基板100においてはビア121の両側のセラミ
ックの肉幅WVとして少なくとも0.2mm程度確保す
べきものとされていた。一方で、ビア121の径DVは
その加工精度上などから、0.15mm以上は必要であ
る。したがって、この例で最上層のセラミック層103
にビア121を形成する場合には、そのセラミック層の
内外方向の幅W1を、0.55mm以上にする必要があ
る。In the case where a via 121 for providing conduction between layers is provided like the wiring board 100, the via 12
It is necessary to secure a certain width or more of the width WV of the ceramic on the outer side of the ceramics 1 in manufacturing. This is because if the width WV of the ceramic on the side of the via 121 is too narrow, the outside of the via hole may be formed at the time of forming the green sheet, that is, at the time of punching (piercing) for the via hole or at the time of punching into each substrate shape. Is easy to break,
This is because cracks and chips are liable to occur in the same portion even at the time of firing or at the time of a break afterwards, and the product yield is deteriorated. For this reason, conventionally, in the wiring board 100 having the above-described ceramic laminated structure, it has been determined that the ceramic width WV on both sides of the via 121 should be at least about 0.2 mm. On the other hand, the diameter DV of the via 121 needs to be 0.15 mm or more from the viewpoint of processing accuracy and the like. Therefore, in this example, the uppermost ceramic layer 103
When the via 121 is formed in the ceramic layer, the width W1 of the ceramic layer in the inward and outward directions needs to be 0.55 mm or more.
【0007】[0007]
【発明が解決しようとする課題】つまり、気密又は封止
性確保の観点からは封止面115を成すセラミック層1
03の内外方向の幅W1は、本来0.35mm程度あれ
ばよいのに対し、封止面115にビア121を設ける場
合には、同幅W1を、その差分の0.2mm程度広くす
る必要があった。したがって、このようなセラミック積
層構造の配線基板100においては、その差分、幅方向
に配線基板を大きくせざるを得ず、小型化の要請に反す
るものとなっていた。That is, from the viewpoint of ensuring airtightness or sealing performance, the ceramic layer 1 forming the sealing surface 115 is not required.
The width W1 in the inward and outward directions of 03 is only required to be about 0.35 mm, whereas when the via 121 is provided in the sealing surface 115, the width W1 needs to be widened by about 0.2 mm, which is the difference. there were. Therefore, in the wiring board 100 having such a ceramic laminated structure, the wiring board has to be enlarged in the width direction by the difference, which is against the demand for miniaturization.
【0008】本発明は、こうしたセラミック積層構造の
配線基板のもつ問題点に鑑みて成されたもので、その目
的は、封止面をなすセラミック層にビアを備えたセラミ
ック積層構造の配線基板の製造において、前記不具合を
発生させることなく、しかも小型化の要請に応えること
のできる基板構造を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the problems of such a wiring board having a multilayer ceramic structure, and has as its object to provide a wiring board having a multilayer ceramic structure having vias in a ceramic layer forming a sealing surface. It is an object of the present invention to provide a substrate structure that can meet the demand for miniaturization without causing the above-mentioned problem in manufacturing.
【0009】[0009]
【課題を解決するための手段】上記の目的を達成するた
め、請求項1に記載の本発明は、電子部品搭載用の凹部
の周囲であって上面に封止面を備え、かつ該封止面をな
すセラミック層にビアが形成されていると共に該セラミ
ック層より下層のセラミック層の上面であって該封止面
に沿ってボンディングパッドが形成されてなるセラミッ
ク積層構造の配線基板において、前記封止面をなすセラ
ミック層の部分の幅を、前記ボンディングパッドの形成
面側に広げて幅広部とし、該幅広部に前記ビアを設けた
ことを特徴とする。なお、本明細書において部分とは、
一部分又は大部分をいう。According to a first aspect of the present invention, there is provided a semiconductor device having a sealing surface on an upper surface around a concave portion for mounting an electronic component. In a wiring board having a ceramic laminated structure, a via is formed in a ceramic layer forming a surface, and a bonding pad is formed along the sealing surface on an upper surface of a ceramic layer below the ceramic layer. The width of the portion of the ceramic layer forming the stop surface is widened toward the bonding pad forming surface side to form a wide portion, and the wide portion is provided with the via. In addition, in this specification, a part is
Refers to part or most.
【0010】本発明では、前記封止面をなすセラミック
層の部分を、平面視、前記ボンディングパッドの形成面
側にその幅を広げて幅広部とし、該幅広部に前記ビアを
設けたため、ビアの形成に起因する前記の製造上の不具
合を発生させないし、ビアが形成されていない部分の封
止面については封止を損なわない程度の必要最小限の幅
とすることができる。すなわち、ビアが形成される封止
面をなす最上層のセラミックの幅のうち、ビアが形成さ
れる部分に対応して封止面の幅を内側に広げたものであ
ることから、基板の前記製造上の不具合を発生させるこ
となく、しかもその小型化が図られる。なお、ボンディ
ングパッドは、幅広部を避けて封止面に沿って形成すれ
ばよい。[0010] In the present invention, the portion of the ceramic layer forming the sealing surface is widened to be wider on the side where the bonding pad is formed in plan view, and the via is provided in the widened portion. Does not cause the above-described manufacturing problems due to the formation of the via hole, and the sealing surface in the portion where the via is not formed can have a necessary minimum width that does not impair the sealing. That is, of the width of the ceramic of the uppermost layer forming the sealing surface where the via is formed, the width of the sealing surface is expanded inward corresponding to the portion where the via is formed. It is possible to reduce the size of the device without causing any manufacturing defects. The bonding pad may be formed along the sealing surface avoiding the wide portion.
【0011】そして請求項2に記載の本発明は、電子部
品搭載用の凹部の周囲であって上面に封止面を備え、か
つ該封止面をなすセラミック層にビアが形成されている
と共に該セラミック層より下層のセラミック層の上面で
あって該封止面に沿ってボンディングパッドが形成さ
れ、このボンディングパッドが形成されたセラミック層
より下層のセラミック層の上面が凹部の底面をなす、3
層以上のセラミック積層構造の配線基板において、前記
封止面をなすセラミック層の部分の幅を、前記ボンディ
ングパッドの形成面側であってボンディングパッドが形
成されたセラミック層の上に広げて幅広部とし、該幅広
部に前記ビアを設けたことを特徴とする。According to a second aspect of the present invention, a sealing surface is provided on an upper surface around a concave portion for mounting an electronic component, and a via is formed in a ceramic layer forming the sealing surface. A bonding pad is formed along the sealing surface on the upper surface of the ceramic layer below the ceramic layer, and the upper surface of the ceramic layer below the ceramic layer on which the bonding pad is formed forms a bottom surface of the recess.
In a wiring board having a ceramic laminated structure having more than one layer, the width of the portion of the ceramic layer forming the sealing surface is widened on the side of the bonding pad forming surface and above the ceramic layer on which the bonding pad is formed. And the via is provided in the wide portion.
【0012】本発明のセラミック積層構造の配線基板
は、複数層のセラミック層を有してなるものにおいて適
用できるが、請求項2に記載の発明は、ボンディングパ
ッドが形成されたセラミック層より下層のセラミック層
の上面が凹部の底面をなす、3層以上のセラミック積層
構造の配線基板である。The wiring board having a ceramic laminated structure according to the present invention can be applied to a wiring board having a plurality of ceramic layers, but the invention according to claim 2 is applied to a wiring board below the ceramic layer on which the bonding pads are formed. The wiring board has a ceramic laminated structure of three or more layers in which the upper surface of the ceramic layer forms the bottom surface of the concave portion.
【0013】請求項2記載のセラミック積層構造の配線
基板においては、前記幅広部のうちの前記凹部の中心寄
り端縁が、前記ボンディングパッドが形成されたセラミ
ック層のうちの該凹部の中心寄り端縁より、該凹部の中
心側に突出していないのが好ましい。また、本発明にお
ける前記セラミック積層構造の配線基板は、平面視、略
四角形に形成されるのが普通であるが、その場合、前記
幅広部は、その一辺において一または複数のいずれであ
ってもよい。さらに、ビアを良好に形成するためには、
前記幅広部は0.55mm以上の幅を有していることが
好ましい。[0013] In the wiring board having a ceramic laminated structure according to claim 2, an edge near the center of the recess in the wide portion is an edge near the center of the recess in the ceramic layer on which the bonding pad is formed. Preferably, it does not protrude from the edge toward the center of the recess. Further, the wiring board having the ceramic laminated structure in the present invention is generally formed in a substantially rectangular shape in plan view, in which case, the wide portion may be one or more in one side. Good. Furthermore, in order to form vias well,
It is preferable that the wide portion has a width of 0.55 mm or more.
【0014】[0014]
【発明の実施の形態】本発明に係るセラミック積層構造
の配線基板の第1実施形態例について、図1ないし図4
を参照して詳細に説明する。図中100は基板であっ
て、3層のセラミック層(101〜103)構造で容器
状をなしている。電子部品が収容される凹部105の左
右の対向する2辺側は、底面(ダイアタッチ面)107
をなす最下層のセラミック層101から上に向かって階
段状に形成され、他の2辺の内側は底面107から略垂
直な壁109をなしている。そして、最下層のセラミッ
ク層101の上に形成されたセラミック層102の上面
のうち、凹部105側に露出している棚部(ボンディン
グパッド形成面ともいう)110に多数のボンディング
パッド(メタライズ層)112が形成され、最上層の四
角枠状のセラミック層103の上面が封止面115をな
し、その表面には図示しないが封止用メタライズ層が形
成されている。1 to 4 show a first embodiment of a wiring board having a ceramic laminated structure according to the present invention.
This will be described in detail with reference to FIG. In the figure, reference numeral 100 denotes a substrate, which has a three-layered ceramic layer (101 to 103) structure and has a container shape. Opposite left and right sides of the concave portion 105 in which the electronic component is accommodated are a bottom surface (die attach surface) 107.
Are formed stepwise upward from the lowermost ceramic layer 101, and the inside of the other two sides forms a wall 109 substantially perpendicular to the bottom surface 107. On the upper surface of the ceramic layer 102 formed on the lowermost ceramic layer 101, a large number of bonding pads (metallized layers) are provided on a shelf (also referred to as a bonding pad forming surface) 110 exposed to the concave portion 105 side. The upper surface of the uppermost square frame-shaped ceramic layer 103 forms a sealing surface 115, on which a sealing metallization layer (not shown) is formed.
【0015】一方本形態では、左右両側の封止面115
の幅W1がその適所(図示2箇所)において、平面視封
止面115の周方向に沿って所定の範囲Sにわたり広く
なるようにボンディングパッド形成面110側に所定量
H膨出するように広げられ、幅広部117をなしてい
る。そしてこの各幅広部117の上面に上端部が存在す
るように、最下層のセラミック層101の上面から上に
ビア121が設けられ、封止用メタライズ層に接続され
ている。なお、本形態ではその幅広部117の内側端縁
118はその下層の棚部110の内側端縁111より凹
部105の中心側突出しないように、つまり棚部110
の内側端縁111より僅かに外側に位置するように形成
されている。因みに本形態では封止面115の幅W1が
0.35mm、幅広部117の膨出量Hが0.3mm、
ビア121の径DVが0.15mmとされ、ビア121
の両側のセラミックの肉幅WV1、WV2は、それぞれ
0.25mmとされている。なお幅広部117の封止面
115の周方向に沿う範囲Sは、ビア121の外側に十
分なセラミックの肉幅が確保される大きさとされてい
る。On the other hand, in the present embodiment, the left and right sealing surfaces 115 are provided.
Is expanded so as to swell by a predetermined amount H toward the bonding pad forming surface 110 side so that the width W1 of the bonding pad forming surface 110 is widened over a predetermined range S along the circumferential direction of the sealing surface 115 in plan view at appropriate places (two positions in the drawing). And a wide portion 117 is formed. Vias 121 are provided above the lowermost ceramic layer 101 so as to have an upper end on the upper surface of each wide portion 117 and are connected to the metallization layer for sealing. In this embodiment, the inner edge 118 of the wide portion 117 does not protrude from the inner edge 111 of the lower shelf 110 on the center side of the concave portion 105, that is, the shelf 110
Is formed so as to be located slightly outside the inner edge 111 of the. Incidentally, in the present embodiment, the width W1 of the sealing surface 115 is 0.35 mm, the bulging amount H of the wide portion 117 is 0.3 mm,
The diameter DV of the via 121 is set to 0.15 mm.
The widths WV1 and WV2 of the ceramics on both sides are 0.25 mm, respectively. The range S along the circumferential direction of the sealing surface 115 of the wide portion 117 has a size that ensures a sufficient width of the ceramic outside the via 121.
【0016】このような配線基板100は、ビア12
1、図示しない封止用メタライズ層、その他の配線層な
ど露出するメタライズ層部分には、ニッケルメッキがか
けられ、最表面には金メッキがかけられている。そし
て、電子部品(図示せず)を搭載し、その電極とボンデ
ィングパッド112との間でワイヤボンディングした
後、凹部105を覆うように図示しないリッドが被せら
れ、封止用メタライズ層に例えばハンダ付けされて封止
される。なお、この配線基板100は、従来のセラミッ
ク積層構造の配線基板と同様に、メタライズペーストが
封止用メタライズ層や配線層用などのために表面に印刷
され、ビアホールに充填された多数個取りのセラミック
グリーンシートを積層、圧着し、その後、焼成し、メッ
キ処理した後、各基板単位に分割することで製造され
る。Such a wiring board 100 has a via 12
1. Exposed metallized layers such as a sealing metallized layer (not shown) and other wiring layers are plated with nickel, and the outermost surface is plated with gold. Then, after mounting an electronic component (not shown) and performing wire bonding between the electrode and the bonding pad 112, a lid (not shown) is placed so as to cover the concave portion 105, and for example, soldering is performed on the metallizing layer for sealing. And sealed. The wiring board 100 has a multi-cavity pattern in which a metallization paste is printed on the surface for a metallization layer for sealing or a wiring layer, and the via holes are filled, similarly to a wiring board having a conventional ceramic laminated structure. It is manufactured by laminating and crimping ceramic green sheets, then baking and plating, and then dividing each substrate unit.
【0017】しかして、本形態の配線基板100は、周
囲上面の封止面115のうちの適所(2箇所)が凹部1
05の中心寄り部位に膨出する形で幅広とされ、そこに
ビア121が設けられていることから、ビア121の両
側に十分なセラミックの肉幅WV1、WV2が確保され
ている。一方、その他の封止面115部位はその幅W1
がビア121のない基板と同様の封止面の幅に狭く形成
されている。したがって、その製造におけるグリーンシ
ートの成形時つまりビア121形成用のビアホールのた
めのパンチング時や各基板形状に打ち抜く時に肉幅WV
1、WV2の部分にキレが発生することはない。また同
部位で焼成時やその後のブレーク時に割れやカケが発生
することもないので、製品歩留まりがよい。その上に、
封止面115をなすセラミック層103にビア121が
存在するにもかかわらず、ビア121のない配線基板1
00と同様の小型化が図られる。なお、このような配線
基板100では、幅広部117を棚部のうちボンディン
グパッド112を設けない部分の上に設けるように設計
すればよい。In the wiring board 100 of the present embodiment, the proper position (two places) of the sealing surface 115 on the peripheral upper surface is the concave portion 1.
The width of the ceramic material 05 is widened so as to protrude toward the center of the portion 05, and the vias 121 are provided there. Therefore, sufficient ceramic wall widths WV1 and WV2 are secured on both sides of the via 121. On the other hand, the other sealing surface 115 has the width W1.
Are formed to be as narrow as the sealing surface width of the substrate having no via 121. Therefore, when the green sheet is formed in the production, that is, when punching for a via hole for forming the via 121 or when punching into each substrate shape, the width WV is used.
1. There is no sharpness in the portion of WV2. Also, cracking or chipping does not occur at the same portion during firing or subsequent break, so that the product yield is good. in addition,
Despite the presence of via 121 in ceramic layer 103 forming sealing surface 115, wiring substrate 1 without via 121
The same miniaturization as in 00 is achieved. In such a wiring board 100, the wide portion 117 may be designed to be provided on a portion of the shelf where the bonding pad 112 is not provided.
【0018】次に、本発明のセラミック積層構造の配線
基板の第2実施形態について図5及び図6を参照して詳
細に説明する。ただし、この配線基板200は、前記第
1実施形態がセラミック3層構造の配線基板であったの
に対し、セラミックが5層構造の配線基板において具体
化した点のみが相違するだけである。すなわち、前記形
態における中間のセラミック層102と、最上層のセラ
ミック層103のそれぞれを2層(102a、102
b、103a、103b)に分割した点のみが相違する
だけであり、作用、効果においても異なる点のない、い
わば前記形態の変形例とでもいうべきものであるから、
同一の部位には同一の符号を付し、その説明を省略す
る。Next, a second embodiment of a wiring board having a ceramic laminated structure according to the present invention will be described in detail with reference to FIGS. However, the wiring board 200 is different from the first embodiment in that the first embodiment is a wiring board having a ceramic three-layer structure, but only in that the ceramic is embodied in a wiring board having a five-layer structure. That is, each of the intermediate ceramic layer 102 and the uppermost ceramic layer 103 in the above-described embodiment has two layers (102a, 102a).
b, 103a, and 103b), which are different only in that they are different from each other and do not differ in operation and effect.
The same portions are denoted by the same reference numerals, and description thereof will be omitted.
【0019】さて次に本発明のセラミック積層構造の配
線基板の第3実施形態について図7〜図9を参照して詳
細に説明する。この配線基板300は、前記形態の配線
基板がセラミック3層又は5層構造のものであったのに
対し、セラミック2層構造のものにおいて具体化した点
のみが相違するものであるため、相違点を中心に説明
し、同一の部位には同一の符号を付し、適宜その説明を
省略する。Next, a third embodiment of a wiring board having a ceramic laminated structure according to the present invention will be described in detail with reference to FIGS. This wiring board 300 is different from the above-described embodiment in that the wiring board has a ceramic three-layer or five-layer structure, but is different only in a specific example of a ceramic two-layer structure. , The same parts are denoted by the same reference numerals, and the description thereof will be appropriately omitted.
【0020】すなわち、本形態の配線基板300は、セ
ラミック2層構造のもので、下層の矩形のセラミック層
301と、上面周囲の矩形枠状をなすセラミック層30
2とからなっている。そして下層のセラミック層301
の上面が、凹部105の底面(ダイアタッチ面)107
をなし、その周囲のうち左右両側にボンティングパッド
112が形成されている。一方、上層のセラミック層3
02の上面が封止面115をなし、封止用メタライズ層
が形成され、そのセラミック層302の一部分の幅が内
側のボンティングパッド112の形成領域に膨出するよ
うに広げられ、幅広部117をなし、そこにビア121
が形成されている。That is, the wiring board 300 of the present embodiment has a ceramic two-layer structure, and has a lower rectangular ceramic layer 301 and a rectangular frame-shaped ceramic layer 30 around the upper surface.
It consists of two. And the lower ceramic layer 301
Is the bottom surface (die attach surface) 107 of the concave portion 105.
The bonding pads 112 are formed on the left and right sides of the periphery. On the other hand, the upper ceramic layer 3
The upper surface of the ceramic layer 302 forms a sealing surface 115, a metallizing layer for sealing is formed, and the width of a part of the ceramic layer 302 is widened so as to bulge into the region where the bonding pad 112 is formed. And via 121 there
Are formed.
【0021】しかして、本形態では、前記形態のように
ボンディングパッド112の形成面(ボンディングシェ
ルフ)をなす独立のセラミック層はなく、搭載される電
子部品の電極と、ワイヤボンディングされるボンディン
グパッド112は、凹部105の底面107の周囲に形
成されている点のみが前記第1実施形態と相違する。す
なわち、従来、このような配線基板では、封止面をなす
上のセラミック層に上端部が存在するビア121を設け
る場合には、ビア121が設けられる封止面をなすセラ
ミック層の幅をその辺全体について一定の幅としてい
た。これに対し本形態では、封止面なすセラミック層3
02の一部を内側に広げて幅広部117とし、この幅広
部117にビア121を設けたものであるため、前記形
態と同様にその配線基板300の製造における不具合の
発生はなく、しかも基板の小型化を図ることができる。
本形態からも理解されるが本発明の配線基板は、それを
なすセラミック層の数が複数のものであればその数に関
係なく具体化できる。In this embodiment, however, there is no independent ceramic layer forming the bonding pad 112 forming surface (bonding shelf) as in the above embodiment, and the electrodes of the electronic components to be mounted and the bonding pads 112 to be wire-bonded are not provided. Differs from the first embodiment only in that it is formed around the bottom surface 107 of the recess 105. That is, conventionally, in such a wiring board, when the via 121 having the upper end portion is provided in the upper ceramic layer forming the sealing surface, the width of the ceramic layer forming the sealing surface where the via 121 is provided is set to the width. The width was constant for the entire side. On the other hand, in the present embodiment, the ceramic layer 3 forming the sealing surface
02 is widened inward to form a wide portion 117, and the wide portion 117 is provided with a via 121. Therefore, as in the above-described embodiment, there is no problem in manufacturing the wiring board 300, and The size can be reduced.
As will be understood from the present embodiment, the wiring board of the present invention can be embodied regardless of the number of ceramic layers constituting the wiring board, as long as the number is plural.
【0022】前記各形態では、基板を矩形のものとし平
面視のその4辺のうちの2辺をなす封止面(セラミック
層)について、それぞれの一部を幅広としたが、内側に
沿ってボンディングパッドの形成面がある封止面であれ
ば、1辺又はすべての辺について幅広部を設け、そこに
ビアを設けることができる。また、各辺に沿う封止面に
設ける幅広部の数はいずれであってもよい。すなわち、
幅広部の数や位置は形成するビアの数又は配置など基板
に応じて適宜に設計すればよい。なお、幅広部の長さ
(図3におけるS)は、ボンディングパッドの形成に支
障のない限りにおいて、しかもビアの端縁(周縁)から
亀裂を発生させない肉幅を確保して適宜に設定すればよ
い。また、各辺の一部に幅広部を設ける他、一辺を他の
辺よりも幅広とした幅広部(幅広辺)を形成したもので
あってもよい。In each of the above embodiments, a part of each of the sealing surfaces (ceramic layers) forming two sides of the four sides in plan view and having a rectangular shape is made wider, If the sealing surface has a bonding pad formation surface, a wide portion can be provided on one side or all sides and a via can be provided there. Further, the number of wide portions provided on the sealing surface along each side may be any. That is,
The number and position of the wide portions may be appropriately designed according to the substrate such as the number or arrangement of vias to be formed. Note that the length of the wide portion (S in FIG. 3) is appropriately set as long as the formation of the bonding pad is not hindered and the width of the via is not cracked from the edge (periphery) of the via. Good. Further, in addition to providing a wide portion on a part of each side, a wide portion (wide side) in which one side is wider than the other side may be formed.
【0023】前記においては封止面の封止用メタライズ
層にリッドがハンダ付けされて封止される構造のセラミ
ック積層構造の配線基板において具体化した場合を説明
したが、本発明はこのような封止構造のものに限定され
るものではない。例えば、ニッケルメッキ層付きの封止
用メタライズ層に、鉄ニッケル合金などからなり、表面
に、ニッケルメッキ層が形成されてなるなどの枠状のリ
ング(シールリング)がロウ付けなどにより接着され、
その上にリッドがハンダ付けなどによって封止される構
造の配線基板においても同様に適用できる。本発明は、
前記各形態の構造、形状のものに限定されるものではな
く、その要旨を逸脱しない限りにおいて適宜に設計変更
して具体化できる。In the above, a case has been described in which the present invention is embodied in a wiring board having a ceramic laminate structure in which a lid is soldered to a metallization layer for sealing on a sealing surface and sealed. It is not limited to the one having the sealing structure. For example, a frame-shaped ring (seal ring) made of an iron-nickel alloy or the like and formed with a nickel-plated layer on the surface of the metallization layer for sealing with a nickel-plated layer is bonded by brazing or the like,
The present invention can be similarly applied to a wiring board having a structure in which a lid is sealed thereon by soldering or the like. The present invention
The present invention is not limited to the structure and shape of each of the above embodiments, and can be embodied by appropriately changing the design without departing from the gist thereof.
【0024】[0024]
【発明の効果】本発明に係るセラミック積層構造の配線
基板によれば、封止面をなすセラミック層の部分の幅
を、ボンディングパッドの形成面側に広げて幅広部と
し、そこにビアを設けたものであることから、ビアの周
囲(外側)のセラミックの肉幅を十分に確保できる。し
たがって、その製造におけるグリーンシートの成形時、
つまりビアホールのためのパンチング時や各基板形状に
打ち抜く時にビアホールの外側にキレが発生するのが防
止される。また焼成時やその後のブレーク時にも同部位
に割れやカケが発生するのが防止されるので、製品歩留
まりを向上させることができる。その上に、封止面にビ
アが存在するにもかかわらず、ビアがない配線基板と同
様の小型化が図られる。すなわち、本発明によれば、封
止面にビアがあるセラミック積層構造の配線基板であり
ながら、製造歩留まりの低下を招くことなく、小型化を
図ることができるものであり、配線基板が搭載される機
器における設置スペースの縮小化の要請に応えることが
できるといった顕著な効果がある。According to the ceramic laminated wiring board of the present invention, the width of the portion of the ceramic layer forming the sealing surface is widened toward the bonding pad forming surface side to form a wide portion, and a via is provided therein. Therefore, the width of the ceramic wall around (outside) the via can be sufficiently ensured. Therefore, when forming the green sheet in its manufacture,
In other words, it is possible to prevent the occurrence of sharpness outside the via hole at the time of punching for the via hole or punching into each substrate shape. In addition, cracks and chips are prevented from being generated in the same portion during firing and subsequent breaks, so that the product yield can be improved. In addition, despite the presence of vias in the sealing surface, the same miniaturization as a wiring board without vias can be achieved. That is, according to the present invention, even though the wiring board has a ceramic laminated structure having vias on the sealing surface, the size can be reduced without lowering the manufacturing yield, and the wiring board is mounted. There is a remarkable effect that it is possible to respond to the demand for reducing the installation space in such devices.
【図1】本発明に係るセラミック積層構造の配線基板の
第1実施形態例の平面図。FIG. 1 is a plan view of a first embodiment of a wiring board having a ceramic laminated structure according to the present invention.
【図2】図1の要部拡大斜視図。FIG. 2 is an enlarged perspective view of a main part of FIG. 1;
【図3】図1の要部拡大平面図。FIG. 3 is an enlarged plan view of a main part of FIG. 1;
【図4】図1のA−A線断面図。FIG. 4 is a sectional view taken along line AA of FIG. 1;
【図5】本発明に係るセラミック積層構造の配線基板の
第2実施形態例の断面図及び要部拡大図。FIG. 5 is a sectional view and an enlarged view of a main part of a second embodiment of the wiring board having a ceramic laminated structure according to the present invention.
【図6】図5の要部拡大斜視図。FIG. 6 is an enlarged perspective view of a main part of FIG. 5;
【図7】本発明に係るセラミック積層構造の配線基板の
第3実施形態例の平面図。FIG. 7 is a plan view of a third embodiment of a wiring board having a ceramic laminated structure according to the present invention.
【図8】図7の要部拡大斜視図。FIG. 8 is an enlarged perspective view of a main part of FIG. 7;
【図9】図7のB−B線断面図。FIG. 9 is a sectional view taken along line BB of FIG. 7;
【図10】従来のセラミック積層構造の配線基板の断面
図。FIG. 10 is a cross-sectional view of a conventional wiring board having a ceramic laminated structure.
【図11】図10のセラミック積層構造の配線基板の平
面図。FIG. 11 is a plan view of the wiring board having the ceramic laminated structure of FIG. 10;
【図12】図10のセラミック積層構造の配線基板の部
分拡大平面図。FIG. 12 is a partially enlarged plan view of the wiring board having the ceramic laminated structure of FIG. 10;
100、200、300 セラミック積層構造の配線
基板 103、103b、302 封止面をなすセラミック
層 101、102、102a〜103a、301 封止面
をなすセラミック層より下層のセラミック層 105 電子部品搭載用の凹部 107 凹部の底面 112 ボンディングパッド 115 封止面 117 幅広部 121 ビア100, 200, 300 Wiring board 103, 103b, 302 having a laminated ceramic structure Ceramic layers 101, 102, 102a to 103a, 301 forming a sealing surface Ceramic layer lower than the ceramic layer forming a sealing surface 105 For mounting electronic components Concave portion 107 Bottom surface of concave portion 112 Bonding pad 115 Sealing surface 117 Wide portion 121 Via
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 23/12 W ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01L 23/12 W
Claims (3)
面に封止面を備え、かつ該封止面をなすセラミック層に
ビアが形成されていると共に該セラミック層より下層の
セラミック層の上面であって該封止面に沿ってボンディ
ングパッドが形成されてなるセラミック積層構造の配線
基板において、 前記封止面をなすセラミック層の部分の幅を、前記ボン
ディングパッドの形成面側に広げて幅広部とし、該幅広
部に前記ビアを設けたことを特徴とするセラミック積層
構造の配線基板。1. A semiconductor device according to claim 1, wherein a sealing surface is provided on an upper surface around the concave portion for mounting the electronic component, a via is formed in a ceramic layer forming the sealing surface, and a ceramic layer below the ceramic layer is formed. In a wiring board having a ceramic laminated structure in which bonding pads are formed along the sealing surface on the upper surface, the width of the ceramic layer forming the sealing surface is increased toward the bonding pad formation surface side. A wiring board having a ceramic laminated structure, wherein said wiring board has a wide portion and said via is provided in said wide portion.
面に封止面を備え、かつ該封止面をなすセラミック層に
ビアが形成されていると共に該セラミック層より下層の
セラミック層の上面であって該封止面に沿ってボンディ
ングパッドが形成され、このボンディングパッドが形成
されたセラミック層より下層のセラミック層の上面が凹
部の底面をなす、3層以上のセラミック積層構造の配線
基板において、 前記封止面をなすセラミック層の部分の幅を、前記ボン
ディングパッドの形成面側であってボンディングパッド
が形成されたセラミック層の上に広げて幅広部とし、該
幅広部に前記ビアを設けたことを特徴とするセラミック
積層構造の配線基板。2. A method according to claim 1, further comprising: forming a sealing surface on the upper surface around the concave portion for mounting the electronic component, forming a via in the ceramic layer forming the sealing surface, and forming a ceramic layer below the ceramic layer. A wiring board having a ceramic laminated structure of three or more layers, wherein a bonding pad is formed along the sealing surface on the upper surface, and an upper surface of a ceramic layer below the ceramic layer on which the bonding pad is formed forms a bottom surface of the concave portion; In the above, the width of the portion of the ceramic layer forming the sealing surface is expanded on the ceramic layer on which the bonding pad is formed on the bonding pad forming surface side to form a wide portion, and the via is formed in the wide portion. A wiring board having a ceramic laminated structure, wherein the wiring board is provided.
端縁が、前記ボンディングパッドが形成されたセラミッ
ク層のうちの該凹部の中心寄り端縁より、該凹部の中心
側に突出していないことを特徴とする請求項2記載のセ
ラミック積層構造の配線基板。3. An edge near the center of the concave portion of the wide portion does not project toward the center of the concave portion from an edge near the center of the concave portion of the ceramic layer on which the bonding pad is formed. 3. The wiring board according to claim 2, wherein the wiring board has a ceramic laminated structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP36461799A JP4072300B2 (en) | 1999-12-22 | 1999-12-22 | Wiring board with ceramic laminated structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP36461799A JP4072300B2 (en) | 1999-12-22 | 1999-12-22 | Wiring board with ceramic laminated structure |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2001185638A true JP2001185638A (en) | 2001-07-06 |
JP4072300B2 JP4072300B2 (en) | 2008-04-09 |
Family
ID=18482257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP36461799A Expired - Fee Related JP4072300B2 (en) | 1999-12-22 | 1999-12-22 | Wiring board with ceramic laminated structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4072300B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007067400A (en) * | 2005-08-30 | 2007-03-15 | Commissariat A L'energie Atomique | Method of covering member, particularly electric or electronic member, using improved solder seam |
US7313026B2 (en) | 2004-09-09 | 2007-12-25 | Renesas Technology Corp. | Semiconductor device |
JP2009010671A (en) * | 2007-06-28 | 2009-01-15 | Daishinku Corp | Piezoelectric vibrating device |
JP2009010660A (en) * | 2007-06-27 | 2009-01-15 | Daishinku Corp | Piezoelectric vibration device |
CN105336709A (en) * | 2014-08-05 | 2016-02-17 | 日本特殊陶业株式会社 | Wiring substrate |
-
1999
- 1999-12-22 JP JP36461799A patent/JP4072300B2/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7313026B2 (en) | 2004-09-09 | 2007-12-25 | Renesas Technology Corp. | Semiconductor device |
US7466599B2 (en) | 2004-09-09 | 2008-12-16 | Renesas Technology Corp. | Semiconductor device |
JP2007067400A (en) * | 2005-08-30 | 2007-03-15 | Commissariat A L'energie Atomique | Method of covering member, particularly electric or electronic member, using improved solder seam |
JP2009010660A (en) * | 2007-06-27 | 2009-01-15 | Daishinku Corp | Piezoelectric vibration device |
JP2009010671A (en) * | 2007-06-28 | 2009-01-15 | Daishinku Corp | Piezoelectric vibrating device |
CN105336709A (en) * | 2014-08-05 | 2016-02-17 | 日本特殊陶业株式会社 | Wiring substrate |
JP2016039189A (en) * | 2014-08-05 | 2016-03-22 | 日本特殊陶業株式会社 | Wiring board |
Also Published As
Publication number | Publication date |
---|---|
JP4072300B2 (en) | 2008-04-09 |
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