JP2001110997A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2001110997A JP2001110997A JP28435699A JP28435699A JP2001110997A JP 2001110997 A JP2001110997 A JP 2001110997A JP 28435699 A JP28435699 A JP 28435699A JP 28435699 A JP28435699 A JP 28435699A JP 2001110997 A JP2001110997 A JP 2001110997A
- Authority
- JP
- Japan
- Prior art keywords
- ferroelectric
- semiconductor device
- reversal
- substance
- ferroelectric substance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Semiconductor Memories (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、強誘電体の強誘電
性、とくに強誘電分極反転を用いる半導体メモリ装置に
用いられる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used for a semiconductor memory device using ferroelectricity of a ferroelectric substance, particularly, ferroelectric domain inversion.
【０００２】[0002]
【従来の技術】強誘電体の自発分極を用いたメモリデバ
イスは、高速性と不揮発性を兼ね備えた究極のメモリデ
バイスとして注目されている。特に、ＭＯＳＦＥＴのゲ
ート酸化膜を強誘電体で置き換えた強誘電体ゲートデバ
イスは、スケーリング則に乗った設計が可能であり、セ
ル面積も小さくとれることから特に注目を集めている。
メモリの書き込み速度は、強誘電体の分極反転速度に依
存している。しかしながら、強誘電体の分極反転メカニ
ズムは複雑で、不明な点も多い。また、強誘電体プロセ
スにも大きく影響をうけ、欠陥あるいは粒界は分域の成
長を阻害するため、一般には欠陥・転位の少ない単結晶
状強誘電体が高速の分極反転に必要と考えられている。2. Description of the Related Art A memory device using spontaneous polarization of a ferroelectric has attracted attention as an ultimate memory device having both high speed and non-volatility. In particular, a ferroelectric gate device in which a gate oxide film of a MOSFET is replaced with a ferroelectric material can be designed in accordance with the scaling rule, and is particularly attracting attention because the cell area can be reduced.
The writing speed of the memory depends on the polarization inversion speed of the ferroelectric. However, the polarization reversal mechanism of ferroelectrics is complicated and there are many unclear points. In addition, since the ferroelectric process is greatly affected, and defects or grain boundaries hinder domain growth, a single-crystal ferroelectric with few defects and dislocations is generally considered necessary for high-speed polarization reversal. ing.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、メモリ
材料としての特性を有する強誘電体は通常酸化物であ
り、単結晶酸化物薄膜をＳｉ基板上に成長させることは
困難である。また、強誘電体とＳｉの格子整合、化学結
合を適合させるためにバッファ層を用いることも可能で
はあるが、電気特性に影響を与えないバッファ層の膜厚
と材料選択には大きな制限がある。However, ferroelectrics having characteristics as a memory material are usually oxides, and it is difficult to grow a single crystal oxide thin film on a Si substrate. It is also possible to use a buffer layer to match the lattice matching and chemical bond between the ferroelectric and Si, but there are great restrictions on the thickness and material selection of the buffer layer that do not affect the electrical characteristics. .
【０００４】[0004]
【課題を解決するための手段】上記課題を解決するため
に、強誘電体の自発分極の反転を用いる半導体装置にお
いて、強誘電体の結晶粒径が前記強誘電体に取り付けら
れた電極を結ぶ方向に直角方向において２００ｎｍより
小さい事を特徴とするメモリ装置を構成する。あるい
は、強誘電体の自発分極の反転を用いるメモリ素子にお
いて、結晶粒径が２００ｎｍ以下の強誘電体が常誘電体
中に分散してなることを特徴とするメモリ装置を構成す
る。さらには、強誘電体の自発分極の反転を用いるメモ
リ素子において、柱状の強誘電体が常誘電体の中にその
柱の軸方向を印加電界の方向にそろえて配置されてなる
ことを特徴とするメモリ装置を構成する。In order to solve the above-mentioned problems, in a semiconductor device using reversal of spontaneous polarization of a ferroelectric, a crystal grain size of the ferroelectric connects an electrode attached to the ferroelectric. A memory device characterized by being smaller than 200 nm in a direction perpendicular to the direction. Alternatively, a memory device using a reversal of spontaneous polarization of a ferroelectric material is characterized in that a ferroelectric material having a crystal grain size of 200 nm or less is dispersed in a paraelectric material. Furthermore, in a memory element using inversion of spontaneous polarization of a ferroelectric substance, a columnar ferroelectric substance is arranged in a paraelectric substance with the axial direction of the column aligned with the direction of an applied electric field. To configure a memory device.
【０００５】[0005]
【発明の実施の形態】（実施例１）図１に本発明の実施
例で作製したメモリデバイスの構成図を示す。ｐ型Ｓｉ
を基板１として、通常の半導体プロセスにより、素子分
離３、ソース、ドレイン領域２を形成した後、熱酸化に
より膜厚１０ｎｍのＳｉＯ2層４を成長させた。その
後、ＲＦマグネトロンスパッタリング法により、膜厚２
００ｎｍのＰＺＴ強誘電体層５を成長させた。強誘電体
層の微細構造は図２に示すとおり多結晶体であるが、膜
厚方向には一つの結晶粒よりなり、成長速度を変化させ
ることで、粒径を５０〜５００ｎｍまで変化させた。続
いて絶縁層６としてＳｉＯ2を３００ｎｍ堆積した後、
コンタクトホールを形成して、ソース電極７，ドレイン
電極８，ゲート電極９を形成して、トランジスタを作製
した。得られたトランジスタの書き換え速度を測定し
た。結晶粒径と反転速度の関係を図３に示す。図に示す
とおり、粒径２００ｎｍ以下で５０ｎｓ以下の反転速度
が得られた。(Embodiment 1) FIG. 1 shows a configuration diagram of a memory device manufactured in an embodiment of the present invention. p-type Si
Was used as a substrate 1 to form an element isolation 3, a source / drain region 2 by a normal semiconductor process, and then a 10-nm-thick SiO 2 layer 4 was grown by thermal oxidation. Then, a film thickness of 2 was formed by RF magnetron sputtering.
A 00 nm PZT ferroelectric layer 5 was grown. Although the microstructure of the ferroelectric layer is a polycrystal as shown in FIG. 2, the ferroelectric layer is composed of one crystal grain in the film thickness direction, and the grain size is changed from 50 to 500 nm by changing the growth rate. . Subsequently, after depositing 300 nm of SiO 2 as the insulating layer 6,
A contact hole was formed, a source electrode 7, a drain electrode 8, and a gate electrode 9 were formed, whereby a transistor was manufactured. The rewriting speed of the obtained transistor was measured. FIG. 3 shows the relationship between the crystal grain size and the reversal speed. As shown in the figure, an inversion speed of 50 ns or less was obtained at a particle size of 200 nm or less.
【０００６】（実施例２）実施例１と同様の構成である
が、強誘電体層５をまずアモルファスでを形成し、熱処
理により結晶化させる際、熱処理時間で晶出する結晶粒
の粒径を制御し、図４に示す構造の強誘電体層５を形成
した。様々な粒径を持つ強誘電体層を形成し、反転速度
と粒径の関係を検討した結果、実施例１と同様、平均粒
径２００ｎｍ以下の場合に反転速度５０ｎｓ以下の結果
が得られた。(Embodiment 2) The structure is the same as that of Embodiment 1, except that the ferroelectric layer 5 is first formed in an amorphous state and is crystallized by heat treatment. Was controlled to form the ferroelectric layer 5 having the structure shown in FIG. As a result of forming ferroelectric layers having various grain sizes and examining the relationship between the reversal speed and the grain size, a result with an average grain size of 200 nm or less and a reversal speed of 50 ns or less was obtained as in Example 1. .
【０００７】（実施例３）強誘電体層５を形成した後、
エッチングにより、直径２００ｎｍの柱状に微細加工を
行い、さらにアモルファスのＰＺＴにより前記柱間を重
点した図５に示す構造の強誘電体層５を形成し、反転速
度を検討した結果、実施例１で示したのと同様に、５０
ｎｍ以下の高速の反転速度が得られた。(Embodiment 3) After forming the ferroelectric layer 5,
As a result of performing fine processing into a columnar shape having a diameter of 200 nm by etching, and forming a ferroelectric layer 5 having a structure shown in FIG. As shown, 50
High reversal speeds of less than nm were obtained.
【０００８】[0008]
【発明の効果】本発明は実施例により明確にしたとお
り、強誘電体層の粒径を制御することで、これまで得ら
れなかった強誘電体分極の高速の反転速度が実現され
た。本実施例では、ＰＺＴを強誘電体として用いたが、
これは、強誘電体層の組成に特異な現象ではなく、構造
に依存した特性であることは明らかであり、ＰＺＴ以外
の強誘電体、たとえば、YmnO3、Ｓｒ2（ＴａＮｂ）2Ｏ7
系強誘電体、ＳｒＢｉＴａＯ（Ｙ１）系強誘電体を用い
た場合でも全く同様の結果が得られることは明らかであ
る。According to the present invention, as has been made clear by the examples, a high-speed reversal speed of the ferroelectric polarization, which has not been obtained until now, was realized by controlling the grain size of the ferroelectric layer. In this embodiment, PZT is used as the ferroelectric,
It is clear that this is not a phenomenon peculiar to the composition of the ferroelectric layer, but is a characteristic depending on the structure. Ferroelectrics other than PZT, for example, YmnO 3 , Sr 2 (TaNb) 2 O 7
It is clear that the same result can be obtained even when a ferroelectric material based on SrBiTaO (Y1) is used.
【図１】本発明の一実施例で作製された半導体装置の構
成図FIG. 1 is a configuration diagram of a semiconductor device manufactured in one embodiment of the present invention.
【図２】本発明の一実施例で作製された強誘電体層の模
式図FIG. 2 is a schematic view of a ferroelectric layer manufactured in one embodiment of the present invention.
【図３】強誘電体分極の反転速度と結晶粒径との関係を
示す図FIG. 3 is a diagram showing the relationship between the inversion speed of ferroelectric polarization and the crystal grain size.
【図４】本発明の第二の実施例で作製された強誘電体層
の模式図FIG. 4 is a schematic view of a ferroelectric layer manufactured in a second embodiment of the present invention.
【図５】本発明の第三の実施例で作製された強誘電体層
の模式図FIG. 5 is a schematic view of a ferroelectric layer manufactured in a third embodiment of the present invention.
１ Ｓｉ基板 ２ ソース拡散領域 ３ ドレイン拡散領域 ４ Ｓｉ薄膜 ５ 強誘電体層 ６ 絶縁層 ７ ソース電極 ８ ドレイン電極 ９ ゲート電極 １０ 常誘電体 １１ 強誘電体 Reference Signs List 1 Si substrate 2 Source diffusion region 3 Drain diffusion region 4 Si thin film 5 Ferroelectric layer 6 Insulating layer 7 Source electrode 8 Drain electrode 9 Gate electrode 10 Paraelectric 11 Ferroelectric
フロントページの続き (72)発明者 大塚 隆 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 上田 路人 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 西川 孝司 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Ｆターム(参考） 5F083 FR06 JA15 PR33 Continued on the front page (72) Inventor Takashi Otsuka 1006 Kazuma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. Person Koji Nishikawa 1006 Kadoma Kadoma, Kadoma City, Osaka Prefecture F-term (reference) 5F083 FR06 JA15 PR33 Matsushita Electric Industrial Co., Ltd.
Claims (3)
リ素子において、強誘電体の結晶粒径が前記強誘電体に
取り付けられた電極を結ぶ方向に直角方向において２０
０ｎｍより小さい事を特徴とする半導体装置。1. A memory element using reversal of spontaneous polarization of a ferroelectric substance, wherein a crystal grain size of the ferroelectric substance is 20 degrees in a direction perpendicular to a direction connecting electrodes attached to the ferroelectric substance.
A semiconductor device characterized by being smaller than 0 nm.
リ素子において、結晶粒径が２００ｎｍ以下の強誘電体
が常誘電体中に分散してなることを特徴とする半導体装
置。2. A semiconductor device using a reversal of spontaneous polarization of a ferroelectric substance, wherein a ferroelectric substance having a crystal grain size of 200 nm or less is dispersed in a paraelectric substance.
リ素子において、柱状の強誘電体が常誘電体の中にその
柱の軸方向を印加電界の方向にそろえて配置されてなる
ことを特徴とする半導体装置。3. A memory element using reversal of spontaneous polarization of a ferroelectric substance, wherein a columnar ferroelectric substance is arranged in a paraelectric substance with the axial direction of the column aligned with the direction of an applied electric field. Characteristic semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28435699A JP2001110997A (en) | 1999-10-05 | 1999-10-05 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28435699A JP2001110997A (en) | 1999-10-05 | 1999-10-05 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001110997A true JP2001110997A (en) | 2001-04-20 |
Family
ID=17677540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28435699A Pending JP2001110997A (en) | 1999-10-05 | 1999-10-05 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001110997A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004520721A (en) * | 2001-05-10 | 2004-07-08 | シメトリックス・コーポレーション | Ferroelectric composite material, method of manufacturing the same, and memory using the same |
| JP2006185940A (en) * | 2004-12-24 | 2006-07-13 | Ngk Insulators Ltd | Piezo-electricity/electrostrictive element, piezo-electricity/electrostrictive laminate, and piezo-electricity/electrostrictive film type actuator |
| JP2010016127A (en) * | 2008-07-02 | 2010-01-21 | Tohoku Univ | Ferroelectric material film, semiconductor devices having ferroelectric material film, and method of manufacturing these elements |
-
1999
- 1999-10-05 JP JP28435699A patent/JP2001110997A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004520721A (en) * | 2001-05-10 | 2004-07-08 | シメトリックス・コーポレーション | Ferroelectric composite material, method of manufacturing the same, and memory using the same |
| JP2006185940A (en) * | 2004-12-24 | 2006-07-13 | Ngk Insulators Ltd | Piezo-electricity/electrostrictive element, piezo-electricity/electrostrictive laminate, and piezo-electricity/electrostrictive film type actuator |
| JP2010016127A (en) * | 2008-07-02 | 2010-01-21 | Tohoku Univ | Ferroelectric material film, semiconductor devices having ferroelectric material film, and method of manufacturing these elements |
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