JP2001015922A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JP2001015922A JP2001015922A JP18707299A JP18707299A JP2001015922A JP 2001015922 A JP2001015922 A JP 2001015922A JP 18707299 A JP18707299 A JP 18707299A JP 18707299 A JP18707299 A JP 18707299A JP 2001015922 A JP2001015922 A JP 2001015922A
- Authority
- JP
- Japan
- Prior art keywords
- insulating material
- substrate
- material substrate
- manufacturing
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はプリント配線基板の
製造方法に係り、更に詳細にはいわゆる多層板を構成す
るプリント配線基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board constituting a so-called multilayer board.
【０００２】[0002]
【従来の技術】従来より多層板を形成する方法のひとつ
として、プリプレグ、即ちエポキシ樹脂などのシート状
熱硬化性樹脂からなる未硬化の絶縁材料基板に、金属粉
などの導電性材料を樹脂中に分散させたものを略円錐型
に成形した導体バンプを配設した導体層を押圧して前記
プリプレグに前記導体バンプを貫通させ、これにより絶
縁材料基板の厚さ方向での電気的導通を形成する方法が
ある。2. Description of the Related Art Conventionally, as one method of forming a multilayer board, a prepreg, that is, an uncured insulating material substrate made of a sheet-like thermosetting resin such as an epoxy resin is coated with a conductive material such as a metal powder in a resin. The conductive layer in which the conductive bumps are arranged is pressed by pressing the conductive layer in which the conductive bumps are formed into a substantially conical shape by dispersing the conductive bumps into the prepreg, thereby forming electrical conduction in the thickness direction of the insulating material substrate. There is a way to do that.
【０００３】図１０は導体バンプを貫通させて絶縁材料
基板の電気的導通を形成する方法（以下、この方法を単
に「貫通法」という。）を模式的に示した図である。FIG. 10 is a diagram schematically illustrating a method of forming an electrical connection of an insulating material substrate by penetrating conductive bumps (hereinafter, this method is simply referred to as a “penetration method”).
【０００４】図１０に示したように、この貫通法では、
第１の導体層１０１上に複数個の略円錐型の導体バンプ
１０２，１０２，…を形成し、この導体バンプ１０２，
１０２，…の上側に絶縁材料基板のプリプレグ１０３を
配置する（図１０（ａ））。しかる後に前記第１の導体
層１０１とプリプレグ１０３とを押圧し、前記導体バン
プ１０２，１０２…をしてプリプレグ１０３を貫通せし
める。この状態で加熱等によりプリプレグ１０３を硬化
させる。As shown in FIG. 10, in this penetration method,
A plurality of substantially conical conductive bumps 102, 102,... Are formed on the first conductive layer 101, and the conductive bumps 102, 102,.
A prepreg 103 of an insulating material substrate is arranged on the upper side of 102,... (FIG. 10A). Thereafter, the first conductor layer 101 and the prepreg 103 are pressed, and the prepreg 103 is penetrated by the conductor bumps 102, 102. In this state, the prepreg 103 is cured by heating or the like.
【０００５】次いで、プリプレグ１０３の図中上面上に
第２の導体層１０４を形成し、「コア材」と呼ばれる、
絶縁材料基板の両面に導体層が形成されたプリント配線
基板の基本的な要素が形成される。Next, a second conductor layer 104 is formed on the upper surface of the prepreg 103 in the figure, and is called a “core material”.
Basic elements of a printed wiring board in which conductor layers are formed on both surfaces of an insulating material substrate are formed.
【０００６】[0006]
【発明が解決しようとする課題】ところで、多層板を形
成するにはこのようなコア材の導体層にパターン形成し
たのち、上記と同様にして１．導体バンプの形成、２．
絶縁材料基板プリプレグの配置、３．加熱硬化、４．導
体層の形成、５．パターン形成、更に、導体バンプの形
成………という一連の操作を繰り返して一層ずつ積層す
る。即ち、一層積層する毎に上記１〜５の操作を繰り返
す。By the way, in order to form a multilayer board, a pattern is formed on a conductor layer of such a core material, and then a 1. 1. formation of conductive bumps;
2. Arrangement of insulating material substrate prepreg; 3. heat curing; 4. formation of conductor layer; A series of operations of pattern formation and formation of conductive bumps... Are repeated to laminate layers one by one. That is, the above operations 1 to 5 are repeated every time one layer is laminated.
【０００７】しかし、コア材やその周辺の内側の層は繰
り返し加熱を施されるため、外側に多層化してゆく間に
内側の層の絶縁材料が繰り返しの加熱により劣化して、
絶縁層にクラックが生じやすいという問題がある。絶縁
層にクラックが生じると、マイグレーションなどのトラ
ブルの原因となるため、致命的な欠陥となる。However, since the core material and the inner layer around the core material are repeatedly heated, the insulating material of the inner layer is deteriorated by the repeated heating while the outer layer is formed as a multilayer.
There is a problem that cracks easily occur in the insulating layer. If a crack occurs in the insulating layer, it causes a trouble such as migration, which is a fatal defect.
【０００８】本発明は上記問題を解決するためになされ
たものである。即ち、本発明はマイグレーションを生じ
ることの無いプリント配線基板の製造方法を提供するこ
とを目的とする。The present invention has been made to solve the above problems. That is, an object of the present invention is to provide a method for manufacturing a printed wiring board which does not cause migration.
【０００９】[0009]
【課題を解決するための手段】本発明のプリント配線基
板の製造方法は、導体板上に複数の略円錐型の導体バン
プを形成する工程と、前記導体バンプ上に未硬化の絶縁
材料基板を配設する工程と、前記導体板及び絶縁材料基
板を緩衝材を介して加圧すると同時に、前記絶縁材料基
板が硬化しない温度で加熱する工程と、前記導体板をパ
ターンニングして所定の配線パターンを備えた基板ユニ
ットを形成する工程と、前記基板ユニットを複数枚積層
配置して多層板前駆体を形成する工程と、前記多層板前
駆体を加圧下に加熱して前記多層板前駆体を硬化させる
工程と、を具備する。According to the present invention, there is provided a method for manufacturing a printed wiring board, comprising the steps of forming a plurality of substantially conical conductive bumps on a conductive plate, and forming an uncured insulating material substrate on the conductive bumps. Disposing, pressing the conductor plate and the insulating material substrate via a buffer material, and simultaneously heating the insulating material substrate at a temperature at which the insulating material substrate is not cured, and patterning the conductor plate to obtain a predetermined wiring pattern. Forming a substrate unit comprising: a step of forming a multilayer board precursor by laminating a plurality of the substrate units; and heating the multilayer board precursor under pressure to cure the multilayer board precursor. And a step of causing
【００１０】上記発明において、前記絶縁材料基板が硬
化しない温度で加熱する工程は、前記絶縁材料の種類に
よって定まるが、例えば、１１５〜１５０℃で加熱する
工程が挙げられる。In the above invention, the step of heating at a temperature at which the insulating material substrate does not cure is determined by the type of the insulating material, and includes, for example, a step of heating at 115 to 150 ° C.
【００１１】また、前記導体板及び絶縁材料基板を緩衝
材を介して加圧する工程としては、前記導体バンプの先
端を平らにして、上面径が平均で底面径の５０％以上に
なるように変形させる工程であることが望ましい。The step of pressing the conductor plate and the insulating material substrate through a cushioning material includes flattening the tip of the conductor bump and deforming the conductor bump so that the top surface diameter is at least 50% of the bottom surface diameter on average. It is desirable that the process be performed.
【００１２】更に、前記導体板をパターンニングする工
程としては、前記導体板及び絶縁材料基板をフィルムで
ラッピングした状態でパターンニングする工程であるこ
とが望ましい。Further, it is desirable that the step of patterning the conductor plate is a step of patterning the conductor plate and the insulating material substrate in a state of being wrapped with a film.
【００１３】また、本発明の他のプリント配線基板の製
造方法は、硬化した絶縁材料基板の第１の面と第２の面
とにそれぞれ配線パターンを備え、前記第１の面と第２
の面とに形成された配線パターンどうしを電気的に導通
させる導体バンプを内蔵するコア材を形成する工程と、
導体板上に複数の略円錐型の導体バンプを形成する工程
と、前記導体バンプ上に未硬化の絶縁材料基板を配設す
る工程と、前記導体板及び絶縁材料基板を緩衝材を介し
て加圧すると同時に、前記絶縁材料基板が硬化しない温
度で加熱する工程と、前記導体板をパターンニングして
所定の配線パターンを備えた基板ユニットを形成する工
程と、前記基板ユニットを少なくとも１枚ずつ、前記コ
ア材の両面に積層配置して多層板前駆体を形成する工程
と、前記多層板前駆体を加圧下に加熱して前記多層板前
駆体を硬化させる工程と、を具備する。According to another method of manufacturing a printed wiring board of the present invention, a wiring pattern is provided on each of a first surface and a second surface of a cured insulating material substrate, and the first surface and the second surface are provided.
Forming a core material having a built-in conductor bump that electrically connects the wiring patterns formed on the surface with
Forming a plurality of substantially conical conductive bumps on the conductive plate, disposing an uncured insulating material substrate on the conductive bumps, and adding the conductive plate and the insulating material substrate via a buffer material; Pressing and heating the insulating material substrate at a temperature at which the insulating material substrate is not cured, patterning the conductive plate to form a substrate unit having a predetermined wiring pattern, and at least one of the substrate units, A step of forming a multilayer board precursor by laminating and disposing the multilayer board precursor on both sides of the core material; and a step of heating the multilayer board precursor under pressure to cure the multilayer board precursor.
【００１４】この発明において、前記コア材を形成する
工程としては、第１の導体板の上に略円錐形の導体バン
プを形成する工程と、前記導体バンプの先端側に未硬化
の絶縁材料基板を配設する工程と、前記第１の導体板と
前記絶縁材料基板とを加圧して前記導体バンプを前記絶
縁材料基板に貫通させる工程と、前記導体バンプの先端
が貫通した前記絶縁材料基板表面に第２の導体板を配設
する工程と、前記第１の導体板と第２の導体板とを加圧
下に加熱して前記絶縁材料基板を硬化させる工程と、前
記第１の導体板にパターン形成する工程と、前記第２の
導体板にパターン形成する工程と、を具備する工程が挙
げられる。In the present invention, the step of forming the core material includes the step of forming a substantially conical conductive bump on the first conductive plate, and the step of forming an uncured insulating material substrate on the tip side of the conductive bump. Disposing; pressing the first conductive plate and the insulating material substrate to cause the conductive bumps to penetrate the insulating material substrate; and providing a front end of the conductive bumps to the insulating material substrate surface. Disposing a second conductor plate on the first conductor plate; heating the first conductor plate and the second conductor plate under pressure to cure the insulating material substrate; A step of forming a pattern and a step of forming a pattern on the second conductive plate.
【００１５】また、前記コア材に用いる絶縁材料基板と
しては、２回の加熱により完全に硬化する樹脂組成物か
ら構成されているものを用いることが好ましい。It is preferable that the insulating material substrate used for the core material is made of a resin composition which is completely cured by heating twice.
【００１６】本発明のプリント配線基板の製造方法で
は、未硬化の絶縁材料基板上にパターン形成した基板ユ
ニットを複数枚積層した後に、一括して加熱して硬化さ
せるので、各基板ユニットの絶縁材料基板に繰り返し加
熱が施されることがない。そのため、この繰り返し加熱
による劣化がなくなり、クラックの発生やそれが惹起す
るマイグレーションの発生が未然に防止される。In the method for manufacturing a printed wiring board according to the present invention, a plurality of substrate units having a pattern formed on an uncured insulating material substrate are laminated and then heated and cured collectively. The substrate is not repeatedly heated. Therefore, the deterioration due to the repeated heating is eliminated, and the occurrence of cracks and the migration caused by the cracks are prevented beforehand.
【００１７】また、加熱工程が一回で済むので、製造工
程が簡略化でき、製造コストを抑えることもできる。Further, since only one heating step is required, the manufacturing process can be simplified and the manufacturing cost can be reduced.
【００１８】[0018]
【発明の実施の形態】（第１の実施形態）以下、本発明
の実施の形態に係るプリント配線基板の製造方法につい
て説明する。図１〜図４は本実施形態に係るプリント配
線基板の製造手順を模式的に示した垂直断面図であり、
図５は同手順を図示したフローチャートである。DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, a method for manufacturing a printed wiring board according to an embodiment of the present invention will be described. 1 to 4 are vertical cross-sectional views schematically showing a procedure for manufacturing the printed wiring board according to the present embodiment,
FIG. 5 is a flowchart illustrating the same procedure.
【００１９】まず図１に示すようにして基板ユニット、
即ち１枚の未硬化の絶縁材料基板の片面に配線パターン
を形成し、絶縁材料基板の厚さ方向の電気的導通を形成
する導体バンプを内蔵したものを形成する。First, as shown in FIG.
That is, a wiring pattern is formed on one surface of one uncured insulating material substrate, and a conductive bump that forms electrical conduction in the thickness direction of the insulating material substrate is built in.
【００２０】図１（ａ）に示すように薄板状の導体、例
えば銅箔のような導体板１を用意し（ＳＴＥＰ１）、こ
の導体板１上に所定の回路パターンに沿って複数個の略
円錐型の導体バンプ２，２，…を印刷技術などを用いて
形成する（図１（ａ）／ＳＴＥＰ２）。しかる後に前記
導体バンプ２，２，…の上に未硬化の絶縁材料基板（プ
リプレグ）３を配置する（図１（ｂ）／ＳＴＥＰ３）。
ここで用いる絶縁材料基板３は汎用されているエポキシ
樹脂をガラス繊維シートに含浸したものや、ガラス転移
温度が１７０℃以上の材料、例えばビスマレイドトリア
ジンレジンなどが挙げられる。As shown in FIG. 1A, a thin plate-like conductor, for example, a conductor plate 1 such as a copper foil is prepared (STEP 1), and a plurality of substantially conductors are formed on the conductor plate 1 along a predetermined circuit pattern. Are formed using a printing technique or the like (FIG. 1 (a) / STEP2). Thereafter, an uncured insulating material substrate (prepreg) 3 is arranged on the conductor bumps 2, 2,... (FIG. 1B / STEP 3).
The insulating material substrate 3 used here may be a material obtained by impregnating a commonly used epoxy resin into a glass fiber sheet, or a material having a glass transition temperature of 170 ° C. or higher, for example, bismaleide triazine resin.
【００２１】ここで、ガラス転移温度が１７０℃以上の
材料を採用した理由は、一般にガラス転移温度と熱膨張
係数との間にはガラス転移温度が大きい材料ほど材料熱
膨張係数が小さい、という関係があり、ガラス転移温度
の高い材料ほど耐熱性に優れているためである。Here, the reason why a material having a glass transition temperature of 170 ° C. or more is adopted is that a material having a higher glass transition temperature generally has a lower coefficient of thermal expansion between the glass transition temperature and the thermal expansion coefficient. This is because materials having a higher glass transition temperature have better heat resistance.
【００２２】また、ガラス転移温度の値を１７０℃以上
としたのは、ガラス転移温度が１７０℃未満であると、
その材料の熱膨張係数はある限界を超えて大きくなり、
導体バンプと絶縁材料基板との間にミスマッチが起き、
ハンダ耐熱性試験（２８８℃で１０秒間放置）で導体バ
ンプにクラックが生じ、電気的接続が破壊される、とい
う弊害を生じるからである。The reason why the value of the glass transition temperature is 170 ° C. or more is that if the glass transition temperature is less than 170 ° C.
The coefficient of thermal expansion of the material increases beyond a certain limit,
Mismatch occurs between the conductor bump and the insulating material substrate,
This is because cracks occur in the conductor bumps in the solder heat resistance test (leaving at 288 ° C. for 10 seconds), and the electrical connection is destroyed.
【００２３】次いでこれら導体板１と絶縁材料基板３と
を弾性材（図示省略）を介してプレスすることにより導
体板１と絶縁材料基板３とを押圧し、この絶縁材料基板
３に前記導体バンプ２，２，…を貫通させる（図１
（ｃ）／ＳＴＥＰ４）。Next, the conductive plate 1 and the insulating material substrate 3 are pressed through an elastic material (not shown) to press the conductive plate 1 and the insulating material substrate 3, and the insulating material substrate 3 is provided with the conductive bumps. 2, 2, ... (Fig. 1
(C) / STEP4).
【００２４】このときのプレスを所定の条件下で行うこ
とにより導体バンプ２，２，…の先端側を平坦にする。
その結果、図１（ｃ）の丸で囲った部分を部分的に拡大
した図のように、導体バンプ２，２，…は変形され、略
台形の垂直断面を備えた形状となる。このときの変形後
の導体バンプ２の形は上面の径Ｒ２が平均で底面の径Ｒ
１の５０％以上となるのが好ましい。The pressing at this time is performed under predetermined conditions to flatten the tip ends of the conductor bumps 2, 2,.
As a result, the conductor bumps 2, 2,... Are deformed to have a substantially trapezoidal vertical cross section, as shown in a partially enlarged view of the circled portion in FIG. 1C. At this time, the shape of the conductor bump 2 after deformation is such that the diameter R2 of the upper surface is an average of the diameter R2 of the bottom surface.
It is preferably at least 50% of 1.
【００２５】ここで変形後の導体バンプ２の好ましい断
面形状について、上面径Ｒ２が平均で底面径Ｒ１の５０
％以上としたのは、Ｒ２がＲ１の５０％未満であると、
図６のａ〜ｅのようにバンプ貫通後に積層プレスした時
のバンプ上面の接触面積が非常に小さくなるために、許
容できる電気容量（流せる電流値）に制限が生じ、ま
た、導通抵抗値がバンプ上面の径が小さくなるに連れて
大きくなり、電気接続信頼性が低下する、という弊害を
生じるからである。Here, regarding the preferred sectional shape of the conductor bump 2 after the deformation, the upper surface diameter R2 is, on average, 50 times smaller than the bottom surface diameter R1.
% Or more when R2 is less than 50% of R1.
As shown in FIGS. 6A to 6E, the contact area of the upper surface of the bump when the laminate is pressed after the penetration of the bump becomes very small, so that the allowable electric capacity (current value that can be passed) is limited, and the conduction resistance value is reduced. This is because, as the diameter of the bump upper surface becomes smaller, the bump becomes larger and the reliability of the electrical connection is reduced.
【００２６】次にこの基板ユニットの導体板１上に図示
しないフォトレジスト材層を形成したのち、光透過性の
保護フィルム４で覆って保護する（ＳＴＥＰ５）。Next, after a photoresist material layer (not shown) is formed on the conductor plate 1 of the substrate unit, it is protected by covering with a light-transmitting protective film 4 (STEP 5).
【００２７】ここで保護フィルム４で基板ユニットを覆
うのは、露光時の光から絶縁材料基板１や導体バンプ
２，２，…を保護するためである。この保護フィルム４
で覆った状態の基板ユニットの導体板１にパターン形成
する（ＳＴＥＰ６）。即ち、所定のマスクパターンを備
えたマスク（図示省略）を介して導体板１上のフォトレ
ジスト材層を露光し、しかる後にエッチングして不要な
導体部分を除去することにより所定の配線パターンを形
成する。Here, the reason why the protective film 4 covers the substrate unit is to protect the insulating material substrate 1 and the conductor bumps 2, 2,... From light during exposure. This protective film 4
A pattern is formed on the conductor plate 1 of the board unit covered with (step 6). That is, a photoresist material layer on the conductive plate 1 is exposed through a mask (not shown) having a predetermined mask pattern, and then etched to remove an unnecessary conductor portion, thereby forming a predetermined wiring pattern. I do.
【００２８】図１（ｅ）はこうして形成された基板ユニ
ット５の垂直断面図である。図１（ｅ）に示すように、
この基板ユニット５では未硬化の絶縁材料基板３の図中
下面側に配線パターン１ａ，１ａ，…が形成され、この
配線パターン１ａ，１ａ，…は導体バンプ２，２，…と
電気的に接続され、この導体バンプ２，２，…の先端は
絶縁材料基板３の図中上面側に僅かだけ突出した状態に
形成されている。FIG. 1E is a vertical sectional view of the substrate unit 5 thus formed. As shown in FIG.
In this substrate unit 5, wiring patterns 1a, 1a,... Are formed on the lower surface side of the uncured insulating material substrate 3 in the figure, and the wiring patterns 1a, 1a,. The tips of the conductor bumps 2, 2,... Are formed so as to slightly protrude toward the upper surface of the insulating material substrate 3 in the drawing.
【００２９】同様の方法により基板ユニットを所定数、
例えば５枚作成する。図２は多層板を構成する基板ユニ
ット５〜９の垂直断面を示した図である。図２に示した
ように、これらの基板ユニット５〜９にはそれぞれ所定
の配線パターンが形成されており、各配線パターンは導
体バンプにより多層板の厚さ方向での電気的導通が形成
されるようになっている。これらの基板ユニット５〜９
と導体板１０とを図２に示すように互いの位置関係を適
正な位置に配置した状態で積層する（ＳＴＥＰ７）。In a similar manner, a predetermined number of substrate units
For example, five sheets are created. FIG. 2 is a view showing a vertical cross section of the board units 5 to 9 constituting the multilayer board. As shown in FIG. 2, a predetermined wiring pattern is formed on each of these substrate units 5 to 9, and each of the wiring patterns is formed by a conductive bump to provide electrical conduction in the thickness direction of the multilayer board. It has become. These board units 5 to 9
The conductor plate 10 and the conductor plate 10 are stacked in a state where the mutual positional relationship is arranged at an appropriate position as shown in FIG. 2 (STEP 7).
【００３０】この状態で基板ユニット５〜９及び導体板
１０を基板の厚さ方向にプレスして（ＳＴＥＰ８）多層
構造を形成すると共に、加熱などにより基板ユニット５
〜９の絶縁材料基板を硬化する（図３／ＳＴＥＰ９）。In this state, the substrate units 5 to 9 and the conductor plate 10 are pressed in the thickness direction of the substrate (STEP 8) to form a multilayer structure, and the substrate unit 5 is heated or the like.
The insulating material substrates No. to No. 9 are cured (FIG. 3 / STEP 9).
【００３１】次いで、最上部の導体板１０及び最下部の
導体板９ａのそれぞれについて、エッチング等を施して
パターン形成し（ＳＴＥＰ１０）、図４に示すような多
層板を得る。Next, each of the uppermost conductor plate 10 and the lowermost conductor plate 9a is subjected to etching or the like to form a pattern (STEP 10) to obtain a multilayer board as shown in FIG.
【００３２】以上詳述したように、本発明のプリント配
線基板の製造方法では、絶縁材料基板のプリプレグに配
線パターンと、この配線パターンと電気的に接続されて
絶縁材料基板の厚さ方向の電気的導通を形成する導体バ
ンプとを内蔵した基板ユニットを予め形成し、複数の基
板ユニットを積層して加圧下に加熱して前記プリプレグ
を硬化する手順を採用しているので、多層板の中心付近
に配設される絶縁材料基板が繰り返し加熱されて過剰に
加熱されることがないので、この過剰な加熱によるクラ
ックの発生や、このクラックが惹起するマイグレーショ
ンの発生が未然に防止される。 また、本発明のプリン
ト配線基板の製造方法では、複数の基板ユニットを積層
した後で一括して加熱硬化を施すので、加熱硬化させる
工程が一回で済み、製造工程を短縮化できると共に製造
コストを安価に抑えることが出来る。As described in detail above, in the method of manufacturing a printed wiring board according to the present invention, the wiring pattern is formed on the prepreg of the insulating material substrate, and the electrical pattern in the thickness direction of the insulating material substrate is electrically connected to the wiring pattern. Since a board unit incorporating a conductive bump for forming electrical conduction is formed in advance, and a plurality of board units are laminated and heated under pressure to cure the prepreg, the vicinity of the center of the multilayer board is adopted. Since the insulating material substrate disposed in the above is not repeatedly heated and excessively heated, the occurrence of cracks due to the excessive heating and the occurrence of migration caused by the cracks are prevented. In the method for manufacturing a printed wiring board according to the present invention, since a plurality of board units are stacked and then heat-cured at a time, only one heat-curing step is required, so that the manufacturing process can be shortened and the manufacturing cost can be reduced. Can be suppressed at low cost.
【００３３】なお、本実施形態及び以下の実施形態に記
載された発明は本発明の範囲を限定するものではない。The inventions described in the present embodiment and the following embodiments do not limit the scope of the present invention.
【００３４】（実施例）上記第１の実施形態の図１
（ａ）のように厚さ１８μｍの銅箔１上に銀ペーストを
印刷技術により直径０．２ｍｍの略円錐形の導体バンプ
２を形成した。次いで、図１（ｂ）のように絶縁材料と
してＢＴレジン材（登録商標／三菱瓦斯化学製、型名：
ＧＨＰＬ８３０，厚さ０．０６ｍｍ）を重ね、１１５℃
で加熱・加圧を行い、導体バンプ２を絶縁材料の厚さ方
向に貫通させて基板ユニット（絶縁材料付きの銅箔）を
形成した。この基板ユニットを加圧して図１（ｃ）のよ
うに略円錐形の導体バンプ２の先端を平らな形状にし
た。この時点では上記絶縁材料は硬化していない、いわ
ゆるＢステージの状態である。この基板ユニットをレジ
ストフィルム４でラミネートし、これに所定のマスクパ
ターンを介して露光、現像を施し、銅箔をエッチングし
て配線パターンが形成された基板ユニットを得た。同様
に４枚の基板ユニットを作成し、図２のように銅箔１０
とともに積層配置し、導体バンプの一つを位置決め用の
金属物ターゲットとしてＸ線で認識して各基板ユニット
の位置決めを行い、１９０℃で約２時間積層プレスを行
って絶縁材の樹脂を硬化させることにより本発明の６層
構造の多層板が得られた。(Example) FIG. 1 of the first embodiment.
As shown in (a), a substantially conical conductive bump 2 having a diameter of 0.2 mm was formed by printing a silver paste on a copper foil 1 having a thickness of 18 μm. Then, as shown in FIG. 1B, a BT resin material (registered trademark / manufactured by Mitsubishi Gas Chemical Co., Ltd., model name:
GHPL830, thickness 0.06 mm) and 115 ° C
The substrate unit (copper foil with insulating material) was formed by causing the conductive bumps 2 to penetrate in the thickness direction of the insulating material. This substrate unit was pressed to flatten the tip of the substantially conical conductive bump 2 as shown in FIG. 1 (c). At this point, the insulating material has not been cured, that is, is in a so-called B-stage state. This substrate unit was laminated with a resist film 4, exposed and developed through a predetermined mask pattern, and the copper foil was etched to obtain a substrate unit on which a wiring pattern was formed. Similarly, four board units were prepared, and as shown in FIG.
And one of the conductive bumps is recognized as a metal target for positioning by X-rays, and each substrate unit is positioned, and a laminate press is performed at 190 ° C. for about 2 hours to cure the resin of the insulating material. As a result, a multilayer board having a six-layer structure according to the present invention was obtained.
【００３５】このようにして作成した多層板のガラス転
移温度を測定したところ、約２００℃となり、材料本来
の特性が得られた。また、多層板内部の材料間もプレス
回数が１回になったので基板の劣化がなく、材料間の密
着も大きく、落下試験での強度も良好な値が得られた。
更に、高温高湿で電圧を印加する試験の耐マイグレーシ
ョン性も向上した。また、積層回数が一回なのでリード
タイムの削減ができ、しかも、各基板ユニット間のずれ
も解消することができた。When the glass transition temperature of the multilayer board thus manufactured was measured, it was about 200 ° C., and the original characteristics of the material were obtained. In addition, since the number of presses between the materials inside the multilayer plate was also one, there was no deterioration of the substrate, the adhesion between the materials was large, and a good value was obtained in the strength of the drop test.
Further, the migration resistance of the test for applying a voltage at high temperature and high humidity was also improved. In addition, since the number of laminations is one, the lead time can be reduced, and the displacement between the substrate units can be eliminated.
【００３６】（第２の実施形態）以下に本発明の第２の
実施形態に係るプリント配線基板の製造方法について説
明する。なお、本実施形態のうち、上記第１の実施形態
と重複する部分については説明を省略する。(Second Embodiment) A method for manufacturing a printed wiring board according to a second embodiment of the present invention will be described below. Note that, in the present embodiment, the description of the same parts as those in the first embodiment will be omitted.
【００３７】本実施形態に係るプリント配線基板の製造
方法では、多層板の中心に配設される、いわゆるコア材
にのみ硬化後の基板ユニットを用い、その両側に積層さ
れる複数枚の基板ユニットとしては上記第１の実施形態
と同じく未硬化の基板ユニットを用いる。In the method for manufacturing a printed wiring board according to the present embodiment, a substrate unit which is provided at the center of a multilayer board and has been cured only for a so-called core material is used, and a plurality of substrate units laminated on both sides thereof are used. As in the first embodiment, an uncured substrate unit is used.
【００３８】図６〜８は本実施形態に係るプリント敗戦
基板製造方法の手順を示す垂直断面図であり、図９は同
手順を示すフローチャートである。FIGS. 6 to 8 are vertical sectional views showing the procedure of the method for manufacturing a defeated printed board according to the present embodiment, and FIG. 9 is a flowchart showing the procedure.
【００３９】まず図６に示すようにしてコア材、即ち絶
縁材料基板の両面に導体層を設けたものを作成する。図
６（ａ）に示すように薄板状の導体、例えば銅箔のよう
な薄板状の導体板１１を用意し（ＳＴＥＰ１）、この導
体板１上に所定の回路パターンに沿って複数個の略円錐
型の導体バンプ（第１の導体バンプ）１２，１２，…を
印刷技術などを用いて形成する（図６（ａ）／ＳＴＥＰ
２）。しかる後に前記導体バンプ１２，１２，…の上に
未硬化の絶縁材料基板（プリプレグ）１３を配置する
（図６（ｂ）／ＳＴＥＰ３）。First, as shown in FIG. 6, a core material, that is, a material provided with conductor layers on both surfaces of an insulating material substrate is prepared. As shown in FIG. 6A, a thin plate-like conductor, for example, a thin plate-like conductor plate 11 such as a copper foil is prepared (STEP 1), and a plurality of substantially thin conductors are formed on the conductor plate 1 along a predetermined circuit pattern. Are formed by using a printing technique or the like (FIG. 6A / STEP).
2). Thereafter, an uncured insulating material substrate (prepreg) 13 is arranged on the conductive bumps 12, 12,... (FIG. 6B / STEP 3).
【００４０】次いでこれら導体板１１と絶縁材料基板１
３とを弾性体（図示省略）を介して押圧してこの絶縁材
料基板１３に前記導体バンプ１２，１２，…を貫通させ
る（図６（ｃ）／ＳＴＥＰ４）。Next, the conductor plate 11 and the insulating material substrate 1
3 are pressed through an elastic body (not shown) to penetrate the insulating material substrate 13 through the conductor bumps 12, 12,... (FIG. 6 (c) / STEP 4).
【００４１】更に絶縁材料基板１３の前記導体バンプ１
２，１２，…の先端が貫通した面、即ち図中１３ａ面上
に第２の導体板としての金属板、例えば銅箔１４をプレ
スして取り付ける（図６（ｄ）／ＳＴＥＰ５）。このプ
レスと同時或いはプレス後に加熱するなどして絶縁材料
基板１３を硬化することによりコア材１５が完成する
（図６（ｅ）／ＳＴＥＰ６）。Further, the conductor bumps 1 on the insulating material substrate 13
A metal plate as a second conductor plate, for example, a copper foil 14 is pressed and attached on a surface through which the tips of 2, 12,... Penetrate, that is, a surface 13a in the figure (FIG. 6D / STEP5). The core material 15 is completed by hardening the insulating material substrate 13 by heating at the same time as or after the pressing (FIG. 6E / STEP 6).
【００４２】次いで、このコア材１５の第１の面（図中
上面）、第２の面（図中下面）にそれぞれ配線パターン
を形成して両面に配線パターンを備えたコア材を得る。
（図６（ｆ）／ＳＴＥＰ７）。Next, a wiring pattern is formed on each of the first surface (upper surface in the drawing) and the second surface (lower surface in the drawing) of the core material 15 to obtain a core material having wiring patterns on both surfaces.
(FIG. 6 (f) / STEP7).
【００４３】一方、図７に示したように、前記第１の実
施形態で説明したのと同様にして未硬化の絶縁材料基板
の片面に配線パターンを備え、内蔵した導体バンプによ
り前記配線パターンとは反対側の基板表面との間での電
気的導通が形成された基板ユニットを複数枚、例えば４
枚作成した。On the other hand, as shown in FIG. 7, a wiring pattern is provided on one surface of the uncured insulating material substrate in the same manner as described in the first embodiment, and the wiring pattern is formed by a built-in conductor bump. Represents a plurality of substrate units in which electrical continuity with the opposite substrate surface is formed, for example, 4
Created.
【００４４】図７は多層板を構成する基板ユニット１６
〜１９の垂直断面を示した図である。図７に示したよう
に、これらの基板ユニット１５〜１９にはそれぞれ所定
の配線パターンが形成されており、各配線パターンは導
体バンプにより多層板の厚さ方向での電気的導通が形成
されるようになっている。これらの基板ユニット１５〜
１９を図７に示すように互いの位置関係を適正な位置に
配置した状態で積層する（ＳＴＥＰ８）。FIG. 7 shows a board unit 16 constituting a multilayer board.
FIG. 21 is a diagram showing vertical cross-sections No. to No. 19; As shown in FIG. 7, a predetermined wiring pattern is formed on each of these substrate units 15 to 19, and each of the wiring patterns is formed by a conductive bump to provide electrical conduction in the thickness direction of the multilayer board. It has become. These board units 15 to
As shown in FIG. 7, the substrates 19 are stacked in a state where their mutual positional relations are arranged at appropriate positions (STEP 8).
【００４５】この状態で基板ユニット１５〜１９を基板
の厚さ方向にプレスして（ＳＴＥＰ９）多層構造を形成
すると共に、加熱などにより基板ユニット１６〜１９の
絶縁材料基板を硬化する（図８／ＳＴＥＰ１０）。In this state, the substrate units 15 to 19 are pressed in the thickness direction of the substrate (STEP 9) to form a multilayer structure, and the insulating material substrates of the substrate units 16 to 19 are cured by heating or the like (FIG. 8 / (STEP 10).
【００４６】次いで、最上部の導体板１７ａ及び最下部
の導体板１９ａのそれぞれについて、エッチング等を施
してパターン形成し（ＳＴＥＰ１１）、最終的な多層板
を得る。 本実施形態に係るプリント配線基板の製造方
法では、多層板の中心に配設されるコア材１５のみ硬化
後の基板ユニットを用い、その両面に未硬化の基板ユニ
ット１６〜１９を積層した後に基板ユニット１６〜１９
のプリプレグを硬化する構成としたので、図８のよう
に、コア材１５の両面に積層配置する導体バンプの向き
が全てコア材１５の方向（基板の中心方向）を向いてい
るため、多層基板内部のバンプ形状が中心に対して対称
となっているので、加熱処理後の基板の反りや捩れが発
生しにくい、という特有の効果が得られる。Next, each of the uppermost conductor plate 17a and the lowermost conductor plate 19a is subjected to etching or the like to form a pattern (STEP 11) to obtain a final multilayer board. In the method for manufacturing a printed wiring board according to the present embodiment, only the core material 15 disposed at the center of the multilayer board uses a cured substrate unit, and the uncured substrate units 16 to 19 are laminated on both surfaces thereof. Units 16-19
Since the prepreg is cured, as shown in FIG. 8, all of the conductor bumps stacked on both surfaces of the core material 15 are oriented in the direction of the core material 15 (the center direction of the substrate). Since the internal bump shape is symmetrical with respect to the center, a unique effect is obtained in that the substrate after the heat treatment is not easily warped or twisted.
【００４７】また、本実施形態に係るプリント配線基板
製造方法において、上記コア材に用いる絶縁性材料とし
ては、コア材の両側に配設するプリプレグより硬化性が
低く、ちょうど２回の加熱により完全に硬化する組成配
合の絶縁性材料を用いることが好ましい。このような組
成配合の絶縁性材料を用いてコア材を形成することによ
り、このコア材の両側に未硬化の絶縁性材料を用いた基
板ユニットを複数枚積層し、しかる後に加熱すると、コ
ア材及びその両側に配設した未硬化の基板ユニットの絶
縁性材料の硬化度が同じ程度にまで硬化するので、２度
の加熱によりコア材の絶縁性材料が劣化することがな
く、この劣化によるクラックやマイグレーションが未然
に防止できるという特有の効果が得られる。In the method for manufacturing a printed wiring board according to the present embodiment, the insulating material used for the core material has lower curability than the prepregs disposed on both sides of the core material, and is completely cured by just two heatings. It is preferable to use an insulating material having a composition that cures to a high degree. By forming a core material using an insulating material having such a composition, a plurality of substrate units using an uncured insulating material are laminated on both sides of the core material, and then heated, and then the core material is formed. And the degree of curing of the insulating material of the uncured substrate units disposed on both sides thereof is cured to the same degree, so that the heating of twice does not degrade the insulating material of the core material, and cracks due to this deterioration do not occur. And migration can be prevented beforehand.
【００４８】（第３の実施形態）本実施形態では、積層
する５層の基板ユニットのうち、中心側の３層のみに高
ガラス転移型の絶縁性材料、例えばビスマレイドトリア
ジンレジンを用いたプリプレグを用いる一方、最上部側
と最下部側の最外層の２層については高ピール強度型樹
脂を用いたプリプレグを使用いた以外は前記第１の実施
形態と同様の方法で多層板を形成した。(Third Embodiment) In the present embodiment, a prepreg using a high glass transition type insulating material, for example, a bismaleide triazine resin, for only the central three layers of the five-layer substrate unit to be laminated. On the other hand, a multilayer board was formed in the same manner as in the first embodiment except that prepregs using a high peel strength type resin were used for the two outermost layers on the uppermost side and the lowermost side.
【００４９】本実施形態に係るプリント配線基板製造方
法では、２種の異なるプリプレグを用いた基板ユニット
を積層後に加熱して硬化する構成としたので、力学的強
度、耐熱性、及び配線パターンとのピール強度が共に優
れた多層板を得ることが出来た。In the method of manufacturing a printed wiring board according to the present embodiment, the board units using two different prepregs are heated and cured after lamination, so that the mechanical strength, heat resistance, and wiring pattern A multilayer board having excellent peel strength was obtained.
【００５０】なお、ここで最外層に用いる高ピール強度
型絶縁材料基板としては配線パターンとのピール強度が
１．２Ｎ／ｍｍ以上のものが好ましく、例えばガラス繊
維強化エポキシ樹脂基板プリプレグなどが挙げられる。Here, as the high peel strength type insulating material substrate used for the outermost layer, one having a peel strength of at least 1.2 N / mm with the wiring pattern is preferable, for example, a prepreg of a glass fiber reinforced epoxy resin substrate and the like. .
【００５１】この外層に用いる絶縁材料基板の配線パタ
ーンに対するピール強度を１．２Ｎ／ｍｍ以上に限定し
たのは、配線パターンに対するピール強度が１．２Ｎ／
ｍｍを下回ると、出来あがった本配線基板に電子部品を
実装後、落下試験を行うと、前記部品が剥離してしまう
ためである。これは絶縁層と配線パターンとの密着強度
が小さいことにより起こる。The reason why the peel strength of the insulating material substrate used for the outer layer with respect to the wiring pattern is limited to 1.2 N / mm or more is that the peel strength with respect to the wiring pattern is 1.2 N / mm.
If the thickness is less than mm, the electronic component is mounted on the completed wiring board, and a drop test is performed to peel off the component. This is caused by low adhesion strength between the insulating layer and the wiring pattern.
【００５２】[0052]
【発明の効果】本発明によれば、未硬化の絶縁材料基板
上にパターン形成した基板ユニットを複数枚積層した後
に、一括して加熱して硬化させるので、各基板ユニット
の絶縁材料基板に繰り返し加熱が施されることがない。
そのため、この繰り返し加熱による劣化がなくなり、ク
ラックの発生やそれが惹起するマイグレーションの発生
が未然に防止される。According to the present invention, a plurality of substrate units having a pattern formed on an uncured insulating material substrate are laminated and then heated and cured at a time. No heating is applied.
Therefore, the deterioration due to the repeated heating is eliminated, and the occurrence of cracks and the migration caused by the cracks are prevented beforehand.
【００５３】また、加熱工程が一回で済むので、製造工
程が簡略化でき、製造コストを抑えることもできる。Further, since only one heating step is required, the manufacturing process can be simplified and the manufacturing cost can be reduced.
【図１】本発明の第１の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 1 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to a first embodiment of the present invention.
【図２】本発明の第１の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 2 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to the first embodiment of the present invention.
【図３】本発明の第１の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 3 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to the first embodiment of the present invention.
【図４】本発明の第１の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 4 is a vertical sectional view showing the procedure of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.
【図５】本発明の第１の実施形態に係るプリント配線基
板製造方法のフローチャートである。FIG. 5 is a flowchart of a method for manufacturing a printed wiring board according to the first embodiment of the present invention.
【図６】本発明の第２の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 6 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to the second embodiment of the present invention.
【図７】本発明の第２の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 7 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to the second embodiment of the present invention.
【図８】本発明の第２の実施形態に係るプリント配線基
板製造方法の手順を示した垂直断面図である。FIG. 8 is a vertical sectional view showing a procedure of a method for manufacturing a printed wiring board according to the second embodiment of the present invention.
【図９】本発明の第２の実施形態に係るプリント配線基
板製造方法のフローチャートである。FIG. 9 is a flowchart of a printed wiring board manufacturing method according to a second embodiment of the present invention.
【図１０】従来の多層板の製造手順を図示した垂直断面
図である。FIG. 10 is a vertical cross-sectional view illustrating a procedure for manufacturing a conventional multilayer board.
１…………導体板 ２…………導体バンプ ３…………絶縁材料基板、 １ａ………配線パターン、 ４…………フィルム、 ５…………コア材。 1 Conductor plate 2 Conductor bump 3 Insulating material substrate 1a Wiring pattern 4 Film 5 Core material
フロントページの続き Ｆターム(参考） 5E346 AA06 AA12 AA15 AA22 AA32 AA35 AA43 BB01 BB16 CC08 CC39 CC55 DD02 DD12 DD32 DD48 EE02 EE06 EE09 EE13 EE14 EE20 FF24 FF35 GG22 GG28 HH08 Continued on the front page F term (reference) 5E346 AA06 AA12 AA15 AA22 AA32 AA35 AA43 BB01 BB16 CC08 CC39 CC55 DD02 DD12 DD32 DD48 EE02 EE06 EE09 EE13 EE14 EE20 FF24 FF35 GG22 GG28 HH08
Claims (7)
を形成する工程と、 前記導体バンプ上に未硬化の絶縁材料基板を配設する工
程と、 前記導体板及び絶縁材料基板を緩衝材を介して加圧する
と同時に、前記絶縁材料基板が硬化しない温度で加熱す
る工程と、 前記導体板をパターンニングして所定の配線パターンを
備えた基板ユニットを形成する工程と、 前記基板ユニットを複数枚積層配置して多層板前駆体を
形成する工程と、 前記多層板前駆体を加圧下に加熱して前記多層板前駆体
を硬化させる工程と、を具備することを特徴とするプリ
ント配線基板の製造方法。A step of forming a plurality of substantially conical-shaped conductive bumps on the conductive plate; a step of disposing an uncured insulating material substrate on the conductive bump; and a step of buffering the conductive plate and the insulating material substrate. Simultaneously heating the insulating material substrate at a temperature at which the insulating material substrate is not cured, patterning the conductive plate to form a substrate unit having a predetermined wiring pattern, and pressing the substrate unit. A printed wiring board comprising: a step of forming a multilayer board precursor by laminating a plurality of sheets; and a step of heating the multilayer board precursor under pressure to cure the multilayer board precursor. Manufacturing method.
造方法であって、前記絶縁材料基板が硬化しない温度で
加熱する工程が、１１５〜１５０℃で加熱する工程であ
ることを特徴とするプリント配線基板の製造方法。2. The method for manufacturing a printed wiring board according to claim 1, wherein the step of heating at a temperature at which the insulating material substrate does not cure is a step of heating at 115 to 150 ° C. A method for manufacturing a printed wiring board.
記載のプリント配線基板の製造方法であって、前記導体
板及び絶縁材料基板を緩衝材を介して加圧する工程が、
前記導体バンプの先端を平らにして、上面径が平均で底
面径の５０％以上になるように変形させる工程であるこ
とを特徴とするプリント配線基板の製造方法。3. The method for manufacturing a printed wiring board according to claim 1, wherein the step of pressing the conductive plate and the insulating material substrate via a buffer material comprises:
A method of manufacturing a printed wiring board, comprising: flattening the tip of the conductor bump, and deforming the top surface diameter to be 50% or more of the bottom surface diameter on average.
記載のプリント配線基板製造方法であって、前記導体板
をパターンニングする工程が、前記導体板及び絶縁材料
基板をフィルムでラッピングした状態でパターンニング
する工程であることを特徴とするプリント配線基板の製
造方法。4. The method for manufacturing a printed wiring board according to claim 1, wherein the step of patterning the conductive plate includes wrapping the conductive plate and the insulating material substrate with a film. A method for manufacturing a printed wiring board, comprising a step of performing patterning in a state where the printed wiring board is formed.
の面とにそれぞれ配線パターンを備え、前記第１の面と
第２の面とに形成された配線パターンどうしを電気的に
導通させる導体バンプを内蔵するコア材を形成する工程
と、 導体板上に複数の略円錐型の導体バンプを形成する工程
と、 前記導体バンプ上に未硬化の絶縁材料基板を配設する工
程と、 前記導体板及び絶縁材料基板を緩衝材を介して加圧する
と同時に、前記絶縁材料基板が硬化しない温度で加熱す
る工程と、 前記導体板をパターンニングして所定の配線パターンを
備えた基板ユニットを形成する工程と、 前記基板ユニットを少なくとも１枚ずつ、前記コア材の
両面に積層配置して多層板前駆体を形成する工程と、 前記多層板前駆体を加圧下に加熱して前記多層板前駆体
を硬化させる工程と、を具備することを特徴とするプリ
ント配線基板の製造方法。5. A method according to claim 1, wherein the first surface and the second surface of the cured insulating material substrate are provided.
Forming a core material having a built-in conductor bump for electrically connecting the wiring patterns formed on the first surface and the second surface to each other, with a wiring pattern provided on each of the first and second surfaces; Forming a plurality of substantially conical-shaped conductor bumps, arranging an uncured insulating material substrate on the conductor bumps, and simultaneously pressing the conductor plate and the insulating material substrate via a cushioning material. A step of heating the insulating material substrate at a temperature at which the insulating material substrate is not cured; a step of patterning the conductive plate to form a substrate unit having a predetermined wiring pattern; Forming a multilayer board precursor by laminating and disposing the multilayer board precursor on both sides of the substrate, and heating the multilayer board precursor under pressure to cure the multilayer board precursor. Method of manufacturing a line substrate.
法であって、前記コア材を形成する工程が、 第１の導体板の上に略円錐形の導体バンプを形成する工
程と、 前記導体バンプの先端側に未硬化の絶縁材料基板を配設
する工程と、 前記第１の導体板と前記絶縁材料基板とを加圧して前記
導体バンプを前記絶縁材料基板に貫通させる工程と、 前記導体バンプの先端が貫通した前記絶縁材料基板表面
に第２の導体板を配設する工程と、 前記第１の導体板と第２の導体板とを加圧下に加熱して
前記絶縁材料基板を硬化させる工程と、 前記第１の導体板にパターン形成する工程と、 前記第２の導体板にパターン形成する工程と、を具備す
る工程であることを特徴とするプリント配線基板の製造
方法。6. The method for manufacturing a printed circuit board according to claim 5, wherein the step of forming the core material includes: forming a substantially conical conductive bump on a first conductive plate; Disposing an uncured insulating material substrate on the tip side of the conductive bump; pressing the first conductive plate and the insulating material substrate to penetrate the conductive bump through the insulating material substrate; Disposing a second conductive plate on the surface of the insulating material substrate through which the tip of the conductive bump has penetrated; heating the first conductive plate and the second conductive plate under pressure to form the insulating material substrate A method for manufacturing a printed wiring board, comprising: a step of curing; a step of forming a pattern on the first conductive plate; and a step of forming a pattern on the second conductive plate.
記載のプリント配線基板の製造方法であって、前記コア
材に用いる絶縁材料基板が、２回の加熱により完全に硬
化する樹脂組成物から構成されていることを特徴とする
プリント配線基板の製造方法。7. The method for manufacturing a printed wiring board according to claim 5, wherein the insulating material substrate used for the core material is completely cured by heating twice. A method for producing a printed wiring board, comprising a composition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18707299A JP3883744B2 (en) | 1999-06-30 | 1999-06-30 | Method for manufacturing printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18707299A JP3883744B2 (en) | 1999-06-30 | 1999-06-30 | Method for manufacturing printed wiring board |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006253034A Division JP4417938B2 (en) | 2006-09-19 | 2006-09-19 | Method for manufacturing printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001015922A true JP2001015922A (en) | 2001-01-19 |
| JP3883744B2 JP3883744B2 (en) | 2007-02-21 |
Family
ID=16199656
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18707299A Expired - Fee Related JP3883744B2 (en) | 1999-06-30 | 1999-06-30 | Method for manufacturing printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3883744B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002080639A1 (en) * | 2001-03-28 | 2002-10-10 | North Corporation | Multilayer wiring board, method for producing multilayer wiring board, polisher for multilayer wiring board, and metal sheet for producing wiring board |
| JP2002305376A (en) * | 2001-04-05 | 2002-10-18 | Dt Circuit Technology Co Ltd | Printed wiring board, manufacturing method thereof, and semiconductor device |
| JP2004247668A (en) * | 2003-02-17 | 2004-09-02 | Hitachi Chem Co Ltd | Lamination forming mid wiring member, wiring board, and their manufacturing method |
| KR100797720B1 (en) * | 2006-05-09 | 2008-01-23 | 삼성전기주식회사 | Manufacturing method of printed circuit board for fine circuit formation |
-
1999
- 1999-06-30 JP JP18707299A patent/JP3883744B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002080639A1 (en) * | 2001-03-28 | 2002-10-10 | North Corporation | Multilayer wiring board, method for producing multilayer wiring board, polisher for multilayer wiring board, and metal sheet for producing wiring board |
| JP2002305376A (en) * | 2001-04-05 | 2002-10-18 | Dt Circuit Technology Co Ltd | Printed wiring board, manufacturing method thereof, and semiconductor device |
| JP4684454B2 (en) * | 2001-04-05 | 2011-05-18 | 大日本印刷株式会社 | Printed wiring board manufacturing method and printed wiring board |
| JP2004247668A (en) * | 2003-02-17 | 2004-09-02 | Hitachi Chem Co Ltd | Lamination forming mid wiring member, wiring board, and their manufacturing method |
| KR100797720B1 (en) * | 2006-05-09 | 2008-01-23 | 삼성전기주식회사 | Manufacturing method of printed circuit board for fine circuit formation |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3883744B2 (en) | 2007-02-21 |
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