JP2000260788A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2000260788A
JP2000260788A JP6627399A JP6627399A JP2000260788A JP 2000260788 A JP2000260788 A JP 2000260788A JP 6627399 A JP6627399 A JP 6627399A JP 6627399 A JP6627399 A JP 6627399A JP 2000260788 A JP2000260788 A JP 2000260788A
Authority
JP
Japan
Prior art keywords
semiconductor element
die
adhesive
groove
die bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6627399A
Other languages
Japanese (ja)
Inventor
Shigehiro Yamada
茂博 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP6627399A priority Critical patent/JP2000260788A/en
Publication of JP2000260788A publication Critical patent/JP2000260788A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8314—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent positional changes or peel off of a semiconductor element after being bonded. SOLUTION: In a die-bonding part 12 of this semiconductor device, a plurality of grooves 13 arranged in parallel in one direction are provided on the surface. As a result, when a semiconductor element is die-bonded to a surface of a die-bonding part 12, adhesives crushed by the semiconductor element are squeezed to the outside of the semiconductor element into or pass through the groove 13, and a layer of the adhesives in a clearance between the die bond part 12 and the semiconductor element is formed extremely thin. Furthermore, UV light passed through the groove 13 and enter into the clearance between the die bond part 12 and semiconductor element, thereby surely curing the layer of the adhesives. For this reason, positional changes of the semiconductor element after die-bonding becomes very small. Furthermore, release of an adhered part between the side face of the semiconductor element and adhesives are eliminated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】この発明は、半導体装置の改
良に関する。The present invention relates to an improvement in a semiconductor device.

【０００２】[0002]

【従来の技術】図５は、従来の半導体装置の形成時に行
われるダイボンド方法を示す。先ず、図５(a)に示すよ
うに、半導体装置用パッケージ内の放熱台(以下、単に
放熱台と言う)１上における平面状を成す半導体素子ダ
イボンド部(以下、単にダイボンド部と言う)２の表面
に、図５(b)に示すように、紫外線硬化型接着剤(以下、
単に接着剤と言う)３を塗布する。次に、図５(c)に示す
ように、半導体素子４を、接着剤３を押し潰す様にして
ダイボンド部２の表面にダイボンドする。そして、図５
(d)に示すように、上記接着剤３に紫外(ＵＶ)光５を照
射し接着剤３を硬化させる。そして、接着剤が硬化する
と、図５(e)に示すように、ダイボンドが終了する。2. Description of the Related Art FIG. 5 shows a conventional die bonding method performed when a semiconductor device is formed. First, as shown in FIG. 5A, a semiconductor element die bonding portion (hereinafter simply referred to as a die bonding portion) 2 on a heat radiating platform (hereinafter simply referred to as a heat radiating platform) 1 in a semiconductor device package. As shown in FIG. 5 (b), an ultraviolet-curing adhesive (hereinafter, referred to as
3) is applied. Next, as shown in FIG. 5C, the semiconductor element 4 is die-bonded to the surface of the die-bonding portion 2 in such a manner that the adhesive 3 is crushed. And FIG.
As shown in (d), the adhesive 3 is irradiated with ultraviolet (UV) light 5 to cure the adhesive 3. Then, when the adhesive is cured, the die bonding is completed as shown in FIG.

【０００３】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来の半導体装置では、ダイボンドに際して以下のような
問題がある。すなわち、図５(c)において、接着剤３を
半導体素子４で押し漬しても、半導体素子４とダイボン
ド部２との隙間から接着剤３が押し出され難く、図５
(e)に示すように、半導体素子４とダイボンド部２との
隙間に接着剤３が厚目の層６となって残留する。そのた
めに、図６に示すように、接着剤３の層６における層厚
が経時変化による目減りや温度による膨張によって変化
し、半導体素子４が破線７で示す元の位置から実線８で
示す位置に変動(沈下)する。また、その際に、ダイボン
ド部２や半導体素子４と接着剤３との接着部分９が剥離
し、半導体素子４のダイボンド部２からの剥離を引き起
こす場合もある。However, the above-described conventional semiconductor device has the following problems in die bonding. That is, in FIG. 5C, even when the adhesive 3 is immersed in the semiconductor element 4, the adhesive 3 is hardly extruded from the gap between the semiconductor element 4 and the die bond portion 2.
As shown in (e), the adhesive 3 remains as a thick layer 6 in the gap between the semiconductor element 4 and the die bond portion 2. Therefore, as shown in FIG. 6, the thickness of the layer 6 of the adhesive 3 changes due to reduction with time and expansion due to temperature, and the semiconductor element 4 moves from the original position indicated by the broken line 7 to the position indicated by the solid line 8. Fluctuates (settles). Further, at this time, the die bonding portion 2 or the bonding portion 9 between the semiconductor element 4 and the adhesive 3 may peel off, which may cause the semiconductor element 4 to peel off from the die bonding portion 2.

【０００４】また、図５(d)においてＵＶ光５を照射す
る際に、図７に示すように、上記ダイボンド部２と半導
体素子４との隙間が狭いために、照射したＵＶ光５が上
記隙間に入り込み難く、ダイボンド部２の表面における
半導体素子４の周囲にはみ出した接着剤３(斜線で示す
部分)は硬化するのであるが、層６の硬化状態が不安定
となる。そのために、上述のように層６の層厚が経時変
化を起こし易い。When the UV light 5 is radiated in FIG. 5D, the gap between the die bond portion 2 and the semiconductor element 4 is narrow as shown in FIG. Although the adhesive 3 (hatched portion) which hardly enters the gap and protrudes around the semiconductor element 4 on the surface of the die bond portion 2 is hardened, the hardened state of the layer 6 becomes unstable. Therefore, as described above, the layer thickness of the layer 6 easily changes with time.

【０００５】そこで、この発明の目的は、ダイボンド後
の半導体素子が位置変化や剥離を起こすことが無い半導
体装置を提供することにある。An object of the present invention is to provide a semiconductor device in which a semiconductor element after die bonding does not change its position or peel off.

【０００６】[0006]

【課題を解決するための手段】上記目的を達成するた
め、請求項１に係る発明の半導体装置は、半導体装置用
パッケージ内における半導体素子がダイボンドされる部
分であるダイボンド部、あるいは、上記半導体素子にお
けるダイボンドされる面の何れか一方に、溝を設けたこ
とを特徴としている。According to a first aspect of the present invention, there is provided a semiconductor device according to a first aspect of the present invention, wherein a semiconductor element in a package for a semiconductor device is a die-bonded portion where a semiconductor element is die-bonded. Is characterized in that a groove is provided on one of the surfaces to be die-bonded.

【０００７】上記構成によれば、ダイボンド部あるいは
半導体素子の何れか一方に溝が設けられているために、
ダイボンド時に、上記ダイボンド部と半導体素子との間
の接着剤が上記溝内を通って容易に押し出され易くな
る。したがって、上記ダイボンド部と半導体素子との間
の隙間に形成される接着剤の層が薄くなって、ダイボン
ド部と半導体素子との密着性が向上する。 さらに、ダ
イボンド後に、上記ダイボンド部と半導体素子との間の
隙間の接着剤が目減りすることによって、上記半導体素
子が上記ダイボンド部に対して位置変化を起こすことが
無い。According to the above configuration, since the groove is provided in either the die bond portion or the semiconductor element,
At the time of die bonding, the adhesive between the die bonding portion and the semiconductor element is easily extruded through the groove. Therefore, the adhesive layer formed in the gap between the die bond portion and the semiconductor element becomes thinner, and the adhesion between the die bond portion and the semiconductor element is improved. Further, after the die bonding, the adhesive in the gap between the die bonding part and the semiconductor element is reduced, so that the semiconductor element does not change its position with respect to the die bonding part.

【０００８】また、請求項２に係る発明は、請求項１に
係る発明の半導体装置において、上記半導体素子とダイ
ボンド部とは、光硬化型接着剤を用いてダイボンドされ
ていることを特徴としている。According to a second aspect of the present invention, in the semiconductor device according to the first aspect of the present invention, the semiconductor element and the die bonding portion are die-bonded using a photocurable adhesive. .

【０００９】上記構成によれば、上記半導体素子とダイ
ボンド部とのダイボンドに際して、接着剤として光硬化
型接着剤が用いられている。したがって、ダイボンド時
において、上記半導体素子とダイボンド部との間の接着
剤に光を照射する際に、上記半導体素子とダイボンド部
との何れか一方に設けられた溝の延在方向に向かって光
を照射することによって、上記ダイボンド部と半導体素
子との隙間内に十分に光が入り込み、光硬化型接着剤の
硬化性が向上される。According to the above configuration, a photocurable adhesive is used as an adhesive at the time of die bonding between the semiconductor element and the die bond portion. Therefore, at the time of die bonding, when irradiating the adhesive between the semiconductor element and the die bond part with light, the light is directed toward the extending direction of the groove provided in one of the semiconductor element and the die bond part. Irradiates light sufficiently into the gap between the die bond portion and the semiconductor element, and the curability of the photocurable adhesive is improved.

【００１０】また、請求項３に係る発明は、請求項１に
係る発明の半導体装置において、上記溝の形状は、位置
合わせ用マーカとして使用可能な形状を有していること
を特徴としている。According to a third aspect of the present invention, in the semiconductor device according to the first aspect of the present invention, the shape of the groove has a shape usable as a positioning marker.

【００１１】上記構成によれば、上記溝の形状は、通常
上記半導体素子をダイボンドする際の位置合せ用の目印
として使用される十字,円,カギ括弧等の形状を有してい
る。したがって、上記溝は、上記半導体素子をダイボン
ドする際の位置合せ用の目印としても機能する。[0011] According to the above configuration, the shape of the groove has a shape such as a cross, a circle, or a square bracket which is usually used as a mark for positioning when the semiconductor element is die-bonded. Therefore, the groove also functions as a mark for positioning when the semiconductor element is die-bonded.

【００１２】[0012]

【発明の実施の形態】以下、この発明を図示の実施の形
態により詳細に説明する。図１は、本実施の形態の半導
体装置における半導体装置用パッケージ内の放熱台１１
および放熱台１１上における半導体素子ダイボンド部
(以下、単にダイボンド部と言う)１２を示す斜視図であ
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1 shows a radiator 11 in a semiconductor device package in a semiconductor device according to the present embodiment.
And die bonding part of semiconductor element on heat sink 11
FIG. 4 is a perspective view showing a die bonding portion (hereinafter, simply referred to as a die bonding portion) 12.

【００１３】本実施の形態においては、上記ダイボンド
部１２の表面に、一方向に平行に配列された複数の溝１
３を設けている。こうして、放熱台１１上のダイボンド
部１２上に半導体素子をダイボンドする際に、ダイボン
ド部１２と半導体素子とによって接着剤を押し潰す際
に、効率良く接着剤がダイボンド部１２外に押し出され
るようにするのである。In the present embodiment, a plurality of grooves 1 arranged in parallel in one direction are formed on the surface of the die bonding portion 12.
3 are provided. Thus, when the semiconductor element is die-bonded on the die bonding part 12 on the heat radiating base 11, when the adhesive is crushed by the die bonding part 12 and the semiconductor element, the adhesive is efficiently pushed out of the die bonding part 12. You do it.

【００１４】以下、上記構成を有するダイボンド部１２
上に半導体素子をダイボンドする場合を、図２に従って
具体的に説明する。図２(a)に示すように、放熱台１１
上におけるダイボンド部１２の表面に、ＵＶ硬化型接着
剤(以下、単に接着剤と言う)１４を塗布する。そして、
半導体素子１５を、接着剤１４を押し潰す様にしてダイ
ボンド部１２の表面にダイボンドする。Hereinafter, the die bonding portion 12 having the above-described structure will be described.
The case where the semiconductor element is die-bonded above will be specifically described with reference to FIG. As shown in FIG.
A UV-curable adhesive (hereinafter, simply referred to as an adhesive) 14 is applied to the surface of the upper die bond portion 12. And
The semiconductor element 15 is die-bonded to the surface of the die-bonding section 12 by crushing the adhesive 14.

【００１５】その際に、上記ダイボンド部１２の表面に
は、溝１３,１３,…が設けられている。そのために、半
導体素子１５で押し潰された接着剤１４は、図２(b)に
示すように、半導体素子１５とダイボンド部１２の隙間
から溝１３内、あるいは、溝１３を通って半導体素子１
５の外に押し出され、図２(d)に示すように、ダイボン
ド部１２と半導体素子１５との隙間には極薄い接着材１
４の層１６しか残留しない。At this time, grooves 13, 13,... Are provided on the surface of the die bond portion 12. For this purpose, the adhesive 14 crushed by the semiconductor element 15 is applied to the semiconductor element 1 through the gap between the semiconductor element 15 and the die bonding portion 12 or through the groove 13 as shown in FIG.
5, the gap between the die bond portion 12 and the semiconductor element 15 has an extremely thin adhesive material 1 as shown in FIG.
Only the fourth layer 16 remains.

【００１６】このように、上記ダイボンド部１２と半導
体素子１５との隙間における接着材１４の層１６は極薄
いために、経時変化や温度による目減りや膨張による層
厚変化は少ない。したがって、ダイボンド終了後におけ
る半導体素子１５の位置変化を非常に少なくできる。さ
らに、半導体素子１５と接着剤１４との接着部分１７の
剥離も無くすことができる。As described above, since the layer 16 of the adhesive 14 in the gap between the die bond portion 12 and the semiconductor element 15 is extremely thin, there is little change in layer thickness due to aging, temperature loss or expansion. Therefore, a change in the position of the semiconductor element 15 after the die bonding is completed can be extremely reduced. Further, peeling of the bonding portion 17 between the semiconductor element 15 and the adhesive 14 can be eliminated.

【００１７】また、上記接着剤１４にＵＶ光を照射して
硬化させる際には、照射するＵＶ光は溝１３の延在方向
に沿って接着剤１４に向かって照射するようにする。そ
うすることによって、照射されたＵＶ光は、溝１３を通
ってダイボンド部１２と半導体素子１５との隙間内に入
り込み易くなり、接着剤１４の層１６をも確実に硬化さ
せることができる。When the adhesive 14 is cured by irradiating it with UV light, the UV light to be irradiated is applied to the adhesive 14 along the extending direction of the groove 13. By doing so, it becomes easier for the irradiated UV light to enter the gap between the die bond portion 12 and the semiconductor element 15 through the groove 13, and the layer 16 of the adhesive 14 can be surely cured.

【００１８】但し、上記接着剤１４は、溝１３の延在方
向(溝１３の長手方向)への硬化収縮が大きくなるので、
半導体素子１５は接着剤１４硬化時に溝１３の延在方向
に動き易い。そのために、溝１３の延在方向は、半導体
素子１５の位置精度が厳しくない方向とする。However, the adhesive 14 has a large hardening shrinkage in the extending direction of the groove 13 (longitudinal direction of the groove 13).
The semiconductor element 15 easily moves in the direction in which the groove 13 extends when the adhesive 14 is cured. Therefore, the extending direction of the groove 13 is a direction in which the positional accuracy of the semiconductor element 15 is not strict.

【００１９】尚、上記実施の形態においては、上記ダイ
ボンド部１２の表面には溝１０を複数形成しているが、
１本のみ形成しても差し支えない。また、接着剤１４と
してＵＶ硬化型接着剤を用い、ＵＶ光を照射して硬化さ
せる場合を例に説明したが、この発明はこれに限定され
るものではない。例えば、ＵＶ硬化型接着剤を除く光硬
化型接着剤,熱硬化型接着剤,２液性(化学反応型)接着剤
であっても何ら差し支えない。In the above-described embodiment, a plurality of grooves 10 are formed on the surface of the die bond portion 12.
Only one may be formed. Further, the case where a UV-curable adhesive is used as the adhesive 14 and curing is performed by irradiating UV light has been described as an example, but the present invention is not limited to this. For example, a light-curable adhesive, a thermosetting adhesive, or a two-component (chemical reaction) adhesive other than the UV-curable adhesive may be used.

【００２０】図３および図４は、他の実施の形態におけ
る放熱台２１,３１およびダイボンド部２２,３２を示す
斜視図である。図３に示す実施の形態おいては、ダイボ
ンド部２２の表面に互いに直交する２方向の溝２３,２
４を格子状に設けている。こうすることによって、ダイ
ボンド時における接着剤(図示せず)の硬化収縮方向を互
いに直交する２方向にすることができ、ダイボンドされ
る半導体素子(図示せず)の位置ずれを小さくできるので
ある。FIGS. 3 and 4 are perspective views showing heat sinks 21 and 31 and die bonding portions 22 and 32 according to another embodiment. In the embodiment shown in FIG. 3, grooves 23, 2 in two directions perpendicular to each other are formed on the surface of the die bond portion 22.
4 are provided in a lattice shape. By doing so, the directions of curing and shrinking of the adhesive (not shown) at the time of die bonding can be set to two directions orthogonal to each other, and the displacement of the semiconductor element (not shown) to be die-bonded can be reduced.

【００２１】また、図３に示す実施の形態おいては、ダ
イボンド部３２の表面に、３本の溝３３,３４,３５を放
射状に設けている。このように、溝３３,３４,３５をダ
イボンド部３２の中心に対して点対称な形状に設けるこ
とによって、ダイボンド時に半導体素子(図示せず)の中
心とダイボンド部３２の中心との位置を合せれば、接着
剤(図示せず)の硬化収縮方向を半導体素子の中心に対し
て点対称にすることができ、接着剤硬化時の半導体素子
の位置ずれを更に小さくできる。In the embodiment shown in FIG. 3, three grooves 33, 34, and 35 are radially provided on the surface of the die bonding portion 32. Thus, by providing the grooves 33, 34, and 35 in a point-symmetrical shape with respect to the center of the die bond portion 32, the center of the semiconductor element (not shown) and the center of the die bond portion 32 are aligned at the time of die bonding. If so, the curing contraction direction of the adhesive (not shown) can be made point-symmetric with respect to the center of the semiconductor element, and the displacement of the semiconductor element when the adhesive is cured can be further reduced.

【００２２】また、図２および図３に示すように、上記
ダイボンド部２２,３２の表面上に形成する溝を格子状
または放射状にすることによって、接着剤が押し出され
る際の通路を２方向から４方向以上にすることができ、
接着剤を押し潰す際の圧力を分散させることができ、更
に効率良く接着剤を押し出すことができる。これによっ
て半導体素子とダイボンド部２２,３２との隙間におけ
る接着剤の厚みを更に薄くすることができ、半導体素子
の位置変化を十分に抑制することができる。Also, as shown in FIGS. 2 and 3, grooves formed on the surfaces of the die bonding portions 22 and 32 are formed in a lattice shape or a radial shape, so that a passage when the adhesive is extruded from two directions. Four or more directions,
The pressure at the time of crushing the adhesive can be dispersed, and the adhesive can be more efficiently extruded. Thereby, the thickness of the adhesive in the gap between the semiconductor element and the die bonding portions 22 and 32 can be further reduced, and the position change of the semiconductor element can be sufficiently suppressed.

【００２３】尚、上記溝の形状に対しては、図１に示す
ような一方向に平行な複数の直線溝１３や、図３に示す
ような格子状の溝２３,２４や、図４に示すような放射
状の溝３３,３４,３５に限定されるものではない。但
し、溝形状の決定に際しては、半導体素子１５の接着面
全体にできるだけ均一に接着剤を分布できるような形状
にすることを考慮すべきである。In addition, regarding the shape of the above-mentioned groove, a plurality of linear grooves 13 parallel to one direction as shown in FIG. 1, lattice-like grooves 23 and 24 as shown in FIG. It is not limited to the radial grooves 33, 34, 35 as shown. However, when determining the groove shape, it is necessary to consider a shape that can distribute the adhesive as uniformly as possible over the entire bonding surface of the semiconductor element 15.

【００２４】また、上記溝は、必ずしもダイボンド部１
２,２２,３２の表面に設ける必要は無く、半導体素子１
５の接着面に設けても差し支えない。その場合には、溝
を通常のホトリソグラフィ法と半導体エッチング技術と
を用いて形成できるので、ウェハ単位で(つまり、多数
の半導体素子を一括して)溝を形成できると言う利点が
ある。その場合におけるダイボンド部に対する半導体素
子のダイボンドの手順と作用と効果は、ダイボンド部１
２,２２,３２側に溝を設けた場合と何ら変わりは無い。The groove is not necessarily provided in the die bonding portion 1.
It is not necessary to provide on the surface of 2, 22, 32, the semiconductor element 1
5 may be provided on the bonding surface. In this case, since the grooves can be formed using ordinary photolithography and semiconductor etching techniques, there is an advantage that the grooves can be formed in wafer units (that is, a large number of semiconductor elements are collectively formed). In this case, the procedure, operation and effect of the die bonding of the semiconductor element to the die bonding part are as follows.
There is no difference from the case where grooves are provided on the 2, 22, 32 side.

【００２５】また、上記溝の形状を、位置合わせ用マー
カ(十字,円,カギ括弧等が一般的)の形状にすれば、上記
溝を半導体素子１５搭載時の位置合わせマーカとしても
利用することができる。その場合には、半導体素子をダ
イボンドする際の位置合せ用のマーカを形成する必要が
無く、工程を簡略化してコストの低減を図ることができ
る。If the shape of the groove is a shape of a positioning marker (usually a cross, a circle, brackets, etc.), the groove can be used as a positioning marker when the semiconductor element 15 is mounted. Can be. In this case, it is not necessary to form a marker for positioning when the semiconductor element is die-bonded, and the process can be simplified and cost can be reduced.

【００２６】[0026]

【発明の効果】以上より明らかなように、請求項１に係
る発明の半導体装置は、半導体装置用パッケージ内にお
けるダイボンド部、あるいは、上記半導体素子における
ダイボンドされる面の何れか一方に溝を設けたので、半
導体装置用パッケージ内の上記ダイボンド部に半導体素
子をダイボンドする際に、上記ダイボンド部と半導体素
子との間の接着剤を上記溝内を通して容易に押し出すこ
とができ、上記ダイボンド部と半導体素子の間の隙間に
形成される接着剤の層を薄くすることができる。したが
って、ダイボンド後に、上記ダイボンド部と半導体素子
との間の隙間の接着剤が経時変化や温度による目減りや
膨張によって厚さ変化を起こし、上記半導体素子が上記
ダイボンド部に対して位置変化することを防止できる。
その結果、上記半導体素子がダイボンド部の側面から剥
離することを防止できる。As is apparent from the above description, in the semiconductor device according to the first aspect of the present invention, a groove is formed in one of the die bonding portion in the semiconductor device package and the die bonding surface in the semiconductor element. Therefore, when the semiconductor element is die-bonded to the die bond part in the semiconductor device package, the adhesive between the die bond part and the semiconductor element can be easily extruded through the groove, and the die bond part and the semiconductor The thickness of the adhesive layer formed in the gap between the elements can be reduced. Therefore, after die bonding, the adhesive in the gap between the die bond portion and the semiconductor element undergoes a thickness change due to aging or temperature loss or expansion, and the semiconductor element changes its position with respect to the die bond portion. Can be prevented.
As a result, it is possible to prevent the semiconductor element from peeling off from the side surface of the die bond portion.

【００２７】また、請求項２に係る発明の半導体装置に
おける上記半導体素子とダイボンド部とは、光硬化型接
着剤を用いてダイボンドされているので、ダイボンド時
において、上記接着剤に光を照射する際に、上記溝の延
在方向に向かって光を照射することによって、上記ダイ
ボンド部と半導体素子との隙間内に十分に光を入り込ま
せることができる。したがって、この発明によれば、上
記ダイボンド部と半導体素子との隙間内の光硬化型接着
剤の硬化性を向上することができ、上記半導体素子とダ
イボンド部と接着性を向上できる。Further, in the semiconductor device according to the second aspect of the present invention, since the semiconductor element and the die bonding portion are die-bonded using a photo-curing adhesive, the adhesive is irradiated with light during die bonding. At this time, by irradiating the light in the extending direction of the groove, the light can sufficiently enter the gap between the die bond portion and the semiconductor element. Therefore, according to the present invention, the curability of the photocurable adhesive in the gap between the die bond part and the semiconductor element can be improved, and the adhesive property between the semiconductor element and the die bond part can be improved.

【００２８】また、請求項３に係る発明の半導体装置に
おける上記溝の形状を、位置合わせ用マーカとして使用
可能な形状(十字,円,カギ括弧等)にしたので、上記溝を
上記半導体素子をダイボンドする際の位置合せ用の目印
として使用できる。したがって、この発明によれば、半
導体装置の形成に際して半導体素子をダイボンドする際
の位置合せ用のマーカを形成する必要が無く、工程を簡
略化してコストの低減を図ることができる。In the semiconductor device according to the third aspect of the present invention, the shape of the groove is a shape (cross, circle, bracket, etc.) that can be used as a positioning marker. It can be used as a mark for alignment at the time of die bonding. Therefore, according to the present invention, it is not necessary to form an alignment marker when a semiconductor element is die-bonded in forming a semiconductor device, and the process can be simplified and cost can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図１】 この発明の半導体装置における放熱台上のダ
イボンド部を示す斜視図である。FIG. 1 is a perspective view showing a die bonding portion on a heat sink in a semiconductor device of the present invention.

【図２】 図１に示すダイボンド部に対する半導体素子
のダイボンド方法の説明図である。FIG. 2 is an explanatory diagram of a die bonding method of a semiconductor element to a die bonding part shown in FIG.

【図３】 図１とは異なる溝形状を示す図である。FIG. 3 is a diagram showing a groove shape different from FIG. 1;

【図４】 図１および図３とは異なる溝形状を示す図で
ある。FIG. 4 is a view showing a groove shape different from FIGS. 1 and 3;

【図５】 従来の半導体装置に対するダイボンド方法を
示す図である。FIG. 5 is a diagram showing a conventional die bonding method for a semiconductor device.

【図６】 ダイボンドされた半導体素子の位置変動の説
明図である。FIG. 6 is an explanatory diagram of a position change of a semiconductor device which is die-bonded;

【図７】 ダイボンド部と半導体素子との隙間に対する
ＵＶ光の照射状態の説明図である。FIG. 7 is an explanatory diagram of an irradiation state of UV light to a gap between a die bond portion and a semiconductor element.

【符号の説明】[Explanation of symbols]

１１…放熱台、 １２…ダイボンド部、１３,２３,２
４,３３,３４,３５…溝、１４…接着剤、
１５…半導体素子、１６…接着材の層、１７
…半導体素子側面と接着剤との接着部分。11: heat sink, 12: die bonding part, 13, 23, 2
4, 33, 34, 35 ... groove, 14 ... adhesive,
15: semiconductor element, 16: adhesive layer, 17
... A bonding part between the side surface of the semiconductor element and the adhesive.

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 半導体装置用パッケージ内における半導
体素子がダイボンドされる部分であるダイボンド部、あ
るいは、上記半導体素子におけるダイボンドされる面の
何れか一方に、溝を設けたことを特徴とする半導体装
置。1. A semiconductor device, wherein a groove is provided in one of a die-bonding portion, which is a portion to which a semiconductor element is die-bonded, in a semiconductor device package, and a die-bonding surface of the semiconductor element. . 【請求項２】 請求項１に記載の半導体装置において、 上記半導体素子とダイボンド部とは、光硬化型接着剤を
用いてダイボンドされていることを特徴とする半導体装
置。2. The semiconductor device according to claim 1, wherein the semiconductor element and the die bonding portion are die-bonded using a photocurable adhesive. 【請求項３】 請求項１に記載の半導体装置において、 上記溝の形状は、位置合わせ用マーカとして使用可能な
形状を有していることを特徴とする半導体装置。3. The semiconductor device according to claim 1, wherein said groove has a shape that can be used as a positioning marker.
JP6627399A 1999-03-12 1999-03-12 Semiconductor device Pending JP2000260788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6627399A JP2000260788A (en) 1999-03-12 1999-03-12 Semiconductor device

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Application Number Priority Date Filing Date Title
JP6627399A JP2000260788A (en) 1999-03-12 1999-03-12 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2000260788A true JP2000260788A (en) 2000-09-22

Family

ID=13311084

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6620653B2 (en) 2000-09-28 2003-09-16 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US7665101B2 (en) * 2005-06-20 2010-02-16 Sanyo Electric Co., Ltd. Optical pickup apparatus
JP2012227436A (en) * 2011-04-21 2012-11-15 Denso Corp Semiconductor device manufacturing method and semiconductor device
JP2016157861A (en) * 2015-02-25 2016-09-01 住友電工デバイス・イノベーション株式会社 Component fixing structure and method of manufacturing component fixing structure
JP2017195290A (en) * 2016-04-21 2017-10-26 スタンレー電気株式会社 Substrate structure
EP3308396A4 (en) * 2015-06-10 2019-02-06 Vishay General Semiconductor LLC Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
DE102012221988B4 (en) 2012-11-30 2020-07-09 Siemens Healthcare Gmbh Method for producing a sandwich-like electronic component, electronic component, detector element and radiation detector

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6620653B2 (en) 2000-09-28 2003-09-16 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6686613B2 (en) 2000-09-28 2004-02-03 Kabushiki Kaisha Toshiba Punch through type power device
US7665101B2 (en) * 2005-06-20 2010-02-16 Sanyo Electric Co., Ltd. Optical pickup apparatus
US7934226B2 (en) 2005-06-20 2011-04-26 Sanyo Electric Co., Ltd. Optical pickup apparatus
JP2012227436A (en) * 2011-04-21 2012-11-15 Denso Corp Semiconductor device manufacturing method and semiconductor device
DE102012221988B4 (en) 2012-11-30 2020-07-09 Siemens Healthcare Gmbh Method for producing a sandwich-like electronic component, electronic component, detector element and radiation detector
JP2016157861A (en) * 2015-02-25 2016-09-01 住友電工デバイス・イノベーション株式会社 Component fixing structure and method of manufacturing component fixing structure
EP3308396A4 (en) * 2015-06-10 2019-02-06 Vishay General Semiconductor LLC Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
JP2017195290A (en) * 2016-04-21 2017-10-26 スタンレー電気株式会社 Substrate structure

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