JP2000171241A - Method for measuring flatness - Google Patents
Method for measuring flatnessInfo
- Publication number
- JP2000171241A JP2000171241A JP10342521A JP34252198A JP2000171241A JP 2000171241 A JP2000171241 A JP 2000171241A JP 10342521 A JP10342521 A JP 10342521A JP 34252198 A JP34252198 A JP 34252198A JP 2000171241 A JP2000171241 A JP 2000171241A
- Authority
- JP
- Japan
- Prior art keywords
- surface shape
- wafer
- substrate
- holding means
- flatness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Length Measuring Devices By Optical Means (AREA)
- Length Measuring Devices With Unspecified Measuring Means (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は平坦度測定方法に
関する。The present invention relates to a method for measuring flatness.
【０００２】[0002]
【従来の技術】近年、ＬＳＩのパターンの微細化に伴っ
て光露光装置の焦点深度が浅くなってきている。すなわ
ち、微細なパターンを露光するためには波長を短くしな
ければならないが、焦点深度は波長に比例するため、光
露光装置の焦点深度が浅くなってしまう。2. Description of the Related Art In recent years, the depth of focus of an optical exposure apparatus has been reduced with the miniaturization of LSI patterns. That is, in order to expose a fine pattern, the wavelength must be shortened. However, since the depth of focus is proportional to the wavelength, the depth of focus of the light exposure apparatus becomes shallow.
【０００３】そのため、半導体ウエハの表面の凹凸が焦
点深度内であるか否かが描画の良否を左右することにな
り、パターンが描画（露光）される半導体ウエハの平坦
度に対する要求が厳しくなってきている。例えば、半導
体ウエハの表面がうねり、そのうねり量が焦点深度を越
えると、いわゆるピンぼけを起こしてしまうからであ
る。[0003] Therefore, whether or not the irregularities on the surface of the semiconductor wafer are within the depth of focus determines the quality of drawing, and the demand for the flatness of the semiconductor wafer on which a pattern is drawn (exposed) becomes severe. ing. For example, if the surface of the semiconductor wafer undulates and the amount of undulation exceeds the depth of focus, so-called out-of-focus occurs.
【０００４】従来、半導体ウエハの平坦度を測定するに
は、半導体ウエハの一部を保持し、その半導体ウエハの
両面に対向するようにセンサを配置し、このセンサをス
キャニングして半導体ウエハの各点までの距離を測定
し、この測定結果に基いて半導体ウエハ表面の形状をコ
ンピュータを用いて演算する。Conventionally, in order to measure the flatness of a semiconductor wafer, a part of the semiconductor wafer is held, a sensor is arranged so as to face both surfaces of the semiconductor wafer, and the sensor is scanned to scan each semiconductor wafer. The distance to the point is measured, and the shape of the semiconductor wafer surface is calculated using a computer based on the measurement result.
【０００５】そして、この演算結果に基いて描画（露光
装置を用いた半導体ウエハの露光）時の平坦度の判定が
行われていた。[0005] On the basis of the calculation result, the flatness at the time of drawing (exposure of a semiconductor wafer using an exposure apparatus) has been determined.
【０００６】[0006]
【発明が解決しようとする課題】しかし、半導体ウエハ
の平坦度を測定するときと描画するときとでは、半導体
ウエハを保持するホルダが同じでないので、半導体ウエ
ハの表面形状が微妙に変化し、測定時の半導体ウエハの
平坦度の演算結果と描画時の平坦度の測定結果との間に
食い違いが生じることがあった。However, since the holder for holding the semiconductor wafer is not the same between when the flatness of the semiconductor wafer is measured and when drawing, the surface shape of the semiconductor wafer slightly changes, and the measurement is performed. In some cases, a discrepancy occurs between the calculation result of the flatness of the semiconductor wafer at the time and the measurement result of the flatness at the time of drawing.
【０００７】この発明はこのような事情に鑑みてなされ
たもので、その課題は描画時の基板の表面形状の良否を
精度良く判定することができる平坦度測定方法を提供す
ることである。The present invention has been made in view of such circumstances, and an object of the present invention is to provide a flatness measuring method capable of accurately determining the quality of the surface shape of a substrate at the time of drawing.
【０００８】[0008]
【課題を解決するための手段】上記課題を解決するため
請求項１に記載の発明は、次工程で用いられる第２基板
保持手段によって吸着保持される基板を、第１基板保持
手段によって吸着保持して平坦度を測定する平坦度測定
方法であって、予め平行度が判っている較正用部材を前
記第１基板保持手段で吸着保持した状態で、前記較正用
部材の表面形状を測定する第１の表面形状測定工程と、
前記第１の表面形状測定工程の結果に基いて前記第１基
板保持手段の形状補正データを算出する形状補正データ
算出工程と、前記基板を前記第１基板保持手段で吸着保
持した状態で、前記基板の表面形状を測定する第２の表
面形状測定工程と、前記第２の表面形状測定工程の結果
を前記第１基板保持手段の形状補正データを用いて補正
して前記基板の表面形状データを演算する表面形状デー
タ演算工程と、表面形状が既知の前記第２基板保持手段
の表面形状データを用いて前記表面形状データ演算工程
の演算結果を補正することにより前記基板を前記第２基
板保持手段に吸着保持させたときの前記基板の表面形状
を予測する表面形状予測工程と、前記表面形状予測工程
の予測結果から前記基板の平坦度を判定する平坦度判定
工程とを含むことを特徴とする。According to a first aspect of the present invention, there is provided an image forming apparatus, comprising: a first substrate holding means for holding a substrate sucked and held by a second substrate holding means used in a next step; A flatness measuring method for measuring flatness by measuring a surface shape of the calibration member in a state where the calibration member having a known parallelism is suction-held by the first substrate holding means. 1 surface shape measuring step;
A shape correction data calculation step of calculating shape correction data of the first substrate holding means based on a result of the first surface shape measurement step, and a state in which the substrate is suction-held by the first substrate holding means. A second surface shape measuring step of measuring the surface shape of the substrate, and correcting the result of the second surface shape measuring step using the shape correction data of the first substrate holding means to obtain the surface shape data of the substrate. Calculating the surface shape data of the second substrate holding means using the surface shape data of the second substrate holding means having a known surface shape by correcting the calculation result of the surface shape data calculating step by using the surface shape data of the second substrate holding means having a known surface shape. A surface shape prediction step of predicting a surface shape of the substrate when the substrate is sucked and held, and a flatness determination step of determining flatness of the substrate from a prediction result of the surface shape prediction step. And it features.
【０００９】補正された基板の表面形状データと形状が
既知の第２基板保持手段とを用いて基板を第２基板保持
手段に吸着保持したときの表面形状を予測し、平坦度を
判定する。Using the corrected surface shape data of the substrate and the second substrate holding means having a known shape, the surface shape when the substrate is sucked and held by the second substrate holding means is predicted, and the flatness is determined.
【００１０】請求項２に記載の発明は、請求項１に記載
の平坦度測定方法において、前記第１基板保持手段と前
記第２基板保持手段とは同一構造の基板ホルダであるこ
とを特徴とする。According to a second aspect of the present invention, in the flatness measuring method according to the first aspect, the first substrate holding means and the second substrate holding means are substrate holders having the same structure. I do.
【００１１】描画時と描画時の基板ホルダが同一構造で
あるので、基板を同じ条件で保持することができる。Since the substrate holder at the time of drawing and at the time of drawing have the same structure, the substrate can be held under the same conditions.
【００１２】[0012]
【発明の実施の形態】以下、この発明の実施の形態を図
面に基づいて説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００１３】図１はこの発明の平坦度測定方法に用いら
れる平坦度測定装置と描画装置のブロック構成図であ
る。FIG. 1 is a block diagram of a flatness measuring device and a drawing device used in the flatness measuring method of the present invention.
【００１４】半導体ウエハ（基板）２０は平坦度測定装
置１０でその表面形状を測定された後に、次工程の描画
装置３０による描画（露光）工程で表面にパターンが描
画される。なお、次工程としては描画工程に限るもので
はなく、他の加工や測定工程であってもよい。After the surface shape of the semiconductor wafer (substrate) 20 is measured by the flatness measuring device 10, a pattern is drawn on the surface in a drawing (exposure) step by a drawing device 30 in the next step. The next step is not limited to the drawing step, but may be another processing or measurement step.
【００１５】平坦度測定装置１０は、第１ウエハホルダ
（第１基板保持手段）１１と、測定部１２と、制御装置
４０とを備える。The flatness measuring device 10 includes a first wafer holder (first substrate holding means) 11, a measuring unit 12, and a control device 40.
【００１６】制御装置４０は、演算部４１と、判定部４
２とを備え、コンピュータで構成される。The control device 40 includes an operation unit 41 and a determination unit 4
And a computer.
【００１７】描画装置３０は、第２ウエハホルダ（第２
基板保持手段）３１と、描画部３２とを備える。The drawing apparatus 30 includes a second wafer holder (second
(Substrate holding means) 31 and a drawing unit 32.
【００１８】第１ウエハホルダ１１は、半導体ウエハ
（基板）２０の表面形状を測定する際に半導体ウエハ２
０を吸着保持する。この第１ウエハホルダ１１は第２ウ
エハホルダ３１と同一構造である。The first wafer holder 11 holds the semiconductor wafer 2 when measuring the surface shape of the semiconductor wafer (substrate) 20.
0 is held by suction. The first wafer holder 11 has the same structure as the second wafer holder 31.
【００１９】測定部１２は、較正用ウエハ（較正用部
材）２５を第１ウエハホルダ１１に吸着保持した状態
で、較正用ウエハ２５の表面形状を測定する。The measuring section 12 measures the surface shape of the calibration wafer 25 while holding the calibration wafer (calibration member) 25 by suction on the first wafer holder 11.
【００２０】また、測定部１２は、表面形状を測定すべ
き半導体ウエハ２０を第１ウエハホルダ１１に吸着保持
した状態で、半導体ウエハ２０の表面形状を測定する。The measuring unit 12 measures the surface shape of the semiconductor wafer 20 while the semiconductor wafer 20 whose surface shape is to be measured is held by suction on the first wafer holder 11.
【００２１】第２ウエハホルダ３１は、半導体ウエハ２
０の表面にパターンを描画する際に半導体ウエハ２０を
吸着保持する。この第２ウエハホルダ３１の表面形状は
予め計測され、既知となっている。The second wafer holder 31 holds the semiconductor wafer 2
When drawing a pattern on the surface of the semiconductor wafer 20, the semiconductor wafer 20 is held by suction. The surface shape of the second wafer holder 31 is measured in advance and is known.
【００２２】演算部４１は、測定部１２の測定結果に基
いて第１ウエハホルダ１１の形状補正データを得るとと
もに、このデータに基いて半導体ウエハ２０の測定結果
を補正して測定時の半導体ウエハ２０の表面形状データ
を演算する。The arithmetic unit 41 obtains the shape correction data of the first wafer holder 11 based on the measurement result of the measurement unit 12 and corrects the measurement result of the semiconductor wafer 20 based on this data to correct the semiconductor wafer 20 at the time of measurement. Is calculated.
【００２３】また、演算部４１は、測定部１２の測定結
果に基いて得た半導体ウエハ２０の表面形状データと第
２ウエハホルダ３２の表面形状データとに基いて描画時
の半導体ウエハ２０の表面形状データを演算する。第２
ウエハホルダ３２の表面形状データは演算部４１に予め
記憶されている。The arithmetic unit 41 calculates the surface shape of the semiconductor wafer 20 at the time of drawing based on the surface shape data of the semiconductor wafer 20 obtained based on the measurement result of the measurement unit 12 and the surface shape data of the second wafer holder 32. Operate on data. Second
The surface shape data of the wafer holder 32 is stored in the calculation unit 41 in advance.
【００２４】判定部４２は、演算部４１から得られた演
算結果を用いて第２ウエハホルダ３２に吸着保持された
半導体ウエハ２０の表面形状をシミュレーションし、描
画装置３０で露光する際の半導体ウエハ２０の平坦度を
判定する。The determination unit 42 simulates the surface shape of the semiconductor wafer 20 sucked and held by the second wafer holder 32 by using the calculation result obtained from the calculation unit 41, and Is determined.
【００２５】図２は平坦度測定方法を説明するフローチ
ャートであり、Ｓ１〜Ｓ６はその手順を示している。FIG. 2 is a flowchart for explaining the flatness measuring method, and S1 to S6 show the procedure.
【００２６】予め平行度が判っている較正用ウエハ２５
を第１ウエハホルダ１１で吸着保持した状態で、測定部
１２によって較正用ウエハ２５の表面形状を測定する
（Ｓ１）。The calibration wafer 25 whose parallelism is known in advance
Is held by the first wafer holder 11, the surface shape of the calibration wafer 25 is measured by the measuring unit 12 (S1).
【００２７】演算部４１は測定部１２の測定結果に基い
て第１ウエハホルダ１１の形状補正データを算出する
（Ｓ２）。The calculation section 41 calculates the shape correction data of the first wafer holder 11 based on the measurement result of the measurement section 12 (S2).
【００２８】半導体ウエハ２０を第１ウエハホルダ１１
で吸着保持した状態で、測定部１２によって半導体ウエ
ハ２０の表面形状を測定する（Ｓ３）。The semiconductor wafer 20 is placed on the first wafer holder 11
The surface shape of the semiconductor wafer 20 is measured by the measuring unit 12 in the state where the semiconductor wafer 20 is sucked and held (S3).
【００２９】演算部４１は第１ウエハホルダ１１の形状
補正データを用いてＳ３で得られた測定部１２の測定結
果を補正し、平坦度測定時における第１ウエハホルダ１
１の表面形状の影響が除去された半導体ウエハ２０の表
面形状データを得る（Ｓ４）。The calculation unit 41 corrects the measurement result of the measurement unit 12 obtained in S3 using the shape correction data of the first wafer holder 11, and the first wafer holder 1 at the time of flatness measurement.
The surface shape data of the semiconductor wafer 20 from which the influence of the surface shape 1 has been removed is obtained (S4).
【００３０】演算部４１は第２ウエハホルダ３１の表面
形状データを用いてＳ４で得られた演算結果を補正する
ことにより半導体ウエハ２０を第２ウエハホルダ３１に
吸着保持させたときの半導体ウエハ２０の表面形状をシ
ミュレーションする（Ｓ５）。The calculation unit 41 corrects the calculation result obtained in S 4 using the surface shape data of the second wafer holder 31, thereby obtaining the surface of the semiconductor wafer 20 when the semiconductor wafer 20 is sucked and held by the second wafer holder 31. The shape is simulated (S5).
【００３１】判定部４２はＳ５のシミュレーションの結
果から描画時の半導体ウエハ２０の平坦度を判定する
（Ｓ６）。The determining unit 42 determines the flatness of the semiconductor wafer 20 at the time of writing from the result of the simulation in S5 (S6).
【００３２】次に、ウエハ平坦度の測定方法の一例を示
す。Next, an example of a method for measuring the wafer flatness will be described.
【００３３】図３はフィゾー式干渉計を説明する図であ
る。FIG. 3 is a diagram illustrating a Fizeau interferometer.
【００３４】フィゾー式干渉計（測定部）は、光源１１
と、ビームエクスパンダ１２と、ハーフミラー１３と、
フィゾーフラット１４と、ウエハホルダ（第１ウエハホ
ルダ）１５と、結像レンズ１６と、ＴＶカメラ１７とを
備える。The Fizeau interferometer (measuring unit) includes a light source 11
, A beam expander 12, a half mirror 13,
It includes a Fizeau flat 14, a wafer holder (first wafer holder) 15, an imaging lens 16, and a TV camera 17.
【００３５】光源１１としてはレーザ光（例えばＨｅ−
Ｎｅレーザ）のように可干渉距離が長い光源を用いる。As the light source 11, a laser beam (for example, He-
A light source having a long coherence distance such as a Ne laser is used.
【００３６】ビームエクスパンダ１２はレンズ１２Ａと
コリメータレンズ１２Ｂとで構成される。The beam expander 12 includes a lens 12A and a collimator lens 12B.
【００３７】ウエハホルダ１５としては半導体ウエハ２
０にパターンを描画する際に用いられる描画装置３０の
ウエハホルダ（第２ウエハホルダ）３１と同一構造のホ
ルダを用いる。The semiconductor wafer 2 is used as the wafer holder 15.
A holder having the same structure as that of the wafer holder (second wafer holder) 31 of the drawing apparatus 30 used when drawing a pattern on 0 is used.
【００３８】結像レンズ１６とＴＶカメラ１７とで観察
光学系が構成される。An observation optical system is constituted by the imaging lens 16 and the TV camera 17.
【００３９】光源１１からの光はビームエクスパンダ１
２で拡大され、平行光束となってフィゾーフラット１４
に入射する。The light from the light source 11 is the beam expander 1
2 and becomes a parallel light beam and becomes Fizeau flat 14
Incident on.
【００４０】フィゾーフラット１４に入射した光の一部
は基準面１４ａで反射され参照光となる。A part of the light incident on the Fizeau flat 14 is reflected by the reference surface 14a and becomes reference light.
【００４１】透過した光は光量調整フィルタ１８を透過
後、半導体ウエハ２０の表面で反射される。The transmitted light is reflected by the surface of the semiconductor wafer 20 after passing through the light amount adjusting filter 18.
【００４２】反射光は参照光と同じ光路を戻り、ハーフ
ミラー１３で反射され、観察光学系に至る。The reflected light returns along the same optical path as the reference light, is reflected by the half mirror 13, and reaches the observation optical system.
【００４３】反射光は結像レンズ１６を通過し、ＴＶカ
メラ１７の撮像面に到達する。基準面１４ａと半導体ウ
エハ２０の表面２０ａとで反射された光が撮像面で重な
ると、互いに干渉を起こし、干渉縞が形成される。The reflected light passes through the imaging lens 16 and reaches the imaging surface of the TV camera 17. When the light reflected by the reference surface 14a and the surface 20a of the semiconductor wafer 20 overlap on the imaging surface, they interfere with each other and form interference fringes.
【００４４】基準面１４ａが十分に精度の良い平面であ
る場合には、干渉縞は半導体ウエハ２０の表面形状、す
なわち半導体ウエハ２０の表面の高さ分布を示す。When the reference surface 14a is a plane with sufficiently high accuracy, the interference fringes indicate the surface shape of the semiconductor wafer 20, that is, the height distribution of the surface of the semiconductor wafer 20.
【００４５】この干渉縞は制御装置４０を用いて解析さ
れ、半導体ウエハ２０の表面形状が測定される。The interference fringes are analyzed using the controller 40, and the surface shape of the semiconductor wafer 20 is measured.
【００４６】なお、光量調整フィルタ１８は基準面１４
ａと半導体ウエハ２０の表面２０ａとの反射率差を補正
し、両者の光量をほぼ等しくすることにより干渉縞のコ
ントラストを向上させるためのものである。It should be noted that the light amount adjustment filter 18 is
This is for improving the contrast of the interference fringes by correcting the difference in the reflectance between a and the surface 20a of the semiconductor wafer 20 and making the light amounts of the two substantially equal.
【００４７】また、上記方法によって測定された半導体
ウエハ２０の表面形状は半導体ウエハ２０とウエハホル
ダ１５の表面形状とを合わせたときの形状である。The surface shape of the semiconductor wafer 20 measured by the above method is a shape when the surface shape of the semiconductor wafer 20 and the surface shape of the wafer holder 15 are combined.
【００４８】次に、ウエハ平坦度の測定方法の別の一例
を示す。Next, another example of the method of measuring the wafer flatness will be described.
【００４９】図４は測距センサを備えた測定装置を説明
する図であり、図３のフィゾー式干渉計と共通する部分
には同一符号を付してその説明を省略する。FIG. 4 is a view for explaining a measuring apparatus provided with a distance measuring sensor. The same reference numerals are given to the parts common to those of the Fizeau interferometer of FIG. 3, and the description will be omitted.
【００５０】測定装置は、テーブル１０５と、ウエハホ
ルダ１１５と、測距センサ１５０と、ガイド１５１とを
備える。The measuring device includes a table 105, a wafer holder 115, a distance measuring sensor 150, and a guide 151.
【００５１】テーブル１０５は軸１０５ａを中心として
矢印ａに示すように回転可能であり、その上面には半導
体ウエハ２０を保持するウエハホルダ１１５が取り付け
られている。The table 105 is rotatable about an axis 105a as shown by an arrow a, and a wafer holder 115 for holding the semiconductor wafer 20 is mounted on the upper surface thereof.
【００５２】測距センサ１５０としては光学式や超音波
式のものを用い、半導体ウエハ２０の表面の各測定点ま
での距離を測定する。この測距センサ１５０は半導体ウ
エハ２０に対して矢印ｂに示すように平行に移動できる
ようにガイド１５１に取り付けられている。An optical or ultrasonic type distance measuring sensor 150 is used to measure the distance to each measurement point on the surface of the semiconductor wafer 20. The distance measuring sensor 150 is attached to a guide 151 so as to be movable in parallel to the semiconductor wafer 20 as shown by an arrow b.
【００５３】なお、この測距センサ１５０としては描画
時の焦点位置の決定に使用されるフォーカスセンサと同
じものを用いる方が判定の信頼性の点から好ましい。It is preferable to use the same distance sensor 150 as the focus sensor used for determining the focus position at the time of drawing in terms of the reliability of the determination.
【００５４】半導体ウエハ２０の表面２０ａの高さ分布
は、測距センサ１５０を半導体ウエハ２０に対して平行
に移動させると同時に半導体ウエハ２０を回転させて、
測定される。The height distribution of the surface 20a of the semiconductor wafer 20 is determined by moving the distance measuring sensor 150 in parallel with the semiconductor wafer 20 and rotating the semiconductor wafer 20 at the same time.
Measured.
【００５５】この測定結果は制御装置４０を用いて解析
される。This measurement result is analyzed using the control device 40.
【００５６】上記各装置によって半導体ウエハ２０の表
面形状が測定された後、図２のフローチャートに示した
手順で半導体ウエハ２０の表面の平坦度が判定される。After the surface shape of the semiconductor wafer 20 is measured by each of the above apparatuses, the flatness of the surface of the semiconductor wafer 20 is determined by the procedure shown in the flowchart of FIG.
【００５７】この実施形態によれば、補正された半導体
ウエハ２０の表面形状データと形状が既知の第２ウエハ
ホルダ３１とに基づいて、描画時の半導体ウエハ２０の
表面形状をシミュレーションするので、半導体ウエハ２
０の平坦度を精度良く判定することができる。According to this embodiment, the surface shape of the semiconductor wafer 20 at the time of drawing is simulated based on the corrected surface shape data of the semiconductor wafer 20 and the second wafer holder 31 whose shape is known. 2
The flatness of 0 can be accurately determined.
【００５８】なお、上記実施形態では光源としてレーザ
光を用いた場合で説明したが、光源としてはＸ線や電子
線を用いることもできる。Although the above embodiment has been described with respect to the case where laser light is used as a light source, an X-ray or an electron beam may be used as a light source.
【００５９】[0059]
【発明の効果】以上に説明したように請求項１又は２に
記載の発明の平坦度測定方法によれば、描画時の基板の
平坦度を精度良く判定することができる。As described above, according to the flatness measuring method of the first or second aspect of the present invention, the flatness of the substrate at the time of drawing can be determined with high accuracy.
【図１】図１はこの発明の平坦度測定方法に用いられる
平坦度測定装置と描画装置のブロック構成図である。FIG. 1 is a block diagram of a flatness measuring device and a drawing device used in a flatness measuring method of the present invention.
【図２】図２は平坦度測定方法を説明するフローチャー
トである。FIG. 2 is a flowchart illustrating a flatness measuring method.
【図３】図３はフィゾー式干渉計を説明する図である。FIG. 3 is a diagram illustrating a Fizeau interferometer.
【図４】図４は測距センサを備えた測定装置を説明する
図である。FIG. 4 is a diagram illustrating a measuring device provided with a distance measuring sensor.
１１ 第１ウエハホルダ（第１基板保持手段） ２０ 半導体ウエハ（基板） ２５ 校正用ウエハ（校正用部材） ３１ 第２ウエハホルダ（第２基板保持手段） 11 first wafer holder (first substrate holding means) 20 semiconductor wafer (substrate) 25 calibration wafer (calibration member) 31 second wafer holder (second substrate holding means)
───────────────────────────────────────────────────── フロントページの続き (72)発明者 中平 法生 東京都千代田区丸の内３丁目２番３号 株 式会社ニコン内 (72)発明者 作田 博伸 東京都千代田区丸の内３丁目２番３号 株 式会社ニコン内 Ｆターム(参考） 2F065 AA47 BB03 BB24 CC19 DD03 EE05 FF04 FF55 GG04 JJ19 KK01 LL04 LL09 LL62 MM16 MM26 QQ21 QQ32 SS04 UU04 UU05 2F069 AA54 BB15 DD19 EE04 EE21 FF07 GG04 GG07 GG15 GG35 GG52 GG56 HH30 JJ19 JJ26 MM01 MM23 NN11 PP02 QQ05 4M106 AA01 CA24 DH01 DH12 DH32 DH53 DJ02 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hosei Nakahira 3-2-3 Marunouchi, Chiyoda-ku, Tokyo Inside Nikon Corporation (72) Inventor Hironobu Sakuta 3-2-2, Marunouchi, Chiyoda-ku, Tokyo F term in Nikon Corporation (reference) 2F065 AA47 BB03 BB24 CC19 DD03 EE05 FF04 FF55 GG04 JJ19 KK01 LL04 LL09 LL62 MM16 MM26 QQ21 QQ32 SS04 UU04 UU05 2F069 AA54 BB15 DD19 EE04 GG21 GG02 GG04 NN11 PP02 QQ05 4M106 AA01 CA24 DH01 DH12 DH32 DH53 DJ02
Claims (2)
よって吸着保持される基板を、第１基板保持手段によっ
て吸着保持して平坦度を測定する平坦度測定方法であっ
て、 予め平行度が判っている較正用部材を前記第１基板保持
手段で吸着保持した状態で、前記較正用部材の表面形状
を測定する第１の表面形状測定工程と、 前記第１の表面形状測定工程の結果に基いて前記第１基
板保持手段の形状補正データを算出する形状補正データ
算出工程と、 前記基板を前記第１基板保持手段で吸着保持した状態
で、前記基板の表面形状を測定する第２の表面形状測定
工程と、 前記第２の表面形状測定工程の結果を前記第１基板保持
手段の形状補正データを用いて補正して前記基板の表面
形状データを演算する表面形状データ演算工程と、 表面形状が既知の前記第２基板保持手段の表面形状デー
タを用いて前記表面形状データ演算工程の演算結果を補
正することにより前記基板を前記第２基板保持手段に吸
着保持させたときの前記基板の表面形状を予測する表面
形状予測工程と、 前記表面形状予測工程の予測結果から前記基板の平坦度
を判定する平坦度判定工程とを含むことを特徴とする平
坦度測定方法。1. A flatness measuring method for measuring flatness by sucking and holding a substrate sucked and held by a second substrate holding means used in a next step by a first substrate holding means. A first surface shape measuring step of measuring the surface shape of the calibration member in a state where the known calibration member is sucked and held by the first substrate holding means; and a result of the first surface shape measuring step. A shape correction data calculating step of calculating shape correction data of the first substrate holding means based on the first surface holding means; and a second surface for measuring a surface shape of the substrate in a state where the substrate is sucked and held by the first substrate holding means. A shape measuring step; a surface shape data calculating step of correcting the result of the second surface shape measuring step using the shape correction data of the first substrate holding means to calculate the surface shape data of the substrate; But The surface shape of the substrate when the substrate is sucked and held by the second substrate holding means by correcting the calculation result of the surface shape data calculation step using the known surface shape data of the second substrate holding means. And a flatness determination step of determining a flatness of the substrate from a prediction result of the surface shape prediction step.
持手段とは同一構造の基板ホルダであることを特徴とす
る請求項１に記載の平坦度測定方法。2. The flatness measuring method according to claim 1, wherein said first substrate holding means and said second substrate holding means are substrate holders having the same structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10342521A JP2000171241A (en) | 1998-12-02 | 1998-12-02 | Method for measuring flatness |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10342521A JP2000171241A (en) | 1998-12-02 | 1998-12-02 | Method for measuring flatness |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000171241A true JP2000171241A (en) | 2000-06-23 |
Family
ID=18354397
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10342521A Withdrawn JP2000171241A (en) | 1998-12-02 | 1998-12-02 | Method for measuring flatness |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000171241A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100908639B1 (en) * | 2007-11-06 | 2009-07-21 | 한국표준과학연구원 | Glass wafer shape measuring method and apparatus |
| CN103438857A (en) * | 2013-08-20 | 2013-12-11 | 常州市好利莱光电科技有限公司 | LED substrate wafer processing disc surface flatness measuring instrument design |
| JP2014504803A (en) * | 2011-01-11 | 2014-02-24 | ケーエルエー−テンカー コーポレイション | Object-based metrology method and system for advanced wafer surface nanotopography |
| CN114467007A (en) * | 2019-10-11 | 2022-05-10 | 信越半导体株式会社 | Method for measuring wafer shape |
-
1998
- 1998-12-02 JP JP10342521A patent/JP2000171241A/en not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100908639B1 (en) * | 2007-11-06 | 2009-07-21 | 한국표준과학연구원 | Glass wafer shape measuring method and apparatus |
| JP2014504803A (en) * | 2011-01-11 | 2014-02-24 | ケーエルエー−テンカー コーポレイション | Object-based metrology method and system for advanced wafer surface nanotopography |
| CN103438857A (en) * | 2013-08-20 | 2013-12-11 | 常州市好利莱光电科技有限公司 | LED substrate wafer processing disc surface flatness measuring instrument design |
| CN114467007A (en) * | 2019-10-11 | 2022-05-10 | 信越半导体株式会社 | Method for measuring wafer shape |
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