JP2000150704A - Manufacture of semiconductor element mounting multilayer wiring board - Google Patents
Manufacture of semiconductor element mounting multilayer wiring boardInfo
- Publication number
- JP2000150704A JP2000150704A JP10318251A JP31825198A JP2000150704A JP 2000150704 A JP2000150704 A JP 2000150704A JP 10318251 A JP10318251 A JP 10318251A JP 31825198 A JP31825198 A JP 31825198A JP 2000150704 A JP2000150704 A JP 2000150704A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- semiconductor element
- cavity
- mounting
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子搭載用
多層配線板の製造方法に関する。The present invention relates to a method for manufacturing a multilayer wiring board for mounting a semiconductor element.
【０００２】[0002]
【従来の技術】一般に、キャビティー仕様のＢＧＡ及び
ＰＧＡといわれている半導体素子搭載用パッケージは、
図１に示すような半導体素子を搭載するためのキャビテ
ィー９を有する多層配線板である。このようなキャビテ
ィー９を有する半導体素子搭載用多層配線板１０は、ベ
ース配線板１の上に、キャビティー用穴３を設けた複数
枚の穴あき配線板２を、同じくキャビティー用穴３を設
けた接着絶縁シート４を介して重ね、２枚の鏡板８の間
に挟んで加熱加圧することにより積層成形して製造され
ていた。キャビティー９内には、半導体素子と回路配線
とを接続するための端子となる回路が露出している。こ
のため、接着絶縁シートとしては、加熱加圧するとき、
接着絶縁シートの樹脂がキャビティー９内に流出しない
ように、樹脂流れが小さいローフローの接着絶縁シート
が使用されていた。2. Description of the Related Art In general, semiconductor element mounting packages called BGA and PGA of a cavity specification are:
2 is a multilayer wiring board having a cavity 9 for mounting a semiconductor element as shown in FIG. A multilayer wiring board 10 for mounting a semiconductor element having such a cavity 9 is formed by forming a plurality of perforated wiring boards 2 provided with holes 3 for cavities on a base wiring board 1, similarly to holes 3 for cavities. Are laminated through an adhesive insulating sheet 4 provided with a pair of end plates 8 and heated and pressurized to form a laminate. A circuit serving as a terminal for connecting the semiconductor element and the circuit wiring is exposed in the cavity 9. For this reason, as an adhesive insulating sheet, when heating and pressing,
In order to prevent the resin of the adhesive insulating sheet from flowing out into the cavity 9, a low-flow adhesive insulating sheet having a small resin flow has been used.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、このよ
うに樹脂流れの小さいローフロープリプレグを用いて
も、キャビティー９内への樹脂流れを皆無にすることは
できなかった。キャビティー９内に樹脂が流出すると、
キャビティー内に露出している回路の一部を覆ってしま
い、その部分については、半導体素子との接続に使用す
ることができない。このため、従来は、樹脂流出をある
程度見込んでキャビティー９の寸法を半導体素子の搭載
に必要な大きさより大きめにする必要があり、小型化の
障害になっていた。また、多層化プレス時にキャビティ
ー用穴内には圧力が掛からず、逆にその周辺に局所的な
圧力が掛かって板厚精度を悪くしたり、その局所的な圧
力のため、キャビティー９への樹脂流出が増大したりす
ることがある。半導体素子搭載用多層配線板の場合、こ
うした板厚精度の悪化やキャビティー部への樹脂流出
は、半導体素子の埋設や半導体素子とプリント配線板と
のワイヤボンディング性能を悪くするため、改善が望ま
れていた。本発明は、ＢＧＡ及びＰＧＡ等に用いる半導
体素子搭載用多層配線板を製造する際に、プレスの圧力
を均一化すると共にキャビティー部への接着絶縁シート
の樹脂の流出を防止し、半導体素子の埋設性やワイヤボ
ンディングによる接続性を改善する製造方法を提供する
ことを課題とした。However, even if such a low-flow prepreg having a small resin flow is used, the resin flow into the cavity 9 cannot be completely eliminated. When the resin flows into the cavity 9,
The circuit covers a part of the circuit exposed in the cavity, and that part cannot be used for connection with the semiconductor element. For this reason, conventionally, it is necessary to make the size of the cavity 9 larger than the size required for mounting the semiconductor element in consideration of resin outflow to some extent, which has been an obstacle to miniaturization. In addition, no pressure is applied to the cavity holes during the multi-layer press, and conversely, local pressure is applied to the periphery thereof, thereby deteriorating the plate thickness accuracy. Resin outflow may increase. In the case of a multilayer wiring board for mounting semiconductor elements, such deterioration in thickness accuracy and resin outflow into the cavity deteriorate the embedding of semiconductor elements and the wire bonding performance between the semiconductor element and the printed wiring board, so improvement is expected. Was rare. The present invention provides a method for manufacturing a multilayer wiring board for mounting a semiconductor element used for a BGA, a PGA, or the like, in which the pressure of the press is made uniform and the resin of the adhesive insulating sheet is prevented from flowing out to the cavity portion. An object of the present invention is to provide a manufacturing method for improving burying property and connectivity by wire bonding.
【０００４】[0004]
【課題を解決するための手段】本発明は、ベース配線板
及び半導体素子搭載用のキャビティー用穴を設けた穴あ
き配線板を、キャビティー用穴を設けた接着絶縁シート
を介して重ね、加熱加圧して積層する半導体素子搭載用
多層配線板の製造方法において、最外層の穴あき配線板
と鏡板との間に熱可塑性樹脂シートの両面に離型フィル
ムを配したクッション材を使用することを特徴とする半
導体素子搭載用多層配線板の製造方法である。まず発明
者らは、先にキャビティー用穴あけを行った多層化構成
品を面内圧カを均一にプレスする方法を検討し、多層化
プレスする際に鏡板と多層化構成品の間にクッションを
使用することが効果的であることを見出した。更にその
クッション材の構成や種類を検討し、熱可塑性樹脂シー
ト両面に離型フィルムを配したクッション材を使用する
方法を確立した。According to the present invention, a base wiring board and a perforated wiring board provided with a cavity hole for mounting a semiconductor element are laminated via an adhesive insulating sheet provided with a cavity hole. In a method for manufacturing a multilayer wiring board for mounting semiconductor elements, which is laminated by heating and pressing, a cushion material having release films disposed on both sides of a thermoplastic resin sheet between an outermost perforated wiring board and a mirror plate is used. A method for manufacturing a multilayer wiring board for mounting a semiconductor element, characterized by the following. First, the inventors examined a method of uniformly pressing the in-plane pressure of the multilayered component that had been drilled for cavities first.When performing multilayered pressing, a cushion was placed between the end plate and the multilayered component. It has been found that it is effective to use. Furthermore, the structure and type of the cushioning material were examined, and a method of using a cushioning material having release films disposed on both surfaces of a thermoplastic resin sheet was established.
【０００５】[0005]
【発明の実施の形態】ベース配線板１、穴あき配線板２
としては、ガラス布を基材としこれに熱硬化性樹脂ワニ
スを含浸乾燥して得れれるプリプレグと、金属箔、例え
ば銅箔とを積層し、硬化させて金属張り積層板を得、こ
の金属張り積層板に回路加工や穴あけ加工したものが使
用される。熱硬化性樹脂としては、エポキシ樹脂が電気
的特性や価格の面から好ましい。耐熱性など特に必要が
あるときには、ポリイミド樹脂、ビスマレイミド−トリ
アジン樹脂などの熱硬化性樹脂も使用することができ
る。接着絶縁シート４としては、前記のベース配線板１
又は穴あき配線板２の製造に用いたプリプレグ又は、エ
ポキシ樹脂にＮＢＲ等のゴム、アクリル樹脂、ポリビニ
ルブチラール樹脂、フェノール樹脂等を配合してフィル
ム状に製膜して得られるフィルム状接着剤を使用するこ
とができる。ベース配線板１及び半導体素子搭載用のキ
ャビティー用穴３を設けた穴あき配線板２を、キャビテ
ィー用穴３を設けた接着絶縁シート４を介して重ね、加
熱加圧するときの条件は、温度１５０〜１８０℃、圧力
１〜２０ＭＰａの範囲とするのが好ましい。温度が１５
０℃未満であると、接着強度が不足し、１８０℃を超え
ると樹脂がキャビティー用穴内に流れ出す傾向が大とな
る傾向にある。また、圧力が１ＭＰａ未満であると接着
強度が不足し、２０ＭＰａを超えると絶縁接着シートが
破断する傾向にある。このことから、温度１６０〜１７
５℃、圧力２〜１０ＭＰａの範囲がより好ましい。ベー
ス配線板１及び半導体素子搭載用のキャビティー用穴３
を設けた穴あき配線板２を、キャビティー用穴３を設け
た接着絶縁シート４を介して重ね、加熱加圧するとき、
これらの構成材料を２枚の鏡板８の間に挟むが、この鏡
板８としては、配線板分野の積層成形で使用されている
ものがそのまま用いられ、例えば、厚さ０．５〜５ｍｍ
の金属板が使用される。金属板としては、耐食性の観点
から、ステンレス板が好適に用いられる。鏡板８と最外
層の穴あき配線板２との間には、クッション材５として
ポリエチレン樹脂シートのような熱可塑性樹脂シート７
の両面に三フッ化ポリエチレンフィルムのような離型フ
ィルム６を配した構成材を用いる。熱可塑性樹脂シート
としては、ポリエチレン、ポリプロピレン、ポリスチレ
ン等の熱可塑性樹脂シートが使用可能で、好ましくは、
溶融温度が８０〜１３０℃のものが好ましい結果を得る
ことができる。離型フィルムは耐熱性のあるフィルムで
なければならない。少なくとも多層化プレス温度では溶
融しないもので、例えば三フッ化ポリエチレンのフィル
ムが使用できる。DESCRIPTION OF THE PREFERRED EMBODIMENTS Base wiring board 1, perforated wiring board 2
A prepreg obtained by impregnating and drying a thermosetting resin varnish on a glass cloth as a substrate and a metal foil, for example, a copper foil, are laminated and cured to obtain a metal-clad laminate. A circuit laminate or perforated laminate is used. As the thermosetting resin, an epoxy resin is preferable in terms of electrical characteristics and cost. When heat resistance is particularly necessary, a thermosetting resin such as a polyimide resin or a bismaleimide-triazine resin can also be used. As the adhesive insulating sheet 4, the above-described base wiring board 1 is used.
Alternatively, a prepreg used in the manufacture of the perforated wiring board 2 or a film-like adhesive obtained by blending a rubber such as NBR, an acrylic resin, a polyvinyl butyral resin, a phenol resin, or the like with an epoxy resin to form a film is used. Can be used. The conditions for laminating the base wiring board 1 and the perforated wiring board 2 provided with the cavity holes 3 for mounting the semiconductor element via the adhesive insulating sheet 4 provided with the cavity holes 3 and heating and pressing are as follows: The temperature is preferably in the range of 150 to 180 ° C. and the pressure is in the range of 1 to 20 MPa. Temperature 15
When the temperature is lower than 0 ° C., the adhesive strength is insufficient. When the temperature exceeds 180 ° C., the resin tends to flow out into the cavity hole. When the pressure is less than 1 MPa, the adhesive strength is insufficient, and when it exceeds 20 MPa, the insulating adhesive sheet tends to break. From this, the temperature of 160 to 17
A range of 5 ° C. and a pressure of 2 to 10 MPa is more preferable. Base wiring board 1 and cavity holes 3 for mounting semiconductor elements
When the holed wiring board 2 provided with the holes is overlapped with the adhesive insulating sheet 4 provided with the holes 3 for the cavity and heated and pressed,
These constituent materials are sandwiched between two end plates 8. As the end plate 8, the one used in laminate molding in the field of wiring boards is used as it is, for example, 0.5 to 5 mm in thickness.
Metal plate is used. As the metal plate, a stainless steel plate is preferably used from the viewpoint of corrosion resistance. Between the end plate 8 and the outermost perforated wiring board 2, a thermoplastic resin sheet 7 such as a polyethylene resin sheet is used as the cushioning material 5.
A component having a release film 6 such as a polyethylene trifluoride film on both sides is used. As the thermoplastic resin sheet, it is possible to use a thermoplastic resin sheet such as polyethylene, polypropylene, and polystyrene, preferably,
Preferred results can be obtained when the melting temperature is 80 to 130 ° C. The release film must be a heat-resistant film. It does not melt at least at the multilayering press temperature, and for example, a film of polyethylene trifluoride can be used.
【０００６】離型フィルムで挟んだこの熱可塑性樹脂シ
ートはクッションとして働き、加熱により樹脂が流動
し、キャビティー用穴３へ流れ込んでキャビティー９と
同形状になる。キャビティーと同形状になるため製品全
体に圧力が均一に掛り、また、キャビティー９が、クッ
ション材で埋め込まれているため、多層板構成で使用さ
れている接着絶縁シートからの樹脂の流れ込みも防ぐこ
とができる。プレス後は、離型フィルムによりキャビテ
ィーと同形状になったクッション材を容易に剥がし取る
ことができる。クッション材５の厚みは、キャビティー
９の厚さであるベース配線板１の上面から最外層の穴あ
き配線板２の上面までのキャビティー高さ以上とし、そ
のキャビティー高さの３倍以内とするのが好ましい。キ
ャビティー高さ未満では、キャビティー内に充填し圧力
伝達に効果がなく、３倍を超えると圧力伝達に充分であ
り、それ以上では効果が飽和してくるため経済的でなく
なる。クッション材の熱可塑性樹脂シート７の厚みは、
キャビティー高さと同程度以上とすることが好ましく、
離型フィルム６は、熱可塑性樹脂シート７より薄い方が
好ましい。The thermoplastic resin sheet sandwiched between the release films acts as a cushion, and the resin flows by heating, flows into the cavity hole 3 and has the same shape as the cavity 9. Since the cavity has the same shape as the cavity, pressure is uniformly applied to the entire product. Further, since the cavity 9 is embedded with the cushioning material, resin flows from the adhesive insulating sheet used in the multilayer structure. Can be prevented. After pressing, the cushion material having the same shape as the cavity can be easily peeled off by the release film. The thickness of the cushion material 5 is equal to or greater than the height of the cavity from the upper surface of the base wiring board 1 which is the thickness of the cavity 9 to the upper surface of the outermost perforated wiring board 2, and is not more than three times the height of the cavity. It is preferred that If the height is less than the height of the cavity, the cavity is filled with no effect on pressure transmission, and if the height is more than three times, the pressure is sufficient for transmission. The thickness of the thermoplastic resin sheet 7 of the cushion material is
It is preferable to be equal to or higher than the height of the cavity,
The release film 6 is preferably thinner than the thermoplastic resin sheet 7.
【０００７】[0007]
【実施例】（実施例）１５×１５ｍｍのキャビティー用
穴あけ加工を行った穴あき配線板（厚み０．２ｍｍ）
と、１０×１０ｍｍキャビティー用穴あけ加工を行った
穴あき配線板（厚み０．２ｍｍ）とを穴あけ加工を行っ
ていないベース配線板１の上に図１のように、それぞれ
１５×１５ｍｍと１０×１０ｍｍのキャビティー用穴を
設けた絶縁接着シート（ガラス基材エポキシ樹脂プリプ
レグ、ＧＥＡ−６７Ｎ、日立化成工業株式会社製商品
名、基材厚み０．０５ｍｍ、樹脂の溶融粘度７５０Ｐａ
・ｓ、樹脂固形分６５重量％）を介して構成した。更
に、多層構成の最外層の穴あき配線板面と鏡板との間に
厚み２５μｍの三フッ化ポリエチレンフィルムを表裏に
構成した溶融温度１０５℃、１．０ｍｍ厚みのポリエチ
レン樹脂シートを挿入し、圧力３ＭＰａ、温度１７０
℃、９０分間加熱加圧した。得られた半導体素子搭載用
多層配線板は板厚のばらつきが小さい他、キャビティー
部への樹脂流出も無く、良好であった。Example (Example) Perforated wiring board (0.2 mm thick) with 15 x 15 mm cavity perforation processing
And a perforated wiring board (thickness 0.2 mm) on which perforation processing for a 10 × 10 mm cavity was performed was placed on a base wiring board 1 on which no perforation processing was performed, as shown in FIG. × 10 mm insulating adhesive sheet provided with a cavity hole (glass base epoxy resin prepreg, GEA-67N, trade name, manufactured by Hitachi Chemical Co., Ltd., base material thickness 0.05 mm, melt viscosity of resin 750 Pa)
S, resin solids content 65% by weight). Further, a polyethylene resin sheet having a melting temperature of 105 ° C. and a 1.0 mm thickness, in which a 25 μm-thick polyethylene trifluoride film was formed on the front and back sides, was inserted between the outermost perforated wiring board surface of the multilayer structure and the end plate, and pressure was applied. 3MPa, temperature 170
The mixture was heated and pressed at 90 ° C. for 90 minutes. The obtained multilayer wiring board for mounting a semiconductor element was good in that the dispersion of the board thickness was small and the resin did not flow out to the cavity.
【０００８】（比較例）実施例と同じ多層板構成を行
い、クッション材を使用せず同条件で多層化プレスを行
った。得られた半導体素子搭載用多層配線板は板厚ばら
つきが大きい上、キャビティー部への樹脂流出も大き
く、半導体チップの実装及びワイヤボンディングが不可
能であった。(Comparative Example) The same multi-layer board construction as in the example was performed, and a multi-layer press was performed under the same conditions without using a cushion material. The obtained multilayer wiring board for mounting a semiconductor element has a large thickness variation and a large resin outflow into the cavity, so that mounting of a semiconductor chip and wire bonding were impossible.
【０００９】[0009]
【発明の効果】本発明の熱可塑性樹脂シートの両面に離
型フィルムを配したクッション材を使用することにより
キャビティー内に均一の圧力を掛けることができるほ
か、クッション材がキャビティー内に埋め込まれている
ため、接着絶縁シートから樹脂の流れ込みを防ぎ、キャ
ビティー部以外のベース配線板や穴あき配線板の配線回
路を接着絶縁シートでボイドなく埋めることができ、穴
あき配線板周辺の多層配線板の厚みを均一に成形するこ
とができる。According to the present invention, a uniform pressure can be applied in the cavity by using a cushion material having release films disposed on both sides of the thermoplastic resin sheet of the present invention, and the cushion material is embedded in the cavity. As a result, it is possible to prevent the resin from flowing from the adhesive insulating sheet and fill the wiring circuit of the base wiring board and the perforated wiring board other than the cavity part with the adhesive insulating sheet without voids. The thickness of the wiring board can be formed uniformly.
【図１】 図１は、本発明の半導体素子搭載用多層配線
板の構成を説明するための断面図である。FIG. 1 is a cross-sectional view for explaining a configuration of a multilayer wiring board for mounting a semiconductor element according to the present invention.
１．ベース配線板 ２．穴あき配線板 ３．キャビティー用穴 ４．接着絶縁シート ５．クッション材 ６．離型フィルム ７．熱可塑性樹脂シート ８．鏡板 ９．キャビティー １０．半導体素子搭載用多層配線板 1. Base wiring board 2. 2. Perforated wiring board 3. Cavity hole 4. Adhesive insulating sheet Cushion material 6. Release film 7. 7. Thermoplastic resin sheet End plate 9. Cavity 10. Multilayer wiring board for mounting semiconductor elements
フロントページの続き (72)発明者 石上 富美男 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館工場内 Ｆターム(参考） 5E346 AA02 AA12 AA16 AA60 BB01 CC08 CC41 CC60 DD02 EE02 EE06 EE07 EE09 EE14 FF45 GG01 GG28 HH11 Continued on the front page (72) Inventor Fumio Ishigami 1500 Ogawa, Odate, Shimodate-shi, Ibaraki F-term in the Shimodate Plant of Hitachi Chemical Co., Ltd. HH11
Claims (1)
ャビティー用穴を設けた穴あき配線板を、キャビティー
用穴を設けた接着絶縁シートを介して重ね、加熱加圧し
て積層する半導体素子搭載用多層配線板の製造方法にお
いて、最外層の穴あき配線板と鏡板との間に熱可塑性樹
脂シートの両面に離型フィルムを配したクッション材を
使用することを特徴とする半導体素子搭載用多層配線板
の製造方法。1. A semiconductor element in which a base wiring board and a perforated wiring board provided with a cavity hole for mounting a semiconductor element are laminated via an adhesive insulating sheet provided with a cavity hole, and heated and pressed to be laminated. A method for manufacturing a multilayer wiring board for mounting, comprising using a cushioning material in which release films are disposed on both sides of a thermoplastic resin sheet between a perforated wiring board of an outermost layer and a mirror plate, for mounting a semiconductor element. A method for manufacturing a multilayer wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10318251A JP2000150704A (en) | 1998-11-10 | 1998-11-10 | Manufacture of semiconductor element mounting multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10318251A JP2000150704A (en) | 1998-11-10 | 1998-11-10 | Manufacture of semiconductor element mounting multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000150704A true JP2000150704A (en) | 2000-05-30 |
Family
ID=18097132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10318251A Pending JP2000150704A (en) | 1998-11-10 | 1998-11-10 | Manufacture of semiconductor element mounting multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000150704A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003034798A1 (en) * | 2001-10-12 | 2003-04-24 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing circuit formed substrate |
| JP2008244178A (en) * | 2007-03-27 | 2008-10-09 | Matsushita Electric Works Ltd | Element packaging substrate and manufacturing method thereof, and infrared detector |
| JP2008244177A (en) * | 2007-03-27 | 2008-10-09 | Matsushita Electric Works Ltd | Method for manufacturing concavoconvex circuit board |
-
1998
- 1998-11-10 JP JP10318251A patent/JP2000150704A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003034798A1 (en) * | 2001-10-12 | 2003-04-24 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing circuit formed substrate |
| US7325300B2 (en) | 2001-10-12 | 2008-02-05 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing printed wiring boards |
| JP2008244178A (en) * | 2007-03-27 | 2008-10-09 | Matsushita Electric Works Ltd | Element packaging substrate and manufacturing method thereof, and infrared detector |
| JP2008244177A (en) * | 2007-03-27 | 2008-10-09 | Matsushita Electric Works Ltd | Method for manufacturing concavoconvex circuit board |
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