JP2000114178A5 - - Google Patents

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JP2000114178A5
JP2000114178A5 JP1998258868A JP25886898A JP2000114178A5 JP 2000114178 A5 JP2000114178 A5 JP 2000114178A5 JP 1998258868 A JP1998258868 A JP 1998258868A JP 25886898 A JP25886898 A JP 25886898A JP 2000114178 A5 JP2000114178 A5 JP 2000114178A5
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mask
thin film
exposed portions
compound semiconductor
sides
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JP1998258868A
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JP3826581B2 (en
JP2000114178A (en
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Priority claimed from JP25886898A external-priority patent/JP3826581B2/en
Priority to US09/369,148 priority patent/US6368733B1/en
Publication of JP2000114178A publication Critical patent/JP2000114178A/en
Publication of JP2000114178A5 publication Critical patent/JP2000114178A5/ja
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単結晶基板上に互いに0度を越える角度をなす複数の細線状の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該複数の露出部を起点としてIII−V族化合物半導体を成長させ、該マスク上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。A mask comprising an insulating thin film or a refractory metal thin film having a plurality of fine line-shaped exposed portions that form an angle exceeding 0 degrees with each other on a single crystal substrate, and a group III-V compound starting from the plurality of exposed portions A semiconductor substrate comprising a group III-V compound semiconductor epitaxial growth layer in which a semiconductor is grown and bonded and integrated on the mask. 単結晶基板上にIII−V族化合物半導体成長層からなる基底層を備え、該基底層上に互いに0度を越える角度をなす複数の細線状の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該複数の露出部を起点としてIII−V族化合物半導体をエピタキシャル成長させ、該マスク上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。An insulating thin film or a refractory metal thin film comprising a base layer made of a III-V group compound semiconductor growth layer on a single crystal substrate, and having a plurality of fine line-shaped exposed portions that form an angle exceeding 0 degrees with each other on the base layer And a group III-V compound semiconductor epitaxial growth layer formed by epitaxially growing a group III-V compound semiconductor from the plurality of exposed portions as a starting point and joining and integrating on the mask. substrate. 細線状の露出部がV字型をなすことを特徴とする請求項1または請求項2に記載の半導体基板。3. The semiconductor substrate according to claim 1, wherein the thin line-shaped exposed portion is V-shaped. 単結晶基板上に、単一閉曲線からなる複数の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、隣接した該露出部を起点として該露出部間のマスク上に成長させ該マスク上で接合一体化したIII−V族化合物半導体エピタキシャル成長層を有する半導体基板であって、該隣接露出部間のマスク部と各露出部とがなす2つの境界線が作る角度が0度を越える角度であることを特徴とする半導体基板。A single crystal substrate is provided with a mask made of an insulating thin film or a refractory metal thin film having a plurality of exposed portions having a single closed curve, and grown on the mask between the exposed portions starting from the adjacent exposed portions. A semiconductor substrate having a group III-V compound semiconductor epitaxial growth layer bonded and integrated on the mask, wherein an angle formed by two boundary lines formed by the mask portion between the adjacent exposed portions and each exposed portion is 0 degree. A semiconductor substrate characterized by an angle exceeding. 単結晶基板上にIII−V族化合物半導体成長層からなる基底層を備え、該基底層上に単一閉曲線からなる複数の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、隣接した該露出部を起点として該露出部間のマスク上に成長させ該マスク上で接合一体化したIII−V族化合物半導体エピタキシャル成長層を有する半導体基板であって、隣接露出部間のマスク部と各露出部とがなす2つの境界線が作る角度が0度を越える角度であることを特徴とする半導体基板。A base layer made of a III-V group compound semiconductor growth layer on a single crystal substrate, and a mask made of an insulator thin film or a refractory metal thin film having a plurality of exposed portions made of a single closed curve on the base layer; A semiconductor substrate having a group III-V compound semiconductor epitaxial growth layer grown on a mask between the exposed portions starting from the adjacent exposed portions and bonded and integrated on the mask, the mask portion between the adjacent exposed portions A semiconductor substrate characterized in that an angle formed by two boundary lines formed by the exposed portions and each exposed portion is an angle exceeding 0 degrees. 単結晶基板上に少なくとも1対の隣接する直線状の2辺を有し、この2辺のなす角度が250度以上358度以下である単一閉直線からなる露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該マスク上の前記2辺を三角形の2辺とするマスク部上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。An insulating thin film having a single closed straight line having at least one pair of two adjacent straight sides on a single crystal substrate and an angle formed by the two sides of 250 degrees to 358 degrees or less or a high A semiconductor substrate comprising a mask made of a melting point metal thin film and having a group III-V compound semiconductor epitaxial growth layer bonded and integrated on a mask portion having the two sides on the mask as two sides of a triangle . 単結晶基板上にIII−V族化合物半導体成長層からなる基底層を備え、該基底層上に少なくとも1対の隣接する直線状の2辺を有し、この2辺のなす内角が250度以上、358度以下である単一閉曲線からなる露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該マスク上の前記2辺を三角形の2辺とするマスク部上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。A base layer made of a III-V compound semiconductor growth layer is provided on a single crystal substrate, and has at least one pair of two adjacent straight sides on the base layer, and an internal angle formed by these two sides is 250 degrees or more. And a mask made of an insulating thin film or a refractory metal thin film having an exposed portion made of a single closed curve of 358 degrees or less, and joined together on the mask portion where the two sides on the mask are two sides of a triangle. A semiconductor substrate comprising a group III-V compound semiconductor epitaxial growth layer. 単結晶基板上に、少なくとも一対の2つの直角三角形よりなる露出部を有し、この2つの直角三角形は互いに線対称に配置され、この2つの直角三角形の内の1つの直角三角形の直交する2辺は他の直角三角形の直交する2辺と互いに一つの直線上に有るかまたは並行である様に配置され、この一対の2つの直角三角形の2つの斜辺のなす内角が250度以上、358度以下である絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該マスク上の前記2辺を三角形の2辺とするマスク部上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。The single crystal substrate has an exposed portion composed of at least a pair of two right triangles, the two right triangles are arranged in line symmetry with each other, and two orthogonal triangles of one right triangle are orthogonal to each other. The sides are arranged so that they are on one straight line or parallel to two orthogonal sides of another right triangle, and the internal angle formed by the two hypotenuses of the pair of two right triangles is 250 degrees or more, 358 degrees A group III-V compound semiconductor epitaxial growth layer comprising a mask made of an insulator thin film or a refractory metal thin film and having the two sides on the mask joined and integrated on a mask portion having two sides of a triangle, A semiconductor substrate comprising: 単結晶基板上に、III−V族化合物半導体成長層からなる基底層を備え、該基底層上に少なくとも一対の2つの直角三角形よりなる露出部を有し、この2つの直角三角形は互いに線対称に配置され、この2つの直角三角形の内の1つの直角三角形の直交する2辺は他の直角三角形の直交する2辺と互いに一つの直線上に有るかまたは並行である様に配置され、この一対の2つの直角三角形の2つの斜辺のなす内角が250度以上、358度以下である絶縁物薄膜または高融点金属薄膜からなるマスクを具備し、該マスク上の前記2辺を三角形の2辺とするマスク部上で接合一体化させたIII−V族化合物半導体エピタキシャル成長層を有することを特徴とする半導体基板。A base layer made of a group III-V compound semiconductor growth layer is provided on a single crystal substrate, and has an exposed portion made of at least a pair of two right triangles on the base layer, and the two right triangles are line symmetrical with each other. The two orthogonal sides of one right triangle of the two right triangles are arranged so that they are on one straight line or parallel to the two orthogonal sides of the other right triangle. A mask made of an insulating thin film or a refractory metal thin film whose inner angle formed by two hypotenuses of a pair of two right triangles is 250 degrees or more and 358 degrees or less, and the two sides on the mask are two sides of the triangle A semiconductor substrate comprising a group III-V compound semiconductor epitaxial growth layer bonded and integrated on the mask portion. 単結晶基板がサファイア基板であることを特徴とする請求項1から請求項9に記載の半導体基板。The semiconductor substrate according to claim 1, wherein the single crystal substrate is a sapphire substrate. 単結晶基板がシリコン基板であることを特徴とする請求項1から請求項9に記載の半導体基板。The semiconductor substrate according to claim 1, wherein the single crystal substrate is a silicon substrate. 基底層及び基底層上のIII−V族化合物半導体エピタキシャル成長層がIII族窒化物結晶であることを特徴とする請求項1から請求項9に記載の半導体基板。10. The semiconductor substrate according to claim 1, wherein the base layer and the III-V compound semiconductor epitaxial growth layer on the base layer are group III nitride crystals. 単結晶基板上に互いに0度を越える角度をなす複数の細線状の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを形成し、該複数の露出部を起点としてIII−V族化合物半導体を成長させ、該マスク上で接合一体化させることを特徴とするIII−V族化合物半導体エピタキシャル成長層を有する半導体基板の製造方法。A mask made of an insulating thin film or a refractory metal thin film having a plurality of fine-line-shaped exposed portions that form an angle exceeding 0 degrees with each other is formed on a single crystal substrate, and the group III-V compound starts from the plurality of exposed portions A method for producing a semiconductor substrate having a III-V compound semiconductor epitaxial growth layer, wherein a semiconductor is grown and bonded and integrated on the mask. 単結晶基板上にIII−V族化合物半導体成長層からなる基底層を形成し、該基底層上に互いに0度を越える角度をなす複数の細線状の露出部を有する絶縁物薄膜または高融点金属薄膜からなるマスクを形成し、該複数の露出部を起点としてIII−V族化合物半導体をエピタキシャル成長させ、該マスク上で接合一体化させることを特徴とするIII−V族化合物半導体エピタキシャル成長層を有する半導体基板の製造方法。An insulating thin film or a refractory metal having a base layer made of a group III-V compound semiconductor growth layer on a single crystal substrate, and having a plurality of fine line-shaped exposed portions that form an angle exceeding 0 degrees with each other on the base layer A semiconductor having a group III-V compound semiconductor epitaxial growth layer, characterized in that a mask made of a thin film is formed, a group III-V compound semiconductor is epitaxially grown from the plurality of exposed portions as a starting point, and a junction is integrated on the mask. A method for manufacturing a substrate.
JP25886898A 1998-08-06 1998-09-11 Semiconductor substrate and method for manufacturing semiconductor substrate Expired - Fee Related JP3826581B2 (en)

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JP25886898A JP3826581B2 (en) 1998-08-06 1998-09-11 Semiconductor substrate and method for manufacturing semiconductor substrate
US09/369,148 US6368733B1 (en) 1998-08-06 1999-08-05 ELO semiconductor substrate

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JP10-223281 1998-08-06
JP22328198 1998-08-06
JP25886898A JP3826581B2 (en) 1998-08-06 1998-09-11 Semiconductor substrate and method for manufacturing semiconductor substrate

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JP2000114178A JP2000114178A (en) 2000-04-21
JP2000114178A5 true JP2000114178A5 (en) 2005-07-07
JP3826581B2 JP3826581B2 (en) 2006-09-27

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US6821805B1 (en) 1999-10-06 2004-11-23 Matsushita Electric Industrial Co., Ltd. Semiconductor device, semiconductor substrate, and manufacture method
JP4396816B2 (en) 2003-10-17 2010-01-13 日立電線株式会社 Group III nitride semiconductor substrate and manufacturing method thereof

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