JP2000092695A - Rush current suppression circuit and element - Google Patents
Rush current suppression circuit and elementInfo
- Publication number
- JP2000092695A JP2000092695A JP10257725A JP25772598A JP2000092695A JP 2000092695 A JP2000092695 A JP 2000092695A JP 10257725 A JP10257725 A JP 10257725A JP 25772598 A JP25772598 A JP 25772598A JP 2000092695 A JP2000092695 A JP 2000092695A
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- thermistor
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、電源投入時に生
じる突入電流を抑制する回路および素子に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit and an element for suppressing an inrush current generated when power is turned on.
【0002】[0002]
【従来の技術】商用(AC)電源を入力し、整流平滑す
るコンデンサインプット型の整流回路の例を図5に示
す。このような回路においては、電源投入時(スイッチ
SW1投入時)には、通常平滑用コンデンサC1に電荷
が蓄積されていないため、この平滑用コンデンサC1の
インピーダンスはほぼ0Ωであり、電源ラインには、ス
イッチSW1およびヒューズの抵抗(合わせて通常数十
mΩ)のみで規定される大電流(突入電流)が流れる。
AC100Vラインの場合、突入電流は通常数十〜数百
Aに達し、ヒューズの溶断、スイッチSW1の接点の焼
損などの不具合が生じる。また、突入電流によってフリ
ッカ雑音が生じ、電源ラインに不要なノイズが重畳され
ることになる。2. Description of the Related Art FIG. 5 shows an example of a capacitor input type rectifier circuit which receives a commercial (AC) power supply and rectifies and smoothes it. In such a circuit, when the power is turned on (when the switch SW1 is turned on), normally, no charge is accumulated in the smoothing capacitor C1, so that the impedance of the smoothing capacitor C1 is almost 0Ω, and A large current (rush current) defined only by the resistance of the switch SW1 and the fuse (generally, several tens mΩ in total) flows.
In the case of an AC 100 V line, the inrush current usually reaches several tens to several hundreds of amps, causing problems such as melting of a fuse and burning of the contact of the switch SW1. Also, flicker noise occurs due to the rush current, and unnecessary noise is superimposed on the power supply line.
【0003】上記突入電流の問題を解消するために、図
6に示すように、平滑コンデンサC1に直列に電力用負
特性サーミスタ(以下、パワーサーミスタという。)R
t1を挿入して、突入電流を抑制する方法が一般に用い
られている。このパワーサーミスタの抵抗温度特性は、
常温時には約10Ωの抵抗値を示し、通常運転時には自
己発熱により約120℃に発熱し、1Ω以下の抵抗値と
なる。このため、電源投入時には、約10Ωの抵抗値に
より突入電流が抑制され、通常運転時にはパワーサーミ
スタによる電力損失が抑えられる。In order to solve the problem of the inrush current, as shown in FIG. 6, a power negative characteristic thermistor (hereinafter referred to as a power thermistor) R is connected in series with a smoothing capacitor C1.
A method of inserting t1 to suppress the inrush current is generally used. The resistance temperature characteristic of this power thermistor is
At room temperature, it shows a resistance value of about 10Ω, and during normal operation, it generates heat to about 120 ° C due to self-heating and has a resistance value of 1Ω or less. Therefore, when the power is turned on, the inrush current is suppressed by the resistance value of about 10Ω, and the power loss due to the power thermistor is suppressed during the normal operation.
【0004】[0004]
【発明が解決しようとする課題】しかし、図6に示した
ようなパワーサーミスタを用いた突入電流抑制回路にお
いては、電源が遮断されてから短時間の後に再投入され
た場合や、電源が短時間に投入/遮断が繰り返されるよ
うな場合には、次に述べるように不都合が生じる。However, in the rush current suppressing circuit using the power thermistor as shown in FIG. 6, when the power is turned on again after a short time after the power is cut off, or when the power is In the case where the switching on / off is repeated at the time, a disadvantage occurs as described below.
【0005】図7は図6に示した各部の状態を示す波形
図であり、図中の破線はパワーサーミスタが無い場合の
突入電流を示している。図7に示すように、パワーサー
ミスタRt1の抵抗値が高い(a) で電源を投入すれば、
突入電流は充分に抑制される。しかし(b) で電源を遮断
し、例えば5秒程度の短時間経過後、(c) でスイッチS
W1を再投入した場合、パワーサーミスタRt1の抵抗
値が十分に増大していなくて、通常運転時の抵抗値との
差がΔRと大きい状態で電源が再投入されることになる
ため、パワーサーミスタによる突入電流抑制効果がほと
んどなくなり、過大な突入電流が流れる。また、(c) 〜
(e) に示すように、電源を短時間に断続した場合にもR
t1の抵抗値が充分に回復しない状態で使用することに
なるため、その都度突入電流が流れる。FIG. 7 is a waveform diagram showing the state of each part shown in FIG. 6, and the broken lines in the figure show the inrush current when there is no power thermistor. As shown in FIG. 7, if the power is turned on at (a) where the resistance value of the power thermistor Rt1 is high,
The inrush current is sufficiently suppressed. However, the power is shut off in (b), and after a short time, for example, about 5 seconds, the switch S is switched in (c).
When W1 is turned on again, the power is turned on again in a state where the resistance value of the power thermistor Rt1 is not sufficiently increased and the difference between the resistance value during normal operation and ΔR is as large as ΔR. The rush current suppressing effect is almost eliminated, and an excessive rush current flows. Also, (c) ~
As shown in (e), even when the power supply is
Since it is used in a state where the resistance value of t1 is not sufficiently recovered, an inrush current flows each time.
【0006】一方、突入電流抑制用の素子としてパワー
サーミスタ以外に、図8に示すように抵抗器とその抵抗
器を流れる電流をバイパスするリレー接点とによって構
成したものもあった。図8においてL1は外部制御回路
により駆動されるリレーの駆動コイル、P1はその接点
である。この種の突入電流抑制回路としては特開平9−
9497号公報が挙げられる。ところが、このように定
常状態において、突入電流抑制用の抵抗器の両端をリレ
ー接点でバイパスするようにした回路においては、電源
が遮断されてから短時間経過後の再投入に対してもリレ
ーを正しく動作させるために、多数の回路素子を用いた
複雑な外部制御回路を設けなければならなかった。On the other hand, in addition to a power thermistor, there has been a device for suppressing an inrush current which comprises a resistor and a relay contact for bypassing a current flowing through the resistor, as shown in FIG. In FIG. 8, L1 is a drive coil of a relay driven by an external control circuit, and P1 is a contact point thereof. As this type of inrush current suppressing circuit, Japanese Unexamined Patent Publication No.
No. 9497. However, in such a circuit in which the both ends of the resistor for suppressing the inrush current are bypassed by the relay contact in the steady state, even if the power is cut off and the power is turned on shortly after the power is turned off, the relay is turned on. In order to operate properly, a complicated external control circuit using many circuit elements had to be provided.
【0007】この発明の目的は、多数の部品を必要とせ
ずに、電源が遮断されてから短時間の後に再投入される
場合や、短時間周期で電源の投入/遮断が繰り返される
場合でも突入電流を確実に抑制するようにした突入電流
抑制回路および素子を提供することにある。An object of the present invention is to eliminate the need for a large number of components, and to provide an inrush even when the power is turned on and then turned on shortly after the power is turned off, or when the power is repeatedly turned on and off in a short cycle. It is an object of the present invention to provide an inrush current suppression circuit and an element that reliably suppress current.
【0008】[0008]
【課題を解決するための手段】この発明の突入電流抑制
回路は、電源ライン間に、リレーの駆動コイルと負特性
サーミスタの直列回路を接続し、前記負特性サーミスタ
に熱的に結合した抵抗器と前記リレーの第1接点の並列
回路を前記電源ラインの一方に直列に接続し、前記リレ
ーの第2接点を前記負特性サーミスタに並列に接続する
とともに、前記抵抗器に定常電流が通電されている状態
で前記リレーの第1・第2の接点が導通状態となるよう
に前記負特性サーミスタの特性を定める。According to the present invention, there is provided an inrush current suppressing circuit comprising a resistor connected between a power supply line and a series circuit of a driving coil for a relay and a negative characteristic thermistor, and thermally connected to the negative characteristic thermistor. And a parallel circuit of a first contact of the relay is connected in series to one of the power supply lines, and a second contact of the relay is connected in parallel to the negative characteristic thermistor, and a steady current is supplied to the resistor. The characteristics of the negative-characteristic thermistor are determined such that the first and second contacts of the relay are in a conductive state while the relay is in the ON state.
【0009】この構成により、電源投入時に抵抗器を介
して負荷に電流が流れると共に、リレーの駆動コイルと
負特性サーミスタとの直列回路に電流が流れ、その後抵
抗器の発熱により、これと熱的に結合している負特性サ
ーミスタの抵抗値が低下し、リレーの第1・第2の接点
がそれぞれ導通する。これにより第1接点が抵抗器をバ
イパスして、抵抗器による電力損失および発熱を防止す
る。その後、抵抗器の温度が低下するに伴い、負特性サ
ーミスタの抵抗値が上昇する。このとき第2の接点が導
通状態であるため、リレーの駆動コイルへの通電状態は
保たれる。その後、電源が遮断されるとリレーの第1・
第2の接点が直ちにオフし、短時間の後に再投入されて
も、負特性サーミスタの抵抗値はすでに高くなっている
ため、抵抗器を介して負荷に電流が通電されて、再び突
入電流が抑えれることになる。With this configuration, when the power is turned on, a current flows to the load via the resistor, and a current also flows to a series circuit of the drive coil of the relay and the negative characteristic thermistor. The resistance value of the negative temperature coefficient thermistor coupled to the relay decreases, and the first and second contacts of the relay conduct. This allows the first contact to bypass the resistor and prevent power loss and heat generation by the resistor. Thereafter, as the temperature of the resistor decreases, the resistance value of the negative characteristic thermistor increases. At this time, since the second contact is in the conductive state, the energized state to the drive coil of the relay is maintained. Then, when the power is cut off, the first
Even if the second contact is turned off immediately and then turned on again after a short time, the resistance of the negative temperature coefficient thermistor is already high, so that a current flows through the load through the resistor, and the rush current again occurs. Will be suppressed.
【0010】また、この発明の突入電流抑制回路は上記
抵抗器を負特性サーミスタとする。この構造によれば、
電源投入後からの上記負特性サーミスタの抵抗値変化が
比較的緩慢に変化し、抵抗値が十分に低下した状態でリ
レーの第1接点が導通するようにできるため、リレーの
第1接点の導通時の突入電流はほとんどなくなる。In the rush current suppressing circuit according to the present invention, the resistor is a negative characteristic thermistor. According to this structure,
Since the change in the resistance value of the negative characteristic thermistor after the power is turned on changes relatively slowly and the first contact point of the relay can be turned on in a state where the resistance value is sufficiently reduced, the first contact point of the relay is turned on. There is almost no inrush current.
【0011】また、この発明の突入電流抑制素子は、上
記構成の回路を1つのケース内に収納して、電源ライン
に接続する端子を設ける。この構成によれば、少ない部
品点数で回路を構成するため、突入電流抑制素子全体を
非常に小型に構成することができ、1つの素子として回
路基板上に実装することが可能となる。Further, the inrush current suppressing element of the present invention accommodates the circuit having the above configuration in one case and provides a terminal connected to a power supply line. According to this configuration, since the circuit is configured with a small number of components, the entire inrush current suppressing element can be configured very small, and can be mounted on the circuit board as one element.
【0012】[0012]
【発明の実施の形態】この発明の第1の実施形態に係る
突入電流抑制回路および突入電流抑制素子の構成を図1
〜図3を参照して説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a configuration of an inrush current suppressing circuit and an inrush current suppressing element according to a first embodiment of the present invention.
This will be described with reference to FIG.
【0013】図1は突入電流抑制回路を含む電源回路部
分の回路図である。図1においてAC100Vは商用電
源であり、電源スイッチSW1およびヒューズを介して
ダイオードブリッジDBの交流入力端子に入力し、その
直流出力端子間に平滑コンデンサC1を接続して整流平
滑回路部分を構成している。ダイオードブリッジDBと
平滑コンデンサC1との間の電源ラインには直列にパワ
ーサーミスタRt1を接続している。また、この電源ラ
イン間には2接点リレーの駆動コイルL1と負特性サー
ミスタRt2の直列回路を接続している。このリレーの
駆動コイルL1にはバックラッシュカレント吸収用ダイ
オードD1を接続している。リレーの第1接点P1はパ
ワーサーミスタRt1に並列に接続し、第2接点P2は
負特性サーミスタRt2に対して並列接続している。ま
た、負特性サーミスタRt2はパワーサーミスタRt1
に近接配置することによって両者を熱的に結合してい
る。FIG. 1 is a circuit diagram of a power supply circuit portion including an inrush current suppression circuit. In FIG. 1, AC 100 V is a commercial power supply, which is input to an AC input terminal of a diode bridge DB via a power switch SW1 and a fuse, and a smoothing capacitor C1 is connected between its DC output terminals to form a rectifying and smoothing circuit portion. I have. A power thermistor Rt1 is connected in series to a power supply line between the diode bridge DB and the smoothing capacitor C1. A series circuit of a drive coil L1 of a two-contact relay and a negative characteristic thermistor Rt2 is connected between the power supply lines. A backlash current absorbing diode D1 is connected to the drive coil L1 of this relay. The first contact P1 of the relay is connected in parallel to the power thermistor Rt1, and the second contact P2 is connected in parallel to the negative characteristic thermistor Rt2. The negative characteristic thermistor Rt2 is a power thermistor Rt1.
Are thermally coupled to each other by disposing them in close proximity to each other.
【0014】図3は負特性サーミスタRt2の抵抗温度
特性を示す図である。このように、負特性サーミスタで
あるので、温度の上昇に伴い抵抗値が低下する。この例
では室温25℃で抵抗値(Ra)は5kΩであり、70
℃では1.85kΩである。FIG. 3 is a diagram showing the resistance-temperature characteristics of the negative characteristic thermistor Rt2. As described above, since the thermistor is a negative characteristic thermistor, the resistance value decreases as the temperature increases. In this example, the resistance (Ra) is 5 kΩ at room temperature 25 ° C.
It is 1.85 kΩ at ° C.
【0015】図1に示した回路の動作は次の通りであ
る。先ず、入力電源電圧AC100Vがダイオードブリ
ッジDBにより整流されてほぼ140Vの直流電圧が発
生する。リレーとしてはDC100V駆動のものを使用
し、リレーの駆動コイルL1の抵抗値を5kΩとする
と、負特性サーミスタには室温25℃での抵抗値(R
a)が5kΩのものを使用する。この時の常温時のリレ
ーの駆動コイルにはV1=140・(5kΩ/(5kΩ
+5kΩ))=70〔V〕の電圧がかかる。The operation of the circuit shown in FIG. 1 is as follows. First, the input power supply voltage AC100V is rectified by the diode bridge DB to generate a DC voltage of approximately 140V. Assuming that a relay having a drive voltage of 100 V is used as the relay and the resistance of the driving coil L1 of the relay is 5 kΩ, the resistance (R
a) of 5 kΩ is used. At this time, V1 = 140 · (5 kΩ / (5 kΩ)
+5 kΩ)) = 70 [V] is applied.
【0016】この状態では、リレーの駆動コイルに対し
て動作電流不足のため、リレー接点P1,P2は開放状
態のままである。In this state, the relay contacts P1 and P2 remain open due to insufficient operating current for the drive coil of the relay.
【0017】その後、パワーサーミスタRt1が発熱し
て、負特性サーミスタRt2の温度が上昇すると、その
抵抗値は低下する。負特性サーミスタRt2の温度が例
えば70℃となった時、その抵抗値は1.85kΩとな
る。この時、リレーの駆動コイルL1にはV2=140
・(5kΩ/(5kΩ+1.85kΩ))≒100
〔V〕の電圧がかかる。これによりリレーが駆動し、接
点P1,P2がともに導通する。Thereafter, when the power thermistor Rt1 generates heat and the temperature of the negative characteristic thermistor Rt2 rises, its resistance value decreases. When the temperature of the negative characteristic thermistor Rt2 becomes, for example, 70 ° C., the resistance value becomes 1.85 kΩ. At this time, V2 = 140 is applied to the driving coil L1 of the relay.
・ (5kΩ / (5kΩ + 1.85kΩ)) ≒ 100
A voltage of [V] is applied. As a result, the relay is driven, and both the contacts P1 and P2 conduct.
【0018】図2は、図1に示した回路各部の状態変化
を示す波形図である。以上に述べた動作を図2を参照し
て説明すると、(a) の時点でパワーサーミスタの自己発
熱によりパワーサーミスタRt1の温度が上昇し、(抵
抗値が下がり)これと熱的に結合された負特性サーミス
タRt2の温度が上昇し、(抵抗値が下がり)、或る抵
抗値(1.85kΩ)となった時リレーは動作する。こ
の時間ΔTは、負特性サーミスタRt2の室温25℃で
の抵抗値Raと抵抗温度特性のB定数の値や、パワーサ
ーミスタRt1と負特性サーミスタRt2の熱結合条件
によって種々設定可能であるが、通常は数秒〜十数秒程
度とするのが望ましい。FIG. 2 is a waveform diagram showing a state change of each part of the circuit shown in FIG. The operation described above will be described with reference to FIG. 2. At the time (a), the temperature of the power thermistor Rt1 rises due to the self-heating of the power thermistor Rt1 (the resistance value decreases) and is thermally coupled thereto. When the temperature of the negative characteristic thermistor Rt2 rises (resistance decreases) and reaches a certain resistance value (1.85 kΩ), the relay operates. The time ΔT can be variously set depending on the resistance value Ra of the negative temperature coefficient thermistor Rt2 at room temperature 25 ° C. and the value of the B constant of the resistance temperature characteristic and the thermal coupling condition of the power thermistor Rt1 and the negative temperature coefficient thermistor Rt2. Is desirably about several seconds to several tens of seconds.
【0019】図2において、(b) でスイッチSW1を一
旦オフした後、直ちに(c) で再投入した場合、パワーサ
ーミスタRt1の抵抗値は、この時点ですでに十分高く
なっているため、(a) での投入時と同様の突入電流抑制
効果を示す。因みに図7に示した従来の突入電流抑制回
路では、パワーサーミスタの温度が動作状態(高温)か
らほとんど低下していない間に再投入されることになる
ため、突入電流抑制効果が非常に小さい。また、(c) 〜
(e) に示すように、断続的な電源投入/遮断動作に対し
ても、従来のパワーサーミスタのみよる場合では図7に
示したようにその都度突入電流が流れるのに対し、本願
発明によれば、図2に示すように突入電流は確実に抑制
される。In FIG. 2, if the switch SW1 is once turned off in (b) and immediately turned on again in (c), the resistance value of the power thermistor Rt1 is already sufficiently high at this point, and The inrush current suppression effect is the same as that at the time of injection in a). Incidentally, in the conventional rush current suppressing circuit shown in FIG. 7, since the power thermistor is turned on again while the temperature of the power thermistor hardly decreases from the operating state (high temperature), the effect of suppressing the rush current is very small. Also, (c) ~
As shown in FIG. 7 (e), in the case of the intermittent power-on / shut-off operation, the rush current flows each time as shown in FIG. For example, as shown in FIG. 2, the rush current is reliably suppressed.
【0020】また、ダイオードD1をリレーの駆動コイ
ルL1に接続しているため、スイッチSW1がオフして
駆動コイルL1への通電電流が遮断された時、ダイオー
ドD1と駆動コイルL1による閉ループに還流電流が流
れて、バックラッシュカレントが吸収される。そのため
サージが生じることはない。Further, since the diode D1 is connected to the drive coil L1 of the relay, when the switch SW1 is turned off and the current flowing through the drive coil L1 is cut off, the return current flows into a closed loop by the diode D1 and the drive coil L1. Flows to absorb the backlash current. Therefore, no surge occurs.
【0021】なお、上述の例では、定格電圧としてDC
100Vで駆動するリレーを用いたが、実際には定格電
圧より低い、たとえば90Vでも導通を開始する。した
がってリレー接点が導通するしきい値電圧が所定値とな
るようにリレーを選定し、回路定数を定めればよい。In the above example, the rated voltage is DC
Although a relay driven at 100 V was used, conduction actually starts at a voltage lower than the rated voltage, for example, 90 V. Therefore, the relay may be selected such that the threshold voltage at which the relay contact becomes conductive becomes a predetermined value, and the circuit constant may be determined.
【0022】図1において、パワーサーミスタRt1、
負特性サーミスタRt2、2接点リレーおよびダイオー
ドD1部分が突入電流抑制素子を構成している。この例
では、電源ライン間に挿入する形で使用する4端子型の
素子としている。2つの電源ラインのコールド側(接地
電位側)の2つの端子は共通であるので、これを1端子
にして、3端子型の突入電流抑制素子として構成するこ
ともできる。In FIG. 1, a power thermistor Rt1,
The negative characteristic thermistor Rt2, the two-contact relay and the diode D1 constitute an inrush current suppressing element. In this example, a four-terminal element is used that is inserted between power supply lines. Since the two terminals on the cold side (ground potential side) of the two power supply lines are common, they can be used as one terminal to constitute a three-terminal type rush current suppressing element.
【0023】次に、第2の実施形態に係る突入電流抑制
回路の構成を図4に示す。図1に示した回路と異なり、
この例では、突入電流抑制用の抵抗として通常の電力用
抵抗器R1を用いている。このように、温度依存性のほ
とんどない通常の抵抗器を用いても、その抵抗器R1に
通電される期間は、電源が投入されてからリレー接点P
1が導通するまでの期間であるので電力損失を小さく抑
えることができる。Next, FIG. 4 shows a configuration of an inrush current suppressing circuit according to a second embodiment. Unlike the circuit shown in FIG.
In this example, a normal power resistor R1 is used as a resistor for suppressing inrush current. As described above, even if a normal resistor having almost no temperature dependency is used, the relay contact P
Since this is a period until 1 becomes conductive, power loss can be suppressed to a small value.
【0024】なお、以上に示した実施形態ではコンデン
サインプット型の整流平滑回路における平滑コンデンサ
への突入電流を抑制する回路を例としたが、本願発明は
ハロゲンランプなどの発熱抵抗体への突入電流を抑制す
る回路に対しても同様に適用できる。In the embodiment described above, a circuit for suppressing the rush current to the smoothing capacitor in the rectifying / smoothing circuit of the capacitor input type is described as an example. However, the present invention relates to the rush current to the heating resistor such as a halogen lamp. Can be similarly applied to a circuit that suppresses
【0025】[0025]
【発明の効果】請求項1に係る発明によれば、電源投入
時の突入電流の抑制が終了する時点でリレー接点が導通
して負特性サーミスタへの通電が絶たれるため、負特性
サーミスタの抵抗値は速やかに増大する。そのため、一
旦電源が遮断されてから短時間の後に再投入されても、
負特性サーミスタの抵抗値はすでに高くなっているた
め、抵抗器を介して負荷に電流が通電されることにな
り、突入電流が確実に抑えれる。According to the first aspect of the present invention, when the suppression of the inrush current at the time of turning on the power supply ends, the relay contact is turned on and the current to the negative characteristic thermistor is cut off. The value increases rapidly. Therefore, even if the power is once turned off and then turned on again after a short time,
Since the resistance value of the negative characteristic thermistor has already been increased, a current flows through the load via the resistor, and the inrush current is reliably suppressed.
【0026】請求項2に係る発明によれば、電源投入後
からの負特性サーミスタの抵抗値変化が比較的緩慢に変
化し、抵抗値が十分に低下した状態でリレーの第1接点
が導通するようにできるため、突入電流を制限する負特
性サーミスタによる電力損失および発熱を有効に抑える
ことができ、しかもリレーの第1接点の導通時の突入電
流も殆どなくなる。According to the second aspect of the present invention, the change in the resistance value of the negative characteristic thermistor after the power is turned on changes relatively slowly, and the first contact of the relay conducts in a state where the resistance value is sufficiently reduced. As a result, power loss and heat generation by the negative-characteristic thermistor that limits the inrush current can be effectively suppressed, and the inrush current when the first contact of the relay is turned on is almost eliminated.
【0027】請求項3に係る発明によれば、少ない部品
点数で回路を構成するため、全体に非常に小型の突入電
流抑制素子を構成することができ、1つの素子として回
路基板上に容易に実装できるようになる。According to the third aspect of the present invention, since a circuit is configured with a small number of components, a very small inrush current suppressing element can be configured as a whole, and the element can be easily formed on a circuit board as one element. Be able to implement.
【図1】第1の実施形態に係る突入電流抑制回路の回路
図FIG. 1 is a circuit diagram of an inrush current suppression circuit according to a first embodiment.
【図2】図1各部の動作状態を示す波形図FIG. 2 is a waveform diagram showing an operation state of each unit in FIG.
【図3】負特性サーミスタの抵抗温度特性の例を示す図FIG. 3 is a diagram showing an example of resistance temperature characteristics of a negative temperature coefficient thermistor;
【図4】第2の実施形態に係る突入電流抑制回路の構成
を示す図FIG. 4 is a diagram illustrating a configuration of an inrush current suppression circuit according to a second embodiment;
【図5】一般的なコンデンサインプット型整流回路の構
成を示す図FIG. 5 is a diagram showing a configuration of a general capacitor input type rectifier circuit.
【図6】従来の突入電流抑制回路を備えた整流回路の構
成を示す図FIG. 6 is a diagram showing a configuration of a conventional rectifier circuit including an inrush current suppression circuit.
【図7】同回路の動作状態を示す波形図FIG. 7 is a waveform chart showing an operation state of the circuit.
【図8】従来の突入電流抑制回路を備えた他の整流回路
の構成を示す図FIG. 8 is a diagram showing a configuration of another rectifier circuit including a conventional inrush current suppression circuit.
DB−ダイオードブリッジ C1−平滑コンデンサ Rt1−パワーサーミスタ(負特性サーミスタ) Rt2−負特性サーミスタ L1−リレーの駆動コイル P1−リレーの第1接点 P2−リレーの第2接点 D1−ダイオード DB-diode bridge C1-smoothing capacitor Rt1-power thermistor (negative characteristic thermistor) Rt2-negative characteristic thermistor L1-relay driving coil P1-relay first contact P2-relay second contact D1-diode
Claims (3)
負特性サーミスタの直列回路を接続し、前記負特性サー
ミスタに熱的に結合した抵抗器と前記リレーの第1接点
の並列回路を前記電源ラインの一方に直列に接続し、前
記リレーの第2接点を前記負特性サーミスタに並列に接
続するとともに、前記抵抗器に定常電流が通電されてい
る状態で前記リレーの第1・第2の接点が導通状態とな
るように前記負特性サーミスタの特性を定めたことを特
徴とする突入電流抑制回路。1. A series circuit of a drive coil of a relay and a negative temperature coefficient thermistor is connected between power supply lines, and a parallel circuit of a resistor thermally coupled to the negative temperature coefficient thermistor and a first contact of the relay is connected to the power supply. A second contact of the relay connected in series to one of the lines, a second contact of the relay connected in parallel to the negative characteristic thermistor, and a first and second contact of the relay in a state where a steady current is supplied to the resistor. Wherein the characteristic of the negative characteristic thermistor is determined such that the element is in a conductive state.
求項1に記載の突入電流抑制回路。2. The inrush current suppression circuit according to claim 1, wherein said resistor is a thermistor having a negative characteristic.
ケース内に収納し、前記電源ラインに接続する端子を設
けた突入電流抑制素子。3. An inrush current suppressing element, wherein the circuit according to claim 1 or 2 is housed in one case and provided with a terminal connected to the power supply line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10257725A JP2000092695A (en) | 1998-09-11 | 1998-09-11 | Rush current suppression circuit and element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10257725A JP2000092695A (en) | 1998-09-11 | 1998-09-11 | Rush current suppression circuit and element |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2000092695A true JP2000092695A (en) | 2000-03-31 |
Family
ID=17310240
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10257725A Pending JP2000092695A (en) | 1998-09-11 | 1998-09-11 | Rush current suppression circuit and element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2000092695A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100372056B1 (en) * | 2000-12-18 | 2003-02-15 | 최 윤 식 | Controlling method for a inrush current of air-conditioner compressor and thereof a controller |
JP2014030289A (en) * | 2012-07-31 | 2014-02-13 | Tabuchi Electric Co Ltd | Power storage charging device |
WO2016165133A1 (en) * | 2015-04-17 | 2016-10-20 | Astec International Limited | Power factor correction stage control during start-up for efficient use of negative temperature coefficient thermistor |
JP2018148511A (en) * | 2017-03-09 | 2018-09-20 | オムロン株式会社 | Rush current control circuit and power supply circuit |
CN113571389A (en) * | 2021-09-23 | 2021-10-29 | 武汉精熔潮电气科技有限公司 | Passive short circuit detection self-triggering device |
-
1998
- 1998-09-11 JP JP10257725A patent/JP2000092695A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100372056B1 (en) * | 2000-12-18 | 2003-02-15 | 최 윤 식 | Controlling method for a inrush current of air-conditioner compressor and thereof a controller |
JP2014030289A (en) * | 2012-07-31 | 2014-02-13 | Tabuchi Electric Co Ltd | Power storage charging device |
WO2016165133A1 (en) * | 2015-04-17 | 2016-10-20 | Astec International Limited | Power factor correction stage control during start-up for efficient use of negative temperature coefficient thermistor |
US10340787B2 (en) | 2015-04-17 | 2019-07-02 | Astec International Limited | Power factor correction stage control during start-up for efficient use of a negative temperature coefficient thermistor |
JP2018148511A (en) * | 2017-03-09 | 2018-09-20 | オムロン株式会社 | Rush current control circuit and power supply circuit |
CN113571389A (en) * | 2021-09-23 | 2021-10-29 | 武汉精熔潮电气科技有限公司 | Passive short circuit detection self-triggering device |
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