IT201700089965A1 - Procedimento di produzione di componenti elettronici e corrispondente componente elettronico - Google Patents
Procedimento di produzione di componenti elettronici e corrispondente componente elettronicoInfo
- Publication number
- IT201700089965A1 IT201700089965A1 IT102017000089965A IT201700089965A IT201700089965A1 IT 201700089965 A1 IT201700089965 A1 IT 201700089965A1 IT 102017000089965 A IT102017000089965 A IT 102017000089965A IT 201700089965 A IT201700089965 A IT 201700089965A IT 201700089965 A1 IT201700089965 A1 IT 201700089965A1
- Authority
- IT
- Italy
- Prior art keywords
- production
- electronic component
- electronic components
- corresponding electronic
- components
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
- H01L21/4889—Connection or disconnection of other leads to or from wire-like parts, e.g. wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85455—Nickel (Ni) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT102017000089965A IT201700089965A1 (it) | 2017-08-03 | 2017-08-03 | Procedimento di produzione di componenti elettronici e corrispondente componente elettronico |
US16/031,998 US11018078B2 (en) | 2017-08-03 | 2018-07-10 | Method of producing electronic components, corresponding electronic component |
US17/328,933 US11935818B2 (en) | 2017-08-03 | 2021-05-24 | Method of producing electronic components, corresponding electronic component |
US18/594,699 US20240203834A1 (en) | 2017-08-03 | 2024-03-04 | Method of producing electronic components, corresponding electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT102017000089965A IT201700089965A1 (it) | 2017-08-03 | 2017-08-03 | Procedimento di produzione di componenti elettronici e corrispondente componente elettronico |
Publications (1)
Publication Number | Publication Date |
---|---|
IT201700089965A1 true IT201700089965A1 (it) | 2019-02-03 |
Family
ID=60451127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT102017000089965A IT201700089965A1 (it) | 2017-08-03 | 2017-08-03 | Procedimento di produzione di componenti elettronici e corrispondente componente elettronico |
Country Status (2)
Country | Link |
---|---|
US (3) | US11018078B2 (it) |
IT (1) | IT201700089965A1 (it) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0382066A (ja) * | 1989-08-24 | 1991-04-08 | Nec Corp | 半導体装置 |
JP2009038145A (ja) * | 2007-07-31 | 2009-02-19 | Toshiba Components Co Ltd | リード端子型半導体装置 |
EP2816590A2 (en) * | 2013-05-31 | 2014-12-24 | Renesas Electronics Corporation | Semiconductor device with anchor means for the sealing resin |
US20160020182A1 (en) * | 2014-07-18 | 2016-01-21 | Freescale Semiconductor, Inc. | Wire Bond Mold Lock Method and Structure |
US9627299B1 (en) * | 2016-02-11 | 2017-04-18 | Texas Instruments Incorporated | Structure and method for diminishing delamination of packaged semiconductor devices |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7042068B2 (en) * | 2000-04-27 | 2006-05-09 | Amkor Technology, Inc. | Leadframe and semiconductor package made using the leadframe |
TWI257693B (en) * | 2003-08-25 | 2006-07-01 | Advanced Semiconductor Eng | Leadless package |
TWI277192B (en) * | 2004-07-08 | 2007-03-21 | Siliconware Precision Industries Co Ltd | Lead frame with improved molding reliability and package with the lead frame |
US20120119342A1 (en) * | 2010-11-11 | 2012-05-17 | Mediatek Inc. | Advanced quad flat non-leaded package structure and manufacturing method thereof |
JP2012243840A (ja) * | 2011-05-17 | 2012-12-10 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
-
2017
- 2017-08-03 IT IT102017000089965A patent/IT201700089965A1/it unknown
-
2018
- 2018-07-10 US US16/031,998 patent/US11018078B2/en active Active
-
2021
- 2021-05-24 US US17/328,933 patent/US11935818B2/en active Active
-
2024
- 2024-03-04 US US18/594,699 patent/US20240203834A1/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0382066A (ja) * | 1989-08-24 | 1991-04-08 | Nec Corp | 半導体装置 |
JP2009038145A (ja) * | 2007-07-31 | 2009-02-19 | Toshiba Components Co Ltd | リード端子型半導体装置 |
EP2816590A2 (en) * | 2013-05-31 | 2014-12-24 | Renesas Electronics Corporation | Semiconductor device with anchor means for the sealing resin |
US20160020182A1 (en) * | 2014-07-18 | 2016-01-21 | Freescale Semiconductor, Inc. | Wire Bond Mold Lock Method and Structure |
US9627299B1 (en) * | 2016-02-11 | 2017-04-18 | Texas Instruments Incorporated | Structure and method for diminishing delamination of packaged semiconductor devices |
Also Published As
Publication number | Publication date |
---|---|
US11018078B2 (en) | 2021-05-25 |
US20210305134A1 (en) | 2021-09-30 |
US20240203834A1 (en) | 2024-06-20 |
US11935818B2 (en) | 2024-03-19 |
US20190043787A1 (en) | 2019-02-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG11201605734TA (en) | Method of forming an integrated circuit and related integrated circuit | |
DK3600499T3 (da) | Overvågning af en injektionsproces | |
TWI800568B (zh) | 積層陶瓷電子零件及其製造方法 | |
SG11202000343TA (en) | Method of producing electronic device | |
DE112018002378A5 (de) | Additive Fertigung von Metallmatrix-Verbundwerkstoffen | |
DE112016000901A5 (de) | Verfahren zur Herstellung von optoelektronischen Halbleiterbauteilen und optoelektronisches Halbleiterbauteil | |
KR20180084834A (ko) | 장치 및 그러한 장치의 제조 방법 | |
FR3043229B1 (fr) | Demarrage securise d'un circuit electronique | |
SG11202000341VA (en) | Method of producing electronic device | |
IT201700094824A1 (it) | Metodo per la produzione di componenti curvi da arredo e componente così ottenibile | |
PL3322825T3 (pl) | Deska do skór surowych i sposób wytwarzania deski do skór surowych | |
GB2561004B (en) | Electronic structures and their methods of manufacture | |
SG10201501172RA (en) | Packaging process of electronic component | |
GB2554362B (en) | Transistor and its method of manufacture | |
IT201700089965A1 (it) | Procedimento di produzione di componenti elettronici e corrispondente componente elettronico | |
ES2975209T3 (es) | Componente de microondas y método de fabricación asociado | |
FI20145194A (fi) | Aaltopahvin säätö- ja valmistuslaitteisto sekä säätö- ja valmistusmenetelmä | |
DK3791095T3 (da) | Proceskomponent | |
ES2975301T3 (es) | Material intermedio y método de fabricación de dicho material | |
PL3508034T3 (pl) | Mieszający barwy zespół diod LED i sposób jego wytwarzania | |
ES1161458Y (es) | Pastillero electronico | |
FI20160064A (fi) | Menetelmä seulomiseen ja seulontalaite | |
FR3035266B1 (fr) | Equipement electronique | |
ITUB20152081A1 (it) | Procedimento di produzione di un diffusore e corrispondente diffusore | |
IT201600117893A1 (it) | Procedimento per la produzione di un elemento induttivo e componente induttivo |