IT1246301B - Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato. - Google Patents
Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato.Info
- Publication number
- IT1246301B IT1246301B IT02182090A IT2182090A IT1246301B IT 1246301 B IT1246301 B IT 1246301B IT 02182090 A IT02182090 A IT 02182090A IT 2182090 A IT2182090 A IT 2182090A IT 1246301 B IT1246301 B IT 1246301B
- Authority
- IT
- Italy
- Prior art keywords
- integrated circuit
- analysis device
- scan
- output phase
- operational analysis
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318552—Clock circuits details
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Microcomputers (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT02182090A IT1246301B (it) | 1990-10-22 | 1990-10-22 | Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato. |
EP91202668A EP0482697B1 (en) | 1990-10-22 | 1991-10-15 | Operational analysis device of the scan path type having a single scanning clock and a single output phase for an integrated circuit |
DE69129728T DE69129728T2 (de) | 1990-10-22 | 1991-10-15 | Operationsanalyseeinrichtung vom Abtastpfadtyp mit nur einem Abtasttaktgeber und nur einer Ausgangsphase für eine integrierte Schaltung |
JP3273791A JP2903441B2 (ja) | 1990-10-22 | 1991-10-22 | 集積回路のための単一の走査クロック及び単一の出力相を有する走査路型式の動作分析装置 |
US07/781,360 US5225724A (en) | 1990-10-22 | 1991-10-22 | Operational analysis device of the scan path type having a single scanning clock and a single output phase for an integrated circuit |
US08/876,130 USRE36292E (en) | 1990-10-22 | 1997-06-23 | Operational analysis device of the scan path type having a single scanning clock and a single output phase for an integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT02182090A IT1246301B (it) | 1990-10-22 | 1990-10-22 | Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato. |
Publications (3)
Publication Number | Publication Date |
---|---|
IT9021820A0 IT9021820A0 (it) | 1990-10-22 |
IT9021820A1 IT9021820A1 (it) | 1992-04-22 |
IT1246301B true IT1246301B (it) | 1994-11-17 |
Family
ID=11187324
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT02182090A IT1246301B (it) | 1990-10-22 | 1990-10-22 | Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5225724A (it) |
EP (1) | EP0482697B1 (it) |
JP (1) | JP2903441B2 (it) |
DE (1) | DE69129728T2 (it) |
IT (1) | IT1246301B (it) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1244205B (it) * | 1990-12-19 | 1994-07-08 | Sgs Thomson Microelectronics | Circuito di generazione di un clock di scansione in un dispositivo di analisi operativa di tipo seriale per circuito integrato |
US5412260A (en) * | 1991-05-03 | 1995-05-02 | Lattice Semiconductor Corporation | Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device |
JP3229164B2 (ja) * | 1994-07-28 | 2001-11-12 | インターナショナル・ビジネス・マシーンズ・コーポレーション | ラッチ回路 |
TW418329B (en) * | 1994-08-24 | 2001-01-11 | Ibm | Integrated circuit clocking technique and circuit therefor |
US5502403A (en) * | 1994-12-20 | 1996-03-26 | Cypress Semiconductor Corp. | High speed configuration independent programmable macrocell |
JP2734394B2 (ja) * | 1995-01-27 | 1998-03-30 | 日本電気株式会社 | 半導体集積回路装置 |
USRE37577E1 (en) * | 1996-01-11 | 2002-03-12 | Cypress Semiconductor Corporation | High speed configuration independent programmable macrocell |
TW392270B (en) * | 1998-07-04 | 2000-06-01 | Faraday Tech Corp | Input buffer and input/output buffer that totally fulfill the testability of IDDQ |
US6973396B1 (en) * | 2004-05-28 | 2005-12-06 | General Electric Company | Method for developing a unified quality assessment and providing an automated fault diagnostic tool for turbine machine systems and the like |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4495629A (en) * | 1983-01-25 | 1985-01-22 | Storage Technology Partners | CMOS scannable latch |
JPH0772744B2 (ja) * | 1984-09-04 | 1995-08-02 | 株式会社日立製作所 | 半導体集積回路装置 |
US5032783A (en) * | 1985-10-23 | 1991-07-16 | Texas Instruments Incorporated | Test circuit and scan tested logic device with isolated data lines during testing |
JPS6329276A (ja) * | 1986-07-23 | 1988-02-06 | Hitachi Ltd | 論理lsi |
JPH0627776B2 (ja) * | 1986-08-04 | 1994-04-13 | 三菱電機株式会社 | 半導体集積回路装置 |
KR900002770B1 (ko) * | 1986-08-04 | 1990-04-30 | 미쓰비시 뎅끼 가부시끼가이샤 | 반도체 집적회로장치 |
JPS63182585A (ja) * | 1987-01-26 | 1988-07-27 | Toshiba Corp | テスト容易化機能を備えた論理回路 |
JPS63222275A (ja) * | 1987-03-12 | 1988-09-16 | Nec Corp | スキヤンパス方式フリツプフロツプ回路 |
JP2725258B2 (ja) * | 1987-09-25 | 1998-03-11 | 三菱電機株式会社 | 集積回路装置 |
US4855669A (en) * | 1987-10-07 | 1989-08-08 | Xilinx, Inc. | System for scan testing of logic circuit networks |
JPH02193330A (ja) * | 1989-01-20 | 1990-07-31 | Mitsubishi Electric Corp | 光ディスク装置 |
JP2626920B2 (ja) * | 1990-01-23 | 1997-07-02 | 三菱電機株式会社 | スキャンテスト回路およびそれを用いた半導体集積回路装置 |
-
1990
- 1990-10-22 IT IT02182090A patent/IT1246301B/it active IP Right Grant
-
1991
- 1991-10-15 EP EP91202668A patent/EP0482697B1/en not_active Expired - Lifetime
- 1991-10-15 DE DE69129728T patent/DE69129728T2/de not_active Expired - Fee Related
- 1991-10-22 US US07/781,360 patent/US5225724A/en not_active Ceased
- 1991-10-22 JP JP3273791A patent/JP2903441B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0482697A3 (en) | 1992-07-22 |
US5225724A (en) | 1993-07-06 |
IT9021820A1 (it) | 1992-04-22 |
EP0482697A2 (en) | 1992-04-29 |
DE69129728T2 (de) | 1999-02-04 |
IT9021820A0 (it) | 1990-10-22 |
JPH0593759A (ja) | 1993-04-16 |
DE69129728D1 (de) | 1998-08-13 |
EP0482697B1 (en) | 1998-07-08 |
JP2903441B2 (ja) | 1999-06-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971030 |