IT1151018B - Circuito di rimemorizzazione per una memoria semicondutrice - Google Patents

Circuito di rimemorizzazione per una memoria semicondutrice

Info

Publication number
IT1151018B
IT1151018B IT23021/80A IT2302180A IT1151018B IT 1151018 B IT1151018 B IT 1151018B IT 23021/80 A IT23021/80 A IT 23021/80A IT 2302180 A IT2302180 A IT 2302180A IT 1151018 B IT1151018 B IT 1151018B
Authority
IT
Italy
Prior art keywords
reference voltage
array
storage
impedance converter
cells
Prior art date
Application number
IT23021/80A
Other languages
English (en)
Other versions
IT8023021A0 (it
Inventor
Klaus Heuber
Siegfried Kurt Wiedmann
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT8023021A0 publication Critical patent/IT8023021A0/it
Application granted granted Critical
Publication of IT1151018B publication Critical patent/IT1151018B/it

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/22—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
    • A—HUMAN NECESSITIES
    • A47—FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47D—FURNITURE SPECIALLY ADAPTED FOR CHILDREN
    • A47D9/00—Cradles ; Bassinets
    • A47D9/02—Cradles ; Bassinets with rocking mechanisms
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4026—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using bipolar transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Nonlinear Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
IT23021/80A 1979-07-20 1980-06-26 Circuito di rimemorizzazione per una memoria semicondutrice IT1151018B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2929384A DE2929384C2 (de) 1979-07-20 1979-07-20 Nachladeschaltung für einen Halbleiterspeicher

Publications (2)

Publication Number Publication Date
IT8023021A0 IT8023021A0 (it) 1980-06-26
IT1151018B true IT1151018B (it) 1986-12-17

Family

ID=6076254

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23021/80A IT1151018B (it) 1979-07-20 1980-06-26 Circuito di rimemorizzazione per una memoria semicondutrice

Country Status (6)

Country Link
US (1) US4334294A (it)
EP (1) EP0022930B1 (it)
JP (1) JPS6014437B2 (it)
AT (1) ATE7974T1 (it)
DE (2) DE2929384C2 (it)
IT (1) IT1151018B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58183493A (ja) * 1982-04-02 1983-10-26 株式会社東京タツノ プリセット給油装置
JPS62130715U (it) * 1986-02-04 1987-08-18

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR11700E (fr) 1909-03-15 1910-04-13 Carl Grunwald Four électrique à induction
US3057789A (en) * 1959-02-26 1962-10-09 Paul T Smith Gold plating bath and process
US3540010A (en) * 1968-08-27 1970-11-10 Bell Telephone Labor Inc Diode-coupled semiconductive memory
DE2021824C3 (de) * 1970-05-05 1980-08-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Halbleiterschaltung
US3816758A (en) * 1971-04-14 1974-06-11 Ibm Digital logic circuit
US3789243A (en) * 1972-07-05 1974-01-29 Ibm Monolithic memory sense amplifier/bit driver having active bit/sense line pull-up
US4057789A (en) * 1974-06-19 1977-11-08 International Business Machines Corporation Reference voltage source for memory cells
FR2304991A1 (fr) * 1975-03-15 1976-10-15 Ibm Agencement de circuits pour memoire semi-conductrice et son procede de fonctionnement
DE2556833C3 (de) * 1975-12-17 1981-11-05 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Schaltungsanordnung zum Betreiben eines Halbleiterspeichers
US4075609A (en) * 1976-04-29 1978-02-21 Motorola, Inc. On-chip voltage source for integrated circuits
JPS5341968A (en) * 1976-09-29 1978-04-15 Hitachi Ltd Semiconductor circuit
DE2657561B1 (de) * 1976-12-18 1978-04-13 Ibm Deutschland Nachlade-Referenzschaltungsanordnung fuer einen Halbleiterspeicher
FR2443118A1 (fr) * 1978-11-30 1980-06-27 Ibm France Dispositif pour l'alimentation des memoires monolithiques
DE2855866C3 (de) * 1978-12-22 1981-10-29 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Schaltungsanordnung zum Betreiben eines integrierten Halbleiterspeichers

Also Published As

Publication number Publication date
IT8023021A0 (it) 1980-06-26
US4334294A (en) 1982-06-08
EP0022930B1 (de) 1984-06-13
JPS5616996A (en) 1981-02-18
ATE7974T1 (de) 1984-06-15
JPS6014437B2 (ja) 1985-04-13
DE3068176D1 (en) 1984-07-19
DE2929384C2 (de) 1981-07-30
DE2929384B1 (de) 1980-11-27
EP0022930A1 (de) 1981-01-28

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