IT1110947B - Elemento di memoria ad accesso comandato - Google Patents

Elemento di memoria ad accesso comandato

Info

Publication number
IT1110947B
IT1110947B IT19419/79A IT1941979A IT1110947B IT 1110947 B IT1110947 B IT 1110947B IT 19419/79 A IT19419/79 A IT 19419/79A IT 1941979 A IT1941979 A IT 1941979A IT 1110947 B IT1110947 B IT 1110947B
Authority
IT
Italy
Prior art keywords
access memory
memory element
command access
command
memory
Prior art date
Application number
IT19419/79A
Other languages
English (en)
Other versions
IT7919419A0 (it
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of IT7919419A0 publication Critical patent/IT7919419A0/it
Application granted granted Critical
Publication of IT1110947B publication Critical patent/IT1110947B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
IT19419/79A 1978-01-19 1979-01-18 Elemento di memoria ad accesso comandato IT1110947B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87091078A 1978-01-19 1978-01-19

Publications (2)

Publication Number Publication Date
IT7919419A0 IT7919419A0 (it) 1979-01-18
IT1110947B true IT1110947B (it) 1986-01-13

Family

ID=25356306

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19419/79A IT1110947B (it) 1978-01-19 1979-01-18 Elemento di memoria ad accesso comandato

Country Status (3)

Country Link
EP (1) EP0003413A3 (it)
JP (1) JPS54110788A (it)
IT (1) IT1110947B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5793542A (en) * 1980-12-03 1982-06-10 Hitachi Ltd Semiconductor integrated circuit device
JPS5955071A (ja) * 1982-09-24 1984-03-29 Hitachi Micro Comput Eng Ltd 不揮発性半導体装置
US7158420B2 (en) * 2005-04-29 2007-01-02 Macronix International Co., Ltd. Inversion bit line, charge trapping non-volatile memory and method of operating same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA813537A (en) * 1967-10-17 1969-05-20 Joseph H. Scott, Jr. Semiconductor memory device
US3815106A (en) * 1972-05-11 1974-06-04 S Wiedmann Flip-flop memory cell arrangement
GB1374009A (en) * 1971-08-09 1974-11-13 Ibm Information storage
US3728695A (en) * 1971-10-06 1973-04-17 Intel Corp Random-access floating gate mos memory array
US3851317A (en) * 1973-05-04 1974-11-26 Ibm Double density non-volatile memory array
JPS5024038A (it) * 1973-06-29 1975-03-14
DE2418750C3 (de) * 1974-04-18 1978-11-30 Siemens Ag, 1000 Berlin Und 8000 Muenchen MI112 S-Speichertransistor
US4090257A (en) * 1976-06-28 1978-05-16 Westinghouse Electric Corp. Dual mode MNOS memory with paired columns and differential sense circuit
US4057820A (en) * 1976-06-29 1977-11-08 Westinghouse Electric Corporation Dual gate MNOS transistor
US4053917A (en) * 1976-08-16 1977-10-11 The United States Of America As Represented By The Secretary Of The Air Force Drain source protected MNOS transistor and method of manufacture

Also Published As

Publication number Publication date
IT7919419A0 (it) 1979-01-18
EP0003413A2 (en) 1979-08-08
EP0003413A3 (en) 1979-08-22
JPS54110788A (en) 1979-08-30

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