IT1027902B - Sistema pef la formazione di dispositivi circuitali cosie tuite da chip ad alta itegrazione - Google Patents

Sistema pef la formazione di dispositivi circuitali cosie tuite da chip ad alta itegrazione

Info

Publication number
IT1027902B
IT1027902B IT30847/74A IT3084774A IT1027902B IT 1027902 B IT1027902 B IT 1027902B IT 30847/74 A IT30847/74 A IT 30847/74A IT 3084774 A IT3084774 A IT 3084774A IT 1027902 B IT1027902 B IT 1027902B
Authority
IT
Italy
Prior art keywords
itegration
circuital
chip
formation
devices
Prior art date
Application number
IT30847/74A
Other languages
English (en)
Original Assignee
Olympia Werke Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympia Werke Ag filed Critical Olympia Werke Ag
Application granted granted Critical
Publication of IT1027902B publication Critical patent/IT1027902B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7864—Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
  • Microcomputers (AREA)
  • Read Only Memory (AREA)
IT30847/74A 1973-12-22 1974-12-20 Sistema pef la formazione di dispositivi circuitali cosie tuite da chip ad alta itegrazione IT1027902B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2364408A DE2364408C3 (de) 1973-12-22 1973-12-22 Schaltungsanordnung zur Adressierung der Speicherplätze eines aus mehreren Chips bestehenden Speichers

Publications (1)

Publication Number Publication Date
IT1027902B true IT1027902B (it) 1978-12-20

Family

ID=5901872

Family Applications (1)

Application Number Title Priority Date Filing Date
IT30847/74A IT1027902B (it) 1973-12-22 1974-12-20 Sistema pef la formazione di dispositivi circuitali cosie tuite da chip ad alta itegrazione

Country Status (7)

Country Link
US (1) US3972028A (it)
JP (1) JPS5636457B2 (it)
DE (1) DE2364408C3 (it)
FR (1) FR2255659B1 (it)
GB (1) GB1469298A (it)
IT (1) IT1027902B (it)
NL (1) NL171097C (it)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4086626A (en) * 1974-10-07 1978-04-25 Fairchild Camera And Instrument Corporation Microprocessor system
US4156925A (en) * 1976-04-30 1979-05-29 International Business Machines Corporation Overlapped and interleaved control store with address modifiers
US4095265A (en) * 1976-06-07 1978-06-13 International Business Machines Corporation Memory control structure for a pipelined mini-processor system
US4086658A (en) * 1976-10-04 1978-04-25 International Business Machines Corporation Input/output and diagnostic arrangements for programmable machine controllers having multiprogramming capabilities
US4087857A (en) * 1976-10-04 1978-05-02 Honeywell Information Systems Inc. ROM-initializing apparatus
US4107774A (en) * 1976-10-04 1978-08-15 Honeywell Information Systems Inc. Microprogram splatter return apparatus
US4167781A (en) * 1976-10-12 1979-09-11 Fairchild Camera And Instrument Corporation Microprocessor system having a single central processing unit shared by a plurality of subsystems each having a memory
US4141068A (en) * 1977-03-24 1979-02-20 Xerox Corporation Auxiliary ROM memory system
US4315321A (en) * 1978-06-16 1982-02-09 The Kardios Systems Corporation Method and apparatus for enhancing the capabilities of a computing system
US4236207A (en) * 1978-10-25 1980-11-25 Digital Equipment Corporation Memory initialization circuit
JPS5580164A (en) * 1978-12-13 1980-06-17 Fujitsu Ltd Main memory constitution control system
US4286320A (en) * 1979-03-12 1981-08-25 Texas Instruments Incorporated Digital computing system having auto-incrementing memory
USRE31977E (en) * 1979-03-12 1985-08-27 Texas Instruments Incorporated Digital computing system having auto-incrementing memory
US4286321A (en) * 1979-06-18 1981-08-25 International Business Machines Corporation Common bus communication system in which the width of the address field is greater than the number of lines on the bus
US4323963A (en) * 1979-07-13 1982-04-06 Rca Corporation Hardware interpretive mode microprocessor
US4346438A (en) * 1979-10-24 1982-08-24 Burroughs Corporation Digital computer having programmable structure
US4321667A (en) * 1979-10-31 1982-03-23 International Business Machines Corp. Add-on programs with code verification and control
US4443845A (en) * 1980-06-26 1984-04-17 Texas Instruments Incorporated Memory system having a common interface
US4815034A (en) * 1981-03-18 1989-03-21 Mackey Timothy I Dynamic memory address system for I/O devices
US4503491A (en) * 1981-06-29 1985-03-05 Matsushita Electric Industrial Co., Ltd. Computer with expanded addressing capability
DE3133742C2 (de) * 1981-08-26 1985-11-21 Otto 7750 Konstanz Müller Zentraleinheit einer mikroprogrammierten digitalen Mehrbit-Rechenanlage
US4811202A (en) * 1981-10-01 1989-03-07 Texas Instruments Incorporated Quadruply extended time multiplexed information bus for reducing the `pin out` configuration of a semiconductor chip package
CA1234224A (en) * 1985-05-28 1988-03-15 Boleslav Sykora Computer memory management system
IT1218104B (it) * 1986-06-27 1990-04-12 Sgs Microelettronica Spa Metodo di progettazione di microcalcolatori integrati e microcalcolatore integrato a struttura modulare ottenuto con il metodo suddetto
US4980850A (en) * 1987-05-14 1990-12-25 Digital Equipment Corporation Automatic sizing memory system with multiplexed configuration signals at memory modules
US5093807A (en) 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
US5113508A (en) * 1988-03-08 1992-05-12 International Business Machines Corporation Data cache initialization
US5448744A (en) * 1989-11-06 1995-09-05 Motorola, Inc. Integrated circuit microprocessor with programmable chip select logic
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US6751696B2 (en) 1990-04-18 2004-06-15 Rambus Inc. Memory device having a programmable register
US5243703A (en) * 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
US6157970A (en) * 1997-09-24 2000-12-05 Intel Corporation Direct memory access system using time-multiplexing for transferring address, data, and control and a separate control line for serially transmitting encoded DMA channel number
US5991841A (en) * 1997-09-24 1999-11-23 Intel Corporation Memory transactions on a low pin count bus
US6131127A (en) * 1997-09-24 2000-10-10 Intel Corporation I/O transactions on a low pin count bus
US6119189A (en) * 1997-09-24 2000-09-12 Intel Corporation Bus master transactions on a low pin count bus
EP1058216B1 (en) * 1999-06-04 2002-12-11 D'Udekem D'Acoz, Xavier Guy Bernard Memory card
US20020038433A1 (en) * 2000-06-28 2002-03-28 Z-World, Inc. System and method for utilizing programmed multi-speed operation with a microprocessor to reduce power consumption
DE10343525B4 (de) * 2002-09-27 2011-06-16 Qimonda Ag Verfahren zum Betreiben von Halbleiterbausteinen, Steuervorrichtung für Halbleiterbausteine und Anordnung zum Betreiben von Speicherbausteinen
CN101482749A (zh) * 2008-01-11 2009-07-15 鸿富锦精密工业（深圳）有限公司 主设备对从设备的自动定址***

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691538A (en) * 1971-06-01 1972-09-12 Ncr Co Serial read-out memory system
US3757306A (en) * 1971-08-31 1973-09-04 Texas Instruments Inc Computing systems cpu
US3803562A (en) * 1972-11-21 1974-04-09 Honeywell Inf Systems Semiconductor mass memory
US3821715A (en) * 1973-01-22 1974-06-28 Intel Corp Memory system for a multi chip digital computer
US3855577A (en) * 1973-06-11 1974-12-17 Texas Instruments Inc Power saving circuit for calculator system

Also Published As

Publication number Publication date
US3972028A (en) 1976-07-27
NL171097C (nl) 1983-02-01
NL7416722A (nl) 1975-06-24
FR2255659A1 (it) 1975-07-18
JPS5096132A (it) 1975-07-31
NL171097B (nl) 1982-09-01
DE2364408B2 (de) 1978-10-05
DE2364408C3 (de) 1979-06-07
DE2364408A1 (de) 1975-07-03
FR2255659B1 (it) 1977-07-08
GB1469298A (en) 1977-04-06
JPS5636457B2 (it) 1981-08-24

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