IT1006706B - MULTI-PROCESSING SYSTEM - Google Patents

MULTI-PROCESSING SYSTEM

Info

Publication number
IT1006706B
IT1006706B IT1903174A IT1903174A IT1006706B IT 1006706 B IT1006706 B IT 1006706B IT 1903174 A IT1903174 A IT 1903174A IT 1903174 A IT1903174 A IT 1903174A IT 1006706 B IT1006706 B IT 1006706B
Authority
IT
Italy
Prior art keywords
processing system
processing
Prior art date
Application number
IT1903174A
Other languages
Italian (it)
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Application granted granted Critical
Publication of IT1006706B publication Critical patent/IT1006706B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2005—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication controllers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2025—Failover techniques using centralised failover control functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/203—Failover techniques using migration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Debugging And Monitoring (AREA)
IT1903174A 1973-01-04 1974-01-03 MULTI-PROCESSING SYSTEM IT1006706B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB56073A GB1411182A (en) 1973-01-04 1973-01-04 Data processing

Publications (1)

Publication Number Publication Date
IT1006706B true IT1006706B (en) 1976-10-20

Family

ID=9706525

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1903174A IT1006706B (en) 1973-01-04 1974-01-03 MULTI-PROCESSING SYSTEM

Country Status (8)

Country Link
JP (1) JPS5025147A (en)
BE (1) BE809382R (en)
DE (1) DE2364082A1 (en)
ES (1) ES422031A1 (en)
FR (1) FR2213540B1 (en)
GB (1) GB1411182A (en)
IT (1) IT1006706B (en)
NL (1) NL7316994A (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528711A (en) * 1975-07-09 1977-01-22 Nippon Telegr & Teleph Corp <Ntt> Dispersion-control electronic exchange system
US4074072A (en) * 1976-05-24 1978-02-14 Bell Telephone Laboratories, Incorporated Multiprocessor control of a partitioned switching network by control communication through the network
JPS53129907A (en) * 1977-04-19 1978-11-13 Nec Corp Exchange control system
JPS5486204A (en) * 1977-12-21 1979-07-09 Nec Corp Inter-module interface system
IT1111606B (en) * 1978-03-03 1986-01-13 Cselt Centro Studi Lab Telecom MULTI-CONFIGURABLE MODULAR PROCESSING SYSTEM INTEGRATED WITH A PRE-PROCESSING SYSTEM
DE2813721C2 (en) * 1978-03-30 1980-05-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Circuit arrangement for an indirectly controlled switching system, in particular telephone switching system
GB2023314B (en) 1978-06-15 1982-10-06 Ibm Digital data processing systems
US4209839A (en) * 1978-06-16 1980-06-24 International Business Machines Corporation Shared synchronous memory multiprocessing arrangement
DE2941956A1 (en) * 1979-10-17 1981-04-30 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Process control from central multiple processor controller - using processor selector and central and distributed memory system
FR2477809B1 (en) * 1980-03-10 1987-08-21 Jeumont Schneider SYSTEM FOR FAST TRANSMISSION OF MESSAGES BETWEEN COMPUTERS
US4823256A (en) * 1984-06-22 1989-04-18 American Telephone And Telegraph Company, At&T Bell Laboratories Reconfigurable dual processor system
US4754394A (en) * 1984-10-24 1988-06-28 International Business Machines Corporation Multiprocessing system having dynamically allocated local/global storage and including interleaving transformation circuit for transforming real addresses to corresponding absolute address of the storage
EP0216359A3 (en) * 1985-09-26 1987-09-30 Siemens Aktiengesellschaft Method of preventing overloading of the central controller of a processor-controlled telephone system
DE3707998A1 (en) * 1987-03-12 1988-09-22 Gerhard G Thomas COMPUTER SYSTEM, ESPECIALLY FOR SIMULATING BIOLOGICAL PROCESSES
GB2262169B (en) * 1991-11-21 1995-06-21 Scott John Charles Morgan Storage and retrieval of information in electronic memory
JP3408850B2 (en) 1992-12-09 2003-05-19 三菱電機株式会社 Client / server system, control method thereof, and client device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE313849B (en) * 1966-03-25 1969-08-25 Ericsson Telefon Ab L M
GB1332797A (en) * 1970-09-02 1973-10-03 Plessey Co Ltd Programme interrupt facilities in data processing systems

Also Published As

Publication number Publication date
ES422031A1 (en) 1976-08-01
GB1411182A (en) 1975-10-22
DE2364082A1 (en) 1974-07-18
NL7316994A (en) 1974-07-08
BE809382R (en) 1974-07-04
JPS5025147A (en) 1975-03-17
FR2213540B1 (en) 1978-08-11
AU6389673A (en) 1975-06-26
FR2213540A1 (en) 1974-08-02

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