IN2014CN02550A - - Google Patents
Info
- Publication number
- IN2014CN02550A IN2014CN02550A IN2550CHN2014A IN2014CN02550A IN 2014CN02550 A IN2014CN02550 A IN 2014CN02550A IN 2550CHN2014 A IN2550CHN2014 A IN 2550CHN2014A IN 2014CN02550 A IN2014CN02550 A IN 2014CN02550A
- Authority
- IN
- India
- Prior art keywords
- wafer
- trenches
- via device
- conductive material
- wafer surface
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
- B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
- B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
- B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
- B06B1/0292—Electrostatic transducers, e.g. electret-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02372—Disposition of the redistribution layers connecting to a via connection in the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13024—Disposition the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Micromachines (AREA)
- Transducers For Ultrasonic Waves (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Combinations Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The present invention relates to a through wafer via device (10) comprising a wafer (12) made of a wafer material and having a first wafer surface (12a) and a second wafer surface (12b) opposing the first wafer surface (12a). The through wafer via device (10) further comprises a plurality of side by side first trenches (14) provided with a conductive material and extending from the first wafer surface (12a) into the wafer (12) such that a plurality of spacers (16) of the wafer material are formed between the first trenches (14). The through wafer via device (10) further comprises a second trench (18) provided with the conductive material and extending from the second wafer surface (12b) into the wafer (12) the second trench (18) being connected to the first trenches (14). The through wafer via device (10) further comprises a conductive layer (20) made of the conductive material and formed on the side of the first wafer surface (12a) the conductive material filling the first trenches (14) such that the first conductive layer (20) has a substantially planar and closed surface.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161547942P | 2011-10-17 | 2011-10-17 | |
PCT/IB2012/055547 WO2013057642A1 (en) | 2011-10-17 | 2012-10-12 | Through-wafer via device and method of manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
IN2014CN02550A true IN2014CN02550A (en) | 2015-08-07 |
Family
ID=47428773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IN2550CHN2014 IN2014CN02550A (en) | 2011-10-17 | 2012-10-12 |
Country Status (6)
Country | Link |
---|---|
US (1) | US9230908B2 (en) |
EP (1) | EP2745315A1 (en) |
CN (1) | CN103875068B (en) |
IN (1) | IN2014CN02550A (en) |
RU (1) | RU2603435C2 (en) |
WO (1) | WO2013057642A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6069798B2 (en) * | 2011-12-20 | 2017-02-01 | コーニンクレッカ フィリップス エヌ ヴェKoninklijke Philips N.V. | Ultrasonic transducer device and method of manufacturing the same |
JP6495322B2 (en) | 2014-03-31 | 2019-04-03 | コーニンクレッカ フィリップス エヌ ヴェKoninklijke Philips N.V. | IC die, ultrasonic probe, ultrasonic diagnostic system and method |
WO2016147529A1 (en) * | 2015-03-16 | 2016-09-22 | 富士電機株式会社 | Semiconductor device manufacturing method |
US11097942B2 (en) * | 2016-10-26 | 2021-08-24 | Analog Devices, Inc. | Through silicon via (TSV) formation in integrated circuits |
WO2019213448A1 (en) * | 2018-05-03 | 2019-11-07 | Butterfly Network, Inc. | Vertical packaging for ultrasound-on-a-chip and related methods |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5381385A (en) | 1993-08-04 | 1995-01-10 | Hewlett-Packard Company | Electrical interconnect for multilayer transducer elements of a two-dimensional transducer array |
US5619476A (en) * | 1994-10-21 | 1997-04-08 | The Board Of Trustees Of The Leland Stanford Jr. Univ. | Electrostatic ultrasonic transducer |
US6430109B1 (en) * | 1999-09-30 | 2002-08-06 | The Board Of Trustees Of The Leland Stanford Junior University | Array of capacitive micromachined ultrasonic transducer elements with through wafer via connections |
US6716737B2 (en) | 2002-07-29 | 2004-04-06 | Hewlett-Packard Development Company, L.P. | Method of forming a through-substrate interconnect |
US20040104454A1 (en) * | 2002-10-10 | 2004-06-03 | Rohm Co., Ltd. | Semiconductor device and method of producing the same |
US6836020B2 (en) | 2003-01-22 | 2004-12-28 | The Board Of Trustees Of The Leland Stanford Junior University | Electrical through wafer interconnects |
US7257051B2 (en) * | 2003-03-06 | 2007-08-14 | General Electric Company | Integrated interface electronics for reconfigurable sensor array |
JP2005032769A (en) * | 2003-07-07 | 2005-02-03 | Seiko Epson Corp | Method of forming multilayer wiring, method of manufacturing wiring board, and method of manufacturing device |
WO2005088699A1 (en) * | 2004-03-10 | 2005-09-22 | Koninklijke Philips Electronics N.V. | Method of manufacturing an electronic device and a resulting device |
EP1779784B1 (en) | 2004-06-07 | 2015-10-14 | Olympus Corporation | Electrostatic capacity type ultrasonic transducer |
US8105941B2 (en) | 2005-05-18 | 2012-01-31 | Kolo Technologies, Inc. | Through-wafer interconnection |
US7622848B2 (en) | 2006-01-06 | 2009-11-24 | General Electric Company | Transducer assembly with z-axis interconnect |
US20090309217A1 (en) | 2006-06-26 | 2009-12-17 | Koninklijke Philips Electronics N.V. | Flip-chip interconnection with a small passivation layer opening |
CN101517737B (en) | 2006-09-25 | 2012-10-31 | 皇家飞利浦电子股份有限公司 | Flip-chip interconnection through chip vias |
CN101662989B (en) * | 2006-11-03 | 2013-10-30 | 研究三角协会 | Enhanced ultrasound imaging probes using flexure mode piezoelectric transducers |
US8110899B2 (en) * | 2006-12-20 | 2012-02-07 | Intel Corporation | Method for incorporating existing silicon die into 3D integrated stack |
US7843022B2 (en) | 2007-10-18 | 2010-11-30 | The Board Of Trustees Of The Leland Stanford Junior University | High-temperature electrostatic transducers and fabrication method |
US7781238B2 (en) | 2007-12-06 | 2010-08-24 | Robert Gideon Wodnicki | Methods of making and using integrated and testable sensor array |
US8062975B2 (en) * | 2009-04-16 | 2011-11-22 | Freescale Semiconductor, Inc. | Through substrate vias |
-
2012
- 2012-10-12 US US14/346,824 patent/US9230908B2/en active Active
- 2012-10-12 WO PCT/IB2012/055547 patent/WO2013057642A1/en active Application Filing
- 2012-10-12 RU RU2014119923/28A patent/RU2603435C2/en active
- 2012-10-12 EP EP12805761.9A patent/EP2745315A1/en not_active Withdrawn
- 2012-10-12 IN IN2550CHN2014 patent/IN2014CN02550A/en unknown
- 2012-10-12 CN CN201280050826.8A patent/CN103875068B/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20140293751A1 (en) | 2014-10-02 |
CN103875068B (en) | 2018-07-10 |
CN103875068A (en) | 2014-06-18 |
RU2014119923A (en) | 2015-11-27 |
US9230908B2 (en) | 2016-01-05 |
EP2745315A1 (en) | 2014-06-25 |
RU2603435C2 (en) | 2016-11-27 |
WO2013057642A1 (en) | 2013-04-25 |
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