IN2012DN05264A - - Google Patents

Info

Publication number
IN2012DN05264A
IN2012DN05264A IN5264DEN2012A IN2012DN05264A IN 2012DN05264 A IN2012DN05264 A IN 2012DN05264A IN 5264DEN2012 A IN5264DEN2012 A IN 5264DEN2012A IN 2012DN05264 A IN2012DN05264 A IN 2012DN05264A
Authority
IN
India
Application number
Inventor
Robert Hartl
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Publication of IN2012DN05264A publication Critical patent/IN2012DN05264A/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/318357—Simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/31835—Analysis of test coverage or failure detectability
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Tests Of Electronic Circuits (AREA)
IN5264DEN2012 2010-03-04 2012-06-14 IN2012DN05264A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102010002563 2010-03-04
DE102010040035A DE102010040035A1 (en) 2010-03-04 2010-08-31 Improvements to backward analysis to determine error masking factors
PCT/EP2011/051786 WO2011107321A1 (en) 2010-03-04 2011-02-08 Improvements in backward analysis for determining fault masking factors

Publications (1)

Publication Number Publication Date
IN2012DN05264A true IN2012DN05264A (en) 2015-08-07

Family

ID=44503068

Family Applications (1)

Application Number Title Priority Date Filing Date
IN5264DEN2012 IN2012DN05264A (en) 2010-03-04 2012-06-14

Country Status (8)

Country Link
US (1) US8732649B2 (en)
EP (1) EP2542904B1 (en)
JP (1) JP5681215B2 (en)
KR (1) KR20130008035A (en)
CN (1) CN102770777B (en)
DE (1) DE102010040035A1 (en)
IN (1) IN2012DN05264A (en)
WO (1) WO2011107321A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4976412B2 (en) 2005-12-01 2012-07-18 ベー・エル・アー・ハー・エム・エス・ゲーエムベーハー Methods for diagnosis and treatment of critically ill patients with endothelin, endothelin agonists and adrenomedullin antagonists
PT2780371T (en) 2011-11-16 2019-01-30 Adrenomed Ag Anti-adrenomedullin (adm) antibody or anti-adm antibody fragment or anti-adm non-ig scaffold for regulating the fluid balance in a patient having a chronic or acute disease
PT2594587E (en) 2011-11-16 2014-08-27 Adrenomed Ag Anti-adrenomedullin (adm) antibody or anti-adm antibody fragment or anti-adm non-ig protein scaffold for reducing the risk of mortality in a patient having a chronic or acute disease or acute condition
NZ624873A (en) 2011-11-16 2016-07-29 Adrenomed Ag Anti-adrenomedullin (adm) antibody or anti-adm antibody fragment or anti-adm non-ig scaffold for prevention or reduction of organ dysfunction or organ failure in a patient having a chronic or acute disease or acute condition
JP6224608B2 (en) 2011-11-16 2017-11-01 アドレノメト アクチェンゲゼルシャフト Anti-adrenomedullin (ADM) antibody, anti-ADM antibody fragment or anti-ADM non-Ig scaffold for use in the treatment of acute disease or condition in a patient to stabilize blood circulation
SI2780717T1 (en) 2011-11-16 2017-05-31 Sphingotec Gmbh Adrenomedullin assays and methods for determining mature adrenomedullin
US8719747B2 (en) * 2012-01-31 2014-05-06 Mentor Graphics Corporation Single event upset mitigation for electronic design synthesis
WO2014142852A1 (en) * 2013-03-13 2014-09-18 Intel Corporation Vulnerability estimation for cache memory
US9317254B1 (en) * 2013-12-04 2016-04-19 Google Inc. Fault tolerance model, methods, and apparatuses and their validation techniques
US10013581B2 (en) * 2014-10-07 2018-07-03 Nuvoton Technology Corporation Detection of fault injection attacks
KR102542723B1 (en) * 2016-10-27 2023-06-12 삼성전자주식회사 Simulation method and system for predicting ser
JP6863460B2 (en) 2017-06-05 2021-04-21 富士通株式会社 Soft error inspection method, soft error inspection device and soft error inspection system
US10691572B2 (en) 2017-08-30 2020-06-23 Nvidia Corporation Liveness as a factor to evaluate memory vulnerability to soft errors
US11022649B2 (en) * 2018-11-30 2021-06-01 Arm Limited Stabilised failure estimate in circuits
US10747601B2 (en) * 2018-11-30 2020-08-18 Arm Limited Failure estimation in circuits
CN109634797A (en) * 2018-12-18 2019-04-16 上海交通大学 A method of with register mask window analysis register architecture sensitive factor
US11366899B2 (en) 2020-02-18 2022-06-21 Nuvoton Technology Corporation Digital fault injection detector
US11176026B2 (en) 2020-02-20 2021-11-16 International Business Machines Corporation Assignment of test case priorities based on combinatorial test design model analysis
US11086768B1 (en) * 2020-02-20 2021-08-10 International Business Machines Corporation Identifying false positives in test case failures using combinatorics
US11663113B2 (en) 2020-02-20 2023-05-30 International Business Machines Corporation Real time fault localization using combinatorial test design techniques and test case priority selection
US11307975B2 (en) 2020-02-20 2022-04-19 International Business Machines Corporation Machine code analysis for identifying software defects
US11783026B2 (en) * 2021-01-05 2023-10-10 Nuvoton Technology Corporation Processor with in-band fault-injection detection

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61187047A (en) 1985-02-14 1986-08-20 Fujitsu Ltd Logical circuit simulation system
JPH04245338A (en) * 1991-01-31 1992-09-01 Hitachi Ltd Throughput reducing method for fault simulation
US5499249A (en) * 1994-05-31 1996-03-12 At&T Corp. Method and apparatus for test generation and fault simulation for sequential circuits with embedded random access memories (RAMs)
CA2159036C (en) * 1994-12-29 1999-01-26 Miron Abramovici Method for identifying untestable & redundant faults in sequential logic circuits
JPH11142482A (en) 1997-11-13 1999-05-28 Fujitsu Ltd Method and device for timing fault diagnosis
US20020188904A1 (en) * 2001-06-11 2002-12-12 International Business Machines Corporation Efficiency of fault simulation by logic backtracking
US7007252B2 (en) * 2003-04-09 2006-02-28 Synopsys, Inc. Method and apparatus for characterizing the propagation of noise through a cell in an integrated circuit
US7159199B2 (en) * 2004-04-02 2007-01-02 Stmicroelectronics Limited Method for verifying adequate synchronization of signals that cross clock environments and system
US7246413B2 (en) 2004-05-28 2007-07-24 Charles Portelli Magnetic safety knob for a cabinet door
US7296201B2 (en) * 2005-10-29 2007-11-13 Dafca, Inc. Method to locate logic errors and defects in digital circuits
US20070226572A1 (en) 2005-11-07 2007-09-27 Ming Zhang Soft error rate analysis system
US8230285B2 (en) 2006-02-17 2012-07-24 Jds Uniphase Corporation Protocol analyzer for consumer electronics
JP5045319B2 (en) * 2007-09-03 2012-10-10 日本電気株式会社 Error signal pulse width calculation method and program
JP5672038B2 (en) * 2011-02-10 2015-02-18 富士通株式会社 Verification support device, verification support program, and verification support method

Also Published As

Publication number Publication date
JP5681215B2 (en) 2015-03-04
CN102770777A (en) 2012-11-07
WO2011107321A1 (en) 2011-09-09
EP2542904A1 (en) 2013-01-09
EP2542904B1 (en) 2014-04-16
CN102770777B (en) 2015-05-20
JP2013521483A (en) 2013-06-10
US8732649B2 (en) 2014-05-20
US20130061104A1 (en) 2013-03-07
KR20130008035A (en) 2013-01-21
DE102010040035A1 (en) 2011-09-08

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