IL26714A - Analyzer,in particular for stochastic phenomena,and correlation function computations - Google Patents

Description

The present invention relates to analyzers, in particular of stochastic phenomenons, - that is to say to electronic devices capable of treating informations of physical origin -which can be represented by aleatory functions.

The invention is more especially but not exclusively concerned with correlation function computers.

It is reminded that X(t) and Y(t) being two aleatory functions of an independent variable t (which generally is time), the intercorrelation function C (h) is ΐηΘ expectation of the product X(t).Xt-h), i.e. and the autocorrelation function C (h) is the expectation of the product X(t).X(t-h) , i.e.

E being the symbol of the expectation and h a time lag which may be zero in the case of an intercorrelation function.

These two correlation, functions may also be expressed by In a prior French Patent No.1 ,362,476, filed March 4,1963, and in the corresponding British Patent No.1 ,001 ,096, filed March 4, 964, there has been described a correlation function digital computer. Said patents further indicated the chief practical applications of these functions and, consequently, the utility of the correlation function computer described therein* However, if the digital computer desoribed in these patent works in a very satisfactory manner and gives excellent results, it has the drawback of giving the successive points of the correlation function corresponding to different respective lags h one after the other* If a correlation function is calculated on a sample of duration T and if it is desired to have N points of the correlation function (that is to say to calculate the function for N values of the lag) it is necessary, with this computer, to repeat the operation N times, which requires a time of calculation substantially greater than N.T, the theoretical lower limit.

Such a relative lack of velocity is not a major drawback when the computer is used in a laborator * It becomes serious when the computer is to be used for industrial purposes, where a great number of calculations should be performed as quickly as possible. It may even become prohibitive when it is desired to perform the calculations within the actually available time (for instance tp determine the impulse response to a process in order to introduce the result of this determination into a loc; for piloting this process,* The object of the present invention is therefore to provide an analyzer, in particular a correlation function computer, working within tha actually available time and particularly interesting by its simplicity, the facility of its use a d the reliability and quickness of its calculations.

An analyzer, in particular a correlation function compute-.' according to the present invention comprises, in combination: two sampling analogue to digital converters comprising a limited number of quantization bands, each of .said converters having an input for an analogue signal to be analyzed and an output delivering, at successive sampling times, the quantized digital magnitude of this signal; at least one delay unit for delaying a signal, in particular after its quantization in the corresponding sampling converter; a first memory, called measurement memory, with a plurality of memory cells each capable of storing a particular quantized magnitude, this first memory being connected with the output of one of the sampling converters, possibly through the intermediate of a delay unit, so as to receive therefrom into an input cell the successive sampling quantized magnitudes, possibly delayed; a buffer or intermediate memory capable of storing a particular quantized magnitude, with an input connectable to each of the cells of said first memory, and two outputs; a register capable of storing a particular quantized magnitude, with an input connected with one of the outputs of said intermediate memory and an output connectable to each of the cells of said first memory, with the exception of said input cell, and to an evacuation outlet; means for connecting, on the one hand, the cells of the first memory to said input of the intermediate memory sequentially in a given order, starting from an input cell, and, on the other hand, the output of said register, sequentially, to said first memory cells in the above mentioned order, starting from the cell that follows said input cells, this last mentioned cell being replaoed in the cycle by said evacuation outlet ; a multiplying unit, in particular of the type of a diode matrix, capable of multiplying by each other two particular quantized magnitudes, with two inputs connected one to the output of the second sampling converter, possibly through the intermediate of a delay unit, and the other to the other output of the intermediate memory; a second memory, called integration memory, including as many memory cells as the first memory, every cell of said second memory having a capacity greater "by several orders of magnitude than that of every cell of the first memory; an adder and subtracter unit having two Inputs, one connected with the output of the multiplying unit and the other connectable to each of the cells of the second memory, and an output; and means for connecting first said second input and then said output of the adder and subtracter unit, sequentially, to each of the cells of the second memory.

The analyzer may further have one or several of the following supplementary features: - the digital portion of the analyzer or correlation function computer works according to the binary system; - the intermediate memory and the register consist of two identical cascades of bistable circuits; - the first and second memory constitute the two portions, of very different respective importances, of a single memory, advantageously of the thin magnetic film type; - the multiplying unit delivers the modulus of the product in complementary form if the sign of the product is negative · and the adder and subtracter unit performs the subtraction . operation by adding the complement ; - the analyzer device or correlation function computer comprises accessory input and output elements, in particular an analogue output of the contents of the cells of the second memory.

A preferred embodiment of the present- invention will be hereinafter described with reference to the appended drawings, given merely by way of example, and in which: Fig.1 shows, in the form of functional blocks, a correlation function computer made according to the present invention; and Fig.2 is a diagram for explaining the distribution of the density of the analysis or sampling points in the case whore the analyzer according to the present invention works as a generator of a function the curve of which is illustrated by said drawing.

The following descripticbn with reference to Eig.1 corresponds to the particular case, taken by way of example, where : - the binary system is used 5 and - a quantization is made with nine intervals (the average levels of which are proportional to -4, -3, -2, -1 , 0, +1 , +2, +3 and +4) of the amplitudes of the functions or magnitudes X(t) and Y(t) the intercorrelation function of which is to be - 128 points of this intercorrelation function are determined, choice of these data (9 levels, 128 points) being hereinafter made explicite.

The computer illustrated by Fig.l comprises, in combination: - two sampling analogue to digital converters Ca and Cb the inputs Ea and Eb of which receive the analogue (normally continuous) signals to be analyzed, input Ea receiving for instance signal X(t) and input Eb signal Y(t) and the outputs (the sampling frequency being for instance equal to 25,000 Hz), ' the quantized digital values which can be represented by the above mentioned levels -4, -3, -2, -1, 0, +1, +2, +3 and +4; ~ two delay units Da. and Db connected respectively with the digital outputs of sampling converters Ca and Cb, these delay units being adapted to introduce each a delay ranging from zero to a maximum value equal for instance to several seconds; - a first memory Ma, called measurement memory, including 1 8 memory cells Q- Q^ ··· ¾ΐ27' ^128 eac:i:1 °^ wnic is adapted to store a particular quantized value, that is to say, on the one hand, a sign bit (+ or -) and, on the other hand, three absolute value bits (the absolute value being at most equal to 4 in the example, but being possibly as great as 7 when use is made of cells Q capable of storing three absolute value bits), this first memory Ma being connected with the output of the first sampling converter Ca through the intermediate of delay unit Da to receive therefrom the delayed successive deliveries; - a buffer or intermediate memory S capable of storing a particular quantized value, that is to say also four bits (including three absolute value bits and a sign bit), the input of said intermediate memory S being connectable to each of the cells Q of memory Maj - a register U capable of storing a particular quantized value, that is to say having the same capacity as intermediate memory S, with an input connected with one output of said intermediate memory S and an output connectable to each of the colls Q of said memory Ma, with the exception of cell ' and to an evacuation output V; - means G-a for connecting, on the one hand, the cells Q of memory Ma to said input of intermediate memory S, successively and cyclically, in tho order of decreasing indexes ¾2 » ^1» ^128' 27' Q^c*) an(i> on "th*3 other hand, the output of said register U successively and cyclically to the cells Q of memory Ma in said above mentioned decreasing index order, with however the exception of cell connected to the output of the register, connection to this last mentioned cell being replaced by connection to an evacuation outlet V for the contents of register U, - a multiplying unit P adapted to multiply by each other two particular quantized values, with two inputs ^ and 2 connected, respectively, one ( ) to the output of the second sampling converter Cb through the second delay unit Db and a gate G, and the other (P^) to the other output of intermediate memory S; - a second memory Mb, called integration memory, including 128 memory cells RQ, , ...

R127 ' every cel1 R of memory Mb having a capacity, in bits, greater by several orders of magnitude than that of every cell Q of memory Ma, for instance a capacity of 26 bits (25 absolute value bits and one sign bit); an adder and subtracter unit A with two inputs one of which (A^ ) is conneoted with the output of multiplying unit P and the other of- which (A^) is connectable to each of the cells R of the second memory Mb, the capacity, in bits, of said adder and subtracter unit A being equal to that of the cells Q, i.e. 25 bits; - and means for connecting successively and cyclically said second input A2> on the one hand, and output ^, on the other hand, of the adder and subtracter unit A, with said cells R of the second memory Mb, according to the cycle Q, , ... ^27' R0, R1 , etc.

Converters Ca and Cb are for instance made of semi-cor -ctor elements and they are of the successive settings type -working with a frequency of clock H of the order of 1 MHz, conversion being performed in some microseoonds .

Memories Ma and Mb advantageously consiet of the two portions, of respective unequal importances, of a single memory, for instance a thin magnetic film memory having a capacity of 128 words of 32 bits, 4 bits being used for memory Ma and 26 for memory Mb. The same memory therefore servos by splitting to store, on the one hand, the sampled measurement values (cells Q to other hand, the successive integrated values (cells ch a thin magnetic film memory has a time of operation of the order of 40 microseconds for entering an information and 40 nanoseconds for delivering it due to the fact that there is no dispatching problem. In the case of slow phenomenons, which therefore do not require a quick sampling, the thin film memory can be economically replaced by a torus or magncto-striction memory.

Intermediate memory S and register U, which have a low capacity (4 bits) may advantageously be each made of four oascado connected bistable circuits, each bistable circuit being arranged to store a bit* If use is made of bistable circuit cascades made in integrated circuit fashion, the time of transfer for these components may be lower than 10 nanoseconds.

The multiplying unit P must perform the multiplication of a very small number of possible absolute values and the number of the different products, in absolute value, is limited to ten, these products being : 1, 2, 3, 4, 6, 8, 9, 12, 16 and, of course, 0. It is therefore easy to make such a multiplying unit as described in the above stated prior French and British Patents, that is to say by means of a diode matrix for multiplication of the absolute values, completed by a very small diode matrix for multiplication of the signs. The duration of a multiplication operation is of the order of some nanoseconds .

The absolute value is advantageously supplied in complementary binary form if the sign of the product is negative, and of course in direct binary form if the sign of the product is positive · The adder and subtracter unit A has for its object algebraically to add to the contents of a cell R of memory Mb a product supplied by multiplying unit P.

It must therefore add a small number of bits (5 for the absolute value). It is generally made in the form of a binary adder performing subtraction by addition of the complement supplied by multiplying unit P, as above stated.

On the other hand, it is advantageous to provide in the adder and subtracter unit A a "quick tremsfer" system to reduce the time required by every subtraction or addition operation. The total capacity of the adder and subtracter unit A is the same as that of every cell R, that is to say 26 bits, one of which is a sign indication bit* The duration of an addition or subtraction operation with a transistor adder and subtracter unit may be below 200 nanoseconds.

The digital delay units Da and Db (for instance of the type including magneto-striction lines) may be replaced by analogue delay units (for instance with magnetic loops) disposed upstream of converters Ca and Cb.

Cells R have their outputs connected with a printing device.

Finally, the computer of Fig,1 may include accessory input and output elements, in particular digital to analogue converters so as to obtain an analogue output of the informations contained - - - in memory Mb, one of the converters supplying in the- analogue system the n-omeral of the cell (from zero to 127) and the other one the value contained in every cell. These two informations may be sent to a display device XY(oscilloscope or recorder XY) directly giving the curve of the correlation function.

It is also possible to provide a digital input element which makes it possible to enter, either by means of keys, or of a perforated strip, magnetic strip or perforated card reader, a given number into a given memory cell, in order to permit the use of the computer as function generator as it will be hereinafter explained · The operation of the computer illustrated by Fig.1 and above described is as follows: The two magnitudes X(t) and Y(t) the intercorrelation function of which is to be established are entered as electric signals of respective amplitudes X(t) and Y(t) which are functions of time t , one of the input Ea of converter Ca and the other on the input Eb of converter Cb. A fixed supplementary delay may be introduced, according as the case may bo, into ono of the delay units Da, Db.

Converters Cb and Ca perform an amplitude quantization and a time sampling, the latter under control of clock H, At every sampling time, that is to say at time intervals To = 1/25,000 second (Te may be as great as it is desired, which is useful for slow phenomonons) , these converters supply a coded delivery which corresponds, as above indicated, to mean levels proportional to -4, -3, -2, -1, 0, +1, +2, +3, and +4» The quantized successive deliveries of converter Ca, possibly delayed in delay unit Da, are sent to the cell mcmory unit Ma. The first 128 quantized values are finally stored (as hereinafter indicated, by successive passings from one cell to the next one of lower index, through intermediate memory S and register U) in the 128 cells to valuG X1 οί obtained on the first sampling being stored in the first coll t the value 2 of X(t) obtained on the second sampling being stored in cell Q2 and so on until the value ^2g °^ obtained on the 128th sampling, which is stored in cell Q-j23» At the time of the 128th sampling, gate G is opened and it will remain open until the end of the calculation operation* A first sub-c^rclo then begins.

The quantized value Y^28» of Y(t) at the time of the 128th sampling, arrives to the input P^ of the multiplying unit P, which first receives on its input P2 the value X-|28 sent into intermediate memory S from cell Qi28 ¾y operation of means Ga, which include a gate between Q^ g and S, which gate is then open. Multiplying unit P then performs the multiplication of 2Q by X.| 2Q and sends the result to the adder and subtracter unit A which receives on its input A2 the contents of cell RQ under control of moans Gb which include a gate between Q and A2, which gate is thon open. The contents of RQ is initially zero and consequently the output ^ of the adder and subtracter unit A then delivers the product of Y-|28 by ·|28 ' wllic^ is soirt to coll Q, means Gb then opening a gate disposed between ^ and Q. It will be noted that the product of Y.j2g by corresponds to a zero delay, 11Q = 0.

Then means Ga perform the transfer of the contents of cell 27» "tha is to Bay into intermediate memory S (the preceding contents ^2 of which has been transferred into register U) and multiplying unit P performs the product of 12Q by 12^ . Means Gb perform the transfer of the contents (equal to zero) of cell R^ to input it-,, then the transfer of output A^, that is to say of the product of Y.J28 ¾y X127 ' i1^0 cell . It will be noted that this product corresponds to a delay h^ which is equal to Te (Te being the sampling period, equal for instance to 1/25, 000 of a second but which nay be greater than this duration). During this time, the prior contents of intermediate memory S, to wit wkic has been transferred to register U, is sent through means Ga, to cell to replace value w ich has been transferred to intermediate memory S.

The third sequence of operations of this first sub-cycle corresponding to value ^s analog0"113 "t° "kke "tw0 preceding ones and it consists in transferring X-J26 ' contained in Q^2g » in o intermediate memory S, in multiplying, in P, 28 arriving "to P^ by in A the product of Y-J28 xi26 con-tents (equal to zero) of R^, then in transferring the sum, still equal to ^ 28*^126 ' in-*50 cell ^ corresponding to delay hg = 2 Te. At the same time, ^ 27 * wnicn nas bee transferred from intermediate memory S to register U, is sent to cell contents of which has just been utilized.

Then the same sequence of operations goes on with the contents of cells 25 » ^1 24' e^c"* GVery contents being, after transfer into intermediate memory S and multiplication by Y.J 23 in unit P, sent back to the cell Q of an index lower by one unit than that of the cell from which said contents had been extracted, whereas the product of the multiplication by X-j 28 is sent into a cell R of memory Mb of an index equal to the complement to 128 of the index of the cell Q in question.

Finally, in order to finish the sub-cycle corresponding to ' "k1*3 computer performs in the same manner the product of X.| , extracted from , by Y<|28* Tnis Product is sent to cell 6 - - - ' corresponding to delay 127 Te, and value ∑2 replaces Zj in cell Q , whereas is evacuated fron register U through output V.

The sub-cycle corresponding to sample ^eing finished, a new sampling is performed and it gives, on the one hand, Y-J2 ' on the other hand X129 > ^ls latter value being entered into cell Q.J23 which has been left free by the offsetting of value ^28 wllich has passed into cell » as a¾ove stated.

The sane sub-cycle of operations, as above recited for ' is repeated with ^29* This sub-cycle begins by the multiplication of inp The adder and subtracter unit Λ then receives on its input product fron the cell RQ of memory Mb. This is due to the fact that both of the products ^128*^1 8 ^129*^129 corrGSPoncl a delay equal to zero and that they are therefore integrated into cell RQ corresponding to a delay equal to zero. The second operation of this second sub-cycle consists in performing the same operations on Y-129 aPPliecl on and X128 con:ijlS from cell Q127 and applied by intermediate memory S to input Pg. The product Y129,X128 is adcl-Gc1k in adder and subtracter unit Δ to the actual contents (Y128*X127^ of , cell R-j ; then this algebraic sun is sent back to storing in coll R^ which,therefore, integrates the products corresponding to a delay ^. = To. During this time, X^o, > which has reached intermediate memory S, is sent into register U, and thence to cell Q^y Tllis second sub-cycle goes on as far as product Yi29*¾ COEling from cell , this product being added to the actual contents of oell which therefore integrates the products corresponding to a delay h127 = 127 Te'* finally X≥ is evacuated at "V.

A third analogous sub-cycle then begins with which is multiplied successively by ^^Q» χ·)29' X5* T eso different sub-cycles are repeated until the end of the calculation, that is to say during the duration T of the signals that are considered.

It will bo seen that one complete calculation consists of a cycle of operations including a plurality of sub-cycles each of which comprises 128 multiplication operations in multiplying unit P and 128 additions or subtractions in adder and subtracter unit A and also a plurality of transfers through gates comprised in means G-a and Gb, all the operations of the sub-cycles, and in particular the 128 multiplications and 128 additions, being performed within a sampling period Te. It is therefore the sub-cycle duration, determined by the technology of the components, that limits the frequency of sampling. This is why it is of interest to perform the multiplication and addition operations by means of components as quick as possible;, this remark also applying to intermediate memory S and memories Ma and Mb. The duration above indicated for the different operations and for the entering into the memory and the delivery therefrom lead to a sub-cyolo duration of the order of 300 nanoseconds, which permits of working with a sampling frequency of 25,000 Hz without difficulty If 64 points (instead of 128) only were taken on *tho correlation function it would be possible to use a sampling frequency of 50,000 Ηζ· The incremental delay is determined bjr the choice of the samples for the multiplication. When multiplying delay is zero; when multiplying ^y ^128 ΐ1ιΘ delay QCiViC^- Te; when multiplying ^v ^28 ^10 ^elay is equal to 2Te, and so on. The incremental delay is therefore equal to Te» It is the interval between two successive delays, O^Te, 2Te, etc Concerning the analysis duration T, reference is made to the formula 'given by J.BENDAT in "Principles of Random Uoise", Chap.VII, giving the relation between the necessary duration of analysis of signal T, the width B of the signal spectrum and the desired precision p \i> (p = 0.01), T is equal to 250 seconds. It would therefore be necessary to analyze the signal during a time T of 250 seconds, that is to say take -samples and sub-cycles with period Te during 250 seconds.

On the other hand, the sampling frequency, which,according to the SHANNON theorem, should be at least equal to 2 Fm (Pni being the highest frequency contained in the signal), must, in actual practice, be considerably higher than this value due to the fact that the interpolation corresponding to the SHANNON theorem is very difficult to obtain physically If a linear interpolation is deemed sufficient, and if it is desired to obtain a precision of the order of 1$, it is necessary to take a sampling frequency equal to 22 tines the upper frequency Pn. lowever it would seem that choice might be made of a sampling frequency lower than 22 times the highest frequency according to the most recent mathematical studies* But, for the sake of safety, it has been preferred to choose a sampling frequency higher than 22 times the highest frequency, to wit a sampling frequency of 25,000 Hz to analyze signals the frequency of which does not exceed 1,000 Hz, which are the most frequent signals in processes for which correlation calculations are to be performed.

Starting from the above cited limits of T and Pe, it is possible to determine the number of elementary informations or "words" that are treated since this number is equal to T.Pe, that is to say, in the case of the particular values taken by way of example 2¾ί£ X 22 Pn.

In the most favorable case, B = Fm and the number of words is then 550,000, If autocorrelation calculations arc performed, at least 550,000 words will be required in memory, in the case where simultaneous calculation of all the points of the correlation function is not made . This number must be doubled for intercorrelation calculations because 550,000 words are requested for every signal, that is to say, on the whole, 1,100,000 words.

The stocking of 550,000 or 1,100,000 words would require an intermediate memory of very great capacity between the device . for producing the signals to bo studied and the correlatoi" itself, that is to say upstream of inputs Ea and Eb in Fig.1 , As a matter of fact, it is to avoid this intermediate memory of very great capacity that very quick calculation components have been provided, permitting operation in real time, whereby the intermediate memory upstream of Ea and Eb is done away witht On the contrary, the number of words to be tre -tcd, which is 550,000 per signal comes directly into play to determine the capacity of the cells R of memory ISTb - This is due to the fact that, if it is admitted that for most of the treated signals, the mean absolute values does not exceed 77$ of its maximum value (that is to say level 3 of the quantization), the maximum value of the sum to be stored in every cell R is 550,000 x 3 x 3, that is to say about 5,000,000. In the device, the capacity has been chosen equal to 16,000,000, which is .quite sufficient. It is even possible to provide, for every cell R, an indicator to warn the operator in case where the 16,000,000 capacity is exceeded in a cell R of memory Mb.

Finally, an approximate calculation of the maximum value of the delay necessary to calculation of a correlation function with a given precision gives, for a required precision of 1$, a maximum delay of the order of 120 Te, Te being, as above indicated, the sampling period* For safety purposes and in view of the number of cells of standard memories, a maximum delay of 128 Te has been chosen* The organization of the correlation function computer illustrated by Fig,1, although it is very simple in view of the complexity and the rapidity of the calculations to be performed 0. permits, as astonishing as it may look, of calculating, at the cost of little important modifications or additions, other functions (than autocorrelation and intercorrelation functions) which are of great interest in the treatment of informations.

In particular, this computer, when slightly modified, ;5 permits of determining the following functions: - probability density function of the first order; - moan value of a signal, - conditional probability density function for two -variables, - distribution of the delays between correlated aleatory events, 0 and this with an automatic compensation of the background noiso* The computer may also act as: · - a generator of functions, and - a harmonic analyzer of a function known by its physical representation, ,5 - an analogue-digital memory for storing and delivering a physical phenomenon represented by a voltage varying as a function of time (or any other parameter).

Different accessory operations of the computer of Fig.1 will now be examined. 1, MEASUREMENT OF PROBABILITY DENSITIES OP THE FIRST ORDER.

It is desired to obtain the following function of the anplitude a. of the signal P (a, da) = Pr ja X(t). a+daj , da being equal to 1/128 of the maximum anplitude of the signal.

In order to perform this operation, one operates on a single nagnitude which is the only one to be entered into the apparatus. Use is made of the output of converter Ca, for instance coded at 64 levels of absolute value with the negative and the positive signs (as a natter of fact converters Ca and Cb are provided with 64 levels in the analyzer above described with reference to Fig,1, but for calculating the correlation functions, use is nade of nine outputs at levels -4, -3, ... +3, +4). Every tine the value of the sampled nagnitude of X(t) ranges between level n and level n+1 , one unit is added to the cell R of index n, n ranging from 0 to 127. In the case where the function is centered about the origin, the cells having indexes ranging from zero to 63 are assigned to negative amplitudes* In the case where the signal is not centered, a device permits of offsetting the zero level* The computer of Fig,1 then works as an anplitude selector but includes the adaptation to a negative amplitude as well as to a positive one* 2. MEASUREMENT OF THE MEAN VALUE OF A SIGNAL, The signal X(t) the mean value of which is to be measured is injected at input Ea whereas, on input Eb there is permanently applied a signal of level 1.. Then the operation is conducted as for calculating a correlation function, but with a single multiplication being performed for every sampling, and in cell RQ there is stored the sun of the products corresponding to the following integral: Knowing the duration T of the measurement the mean value of the signal is deduced therefrom. 3. MEASUREMENT OF THE CONDITIONAL PROBABILITY DENSITY FUNCTIONS FOR TWO VARIABLES .

It is, in some cases, useful to be able to measure the probability density function of the second order, that is to say the probability of having at the same time: . a<^X(t) ^ a + da and b-^Y(t) ^b + db This operation may be performed very easily for any couple of values a and b- such that a = b + a + a constant value., a and b being variable within the whole range of the input ■ voltages* For this purpose, X(t) is entered at one input Ea and Y(t) at. the other input Eb. The . value of constant a - b is displayed and. one unit is sent into the cell R having an index n corresponding to the value "a" .of X(t), every time X(t) is equal to this value and Y(t) to value "b*.

As in the case of the probability density of the first order, da and db have a value equal to 1/128th of the full scale.

It would obviously be possible to perform this . measurement for any law a = f(b), but it seems preferable, in view of the many forms that this law may have, to perform the display thereof by a device external to, the apparatus* .·. ' 4. MEASUREMENT OF THE DISTRIBUTION OF THE LAGS BETWEEN CORRELATED RANDOM EVENTS WITH AUTOMATIC COMPENSATION OF THE BACKGROUND NOISE, This application may be very important in several fields, such for instance as biology (measurement of the responses (measurement of the lifetime of longlife bodies), thermal pnysiS^ (for instance measurement of the velocities of bubbles in a liquid and vapor two-phase flow) .

In the most general case, there are two detectors one of which is concerned with type A events, the other with type B events, any typo B event being produced by a type A event but with a random lag between these two events. It is desired to determine the distribution of these lags. The signals corresponding to type A events are sent through the channel where 127 lags are available and at the output of every lag those signals are brought into coincidence with those produced by type B events. When there is a coincidence • between a type B event and a type A event with a lag of n.r, one unit is added to the contents of the cell R of index n.

This method also applies when there are "false" signals A or B and false coincidences and it is easy to eliminate the "noise" due to these false coincidences without complications.

The 127 lags that can exist are equally spaced from one another by a value r which may bo adjusted as desired, starting from one microsecond.

It is also possible, if necessary, to use, in one or the other of the channels, an additional relay by making use of unit Da or Db.

Of course, when, as it is the case here, one works upon impulses, the inputs arc after converters Ca and Cb which in this case are not used.

This method of calculation also applies if a single detector is used for detecting both of the events A and B, that is to say if there is nothing to differentiate an impulse due to an event A from an impulse due to an event B. .66-St -21- . GENERATOR OP FUNCTIONS.

It is possible, by making use of the analogue outputs above mentioned but not illustrated by the drawings, to use the memory lib of the computer as a generator of functions. It suffices for this purpose to sample the curve representing the function to be generated at 128 points and to inscribe these values in the 128 cells R of Mb. The great advantage for the operator is due to the fact that the input entries are digital, the outputs remaining of the analogue type, with any scale of times (limitation concerning quickness being of the order of 50 microseconds for the quickest generation of the function).

This generator of functions may obviously work in repetitive manner, which means that the function is repeated periodically* Generation is made by 128 line segments, which gives a very good precision, as compared with conventional function generators which work with about twenty straight line segments.

Furthermore, these respective line segments may have a different component on the axis of times, in such manner as to bo adapted to the variation of the function to be generated. This is equivalent to sampling this function with a frequency variable according to its instantaneous spectrum. Fig.2 shows, by way of example, a curve having very different slopes in portions ab, be, cd, de, ef, and beyond f. For such a curve there may be provided for instance the generation of a density of: 2 straight line segments per cm. between a and b, - - and c, t'O - - ~ _ _ - o and d, · - - - - - — d and e, 2 - — - - o and f, and - - - - - - beyond f, that is to say a density substantially proportional to the reciprocal of the absolute value of the slope.

It would be possible, if this proved to be necessar , φο deconposo the function into 256 points instead of 128 by splitting cells R each into two halves.

This solution would pemit of obtaining in some cases a sufficient precision with an interpolation in "staircase steps" (interpolator of order 0) easier to carry out than linear interpolation (interpolator of order 1 ) .

VI. HARMONIC ANALYSIS OP A FUNCTION KNOWN BY ITS PHYSICAL REPRESENTATION (Fourier transformation).

The function to be analyzed is generated by the function generator and is cycled to frequency FQ. If the analogue output (above mentioned but not illustrated by the drawings) is paseed through a filter which lets pass only this frequency FQ, its amplitude will represent the amplitude of the fundamental component* If this same function is subsequently cycled to frequency FQ/2 and sent to the same filter tuned to FQ, the output will correspond to the second harmonic. If the function is cycled to frequency FQ/H. and if the output is passed through the sane filter, one will obtain the amplitude corresponding to the nth harmonic .

The filtering device that is used must be very selective* It is for instance of the pseudo-synchronous detection type .

It should be noted that if the function is even (or if it is odd) , the operation which has been described gives its decomposition into the Fourier series (which may be considered as the Fourier transformation of the defined function within a linited field.

If the function is not of one of the above mentioned types it may still be decomposed into Fourier series by two successive operations relating one to 1/2^ f(t) + f(-t) ; and the other to 1/2 |f(t) - f(-t)J ; these two last mentioned functions being one e oupu o s armon c ana yzer may e ■ ma e au omap by printing, in a printing device, of the rank of every harmonic and of its value* VII. ANALOGUE-DIGITAL MEMORY FOR STORING THE RESTITUTION OP A PHYSICAL PHENOMENON REPRESENTED BY A VOLTAGE VARYING AS A FUNCTION OP TIME (OR ANY OTHER PARAMETER).

This memory function can be obtained without difficulty for any phenomenon of a duration equal to or greater than 1 millisecond.

The analogue signal is injected into one of the converters (Cb for instance, the other being not used at this time) which performs sampling and coding. The oanpling frequency is adjusted in such manner as to distribute the 128 samples over the useful duration of the signal* Every sample is sent, after coding, into the cell R the index of which corresponds to its time rank. Once the 128 samples have been stored the apparatus works as a function generator.

The apparatus therefore works as an analogue memory.

This is the kind of operation which seems the most interesting, but, of course, the apparatus might work as an analogue digital memory or as a digital-analogue memory or again as a digital-digital memory.

In all embodiments, there is always established an analyzer, in particular of stochastic phenomenons, and especially a correlation function computer, the operation of which results sufficiently from what precedes to make it unnecessary to insist -on its subject, and which has over existing similar apparatus many advantages and in particular the following ones: First it performs calculation with a very good accuracy (of the order of or even better).

Its operation is safe, simple, without a complicated adjustment.

Although the multiplication and integration operations are 12.10.66-St -2 - made in digital fashion, the input signals are analogue signals .jj^tici permits of simply performing the preliminary filtering operations, w ioh are nearly always necessary.

It works in real time, which permits of avoiding the use of a buffer memory of great capacity at the input.

It gives, in a single measurement bearing upon a single sample duration T, a number N of points of tho correlation function making it possible to obtain a sufficient definition.

Although number N is normally 128 in the embodiment that has been described, this number may be doubled by doing again tho operation after having added a supplementary delay of 128 Te.

It is very reliable and can be made in integrated circuits.

Finally, it permits,' at the cost of a slight increase of its complexity and of its cost of manufacture, of obtaining a universal statistical analyzer capable of performing other operations than the calculation of correlation functions, in particular calculation of the. functions above pointed out.

In a general manner, while we have, in the above description, disclosed what we deem to be a practical and efficient embodiment of the present invention, it should be well understood that we do not wish to be limited thereto as there might be changes made in the arrangement, disposition and form of the parts without departing from the principle of .the present invention as comprehended within the scope of the appended claims* .66-St -25-

Claims (10)

HAVING- NOW particularly described and ascertained the nature of our said invention and in what manner the same is to be performed,' we declare that what we claim is

1. An analyzer, in particular a correlation function computer, characterized in that it comprises, in combination, two sampling analogue to digital converters comprising a limited number of quantization bands, each of said converters having an input for an analogue signal to be analyzed and an output delivering, at successive sampling times, the quantized digital magnitude of this signal; at least one delay unit for delaying a signal, in particular after its quantization in the corresponding sampling converter; a first memory, called measurement memory, with a plurality of memory cells each capable of storing a particular qtiantized magnitude, this first memory being connected with the output of one of the sampling converters, possibly through the intermediate of a delay unit, so as to receive therefrom, in particular into an input cell, the successive sampling quantized magnitudes, possibly delayed; a buffer or intermediate memory capable of storing a particular quantized magnitude, with an input connectable to each of the cells of said first memory, and two outputs; a register capable of storing a particular quantized magnitude, with an input connected with one of the outputs of said intermediate memory and an output connectable to each of the cells, of said first memory, with the exception of said input coll, and to an evacuation outlet; means for connecting, on the one hand, the cells of the first memory to said input of the intermediate memory, sequentially in a given order, starting from an input cell, and, on the other hand, the of said register, sequentially, to said first memory cells in the above mentioned order, starting from ^j . cell that follows said input cells, this last mentioned cell being replaced in the cycle by said evacuation outle ; a multiplying unit capable of multiplying by each other two particular quantized magnitudes, with two inputs connected one to tlia output of the second sampling converter, possibly through the intermediate of a delay unit, and the other to the other output of the intermediate memory; a second memory, called integration memory, including as many memory cells as the first memory, every cell of said second memory having a capacity greater by several orders of magnitude than that of every cell of the first memory; an adder and subtracter unit having two inputs, one connected with the output of the multiplying unit and the other connec able to each of the cells of the second memory, and an output; and means for connecting first said second input and then said output of the adder and subtracter unit, sequentially, to each of the cells of the second memory,

2. An analyzer, and in particular a computer, according to claim 1 further characterized in that its digital portion works in the binary fashion.

3. An analyzer, and in particular a computer, according to cither of claims 1 and 2, further characterized in that the intermediate memory and the register are constituted by two identical cascades of bistable circuits.

4. An analyzer, and in particular a computer, according to any of the preceding claims, further characterized in that the two memory units constitute the two portions, of very unequal respective importances, of a single memory, advantageously of the thin magnetic film kind*

5. An analyzer, and in particular a computer, according W any of the preceding claims further characterized in that the multiplying unit is of a diodo matrix type, in particular with a matrix for the absolute values and a matrix for the sign.

6. An analyzer, and in particular a computer, according to any of the preceding claims, further characterized in that the multiplying unit delivers the modulus . of the product in the complementary form if the sign of the product is negative and that the adder and subtracter unit performs the subtraction operation by addition of said complement .

7. An analyzer, and in particular a computer, according to any of the preceding claims, further characterized in that it comprises accessory input and output meojis, in particular an analogue output for the cells of the second memory.

8. An analyzer, and in particular a computer, according to claim 7, further characterized in that it comprises a digital input adapted to permit of introducing digital values into memory.

9. An analyzer, and in particular a computer, according to any of the preceding claims, further characterized in that it comprises means for entering an incremental delay which is a given fraction of the sampling period.

10. An analyzer, and in particular a computer substantially/ as above described and illustrated by the accompanying drawings* Dated this 17th day of October, 1966 For the Applicants DR. REINH0IIH30HH & CO.