IL116220A0 - Automated process for generating boards from defective chips - Google Patents

Automated process for generating boards from defective chips

Info

Publication number
IL116220A0
IL116220A0 IL11622095A IL11622095A IL116220A0 IL 116220 A0 IL116220 A0 IL 116220A0 IL 11622095 A IL11622095 A IL 11622095A IL 11622095 A IL11622095 A IL 11622095A IL 116220 A0 IL116220 A0 IL 116220A0
Authority
IL
Israel
Prior art keywords
automated process
defective chips
generating boards
boards
generating
Prior art date
Application number
IL11622095A
Original Assignee
Memsys Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memsys Ltd filed Critical Memsys Ltd
Priority to IL11622095A priority Critical patent/IL116220A0/en
Publication of IL116220A0 publication Critical patent/IL116220A0/en
Priority to PCT/IL1996/000171 priority patent/WO1997020316A2/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
IL11622095A 1995-11-30 1995-11-30 Automated process for generating boards from defective chips IL116220A0 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IL11622095A IL116220A0 (en) 1995-11-30 1995-11-30 Automated process for generating boards from defective chips
PCT/IL1996/000171 WO1997020316A2 (en) 1995-11-30 1996-11-28 Automated process for generating boards from defective chips

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IL11622095A IL116220A0 (en) 1995-11-30 1995-11-30 Automated process for generating boards from defective chips

Publications (1)

Publication Number Publication Date
IL116220A0 true IL116220A0 (en) 1996-01-31

Family

ID=11068261

Family Applications (1)

Application Number Title Priority Date Filing Date
IL11622095A IL116220A0 (en) 1995-11-30 1995-11-30 Automated process for generating boards from defective chips

Country Status (2)

Country Link
IL (1) IL116220A0 (en)
WO (1) WO1997020316A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2367655A (en) * 2000-10-06 2002-04-10 Nokia Mobile Phones Ltd Method of using an integrated circuit with defects
US7060512B2 (en) * 2002-02-26 2006-06-13 Celetronix, Inc. Patching methods and apparatus for fabricating memory modules

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3897626A (en) * 1971-06-25 1975-08-05 Ibm Method of manufacturing a full capacity monolithic memory utilizing defective storage cells
US4254477A (en) * 1978-10-25 1981-03-03 Mcdonnell Douglas Corporation Reconfigurable memory circuit
DE3032630C2 (en) * 1980-08-29 1983-12-22 Siemens AG, 1000 Berlin und 8000 München Semiconductor memory from memory modules with redundant memory areas and method for its operation
US4376300A (en) * 1981-01-02 1983-03-08 Intel Corporation Memory system employing mostly good memories
US4471472A (en) * 1982-02-05 1984-09-11 Advanced Micro Devices, Inc. Semiconductor memory utilizing an improved redundant circuitry configuration
JPH02310898A (en) * 1989-05-25 1990-12-26 Nec Corp Memory circuit
KR100274478B1 (en) * 1990-05-10 2001-01-15 칼 하인쯔 호르닝어 Integrated semiconductor memory with parallel test device and redundancy method
US5299202A (en) * 1990-12-07 1994-03-29 Trw Inc. Method and apparatus for configuration and testing of large fault-tolerant memories
US5278793A (en) * 1992-02-25 1994-01-11 Yeh Tsuei Chi Memory defect masking device
US5359570A (en) * 1992-11-13 1994-10-25 Silicon Storage Technology, Inc. Solid state peripheral storage device
JP3301047B2 (en) * 1993-09-16 2002-07-15 株式会社日立製作所 Semiconductor memory system
US5539697A (en) * 1994-08-03 1996-07-23 Bi-Search Corporation Method and structure for using defective unrepairable semiconductor memory
US5528539A (en) * 1994-09-29 1996-06-18 Micron Semiconductor, Inc. High speed global row redundancy system
US5577050A (en) * 1994-12-28 1996-11-19 Lsi Logic Corporation Method and apparatus for configurable build-in self-repairing of ASIC memories design
US5572470A (en) * 1995-05-10 1996-11-05 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column
US5574688A (en) * 1995-05-10 1996-11-12 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column
US5608678A (en) * 1995-07-31 1997-03-04 Sgs-Thomson Microelectronics, Inc. Column redundancy of a multiple block memory architecture

Also Published As

Publication number Publication date
WO1997020316A2 (en) 1997-06-05
WO1997020316A3 (en) 1997-09-04

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