IE61980B1

IE61980B1 - A timer unit

Info

Publication number: IE61980B1
Application number: IE29889A
Authority: IE
Inventors: John Joseph Power
Original assignee: Tech Developments Limited
Priority date: 1989-01-31
Filing date: 1989-01-31
Publication date: 1994-12-14
Also published as: GB8924216D0; ZA891171B; GB2227618A

Abstract

The timer unit has A.C. input terminals 15, 16, output terminals 17, 18 for connection to the solenoid valve (2, 8) (Fig 4), and an A.C. switch 21 repetitively turned on and off by ON and OFF period timers U1, U2 respectively. The switch 21 is preferably a MOSFET TR1 connected across a diode bridge D4 - D7 and the timers U1, U2 may be type 14541 integrated circuit counter timer. Transistors Q1, Q2 and a zener diode D2 provide a stabilised voltage across a capacitor C1 for supplying timers U1, U2. The ON and OFF periods may be adjusted firstly by varying the pulse frequency of the timers using potentiometers P1, P2, and secondly by using plug terminals A, B, E, F, G to connect count-select pins of the timers U1, U2 selectively to high or low potentives. LED's 13, 14 indicate when the solenoid is on and off, and a switch SW1 starts the unit by resetting timer U1. The switch 21 and timer circuitry 23, 24 may be mounted in a water tight housing (3), (Figs 1 to 4), having AC input terminals on one side with an opposite side carrying output terminals into which the solenoid valve assembly plugs directly.

Description

The present invention relates to a timer unit, and in particular to a timer unit for switching on and off a component at predetermined intervals. In particular, the invention relates to a timer for switching on and off a solenoid valve, though needless to say, it is not limited to such a timer unit.

Where it is desired to switch on and off a solenoid valve at predetermined intervals, it is normal to provide a timer in a control circuit to operate the solenoid. However, the difficulty with such arrangements is that it generally requires relatively complex wiring and circuitry to deliver power to the solenoid valve. Normally, the timer or timers are mounted in a control box remote from the solenoid valve and this, thus, requires the provision of a power supply to the timer which switches a further power supply which has to be wired to the solenoid.

This, it will be appreciated, is a relatively time-consuming and also a relatively expensive task, in that it requires a considerable amount of wiring and also the services of a skilled electrician. c There is therefore a need for a timer unit which overcomes the problems of known timers.

The present invention is directed towards providing such a timer unit.

According to the invention, there is provided a timer unit comprising a housing, a pair of input terminals being provided on one side of the housing, and a pair of output terminals being provided on the opposite side of the housing, a switch means being located in the housing for switching the output on the output terminals, the switch means comprising a MOSFET connected across the load terminals of a rectifying bridge circuit connected between the input and the output terminals, a timing circuit located in the housing for controlling the gate of the MOSFET for operating the switch means, the timing circuit comprising a pair of counter timer chips, one counter timer chip being provided for timing the on period of the switch means, and the other counter timer chip being provided for timing the off period of the switch means, an RC oscillator circuit located in the housing being connected to the pulse generator of each counter timer chip, each RC circuit comprising a potentiometer for varying the output frequency of the pulse generator of the chip for varying the timing periods, and a voltage regulating circuit for powering the timing circuit, the voltage regulating circuit being located in the housing and being fed from the input terminals.

In one embodiment of the invention, a means is provided for selectively determining the count of the respective counter timer chips. Advantageously, the means for selectively determining the count is provided by plug-in means for selectively connecting the count pins of the respective counter timer chips to a high or a low.

In one embodiment of the invention, the voltage regulating circuit comprises a high voltage transistor connected in series with an impedance means across the input terminals, the impedance means being connected to the emitter of the transistor, and a zener diode connected between the transistor base and the impedance means, a stabilized output voltage being provided across the impedance means. Preferably, a pair of high voltage transistors are provided in series, the emitter of one transistor being connected to the collector of the other. Advantageously, the impedance means is provided by a capacitor. In one embodiment of the invention, the transistor and impedance means is fed through a rectifier.

The invention will be more clearly understood from the following description of a preferred embodiment thereof, given by way of example only, with reference to the accompanying drawings, in which: Fig. 1 is a perspective view of a timer unit according to the invention, Fig. 2 is another perspective view of the timer of Fig. 1, Fig. 3 is a partly cut-away and partly exploded 10 perspective view of the timer unit of Fig. 1, Fig. 4 is a perspective view of the timer unit of Fig. 1 in use, and Fig. 5 is a circuit diagram of the timer of Fig. 1.

Referring to the drawings, there is illustrated a 15 timer unit according to the invention indicated generally by the reference numeral 1. In this case, tie timer is particularly suited for controlling a valve 2, controlled by a solenoid 8 as illustrated in Fig. 4. The timer unit 1 comprises a housing 3 formed in two halves 31 and 32 both of plastics material ultrasonically welded together along a water tight seam 33. Input terminals in this case three input pins 5, namely live, neutral and earth pins, are provided for connecting into a power supply, in this case a 220 volt power supply. Output terminals 6 are provided by three sockets 7 to receive corresponding pins (not shown) of the solenoid 8 of the solenoid valve 2. As can be seen, the output terminals 6 are on the opposite side of the housing 3 to the input terminals 4. A socket 10 carrying a power supply to the timer unit 1 is illustrated connected to the input terminals 4 in Fig. 4. Such sockets and solenoid valves will be well known to those skilled in the art.

Control knobs 11 and 12 extending from the housing 3 are provided to select the on and off time periods. These knobs 11 and 12 are connected to potentiometers which will be described in detail below with reference to the circuit diagram of Fig. 5. Each control knob 11 and 12 comprises a shaft 34 extending therefrom which slidably and rotatably engages a tubular member 35 extending from the potentiometer not shown in Figs. 1 to 4. Each tubular member 35 extends through an opening 36 in the housing 3. A flange 37 extends around each tubular member 35 and the end of each tubular member 35 beyond the flange 37 is threaded at 38. A nut 39 on the threaded portion 38 secures the tubular member 35 in the housing 3 and clamps a recessed portion 40 of the housing against the flange 37 to form a water tight joint. The recess 40 accommodates the nut 39. An O-ring 43 extending round the shaft 34 forms a water tight seal between the shaft 34 and the tubular member 35 thus preventing any ingress of moisture into the potentiometer. A sheet member 45 of plastics material is bonded to the surface 46 of a recess 47 in the housing 3. The sheet member 45 extends over the nuts, thereby concealing them. Graduations 49 in minutes or seconds as desired are screen printed onto the sheet member 45 to facilitate setting the knobs 11 and 12.

Light emitting diodes 13 and 14 are provided in the housing 3 to indicate whether the output from the timer unit 1 is switched on or switched off respectively. The light emitting diodes 13 and 14 are illustrated in the circuit diagram of Fig. 5 and will be described below. Clear portions 48 are provided in the sheet member 45 to form lenses to the light emitting diodes 13 and 14. The sheet member 45 is so bonded to the surface 46 of the recess 47 to provide a water tight joint adjacent the light emitting diodes.

A test switch 22 is provided at the top of the housing 3. The test switch comprises a tape 50 having two contacts 51 and 52 of a printed circuit printed thereon. The contacts are connected into the circuit of Fig. 5, as will be described below. Two spacer discs of plastics material 53 and 54 are provided over the tape 50. An electrically conductive disc of foil material 55 is placed over the disc 54 and a touch pad 56 is placed over the disc 54 and the foil disc 55. Accordingly, on depressing the touch pad 56 the foil disc 55 is deformed through openings 56 and 57 in the discs 53 and 54 respectively to engage the contacts 51 and 52 on the tape 50, thereby closing the circuit between the contacts 51 and 52 and activating the test switch 22. A recess 58 is formed in the housing to accommodate the discs 53, 54, 55 and 56. The tape 50 is bonded to the surface 59 of the recess 58 and the discs 53, 54, 55 and 56 are bonded together. The disc is also bonded to the surface 59 of the recess 58.

Thus, a water tight joint is formed around the switch 22, thereby preventing the ingress of the moisture into the housing through the switch 22.

Referring now to the circuit diagram of Fig. 5, the live and neutral of the input terminals 5 are indicated by the reference numerals 15 and 16 respectively. The live and neutral of the output terminals 7 are represented by the reference numerals 17 and 18. The live input terminal 15 is connected directly to the output terminal 17. The neutral input terminal 16 is connected through switch means to the neutral output terminal 18. In this case, the switch means is provided by a MOSFET TRI which is connected across the load terminals 19 and 20 of a rectifying bridge circuit 21. The bridge circuit 21 comprises high voltage diodes D4, D5, D6 and D7. A timing circuit 23 controls the gate of the MOSFET TRI to switch on and off the output terminals 7. Before describing the timing circuit 23 in detail, a voltage regulating circuit 24 which supplies a supply voltage of approximately 12 volts to the timing circuit 23 will first be described.

The voltage regulating circuit 24 is connected across the input live and neutral terminals 15 and 16 through the rectifying bridge circuit 21. The voltage regulating circuit 24 comprises a pair of high voltage transistors Q1 and Q2 connected in series with an impedance means which in this case is provided by a reservoir capacitor C1 of 22 microF. A stabilized output voltage is provided across the capacitor C1 to power the timing circuit 23. The transistors Q1 and Q2 and capacitor C1 are fed through a rectifying diode D1. The base of the transistors Q1 and Q2 are supplied through a pair of resistors RI and R2 each of 47 Kohms. A zener diode D2 is connected across the base of the transistor Q2 and the capacitor C1.

Accordingly, the zener diode D2 maintains the base voltage of the transistor Q2 at approximately 12.6 volts thereby retaining the voltage across the capacitor C1 substantially constant. This is achieved by virtue of the fact that should the voltage on the capacitor Cl begin to rise, the voltage drop between the base and emitter of the transistor Q2 is reduced, thereby reducing the flow of current through the transistor Q2 which thus reduces the voltage on the capacitor C1. In the event that the voltage across the capacitor Cl begins to fall, the base emitter voltage of the transistor Q2 increases, thereby causing the transistor Q2 to conduct more current, thus rising the voltage of the capacitors C1.

The transistors Q1 and Q2 have a wide voltage range, in this case 24 volts to 250 volts, they are low CMOS components and thus the load current is small.

A current limiting resistor R7 of 100 ohms feeds the voltage regulating circuit 24. A snubber capacitor C3 of 0.1 microF and a varistor V1 protect the circuitry from voltage spikes which may occur in the input supply.

The timing circuit comprises a pair of counter timer chips Ul and U2 which switch on and off periods of the 1 MOSFET TR1. The counter timer chip U1 determines the time period for which the MOSFET TRI is switched on, while the counter timer chip U2 determines the off period of the MOSFET TR1. In this case, the counter timer chips U1 and U2 are provided by Motorola chips type No. 14541. Each counter timer chip comprises a pulse generator oscillator and a 16 bit counter. An RC circuit is connected to each counter timer chip U1 and U2 for varying the frequency of the pulse generator. The RC circuit associated with the counter timer chip Ul comprises a capacitor C4 of 22 nF and a pair of resistors R12 and R13 of 100 Kohms and 10 Kohms respectively. A potentiometer P1 in the RC circuit is controlled by the control knob 11 and permits the frequency of pulses generated in the counter timer chip U2 to be varied. The RC circuit associated with the counter timer U2 comprises a capacitor C5 of similar value to the capacitor C4 and resistors R14 and R15 of similar values to the resistors R12 and R13 respectively. The potentiometer P2 is controlled by the control knob 12.

The count select pins 12 and 13 of each counter timer chip Ul and U2 can be selectively connected high or low through plug terminals Β, E, F and G respectively. Biasing resistors R10, R11, R17 and R18 of 10 Kohms connect the pins 12 and 13 of the counter timer chips U1 and U2 high or low as the case may be, depending on whether the plug connections Β, E, F and G are made or not. A counter select pin 9 of the counter timer Ul may also selectively be connected high or low through a plug terminal A. A biasing resistor R9 also of 100 Kohms connects the pin 9 high when the plug connection at A is not made. Thereby, depending on the bit count which is selected from each counter timer chip, the time period for which each counter timer chip times may be varied. The output pin 8 of the timer U1 is fed to the reset pin 6 of the counter timer chip U2 when the plug connector D is closed. The output pin 8 of the counter timer U2 is fed through a plug connector C to the reset pin 6 of the timer counter chip Ul for resetting and activating the counter timer chip Ul, when the plug connector C is closed. Where it is desired to isolate the counter timer chip U2 from the circuit, this is done by opening the plug connectors D and C. However, in their normal mode, the plug connectors D and C are made. A current limiting resistor R8 of 100 Kohms is provided between the reset pin 6 of the counter timer chip U1 and the output pin 8 of the counter timer chip U2 to avoid damage to the counter timer chip U2 when the switch SW1 is switched on to initially activate the timer unit.

Suitable plugs are provided to connect the plug connectors A to G as desired. Normally, the plugs would be inserted between the appropriate contacts A to G in the factory prior to mounting and sealing the circuitry within the housing 3.

When a high is placed on the reset pin 6 of the timer Ul, the output pin 8 goes high and the timer Ul commences to time. The high on the output pin 8 is fed through a resistor R4 of 10 Kohms to switch on the MOSFET TR1, thereby putting power on the output terminals 6.

The high output on the pin 8 is fed to the input pin 6 of the counter timer chip U2. When pin 6 of the counter timer is high, pin 8 is low. This accordingly puts a low on the reset pin 6 of the counter timer chip Ul. Thus, as soon as the counter timer chip Ul has timed out, its output pin 8 goes low, thereby switching off the MOSFET TRI, and in turn the output terminals 6. The low on the input pin 6 of the counter timer chip U2 causes the counter timer chip U2 to commence timing. However, the pin 8 is still held low while the counter timer chip U2 is timing. When the counter timer chip U2 reaches the end of its timing period, a high is placed on the output pin 8 of the counter timer chip U2 which in turn resets pin 6 of the counter timer chip Ul and puts a high on the output pin 8 of the counter timer chip Ul and causes it to commence timing. The high on the output pin 8 switches off the counter timer chip U2 again, thus putting a low on its pin 8. When the counter timer chip U2 times out its output pin 8 remains low until it is reactivated.

A switch SW1 is provided to initially activate the reset pin 6 of the counter timer Ul and to test the circuit. The touch switch 22 in the housing 3 operates the switch SW1.

The light emitting diodes 13 and 14 are powered depending on whether there is a high or low on the pin 8 of the counter timer chip U1. When pin 8 of the counter timer chip U1 goes high, the on light emitting diode 13 is switched on. When the pin 8 goes low, the off light emitting diode 14 is switched on.

In use, with the timer unit 1 connected to the solenoid valve 2 and a power supply as illustrated in Fig. 3, the on period and off period for the solenoid valve is selected by the control knobs 11 and 12. The timer unit is then switched on by pressing the touch switch 22. This activates the counter timer chip Ul which switches on the solenoid valve 2 and commences to time. On the counter timer Ul switching off, the counter timer chip U2 is activated and begins to time the off time of the solenoid valve 2. On the counter timer chip U2 having timed out, a high is placed on its 5 output pin 8 to reset the counter timer chip Ul to switch on the solenoid valve 9 and recommence the on time period.

It will be appreciated that while in a particular embodiment of the invention one on and one off time period may be selected, more than one on and more than one off time period may be selected of different times. This will be achieved by providing more counter timer units. It will also, of course, be appreciated that while it is preferable, it is not necessary to provide light emitting diodes to indicate whether or not the valve is on or off. It will also be appreciated that while the impedance means of the voltage regulating circuit has been described as being a capacitor, other suitable impedance means could be provided without departing from the scope of the invention, as indeed could other suitable voltage regulating means be provided.

While it is preferable, it is not essential that the count select pins may be selectively connected.

Claims

1. A timer unit comprising a housing, a pair of input terminals being provided on one side of the housing, and a pair of output terminals being provided on the 5 opposite side of the housing, a switch means being located in the housing for switching the output on the output terminals, the switch means comprising a MOSFET connected across the load terminals of a rectifying bridge circuit connected between the input and the 10 output terminals, a timing circuit located in the housing for controlling the gate of the MOSFET for operating the switch means, the timing circuit comprising a pair of counter timer chips, one counter timer chip being provided for timing the on period of 15 the switch means, and the other counter timer chip being provided for timing the off period of the switch means, an RC oscillator circuit located in the housing being connected to the pulse generator of each counter timer chip, each RC circuit comprising a potentiometer 20 for varying the output frequency of the pulse generator of the chip for varying the timing periods, and a voltage regulating circuit for powering the timing circuit, the voltage regulating circuit being located in the housing and being fed from the input terminals. 25

2. A timer unit as claimed in Claim 1 in which a means is provided for selectively determining the count of the respective counter timer chips.

3. A timer unit as claimed in Claim 2 in which the means for selectively determining the count is provided by plug-in means for selectively connecting the count 5 pins of the respective counter timer chips to a high or a low.

4. A timer unit as claimed in any preceding claim in which the voltage regulating circuit comprises a high voltage transistor connected in series with an 10 impedance means across the input terminals, the impedance means being connected to the emitter of the transistor, and a zener diode connected between the transistor base and the impedance means, a stabilized output voltage being provided across the impedance 15 means.·

5. A timer unit as claimed in Claim 4 in which a pair of high voltage transistors are provided in series, the emitter of one transistor being connected to the collector of the other. 20

6. A timer unit as claimed in Claim 4 or 5 in which the impedance means is provided by a capacitor.

7. A timer unit as claimed in any of Claims 4 to 6 in which the transistor and impedance means is fed through a rectifier. )

8. A timer unit as claimed in any preceding claim in which control knobs for operating the respective 5 potentiometers extend through the housing.

9. A timer unit as claimed in any preceding claim in which the timer unit is adapted for operating a solenoid valve.

10. A timer unit substantially as described herein 10 with reference to and as illustrated in the accompanying drawings .