HUE049615T2 - Energiafelhasználást csökkentõ módszerek memóriarendszerekhez - Google Patents
Energiafelhasználást csökkentõ módszerek memóriarendszerekhezInfo
- Publication number
- HUE049615T2 HUE049615T2 HUE17711926A HUE17711926A HUE049615T2 HU E049615 T2 HUE049615 T2 HU E049615T2 HU E17711926 A HUE17711926 A HU E17711926A HU E17711926 A HUE17711926 A HU E17711926A HU E049615 T2 HUE049615 T2 HU E049615T2
- Authority
- HU
- Hungary
- Prior art keywords
- power saving
- memory systems
- saving techniques
- techniques
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
- G06F1/3225—Monitoring of peripheral devices of memory devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3278—Power saving in modem or I/O interface
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0608—Saving storage space on storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0625—Power saving in storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/102—Compression or decompression of data before storage
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System (AREA)
- Power Sources (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662302891P | 2016-03-03 | 2016-03-03 | |
US15/448,327 US10222853B2 (en) | 2016-03-03 | 2017-03-02 | Power saving techniques for memory systems by consolidating data in data lanes of a memory bus |
Publications (1)
Publication Number | Publication Date |
---|---|
HUE049615T2 true HUE049615T2 (hu) | 2020-09-28 |
Family
ID=59722700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HUE17711926A HUE049615T2 (hu) | 2016-03-03 | 2017-03-03 | Energiafelhasználást csökkentõ módszerek memóriarendszerekhez |
Country Status (10)
Country | Link |
---|---|
US (2) | US10222853B2 (hu) |
EP (1) | EP3423947B1 (hu) |
JP (2) | JP6999565B2 (hu) |
KR (1) | KR102420909B1 (hu) |
CN (1) | CN108701099B (hu) |
BR (1) | BR112018067531A2 (hu) |
CA (1) | CA3013090A1 (hu) |
ES (1) | ES2804604T3 (hu) |
HU (1) | HUE049615T2 (hu) |
WO (1) | WO2017152005A1 (hu) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10222853B2 (en) * | 2016-03-03 | 2019-03-05 | Qualcomm Incorporated | Power saving techniques for memory systems by consolidating data in data lanes of a memory bus |
US10394724B2 (en) * | 2016-08-22 | 2019-08-27 | Qualcomm Incorporated | Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patterns |
KR20190035392A (ko) * | 2017-09-26 | 2019-04-03 | 삼성전자주식회사 | 데이터 다중 기록을 수행하는 메모리 장치, 메모리 장치의 동작방법 및 메모리 컨트롤러의 동작방법 |
KR20200034499A (ko) * | 2018-09-21 | 2020-03-31 | 삼성전자주식회사 | 메모리 장치와 통신하는 데이터 처리 장치 및 방법 |
KR20200071396A (ko) * | 2018-12-11 | 2020-06-19 | 에스케이하이닉스 주식회사 | 반도체장치 및 반도체시스템 |
US11785424B1 (en) | 2021-06-28 | 2023-10-10 | Wm Intellectual Property Holdings, L.L.C. | System and method for asset tracking for waste and recycling containers |
CN116264083A (zh) * | 2021-12-14 | 2023-06-16 | 长鑫存储技术有限公司 | 存储***以及存储***的数据读取方法 |
CN116264085A (zh) * | 2021-12-14 | 2023-06-16 | 长鑫存储技术有限公司 | 存储***以及存储***的数据写入方法 |
US20230197123A1 (en) * | 2021-12-20 | 2023-06-22 | Advanced Micro Devices, Inc. | Method and apparatus for performing a simulated write operation |
US11899598B2 (en) * | 2022-05-31 | 2024-02-13 | Western Digital Technologies, Inc. | Data storage device and method for lane selection based on thermal conditions |
Family Cites Families (26)
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US7190284B1 (en) * | 1994-11-16 | 2007-03-13 | Dye Thomas A | Selective lossless, lossy, or no compression of data based on address range, data type, and/or requesting agent |
JPH1011360A (ja) * | 1996-06-24 | 1998-01-16 | Toshiba Corp | キャッシュメモリ |
JP2921505B2 (ja) * | 1996-08-09 | 1999-07-19 | 日本電気株式会社 | 半導体記憶装置 |
US6009026A (en) * | 1997-07-28 | 1999-12-28 | International Business Machines Corporation | Compressed input/output test mode |
US6145069A (en) * | 1999-01-29 | 2000-11-07 | Interactive Silicon, Inc. | Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices |
US6785793B2 (en) | 2001-09-27 | 2004-08-31 | Intel Corporation | Method and apparatus for memory access scheduling to reduce memory access latency |
US7383399B2 (en) * | 2004-06-30 | 2008-06-03 | Intel Corporation | Method and apparatus for memory compression |
US7631207B1 (en) * | 2006-04-21 | 2009-12-08 | Sun Microsystems, Inc. | Reducing power consumption for processing of common values in microprocessor registers and execution units |
GB2457667B (en) | 2008-02-19 | 2012-01-11 | Advanced Risc Mach Ltd | Data transfer between devices within an integrated circuit |
US8694703B2 (en) * | 2010-06-09 | 2014-04-08 | Brocade Communications Systems, Inc. | Hardware-accelerated lossless data compression |
BR112013006329B1 (pt) | 2010-09-16 | 2020-12-01 | Apple Inc. | controlador de memória compreendendo uma pluralidade de portas, circuito integrado e método |
KR101854251B1 (ko) | 2010-11-30 | 2018-05-03 | 삼성전자주식회사 | 멀티 채널 반도체 메모리 장치 및 그를 구비하는 반도체 장치 |
US9189394B2 (en) * | 2012-08-08 | 2015-11-17 | Wisconsin Alumni Research Foundation | Memory-link compression for graphic processor unit |
JP2014053058A (ja) * | 2012-09-06 | 2014-03-20 | Toshiba Corp | 半導体記憶装置 |
CN105283856A (zh) | 2013-06-28 | 2016-01-27 | 惠普发展公司,有限责任合伙企业 | 能够在多个数据宽度下通信的存储器组件 |
US9430434B2 (en) | 2013-09-20 | 2016-08-30 | Qualcomm Incorporated | System and method for conserving memory power using dynamic memory I/O resizing |
US9568542B2 (en) * | 2013-09-25 | 2017-02-14 | Cavium, Inc. | Memory interface with integrated tester |
US20150121111A1 (en) * | 2013-10-24 | 2015-04-30 | Qualcomm Incorporated | System and method for providing multi-user power saving codebook optmization |
US9864536B2 (en) * | 2013-10-24 | 2018-01-09 | Qualcomm Incorporated | System and method for conserving power consumption in a memory system |
US9563251B2 (en) | 2013-12-28 | 2017-02-07 | Intel Corporation | Representing a cache line bit pattern via meta signaling |
KR102017808B1 (ko) | 2013-12-31 | 2019-09-03 | 에스케이하이닉스 주식회사 | 데이터 처리 장치 및 데이터 처리 방법 |
CN103714026B (zh) * | 2014-01-14 | 2016-09-28 | 中国人民解放军国防科学技术大学 | 一种支持原址数据交换的存储器访问方法及装置 |
JP7031828B2 (ja) * | 2015-05-21 | 2022-03-08 | ゼロポイント テクノロジーズ アーベー | 意味論的値のデータ圧縮及び解凍のための方法、装置、及びシステム |
US20170115900A1 (en) * | 2015-10-23 | 2017-04-27 | International Business Machines Corporation | Dummy page insertion for flexible page retirement in flash memory storing multiple bits per memory cell |
US10222853B2 (en) | 2016-03-03 | 2019-03-05 | Qualcomm Incorporated | Power saving techniques for memory systems by consolidating data in data lanes of a memory bus |
US10394724B2 (en) * | 2016-08-22 | 2019-08-27 | Qualcomm Incorporated | Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patterns |
-
2017
- 2017-03-02 US US15/448,327 patent/US10222853B2/en active Active
- 2017-03-03 ES ES17711926T patent/ES2804604T3/es active Active
- 2017-03-03 KR KR1020187025182A patent/KR102420909B1/ko active IP Right Grant
- 2017-03-03 HU HUE17711926A patent/HUE049615T2/hu unknown
- 2017-03-03 EP EP17711926.0A patent/EP3423947B1/en active Active
- 2017-03-03 CN CN201780013577.8A patent/CN108701099B/zh active Active
- 2017-03-03 JP JP2018544830A patent/JP6999565B2/ja active Active
- 2017-03-03 BR BR112018067531A patent/BR112018067531A2/pt unknown
- 2017-03-03 CA CA3013090A patent/CA3013090A1/en not_active Abandoned
- 2017-03-03 WO PCT/US2017/020582 patent/WO2017152005A1/en active Application Filing
-
2019
- 2019-02-06 US US16/268,634 patent/US10852809B2/en active Active
-
2021
- 2021-12-21 JP JP2021207223A patent/JP7417576B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
US20170255394A1 (en) | 2017-09-07 |
WO2017152005A1 (en) | 2017-09-08 |
CN108701099A (zh) | 2018-10-23 |
CA3013090A1 (en) | 2017-09-08 |
KR102420909B1 (ko) | 2022-07-13 |
JP2022040150A (ja) | 2022-03-10 |
US10852809B2 (en) | 2020-12-01 |
JP7417576B2 (ja) | 2024-01-18 |
CN108701099B (zh) | 2022-05-03 |
BR112018067531A2 (pt) | 2019-01-02 |
KR20180119584A (ko) | 2018-11-02 |
JP6999565B2 (ja) | 2022-01-18 |
JP2019507436A (ja) | 2019-03-14 |
US20190179399A1 (en) | 2019-06-13 |
EP3423947A1 (en) | 2019-01-09 |
US10222853B2 (en) | 2019-03-05 |
EP3423947B1 (en) | 2020-04-22 |
ES2804604T3 (es) | 2021-02-08 |
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