HK1035255A1 - Method and apparatus for a serial access memory. - Google Patents

Method and apparatus for a serial access memory.

Info

Publication number
HK1035255A1
HK1035255A1 HK01105958A HK01105958A HK1035255A1 HK 1035255 A1 HK1035255 A1 HK 1035255A1 HK 01105958 A HK01105958 A HK 01105958A HK 01105958 A HK01105958 A HK 01105958A HK 1035255 A1 HK1035255 A1 HK 1035255A1
Authority
HK
Hong Kong
Prior art keywords
access memory
serial access
serial
memory
access
Prior art date
Application number
HK01105958A
Inventor
Philip S Ng
Jinshu Son
Johnny Chan
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of HK1035255A1 publication Critical patent/HK1035255A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039—Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
HK01105958A 1998-05-12 2001-08-23 Method and apparatus for a serial access memory. HK1035255A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/076,751 US6038185A (en) 1998-05-12 1998-05-12 Method and apparatus for a serial access memory
PCT/US1999/007881 WO1999059154A1 (en) 1998-05-12 1999-04-09 Method and apparatus for a serial access memory

Publications (1)

Publication Number Publication Date
HK1035255A1 true HK1035255A1 (en) 2001-11-16

Family

ID=22133966

Family Applications (1)

Application Number Title Priority Date Filing Date
HK01105958A HK1035255A1 (en) 1998-05-12 2001-08-23 Method and apparatus for a serial access memory.

Country Status (12)

Country Link
US (2) US6038185A (en)
EP (1) EP1086465B1 (en)
JP (1) JP2002515628A (en)
KR (1) KR20010042821A (en)
CN (1) CN1171234C (en)
CA (1) CA2322317A1 (en)
DE (1) DE69936524T2 (en)
HK (1) HK1035255A1 (en)
MY (1) MY114637A (en)
NO (1) NO20005675L (en)
TW (1) TW464875B (en)
WO (1) WO1999059154A1 (en)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3471268B2 (en) * 1999-12-10 2003-12-02 日本電気株式会社 Logic circuit
FR2805653A1 (en) * 2000-02-28 2001-08-31 St Microelectronics Sa Serial memory of electrically erasable and programmable read-only type with advanced data reading, for use in computing
US6826068B1 (en) 2001-01-18 2004-11-30 Kabushiki Kaisha Toshiba Fast data readout semiconductor storage apparatus
JP2002216483A (en) 2001-01-18 2002-08-02 Toshiba Corp Semiconductor memory
CN100444125C (en) * 2002-08-19 2008-12-17 旺宏电子股份有限公司 Serial output and input testing method
JP3717912B2 (en) * 2003-11-06 2005-11-16 沖電気工業株式会社 Interleave device
US7002873B2 (en) * 2003-12-19 2006-02-21 Intel Corporation Memory array with staged output
US7095247B1 (en) * 2004-03-25 2006-08-22 Lattice Semiconductor Corporation Configuring FPGAs and the like using one or more serial memory devices
US7009886B1 (en) * 2004-07-19 2006-03-07 Silicon Storage Technology, Inc. Integrated circuit memory device with bit line pre-charging based upon partial address decoding
US7027348B2 (en) * 2004-08-17 2006-04-11 Silicon Storage Technology, Inc. Power efficient read circuit for a serial output memory device and method
US6879535B1 (en) * 2004-08-30 2005-04-12 Atmel Corporation Approach for zero dummy byte flash memory read operation
US7589648B1 (en) 2005-02-10 2009-09-15 Lattice Semiconductor Corporation Data decompression
US7265578B1 (en) 2005-04-04 2007-09-04 Lattice Semiconductor Corporation In-system programming of non-JTAG device using SPI and JTAG interfaces of FPGA device
US7397274B1 (en) 2005-04-07 2008-07-08 Lattice Semiconductor Corporation In-system programming of a non-compliant device using multiple interfaces of a PLD
US7656717B2 (en) 2005-09-29 2010-02-02 Hynix Semiconductor, Inc. Memory device having latch for charging or discharging data input/output line
JP4665726B2 (en) * 2005-11-14 2011-04-06 セイコーエプソン株式会社 Controller for printing device, printing device, controller board
US7554357B2 (en) * 2006-02-03 2009-06-30 Lattice Semiconductor Corporation Efficient configuration of daisy-chained programmable logic devices
US7378873B1 (en) 2006-06-02 2008-05-27 Lattice Semiconductor Corporation Programmable logic device providing a serial peripheral interface
US7570078B1 (en) 2006-06-02 2009-08-04 Lattice Semiconductor Corporation Programmable logic device providing serial peripheral interfaces
US7495970B1 (en) * 2006-06-02 2009-02-24 Lattice Semiconductor Corporation Flexible memory architectures for programmable logic devices
US7521969B2 (en) * 2006-07-28 2009-04-21 Lattice Semiconductor Corporation Switch sequencing circuit systems and methods
US7456672B1 (en) 2006-09-11 2008-11-25 Lattice Semiconductor Corporation Clock systems and methods
US7511641B1 (en) 2006-09-19 2009-03-31 Lattice Semiconductor Corporation Efficient bitstream compression
US7769909B2 (en) * 2006-12-04 2010-08-03 Atmel Corporation Device and method for access time reduction by speculatively decoding non-memory read commands on a serial interface
US7761633B2 (en) * 2007-01-29 2010-07-20 Microsemi Corp. - Analog Mixed Signal Group Ltd. Addressable serial peripheral interface
US8132040B1 (en) 2007-10-25 2012-03-06 Lattice Semiconductor Corporation Channel-to-channel deskew systems and methods
US7902865B1 (en) 2007-11-15 2011-03-08 Lattice Semiconductor Corporation Compression and decompression of configuration data using repeated data frames
US7660177B2 (en) * 2007-12-21 2010-02-09 Silicon Storage Technology, Inc. Non-volatile memory device having high speed serial interface
JP5291437B2 (en) * 2008-11-12 2013-09-18 セイコーインスツル株式会社 Read circuit for semiconductor memory device and semiconductor memory device
US8255733B1 (en) 2009-07-30 2012-08-28 Lattice Semiconductor Corporation Clock delay and skew control systems and methods
JP5456413B2 (en) * 2009-08-24 2014-03-26 ローム株式会社 Semiconductor memory device
JP5319572B2 (en) * 2010-02-23 2013-10-16 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー Memory device
US9159442B2 (en) * 2011-11-11 2015-10-13 Microchip Technology Incorporated Serial memory with fast read with look-ahead
CN103544991B (en) * 2012-07-12 2016-06-22 华邦电子股份有限公司 The method of flash memory device and operation thereof
US11238906B2 (en) * 2020-06-15 2022-02-01 Taiwan Semiconductor Manufacturing Company Limited Series of parallel sensing operations for multi-level cells
CN113392057B (en) * 2021-06-11 2023-03-14 环荣电子(惠州)有限公司 Data communication method and system for integrating multiple addresses in single channel

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4118804C2 (en) * 1990-06-08 1996-01-04 Toshiba Kawasaki Kk Serial access memory array
KR100275182B1 (en) * 1990-12-17 2000-12-15 윌리엄 비. 켐플러 Sequential memmory
US5325502A (en) * 1991-05-15 1994-06-28 Micron Technology, Inc. Pipelined SAM register serial output
EP0513451B1 (en) * 1991-05-16 1997-07-23 International Business Machines Corporation Memory device
JPH06231576A (en) * 1993-02-04 1994-08-19 Nec Corp Semiconductor storage
FR2726934B1 (en) * 1994-11-10 1997-01-17 Sgs Thomson Microelectronics METHOD FOR EARLY READING OF SERIAL ACCESS MEMORY AND RELATED MEMORY
JPH08273362A (en) * 1995-03-30 1996-10-18 Nec Ic Microcomput Syst Ltd Semiconductor memory

Also Published As

Publication number Publication date
CN1171234C (en) 2004-10-13
US6038185A (en) 2000-03-14
CN1300431A (en) 2001-06-20
EP1086465B1 (en) 2007-07-11
DE69936524T2 (en) 2008-03-13
DE69936524D1 (en) 2007-08-23
US6097657A (en) 2000-08-01
CA2322317A1 (en) 1999-11-18
EP1086465A1 (en) 2001-03-28
NO20005675L (en) 2000-11-13
NO20005675D0 (en) 2000-11-10
TW464875B (en) 2001-11-21
WO1999059154A1 (en) 1999-11-18
MY114637A (en) 2002-11-30
EP1086465A4 (en) 2001-08-08
KR20010042821A (en) 2001-05-25
JP2002515628A (en) 2002-05-28

Similar Documents

Publication Publication Date Title
HK1035255A1 (en) Method and apparatus for a serial access memory.
EP0666535A3 (en) A method and apparatus for detecting memory access errors.
GB2368415B (en) Improved memory system apparatus and method
EP1135720A4 (en) Method and apparatus for providing a pipelined memory controller
GB2331382B (en) Electronic data storage apparatus, system, and method
HK1027638A1 (en) Data storage device and data storage method.
IL114188A0 (en) Method for idal-in access security
GB0103344D0 (en) Method and apparatus for data access code generation
EP0973097A4 (en) Memory and access method
GB2334611B (en) Method and apparatus for manufacturing a data storage device
HK1026058A1 (en) A method and apparatus for programming semiconductor memory
GB9907278D0 (en) Memory reclamation method and apparatus
IL116707A0 (en) Method and apparatus for managing packet memory
GB2337614B (en) Method for controlling memory access on a machine with non-uniform memory access and machine for implementing such a method
AU2002310476A1 (en) A method, apparatus and system for efficient memory access
GB9818906D0 (en) Method and apparatus for reducing printer memory
GB2338092B (en) A data processing apparatus and its data processing method
GB9828367D0 (en) Method and apparatus for communicating information
GB2344951B (en) Method and apparatus for tracking a selected distant object
GB2346522B (en) Method and apparatus for demapping data
HU9801249D0 (en) Method and apparatus for spatial data storage
HUP0103964A3 (en) Connection unit and a method for establishing a data connection
GB2337901B (en) Device and method for scrambling data
TW322979U (en) Apparatus and method for assembled sequential processes memory
SG77645A1 (en) System and method for preparing a computer memory

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20100409