GR1005968B - Generalized communication method between circuits of hierarchic co-processors of special purpose. - Google Patents

Generalized communication method between circuits of hierarchic co-processors of special purpose.

Info

Publication number
GR1005968B
GR1005968B GR20060100529A GR20060100529A GR1005968B GR 1005968 B GR1005968 B GR 1005968B GR 20060100529 A GR20060100529 A GR 20060100529A GR 20060100529 A GR20060100529 A GR 20060100529A GR 1005968 B GR1005968 B GR 1005968B
Authority
GR
Greece
Prior art keywords
master
slave
processor
hierarchic
processors
Prior art date
Application number
GR20060100529A
Other languages
Greek (el)
Other versions
GR20060100529A (en
Inventor
Μιχαηλ Φωτιου Δοσης
Original Assignee
Μιχαηλ Φωτιου Δοσης
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Μιχαηλ Φωτιου Δοσης filed Critical Μιχαηλ Φωτιου Δοσης
Priority to GR20060100529A priority Critical patent/GR1005968B/en
Publication of GR20060100529A publication Critical patent/GR20060100529A/en
Publication of GR1005968B publication Critical patent/GR1005968B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Communication Control (AREA)

Abstract

The generalized communication method between circuits of hierarchic coprocessors of special purpose consists of the hierarchy of a total of co-processors that implement a specific application, of their operation mode and of synchronization to computer environment and of a generalized protocol of synchronous hand-shaking between the master processor and the slave co-processor. The difference between the master and the slave, as regards the proposed communication methodology, is based on the factthat the master controls the start of the execution of the slave and the slave responds to the processing order by the master. The slave executes the processing, according to the algorithm that implements and notifies the master for the completion of the execution of its algorithm. Subsequently, the master reads the results of processing and notifies the slave thereof. After that, the slave co-processor is `liberated` by the master`s control, until its services are required again by the controlling environment (e. g. the master itself).
GR20060100529A 2006-09-21 2006-09-21 Generalized communication method between circuits of hierarchic co-processors of special purpose. GR1005968B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GR20060100529A GR1005968B (en) 2006-09-21 2006-09-21 Generalized communication method between circuits of hierarchic co-processors of special purpose.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GR20060100529A GR1005968B (en) 2006-09-21 2006-09-21 Generalized communication method between circuits of hierarchic co-processors of special purpose.

Publications (2)

Publication Number Publication Date
GR20060100529A GR20060100529A (en) 2008-04-15
GR1005968B true GR1005968B (en) 2008-07-04

Family

ID=39078715

Family Applications (1)

Application Number Title Priority Date Filing Date
GR20060100529A GR1005968B (en) 2006-09-21 2006-09-21 Generalized communication method between circuits of hierarchic co-processors of special purpose.

Country Status (1)

Country Link
GR (1) GR1005968B (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217064A (en) * 1988-03-23 1989-10-18 Benchmark Technologies Interfacing asynchronous processors
US5923893A (en) * 1997-09-05 1999-07-13 Motorola, Inc. Method and apparatus for interfacing a processor to a coprocessor
EP1071990B1 (en) * 1998-02-19 2002-05-22 Infineon Technologies AG Device for the hierarchical and distributed control of programmable modules in highly integrated systems

Also Published As

Publication number Publication date
GR20060100529A (en) 2008-04-15

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GR20060100529A (en) Generalized communication method between circuits of hierarchic co-processors of special purpose.

Legal Events

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PG Patent granted
ML Lapse due to non-payment of fees

Effective date: 20170411