GB997996A - Field effect device and method of manufacturing the same - Google Patents

Field effect device and method of manufacturing the same

Info

Publication number
GB997996A
GB997996A GB198163A GB198163A GB997996A GB 997996 A GB997996 A GB 997996A GB 198163 A GB198163 A GB 198163A GB 198163 A GB198163 A GB 198163A GB 997996 A GB997996 A GB 997996A
Authority
GB
United Kingdom
Prior art keywords
type
layers
regions
wafer
type layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB198163A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of GB997996A publication Critical patent/GB997996A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

997,996. Semi-conductor devices. MOTOROLA Inc. Jan. 16, 1963 [Feb. 19, 1962], No. 1981/63. Heading H1K. A field effect device is manufactured by epitaxially depositing two layers of semi-conductor material on a substrate and then diffusing impurity into the layers to form a source and a drain which define the limits of the channel and gate formed by the layers. As shown, Fig. 1, a P-type substrate 11 has N-type layer 12 and P-type layer 13 epitaxially deposited on one face. As shown, Fig. 2, layer 13 is masked, 23, and N-type impurity is diffused into the layers to form heavily doped N+-type source and drain regions 16, 17. The remaining portion of the P-type layer forms the gate 19 and the portion of the N-type layer directly below this forms the channel 18. The process is used to manufacture a plurality of field effect devices from a monocrystalline wafer of silicon doped with boron which is heated to 1180‹ C. in a stream of hydrogen into which is introduced silicon tetrachloride or trichlorosilane vapour doped with phosphine vapour to epitaxially deposit an N-type layer, after which the impurity is changed to diborane vapour to epitaxially deposit a P-type layer on top of the N-type layer. The wafer is then heated in steam to form a coating of silicon dioxide which is then selectively removed using a photoresist method, phosphorus is diffused into the layers to form N+-type sources and drains, and the remaining oxide layer is removed. The wafer is then sliced into individual units which are mounted on a header, connections made to the source, drain and gate regions, and the device is encapsulated. The drain is in the form of a rectangle surrounded by the gate and channel layers which are surrounded by the source. Impurity may be diffused into the outside edges of the sources to form P+ type regions connected to the substrate thus making all the junctions emerge on the upper face of the wafer so that it can be divided up into individual units by scribing and breaking without damaging the junctions. Devices of this kind can be mounted on the header using an electrically insulating but thermally conductive layer of alumina or beryllia, and ohmic connections can be made to the various regions on the upper face only. Alternatively a current limiter can be produced by making a single metallic contact to all the regions except the drain which has a separate contact. A mesa field effect device can be produced by etching the wafer of Fig. 1 and then diffusing in the source and sink regions. Preferably the epitaxially deposited layers and the substrate have about the same impurity concentration so that the junctions formed do not change position if inter-diffusion of the doping impurities occurs. Also the sheet resistivity of the channel of a device may be measured and if it is found to be too low the wafer can be heated to 1100‹ C. to cause inter- , diffusion of impurities so that the sheet resistivity of the channel is increased without changing the positions of the junctions. Devices can be manufactured with regions of opposite conductivity type to those mentioned.
GB198163A 1962-02-19 1963-01-16 Field effect device and method of manufacturing the same Expired GB997996A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17397062A 1962-02-19 1962-02-19

Publications (1)

Publication Number Publication Date
GB997996A true GB997996A (en) 1965-07-14

Family

ID=32092255

Family Applications (1)

Application Number Title Priority Date Filing Date
GB198163A Expired GB997996A (en) 1962-02-19 1963-01-16 Field effect device and method of manufacturing the same

Country Status (5)

Country Link
BE (1) BE627499A (en)
DE (1) DE1237693B (en)
FR (1) FR1347395A (en)
GB (1) GB997996A (en)
NL (1) NL288745A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0268426A2 (en) * 1986-11-17 1988-05-25 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits
USRE34821E (en) * 1986-11-17 1995-01-03 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1614861C3 (en) * 1967-09-01 1982-03-11 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Process for the manufacture of a junction field effect transistor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL99536C (en) * 1951-03-07 1900-01-01
FR1210880A (en) * 1958-08-29 1960-03-11 Improvements to field-effect transistors
FR1293699A (en) * 1960-05-02 1962-05-18 Westinghouse Electric Corp Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0268426A2 (en) * 1986-11-17 1988-05-25 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits
EP0268426A3 (en) * 1986-11-17 1989-03-15 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits
US5012305A (en) * 1986-11-17 1991-04-30 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits
USRE34821E (en) * 1986-11-17 1995-01-03 Linear Technology Corporation High speed junction field effect transistor for use in bipolar integrated circuits

Also Published As

Publication number Publication date
FR1347395A (en) 1963-12-27
DE1237693B (en) 1967-03-30
BE627499A (en) 1963-05-15
NL288745A (en)

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