GB9420191D0 - Electronic circuit packaging - Google Patents
Electronic circuit packagingInfo
- Publication number
- GB9420191D0 GB9420191D0 GB9420191A GB9420191A GB9420191D0 GB 9420191 D0 GB9420191 D0 GB 9420191D0 GB 9420191 A GB9420191 A GB 9420191A GB 9420191 A GB9420191 A GB 9420191A GB 9420191 D0 GB9420191 D0 GB 9420191D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- microchip
- flexible circuit
- attached
- electronic circuit
- bond pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10363—Jumpers, i.e. non-printed cross-over connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10439—Position of a single component
- H05K2201/10469—Asymmetrically mounted component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/222—Completing of printed circuits by adding non-printed jumper connections
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Abstract
An electronic circuit package comprises a carrier (11), a microchip (12), which has bond pads (13) and is attached to the carrier, and a flexible circuit comprising a first flexible circuit element cable (15) attached to the region of the carrier adjacent the microchip and a second flexible circuit element cable (17) attached to and stepped back from the first cable. Each element includes an electrically conductive circuit pattern defined thereon with selected ones of the microchip bond pads (13) being electrically connected by wirebonds (16) to a circuit pattern on the first element of the flexible circuit and further selected ones of the bond pads being electrically connected by wirebonds to the circuit pattern of the second element. <IMAGE>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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GB9420191A GB2293918A (en) | 1994-10-06 | 1994-10-06 | Electronic circuit packaging |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9420191A GB2293918A (en) | 1994-10-06 | 1994-10-06 | Electronic circuit packaging |
Publications (2)
Publication Number | Publication Date |
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GB9420191D0 true GB9420191D0 (en) | 1994-11-23 |
GB2293918A GB2293918A (en) | 1996-04-10 |
Family
ID=10762461
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9420191A Withdrawn GB2293918A (en) | 1994-10-06 | 1994-10-06 | Electronic circuit packaging |
Country Status (1)
Country | Link |
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GB (1) | GB2293918A (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5620928A (en) * | 1995-05-11 | 1997-04-15 | National Semiconductor Corporation | Ultra thin ball grid array using a flex tape or printed wiring board substrate and method |
WO1997042800A1 (en) * | 1996-05-03 | 1997-11-13 | Ford Motor Company Limited | Multi-layer stamped electrically conductive circuit and method for making same |
DE102006005746B4 (en) * | 2006-02-07 | 2009-02-26 | Elbau Elektronik Bauelemente Gmbh Berlin | Electronic assembly, in particular electronic sensor system, preferably for position and angle measuring systems |
DE102007041229A1 (en) * | 2007-08-31 | 2009-03-05 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Circuit arrangement and a method for encapsulating the same |
WO2022069608A1 (en) * | 2020-10-01 | 2022-04-07 | Signify Holding B.V. | Multilayer assembly with electrical component |
US20220278017A1 (en) * | 2021-02-26 | 2022-09-01 | Infineon Technologies Austria Ag | Power Electronics Carrier |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2174538A (en) * | 1985-04-24 | 1986-11-05 | Stanley Bracey | Semiconductor package |
US4801765A (en) * | 1986-01-06 | 1989-01-31 | American Telephone And Telegraph Company, At&T Bell Laboratories | Electronic component package using multi-level lead frames |
GB2199182A (en) * | 1986-12-18 | 1988-06-29 | Marconi Electronic Devices | Multilayer circuit arrangement |
GB2199988B (en) * | 1987-01-12 | 1990-04-25 | Intel Corp | Multi-layer molded plastic ic package |
US5235211A (en) * | 1990-06-22 | 1993-08-10 | Digital Equipment Corporation | Semiconductor package having wraparound metallization |
JP2966067B2 (en) * | 1990-09-04 | 1999-10-25 | 新光電気工業株式会社 | Multilayer lead frame |
US5227583A (en) * | 1991-08-20 | 1993-07-13 | Microelectronic Packaging America | Ceramic package and method for making same |
CA2108542A1 (en) * | 1992-02-18 | 1993-08-19 | Bidyut K. Bhattacharyya | Advance multilayer molded plastic package using mesic technology |
CA2092767A1 (en) * | 1992-03-26 | 1993-09-27 | Takatoshi Takikawa | Semiconductor device |
JP3051569B2 (en) * | 1992-05-29 | 2000-06-12 | 新光電気工業株式会社 | Multilayer lead frame |
-
1994
- 1994-10-06 GB GB9420191A patent/GB2293918A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
GB2293918A (en) | 1996-04-10 |
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WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |