GB904334A - Improvements in or relating to data handling equipment - Google Patents

Abstract

904,334. Electrical digital data-processing systems. INTERNATIONAL COMPUTERS & TABULATORS Ltd. Jan. 25, 1960 [Feb. 4, 1959], No. 3941/59. Class 106 (1). In a data-processing system comprising a number of individual data handling units, transfer of data from one unit to another is made over a common highway. The availability of the highway and the units for datatransfer is indicated in associated indicators which are scanned cyclically. A control circuit is set jointly by transfer instructions and the availability of the highway and the relevant data-handling units to initiate transfer, scanning being halted during transfer. An arithmetic unit is given priority. The highway comprises eight bit-channels 8 and a timing pulse channel 9 and characters are transferred in succession in 8-bit code. When a unit 1-3, 4a-4d, is idle its associated indicator 12 signals an associated gate in the transfer control circuit 11. An instruction is set up in the computer 1 and sent over line 15 to an instruction register 22, Fig. 2, in the transfer control circuit 11. The source and destination addresses are decoded at 25 and 26 to feed appropriate AND gates 30 and 39 which are also fed by the " idle " indicators 12 over lines 13. The source gates 30 are scanned by commutator 32 which stops when it finds an open gate, so energizing gate 38, the selected AND gate 39 relating to the destination and gate 41. Gate 41 sets flip-flop 14 to busy the highway to other instructions and sets flip-flop 29 for a predetermined time to permit the AND gates 27 and 44 to send the necessary control signals from the instruction register to the units concerned. Gate 41 also signals the computer 1 over line 17b to start the transfer timing generator 10. One each of flip-flops 45, 46 is set up to condition read-out and read-in gates 6 and 7, Fig. 1, in the source and destination units, respectively. Transfer takes place through the buffers 5. A transfer complete signal is then sent over line 17c to the transfer control device 11. If transfer is incorrect in any of a number of ways an appropriate gate 53 is opened and an alarm line 17a energized. In known manner the computer unit is given priority, and a transfer involving the computer unit may take place without awaiting the completion of transfer between two of the other units. In this case the information is set up in the buffer of the source and transfer is delayed until the computer unit releases the common highway.