GB8710281D0 - Making semiconductor device - Google Patents

Making semiconductor device

Info

Publication number
GB8710281D0
GB8710281D0 GB878710281A GB8710281A GB8710281D0 GB 8710281 D0 GB8710281 D0 GB 8710281D0 GB 878710281 A GB878710281 A GB 878710281A GB 8710281 A GB8710281 A GB 8710281A GB 8710281 D0 GB8710281 D0 GB 8710281D0
Authority
GB
United Kingdom
Prior art keywords
semiconductor device
making semiconductor
making
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB878710281A
Other versions
GB2190241B (en
GB2190241A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62053453A external-priority patent/JPS63184352A/en
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of GB8710281D0 publication Critical patent/GB8710281D0/en
Publication of GB2190241A publication Critical patent/GB2190241A/en
Application granted granted Critical
Publication of GB2190241B publication Critical patent/GB2190241B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H01L21/76235Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
GB8710281A 1986-05-09 1987-04-30 Method of making a semiconductor device Expired GB2190241B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP10596586 1986-05-09
JP22770986 1986-09-26
JP62053453A JPS63184352A (en) 1986-05-09 1987-03-09 Manufacture of semiconductor device

Publications (3)

Publication Number Publication Date
GB8710281D0 true GB8710281D0 (en) 1987-06-03
GB2190241A GB2190241A (en) 1987-11-11
GB2190241B GB2190241B (en) 1989-12-13

Family

ID=27294953

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8710281A Expired GB2190241B (en) 1986-05-09 1987-04-30 Method of making a semiconductor device

Country Status (6)

Country Link
DE (1) DE3715092A1 (en)
FR (1) FR2598557B1 (en)
GB (1) GB2190241B (en)
HK (1) HK28791A (en)
NL (1) NL190591C (en)
SG (1) SG60090G (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1189143B (en) * 1986-05-16 1988-01-28 Sgs Microelettronica Spa PROCEDURE FOR THE IMPLEMENTATION OF THE INSULATION OF INTEGRATED CIRCUITS WITH A VERY HIGH INTEGRATION SCALE, IN PARTICULAR IN MOS AND CMOS TECHNOLOGY
JPH0442948A (en) * 1990-06-06 1992-02-13 Mitsubishi Electric Corp Manufacture of semiconductor device
KR920020676A (en) * 1991-04-09 1992-11-21 김광호 Device Separation Method of Semiconductor Device
JPH0574927A (en) * 1991-09-13 1993-03-26 Nec Corp Production of semiconductor device
KR0147630B1 (en) * 1995-04-21 1998-11-02 김광호 Insulating method of semiconductor device
KR980006053A (en) * 1996-06-26 1998-03-30 문정환 Method for forming a separation film of a semiconductor device
CN102683290A (en) * 2011-03-08 2012-09-19 无锡华润上华半导体有限公司 ROM (read only memory) device and manufacturing method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170348C (en) * 1970-07-10 1982-10-18 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLYING TO A SURFACE OF A SEMICONDUCTOR BODY AGAINST DOTTING AND AGAINST THERMAL OXIDICATION MASK MATERIAL, PRE-FRIENDLY COVERING THE WINDOWS OF THE WINDOWS IN THE MATERIALS The semiconductor body with the mask is subjected to a thermal oxidation treatment to form an oxide pattern that at least partially fills in the recesses.
JPS5578540A (en) * 1978-12-08 1980-06-13 Hitachi Ltd Manufacture of semiconductor device
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
JPS5694647A (en) * 1979-12-28 1981-07-31 Fujitsu Ltd Forming method for oxidized film
JPS5694646A (en) * 1979-12-28 1981-07-31 Fujitsu Ltd Forming method for oxidized film
US4394196A (en) * 1980-07-16 1983-07-19 Tokyo Shibaura Denki Kabushiki Kaisha Method of etching, refilling and etching dielectric grooves for isolating micron size device regions
JPS5893342A (en) * 1981-11-30 1983-06-03 Toshiba Corp Manufacture of semiconductor device
US4435446A (en) * 1982-11-15 1984-03-06 Hewlett-Packard Company Edge seal with polysilicon in LOCOS process
JPS6054453A (en) * 1983-09-05 1985-03-28 Oki Electric Ind Co Ltd Manufacture of semiconductor integrated circuit device

Also Published As

Publication number Publication date
DE3715092A1 (en) 1987-11-12
NL8701087A (en) 1987-12-01
GB2190241B (en) 1989-12-13
NL190591B (en) 1993-12-01
FR2598557B1 (en) 1990-03-30
NL190591C (en) 1994-05-02
GB2190241A (en) 1987-11-11
FR2598557A1 (en) 1987-11-13
DE3715092C2 (en) 1993-07-29
HK28791A (en) 1991-04-26
SG60090G (en) 1990-09-07

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Effective date: 20070429