GB765665A - Improvements in or relating to timing equipment - Google Patents

Abstract

765,665. Automatic exchange systems. STANDARD TELEPHONES & CABLES, Ltd. March 20, 1953, No. 7832/53. Class 40 (4). Timing equipment comprises a store, means for examining the store periodically, external means which may be in any one of a plurality of conditions, a control circuit associated with the store and the external means, means in the control circuit responsive to a change in the conditions of the external means to initiate a count by the equipment of the. number of successive examinations of the store, and means in the control circuit responsive to a further change in the condition of the external means to initiate a further count representing the duration of the new condition of the external means. The invention is applied to an intelligence storage system, for use (for example) in an automatic telephone system, of the type described in Specifications 744,352, 744,356, 744,357 and 744,358, [all in Group XIX]. In a first embodiment each of a plurality of tracks on a magnetic drum are divided into a number of lengths, and two lengths 180 degrees apart form a single storage section. While a read/record head is reading one length, a similar head diametrically opposite, is recording upon the other length. However, by employing a compound reading/ recording circuit, a single length of track could be used. In addition to the storage tracks on the drum MD, Fig. 1, a clock pulse track ET and a track MT giving pulses marking the beginning of each length or section are provided. The former operates a counter EC, advancing it by the number of digital spaces in a section (e.g. 48) and, via pulse former PF and delay devices D1, D2, provides three staggered pulses t1, t2, t3, during each clock pulse period: the latter serves to return the counter EC to its initial state at the beginning of each section. Each storage section serves a plurality (e.g. ten) input or " caller " lines T1, T2, &c. which are identified with digit places 2 to 11, respectively, in each section. Fig. 9 is a time chart indicating the functions of the 48 digital spaces in each storage section. Receipt of first digit. A multi-stable counter or register is stepped on by pulses from the clock track until a " calling " condition on one of the input lines (say, line " 4 ") stops the multi-stable register at the corresponding position (digit place 5). The calling condition is then disabled (to avoid " seizure " of successive stores), and an appropriately positioned auxiliary head, operating at digit time 31, as shown in Fig. 9, records a positive " busy signal in digit place " 1" of the store. At the end of the first scanning of this store a positive recording at digit place 48 zeroizes the control circuit in readiness for control of the next storage section. After 180 degrees rotation the store being considered again passes a read/record head. The signal in the first position is read and re-recorded (see " PN2 ", Fig. 9); the signal in digit place 5 stops the multi-stable register in its fourth position, and this signal and the others are detected and re-recorded. This process is repeated at each subsequent scanning and the number of excursions are counted and recorded in binary form in digit places 15 to 19. The counting is performed-as in the cases referred to-by reading the recorded binary elements and reversing all up to and including the first binary " 0," after which re-recording continues without any change. When the first digit impulse is received on the marked " caller " line a mark is recorded at digit place 32 in the section D1 allocated for recording in binary form the first digit from the seized " caller " line; the second, third and fourth digits are later recorded in sections D2, D3 and D4 respectively. Each digit impulse lasts for several excursions of the storage section, the actual number of such excursions being counted in the section R. If, due to a fault in the system, the impulse should persist beyond a certain maximum time the process of counting brings a mark into digit place 19 which causes forced release of the circuit. Normally, however, when the impulse ends, a mark is recorded in digit place 14, the count in digit places 15 to 19 is deleted and then recommences to count the excursions until the second impulse begins. Each subsequent impulse increases the value of the binary number in D1 by one. The completion of a digit is determined by detecting the length of pause between impulses. If the counting in R reaches digit place 17 it is assumed that a digit has been completed; marks are recorded in places 20 and 21 and the recording of subsequent impulses takes place in the next digit position (D2). Retransmission of first digit. The completion of the recording to the first digit causes it to be re-recorded in the form of its complement, and retransmission commences. As each impulse is sent " 1 " is added to the complement in D1 so that when all the elements in D1 are " mark the digit will have been completely retransmitted. Each regenerated impulse starts at digit place 48 and lasts for four excursions which are counted in section S (digit places 25 to 30). After a digit has been completely retransmitted a pause of at least 36 excursions in timed by counting in Section S. During the inter-digital pause other digits can be received and stored. General. The routing of digits to their places on the section is controlled by counters in the control circuit in accordance with intelligence read off the track. One counter routes received digits to the appropriate portions of the store, stepping at the end of each digit, while a second counter is used to determine whether retransmission can occur, and a third routes the digits out. The counters are set to positions appropriate to the store which is being scanned by intelligence read from that section. When all the digits have been received and retransmitted the marks in digit places 1 and 5 are not rerecorded and therefore the store is again available for seizure by any of the ten associated " caller " channels. The circuits for performing the functions outlined above are built up from rectifier gates such as G120, G124, Fig. 13, coldcathode tube flip-flops such as F8, and counters or registers such as C2, Fig. 14 (not shown). In a second embodiment a matrix of magnetic cores (Fig. 16, not shown) takes the place of each magnetic drum storage, and in a third embodiment a ferro-electric matrix is used. Specifications 692,415, [Group XIX], 713,902, [Group XL (c)], 765,072, 765,664 and 765,666, [all in Group XIX], also are referred to.