GB2586679A

GB2586679A - Sealing mechanism

Info

Publication number: GB2586679A
Application number: GB2004467.3A
Authority: GB
Inventors: Chang Yo-Yu; Huang Chun-Yao
Original assignee: MFC Sealing Technology Co Ltd
Current assignee: MFC Sealing Technology Co Ltd
Priority date: 2019-08-26
Filing date: 2020-03-27
Publication date: 2021-03-03
Anticipated expiration: 2040-03-27
Also published as: GB202004467D0; GB2586679B; CN210607176U; IL274070B2; IL274070B; TWM587359U; IL274070A

Abstract

A sealing mechanism disposed in a semiconductor manufacturing device is provided. The semiconductor manufacturing device in this case is a plasma etching device for processing a wafer substrate W that includes a susceptor 50 and an annular extending element 60 surrounding the susceptor 50. The susceptor 50 comprises a main body 51, a support element 52, and a connection layer 53. A sealing mechanism R is disposed in an annular groove 54 on the lateral side o the susceptor 50. The sealing mechanism R includes an annular sealing layer (R1, Figure 6), an annular resilient layer surrounding the sealing layer (R2, Figure 6), and an annular protection layer (R3, Figure 6) surrounding the resilient layer R1. The hardness of the protection layer R3 is greater than that of the resilient layer R2.

Description

SEALING MECHANISM

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This Application claims priority of Taiwan Patent Application No. 108211316 filed on August 26, 2019, the entirety of which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

Field of the Invention

[0002] The application relates in general to a sealing mechanism, and in particular, to a replaceable sealing mechanism that is disposed in a semiconductor manufacturing device.

Description of the Related Art

[0003] FIG. 1 is a sectional view of a conventional semiconductor manufacturing device 1 for processing a wafer substrate 2 in a chamber 30. FIG. 2 is an enlarged view of the portion A in FIG. 1.

[0004] Referring to FIGs. 1 and 2, the semiconductor manufacturing device 1 may be a plasma etching device that includes a susceptor 10 and an annular extending element 20 surrounding the susceptor 10. The susceptor 10 comprises a main body 11, a support element 12 disposed above the main body 11, and a fluid supply unit 13 extending through the support element 12, wherein a wafer substrate 2 is disposed on the support element 12. As shown in FIG. 2, the fluid supply unit 13 is disposed in the main body 1 1 to provide fluid 3 through the support element 12 to the wafer substrate 2. A groove 14 is formed on a sidewall 15 of the susceptor 10 and is located between the main body 11 and the support element 12. However, as the arrow indicates in FIG. 2, the fluid 3 may leak out of susceptor 10 via a small gap between the main body 11 and the support dement 12 and adjacent to the groove 14.

[0005] FIG. 3 is a partial enlarged view of the semiconductor manufacturing device 1 showing that the groove 14 is filled with glue 4, and FIG. 4 is a partial enlarged view of the semiconductor manufacturing device 1 showing that the glue 4 in the groove 14 is eroded by plasma gas. As shown in FIG. 3, the groove 14 is filled with glue 4 to prevent the fluid 3 from leaking out of the susceptor 10. However, since the glue 4 can he corroded by the plasma gas during the semiconductor manufacturing process (FIG. 4), sealing the groove 14 with glue 4 would not seem to he a good solution. Additionally, since the glue 4 is not repairable or replaceable, it would be difficult to maintain the semiconductor manufacturing device 1. This would reduce the production yield.

BRIEF SUMMARY OF INVENTION

[0006] In view of the aforementioned problems, the object of the invention is to provide a scaling mechanism that is disposed in a semiconductor manufacturing device. The sealing mechanism includes an annular sealing layer, an annular resilient layer surrounding the sealing layer, and an annular protection layer surrounding the resilient layer. Specifically, the hardness of the protection layer is greater than the hardness of the resilient layer.

[0007] In some embodiments, the sealing layer comprises silicone or F-based glue.

[0008] In some embodiments, the resilient layer comprises rubber.

[0009] In some embodiments, the protection layer comprises Polytetrafluoroethene (PTFE).

[0010] In some embodiments, the groove forms a chamfered surface abutting the sealing layer and the resilient layer.

[0011] In some embodiments, the resilient layer has a first thickness in an axial direction, and the protection layer has a second thickness in the axial direction, wherein the second thickness is greater than the first thickness.

[0012] In some embodiments, the resilient layer has a longitudinal, curved or wavy shape in the radial cross-section.

[0013] In some embodiments, the resilient layer has a concave or convex profile in the radial cross-section.

[0014] In some embodiments, the protection layer has a longitudinal shape in the radial cross-section, and the longitudinal shape forms a chamfered surface.

[0015] In some embodiments, the main body has an insulating layer connecting to the sealing layer and the resilient layer.

[0016] In some embodiments, the resilient layer has a first thickness in an axial direction that is substantially perpendicular to the wafer substrate, and the protection layer has a second thickness in the axial direction, wherein the second thickness is equal to or less than the first thickness.

[0017] In some embodiments, the resilient layer and the protection layer are replaceable ring-shaped members.

BRIEF DESCRIPTION OF DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: [0018] FIG. 1 is a sectional view of a conventional semiconductor manufacturing device 1 for processing a wafer substrate 2 in a chamber 30.

[0019] FIG. 2 is an enlarged view of the portion A in FIG. 1.

[0020] FIG. 3 is a partial enlarged view of the semiconductor manufacturing device 1 showing that the groove 14 is filled with glue 4.

[0021] FIG. 4 is a partial enlarged view of the semiconductor manufacturing device 1 showing that the glue 4 in the groove 14 is eroded by plasma gas.

[0022] FIG. 5 is a partial sectional view of a semiconductor manufacturing device for processing a wafer substrate W in accordance with an embodiment of the invention.

[0023] FIG. 6 is a partial enlarged view of the semiconductor manufacturing device of FIG. 5.

[0024] FIG. 7 is a partial enlarged view of a semiconductor manufacturing device in accordance with another embodiment of the invention.

[0025] FIGs. 8-11 are enlarged radial sectional views of the resilient layer R2 before assembly in accordance with some embodiments of the invention.

[0026] FIG. 12 is an enlarged radial sectional view of the protection layer R3 before assembly, in accordance with an embodiment of the invention.

[0027] FIGs. 13-15 are partial enlarged views of the semiconductor manufacturing device showing that the groove 54 forms at least a chamfered surface, in accordance with some embodiments of the invention.

DETAILED DESCRIPTION OF INVENTION

[0028] The making and using of the embodiments of the sealing mechanism are discussed in detail below. It should be appreciated, however, that the embodiments provide many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the embodiments, and do not limit the scope of the disclosure.

[0029] Unless defined otherwise, all technical and scientific tetras used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It should he appreciated that each term, which is defined in a commonly used dictionary, should he interpreted as having a meaning conforming to the relative skills and the background or the context of the present disclosure, and should not be interpreted in an idealized or overly formal manner unless defined otherwise.

[0030] In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings, and in which specific embodiments of which the invention may be practiced are shown by way of illustration. In this regard, directional terminology, such as "top," "bottom," "left," "right," "front," "back," etc., is used with reference to the orientation of the figures being described. The components of the present invention can he positioned in a number of different orientations. As such, the directional terminology is used for the purposes of illustration and is in no way limiting.

[0031] FIG. 5 is a partial sectional view of a semiconductor manufacturing device for processing a wafer substrate W in accordance with an embodiment of the invention. Referring to FIG. 5, the semiconductor manufacturing device may be a plasma etching device that includes a susceptor 50 and an annular extending element 60 surrounding the susceptor 50. The annular extending element 60 may be a focus ring, and it may comprise ceramic, silicon carbide, or quartz for performing plasma etching operations on a surface of the wafer substrate W. [0032] In this embodiment, the susceptor 50 comprises a main body 51, a support element 52, and a connection layer 53 disposed between the main body 51 and the support element 52. The wafer substrate W is disposed on the support element 52, and an annular groove 54 on the lateral side of the susceptor 50 is formed by the main body 51, the support element 52, and the connection layer 53. Specifically, a sealing mechanism R is disposed in the annular groove 54 to prevent the processing gas (e.g. plasma gas) from intruding into the connection layer 53, so that corrosion of the electrodes inside the connection layer 53 can he efficiently avoided. Moreover, the sealing mechanism R can also prevent the processing gas inside the susceptor 50 from leaking via the annular groove 54.

[0033] FIG. 6 is a partial enlarged view of the semiconductor manufacturing device of FIG. 5. Referring to FIG. 6, the connection layer 53 of the susceptor 50 comprises two metal conductors El and E2 (e.g. aluminum electrodes) that are encompassed by glue G. 25 The glue G may be thermal glue that can firmly adhere the support element 52 to the main body 51 of the susceptor 50.

100341 Additionally, an insulating layer C (e.g. aluminum oxide) is coated on a surface of (he main body 51 of the susceptor 50 and abuts the connection layer 53 and the sealing mechanism R. Therefore, corrosion of the connection layer 53 can be efficiently avoided, and short circuit between the electrodes in the connection layer 53 and the conductors in the main body 51 can also be prevented.

100351 In this embodiment, the groove 54 forms a trapezoid in cross-section, and the sealing mechanism R includes a sealing layer R1, a resilient layer R2, and a protection layer R3. The sealing layer RI may comprise silicone or F-based glue, and it is disposed on the inner side of the groove 54. As shown in FIG. 6, since the scaling layer R1 is compressed toward the connection layer 53 by the resilient layer R2 and the protection layer R3, it can tightly contact (he glue G of the connection layer 53 and (he main body 51 and the support element 52 of the susceptor 50 to provide a scaling effect. Moreover, the resilient layer R2 may comprise a rubber material (e.g. a replaceable rubber band), and it surrounds and encompasses the scaling layer RI.

100361 Still referring to FIG. 6, the protection layer R3 is disposed on the outer side of the resilient layer R2 as a hoop. In this embodiment, the protection layer R3 may comprise Polytetratluoroethene (PTFE) or Teflon. As the hardness of the protection layer R3 is greater than that of the resilient layer R2, the resilient layer R2 can be effectively pressed by the protection layer R3 along a radially inward direction of the sealing mechanism R (i.e. toward the connection layer 53). Therefore, the sealing layer RI and the resilient layer R2 can lightly contact (he surface of the groove 54 to prevent the connection layer 53 from corrosion by the processing gas (e.g. plasma gas).

100371 FIG. 6 further shows that the groove 54 forms a chamfered surface 541 (e.g. slope surface), and the width of the groove 54 gradually increases from inside to outside.

Here, the sealing layer R1, the resilient layer R2, and the protection layer R3 are all in tight contact with the chamfered surface 541 to effectively seal the opening of the groove 54.

[0038] In this embodiment, the resilient layer R2 has a first thickness hl in an axial direction, the protection layer R3 has a second thickness h2 in an axial direction that is substantially perpendicular to the wafer substrate W, and the opening of the groove 54 has a width H in the axial direction (FIG. 6). The second thickness h2 is greater than the first thickness hl (h2>h1), and the second thickness h2 is substantially equal to the width H (h2=H).

[0039] FIG. 7 is a partial enlarged view of a semiconductor manufacturing device in accordance with another embodiment of the invention. FIG. 7 is different FIG. 6 in that the protection layer R3 is not in contact with the chamfered surface 541 of the groove 54 (only the sealing layer RI and the resilient layer R2 contact the chamfered surface 541). Therefore, mechanical interference between the protection layer R3 and the main body 51 of the susceptor 50 can be reduced, and the protection layer R3 can provide and concentrate a radial constraining force toward the connection layer 53 on the resilient layer R2, thus improving the performance of the sealing mechanism R. [0040] In this embodiment, the resilient layer R2 has a first thickness hl in an axial direction, the protection layer R3 has a second thickness h2 in the axial direction, and the opening of the groove 54 has a width H in the axial direction (FIG. 7). The second thickness h2 is substantially equal to or less than the first thickness hl (h2<h1), and the second thickness h2 is less than the width H (112<H).

[0041] FIGs. 8-11 are enlarged radial sectional views of the resilient layer R2 before assembly in accordance with some embodiments of the invention. Referring to FIG. 8, the resilient layer R2 may comprise a rubber material (e.g. a replaceable 0-ring or rubber band), and it has a rectangular or other longitudinal rectangular shape in the radial cross-section.

The longitudinal cross-section has a first thickness hl in the axial direction and a first width dl in the radial direction, wherein the first thickness hl is greater than the first width dl (hl>d1).

[0042] Referring to FIGs. 9-11, in some embodiments, the resilient layer R2 may have a curved shape (FIG. 9) or a wavy shape (FIG. 10) in the radial cross-section. Additionally, in so me embodiments, the resilient layer R2 may form a curved structure that has a concave profile (FIG. 9) or a convex profile (FIG. 11) in the radial cross-section. When the resilient layer R2 is hooped and pressed by the protection layer R3 in the radially inward direction of the sealing mechanism R (i.e. toward the connection layer 53), the resilient layer R2 can tightly contact the connection layer 53, the main body 51 and the support element 52 of the susceptor 50 to protect the electrodes inside the connection layer 53 from being corroded by the processing gas (e.g. plasma gas).

[0043] FIG. 12 is an enlarged radial sectional view of the protection layer R3 before assembly, in accordance with an embodiment of the invention. Referring to FIG. 12, the protection layer R3 may he an annular ring that comprises Polytetrafluoroethene (PTFE) or Teflon, and it has a substantially rectangular or other longitudinal shape in the radial cross-section. The longitudinal cross-section has a second thickness h2 in the axial direction and a second width d2 in the radial direction, wherein the second thickness h2 is greater than the second width d2 (h2>d2). Specifically, the longitudinal cross-section forms at least a chamfered surface R31 to reduce mechanical interference between the protection layer R3 and the susceptor 50 during assembly, thus facilitating easy and efficient assembly of the sealing mechanism R. [0044] FIGs. 13-15 are partial enlarged views of the semiconductor manufacturing device showing that the groove 54 forms at least a chamfered surface, in accordance with some embodiments of the invention. Referring to FIGs. 13 and 14, a chamfered surface 541 is formed on the lower side of the groove 54, and another chamfered surface 542 is formed on the upper side of the groove 54. It should be noted that the chamfered surface 541 may comprise a curved surface (FIG. 13) or a slope surface (FIG. 14), and the chamfered surface 542 may also comprise a curved surface or a slope surface (FIG. 14).

[0045] In FIG. 13, an insulating layer C (e.g. aluminum oxide) is coated on the chamfered surface 541 to enhance protection of the main body 51 of the susceptor 50. In FIG. 14, two insulating layers C (e.g. aluminum oxide) are respectively coated on the chamfered surfaces 541 and 542 to enhance protection of the main body 51 and the support element 52 of the susceptor SO.

[0046] In the embodiment of FIG. 15, only one chamfered surface 542 is formed on the upper side of the groove 54, and two insulating layers C are respectively formed on the main body 51 and the support element 52 of the susceptor 50 (including the chamfered surface 542), to enhance protection of the main body 51 and the support element 52 of the susceptor 50.

[0047] As mentioned above, the invention provides a sealing mechanism R that can he assembled to a groove 54 of a susceptor 50 of a semiconductor manufacturing device, whereby processing gas (e.g. plasma gas) would not intrude into the susceptor 50, and corrosion of the electrodes inside the connection layer 53 of the susceptor 50 can he efficiently avoided. Moreover, micro-arcing, abnormal voltage signal, and leakage of electricity or gas (e.g. He) can also he efficiently prevented during operation of the semiconductor manufacturing device. In some embodiments, the sealing mechanism R includes a sealing layer R1, a resilient layer R2, and a protection layer R3, wherein the hardness of the protection layer R3 is greater than that of the resilient layer R2, and the resilient layer R2 can be effectively hooped and pressed by the protection layer R3 along a radially inward direction of the sealing mechanism R. Therefore, the resilient layer R2 can deform and tightly contact the sealing layer RI to enhance the sealing performance.

100481 During assembly of the sealing mechanism R, the sealing layer R1 (e.g. silicone) is disposed on the inner side of the groove 54, and then the resilient layer R2 (e.g. replaceable 0-ring or rubber band) is wrapped around scaling layer R I. Subsequently, the protection layer R3 (e.g. replaceable Teflon ring) is disposed around the resilient layer R2, so that the resilient layer R2 can he tightly hooped and compressed by the protection layer R3. As the resilient layer R2 and the protection layer R3 are replaceable ring-shaped members, it is easy to assemble for maintenance of the sealing mechanism R. Therefore, the maintenance cost can he greatly reduced, and the production yield of the semiconductor manufacturing device can be efficiently improved.

100491 Although some embodiments of the present disclosure and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can he made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. For example, it will be readily understood by those skilled in the art that many of the features, functions, processes, and materials described herein may be varied while remaining within the scope of the present disclosure. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, compositions of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may he utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. Moreover, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

10050] While the invention has been described by way of example and in terms of preferred embodiment, it should he understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation to encompass all such modifications and similar arrangements. ii

Claims

What is claimed is: 1. A sealing mechanism disposed in a semiconductor manufacturing device that comprises a susceptor, wherein the susceptor has a main body, a support. element for supporting a wafer substrate, and a connection layer disposed between the main body and the support element, wherein an annular groove is formed by the main body, the support. element, and the connection layer, and the sealing mechanism comprises: an annular sealing layer, disposed in the groove and connected to the main body, the support element, and the connection layer; an annular resilient layer, disposed in the groove and surrounding the sealing layer; and an annular protection layer, disposed in the groove and surrounding the resilient layer, wherein the hardness of the protection layer is greater than that of the resilient layer, and the resilient layer is pressed by the protection layer in an inward direction of the sealing mechanism to prevent the connection layer from being eroded by a processing gas.
2. The sealing mechanism as claimed in claim 1, wherein the sealing layer comprises silicone or F-based glue.
3. The sealing mechanism as claimed in claim 1 or claim 2, wherein the resilient layer comprises rubber.
4. The sealing mechanism as claimed in any preceding claim, wherein the protection layer comprises Polytetrafluoroethene (PTFE).
5. The sealing mechanism as claimed in any preceding claim, wherein the groove forms a chamfered surface abutting the sealing layer and the resilient layer.
6. The sealing mechanism as claimed in any preceding claim, wherein the resilient layer has a first thickness in an axial direction perpendicular to the wafer substrate, and the protection layer has a second thickness in the axial direction, wherein the second thickness is greater than the first thickness.
7. The sealing mechanism as claimed in any preceding claim, wherein the resilient layer has a longitudinal, curved or wavy shape in a radial cross-section.
8. The sealing mechanism as claimed in any preceding claim, wherein the resilient layer has a concave or convex profile in a radial cross-section.
9. The sealing mechanism as claimed in any preceding claim, wherein the protection layer has a longitudinal shape in a radial cross-section, and the longitudinal shape forms a chamfered surface.
10. The sealing mechanism as claimed in any preceding claim, wherein the main body has an insulating layer connecting to the sealing layer and the resilient layer.
11. A sealing mechanism disposed in a semiconductor manufacturing device that comprises a susceptor, wherein the susceptor has a main body, a support clement for supporting a wafer substrate, and a connection layer disposed between the main body and the support element, wherein an annular groove is formed by the main body, the support clement, and the connection layer, and the scaling mechanism comprises: an annular sealing layer, disposed in the groove and connected to the main body, the support clement, and the connection layer; an annular resilient layer, disposed in the groove and surrounding the sealing layer; and an annular protection layer, disposed in the groove and surrounding the resilient layer, wherein the hardness of the protection layer is greater than that of the 2 0 resilient layer; wherein the resilient layer has a first thickness in an axial direction perpendicular to the wafer substrate, and the protection layer has a second thickness in the axial direction, wherein the second thickness is equal to or less than the first thickness.
2 5 12. The sealing mechanism as claimed in claim 11, wherein the sealing layer comprises silicone or F-based glue.
13. The sealing mechanism as claimed in claim 11 or claim 12, wherein the resilient layer comprises rubber.
14. The sealing mechanism as claimed in any one of claims 11 to 13, wherein the protection layer comprises Polytetrafluoroethene (PTFE).
15. The sealing mechanism as claimed in any one of claims 11 to 14, wherein the groove forms a chamfered surface abutting the sealing layer and the resilient layer.
16. The sealing mechanism as claimed in any one of claims 11 to 15, wherein the resilient layer and the protection layer are replaceable ring-shaped members.
17. The sealing mechanism as claimed in any one of claims 11 to 16, wherein the resilient layer has a longitudinal, curved or wavy shape in a radial cross-section.
18. The sealing mechanism as claimed in any one of claims 11 to 17, wherein the resilient layer has a concave or convex profile in a radial cross-section.
19. The sealing mechanism as claimed in any one of claims 11 to 18, wherein the protection layer has a longitudinal shape in a radial cross-section, and the longitudinal shape forms a chamfered surface.
20. The sealing mechanism as claimed in any one of claims 11 to 19, wherein the main body has an insulating layer connecting to the sealing layer and the resilient layer.